TW201310908A - Under-voltage lockup circuit and high voltage device circuit having the same - Google Patents

Under-voltage lockup circuit and high voltage device circuit having the same Download PDF

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TW201310908A
TW201310908A TW100129236A TW100129236A TW201310908A TW 201310908 A TW201310908 A TW 201310908A TW 100129236 A TW100129236 A TW 100129236A TW 100129236 A TW100129236 A TW 100129236A TW 201310908 A TW201310908 A TW 201310908A
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voltage
high voltage
circuit
supply
power
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TW100129236A
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TWI473428B (en
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Chowpeng Lee
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Himax Analogic Inc
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Abstract

An under-voltage lockup circuit used in a high voltage device circuit is provided. The under-voltage lockup circuit comprises a load for receiving a first supply voltage, a reference high voltage transistor, a bias current source, a comparison current source and a comparison high voltage transistor. The reference high voltage transistor connected to the load has a gate for receiving a default reference voltage. The bias current source is connected between the drain of the reference high voltage transistor and a negative ground potential. An input gate of the comparison high voltage transistor is connected to the drain of the reference high voltage transistor. When the first supply voltage increases to a specific high level, the current-draining ability of the comparison high voltage transistor is greater than the current-supplying ability of the comparison current source connected to the output drain to make the output drain generate a power-activating signal.

Description

高壓元件電路及其電壓過低鎖定電路High voltage component circuit and its under voltage lockout circuit

本揭示內容是有關於一種電路,且特別是有關於一種高壓元件電路及其電壓過低鎖定電路。The present disclosure relates to a circuit, and more particularly to a high voltage component circuit and its under voltage lockout circuit.

高壓元件及電路系統應用範圍非常廣泛,舉凡電源供應器、汽車電子、顯示器驅動、馬達控制與照明設備等民生電子產品,皆可見其蹤跡。近年來,由於環保與能源問題,各國皆致力於發展節能產品,若能進一步拓展高壓元件及電路系統應用,對節能電子產品之開發有極大之助益。High-voltage components and circuit systems are used in a wide range of applications, such as power supply, automotive electronics, display drivers, motor control and lighting equipment, such as live electronic products. In recent years, due to environmental protection and energy issues, all countries are committed to the development of energy-saving products. If we can further expand the application of high-voltage components and circuit systems, it will greatly contribute to the development of energy-saving electronic products.

電壓過低鎖定電路可以對電路的電源電壓進行控制,以在供應電壓到達適當的準位時起始將電源電壓送至功能電路中,並在供應電壓過低時停止供應電源電壓至功能電路,達到電路保護之功效。然而,在高壓元件電路的環境下,用以建構電壓過低鎖定電路的部份模組由於習知的元件如電阻、電容等無法承受高壓,將難以於高壓元件電路的環境中實現。The under-voltage lockout circuit can control the power supply voltage of the circuit to initially send the power supply voltage to the functional circuit when the supply voltage reaches an appropriate level, and stop supplying the power supply voltage to the functional circuit when the supply voltage is too low. Achieve the benefits of circuit protection. However, in the environment of the high-voltage component circuit, some of the modules for constructing the under-voltage lockout circuit cannot be subjected to high voltage due to conventional components such as resistors, capacitors, etc., and it will be difficult to implement in the environment of the high-voltage component circuit.

因此,如何設計一個新的電壓過低鎖定電路,以應用於高壓元件電路中,乃為此一業界亟待解決的問題。Therefore, how to design a new voltage under-lock circuit for use in high-voltage component circuits is an urgent problem to be solved in the industry.

因此,本揭示內容之一態樣是在提供一種電壓過低鎖定(under voltage lock-up)電路,應用於高壓元件電路中,電壓過低鎖定電路包含:負載模組、參考電位高壓電晶體、偏壓電流源模組、比較電流源模組以及比較高壓電晶體。負載模組之第一端用以接收第一供應電壓。參考電位高壓電晶體包含接收參考預設電位之閘極,以及連接於負載模組之第二端之源極。偏壓電流源模組連接於參考電位高壓電晶體之汲極以及負接地電位間。比較高壓電晶體包含連接於參考電位高壓電晶體之汲極之輸入閘極以及連接於比較電流源模組之輸出汲極。其中當第一供應電壓提升至特定高準位,係使比較高壓電晶體導通,且使其電流汲取能力大於比較電流源模組之電流供應能力,進一步使輸出汲極產生電源啟動訊號。Therefore, one aspect of the present disclosure is to provide an under voltage lock-up circuit for use in a high voltage component circuit, the voltage under low lockout circuit includes: a load module, a reference potential high voltage transistor , bias current source module, comparison current source module and comparative high voltage transistor. The first end of the load module is configured to receive the first supply voltage. The reference potential high voltage transistor includes a gate that receives a reference preset potential and a source that is coupled to the second end of the load module. The bias current source module is connected between the drain of the reference potential high voltage transistor and the negative ground potential. The comparative high voltage transistor includes an input gate connected to the drain of the reference potential high voltage transistor and an output drain connected to the comparison current source module. When the first supply voltage is raised to a specific high level, the comparative high voltage transistor is turned on, and the current extraction capability is greater than the current supply capability of the comparison current source module, further causing the output drain to generate a power activation signal.

依據本揭示內容一實施例,其中偏壓電流源模組包括第一電流源,依據第一供應電壓而運作,以及第二電流源,依據第二供應電壓運作,其中第二供應電壓低於第一供應電壓。According to an embodiment of the present disclosure, the bias current source module includes a first current source that operates according to the first supply voltage, and the second current source operates according to the second supply voltage, wherein the second supply voltage is lower than the first A supply voltage.

依據本揭示內容另一實施例,其中輸出汲極連接於奇數個反相器,以藉由奇數個反相器輸出電源啟動訊號。電源啟動訊號輸出至高壓電源啟動電路或常壓電源啟動電路,俾控制高壓元件電路之高壓電源供應電路以及常壓電源供應電路分別提供高壓電源以及常壓電源。In accordance with another embodiment of the present disclosure, the output dipole is coupled to an odd number of inverters to output a power enable signal by an odd number of inverters. The power start signal is output to the high voltage power start circuit or the normal voltage power start circuit, and the high voltage power supply circuit and the normal voltage power supply circuit for controlling the high voltage component circuit respectively provide a high voltage power supply and a normal voltage power supply.

依據本揭示內容又一實施例,其中參考電位高壓電晶體之基極(bulk)係與參考電位高壓電晶體之源極相連接。According to still another embodiment of the present disclosure, the base of the reference potential high voltage transistor is connected to the source of the reference potential high voltage transistor.

依據本揭示內容再一實施例,其中負載模組包含複數相串聯之二極體連接形式(diode-connected)高壓電晶體。電壓過低鎖定電路更包含延遲開關,連接於負載模組之高壓電晶體至少其中之一之兩端,並用以接收電源啟動訊號,當第一供應電壓降低至第一特定低電壓準位,延遲開關係使高壓電晶體至少其中之一短路,以使輸出汲極繼續輸出電源啟動訊號。當第一供應電壓降至低於第一特定低電壓準位之第二特定低電壓準位,比較高壓電晶體係關閉,輸出汲極停止輸出電源啟動訊號。當第一供應電壓提升至特定高準位時,第一供應電壓係大於負載模組之高壓電晶體之臨界電壓以及比較高壓電晶體之臨界電壓之和。According to still another embodiment of the present disclosure, the load module includes a plurality of diode-connected diode-connected high voltage transistors. The undervoltage lockout circuit further includes a delay switch connected to at least one of the high voltage transistors of the load module and configured to receive the power supply start signal, when the first supply voltage is lowered to the first specific low voltage level, The delayed open relationship shorts at least one of the high voltage transistors to cause the output drain to continue to output a power enable signal. When the first supply voltage drops to a second specific low voltage level lower than the first specific low voltage level, the high voltage cell system is turned off, and the output buck is stopped to output the power supply start signal. When the first supply voltage is raised to a certain high level, the first supply voltage is greater than the sum of the threshold voltage of the high voltage transistor of the load module and the threshold voltage of the comparative high voltage transistor.

依據本揭示內容更具有之一實施例,更包含去耦高壓電晶體,連接於參考電位高壓電晶體之源極。According to an embodiment of the present disclosure, there is further provided a decoupling high voltage transistor connected to a source of a reference potential high voltage transistor.

本揭示內容之另一態樣是在提供一種高壓元件電路,包含:至少一高壓功能模組、高壓電源供應電路以及電壓過低鎖定電路。高壓功能模組包含至少一高壓元件。高壓電源供應電路用以根據電源啟動訊號供應高壓電源至高壓功能模組。電壓過低鎖定電路包含:負載模組、參考電位高壓電晶體、偏壓電流源模組、比較電流源模組以及比較高壓電晶體。負載模組之第一端用以接收第一供應電壓。參考電位高壓電晶體包含接收參考預設電位之閘極,以及連接於負載模組之第二端之源極。偏壓電流源模組連接於參考電位高壓電晶體之汲極以及負接地電位間。比較高壓電晶體包含連接於參考電位高壓電晶體之汲極之輸入閘極以及連接於比較電流源模組之輸出汲極。其中當第一供應電壓提升至特定高準位,係使比較高壓電晶體導通,且使其電流汲取能力大於比較電流源模組之電流供應能力,進一步使輸出汲極產生電源啟動訊號。Another aspect of the present disclosure is to provide a high voltage component circuit comprising: at least one high voltage functional module, a high voltage power supply circuit, and a low voltage lockout circuit. The high voltage function module includes at least one high voltage component. The high voltage power supply circuit is used to supply the high voltage power supply to the high voltage function module according to the power supply start signal. The under voltage lockout circuit comprises: a load module, a reference potential high voltage transistor, a bias current source module, a comparison current source module, and a comparative high voltage transistor. The first end of the load module is configured to receive the first supply voltage. The reference potential high voltage transistor includes a gate that receives a reference preset potential and a source that is coupled to the second end of the load module. The bias current source module is connected between the drain of the reference potential high voltage transistor and the negative ground potential. The comparative high voltage transistor includes an input gate connected to the drain of the reference potential high voltage transistor and an output drain connected to the comparison current source module. When the first supply voltage is raised to a specific high level, the comparative high voltage transistor is turned on, and the current extraction capability is greater than the current supply capability of the comparison current source module, further causing the output drain to generate a power activation signal.

依據本揭示內容一實施例,其中偏壓電流源模組包括第一電流源,依據第一供應電壓而運作,以及第二電流源,依據第二供應電壓運作,其中第二供應電壓低於第一供應電壓。According to an embodiment of the present disclosure, the bias current source module includes a first current source that operates according to the first supply voltage, and the second current source operates according to the second supply voltage, wherein the second supply voltage is lower than the first A supply voltage.

依據本揭示內容另一實施例,其中輸出汲極連接於奇數個反相器,以藉由奇數個反相器輸出電源啟動訊號。In accordance with another embodiment of the present disclosure, the output dipole is coupled to an odd number of inverters to output a power enable signal by an odd number of inverters.

依據本揭示內容又一實施例,高壓元件電路更包含高壓電源啟動電路,電源啟動訊號係使高壓電源啟動電路啟動高壓電源供應電路,以供應高壓電源至高壓功能模組。According to still another embodiment of the present disclosure, the high voltage component circuit further includes a high voltage power supply starting circuit, and the power startup signal enables the high voltage power supply starting circuit to start the high voltage power supply circuit to supply the high voltage power supply to the high voltage function module.

依據本揭示內容再一實施例,高壓元件電路,更包含一常壓電源啟動電路、至少一常壓功能模組以及一常壓電源供應電路,該電源啟動訊號更輸出至該常壓電源啟動電路,以供應一常壓電源至該常壓功能模組。According to still another embodiment of the present disclosure, the high voltage component circuit further includes a normal voltage power source starting circuit, at least one normal voltage function module, and a normal voltage power supply circuit, and the power source startup signal is further outputted to the normal voltage power source starting circuit. To supply a normal voltage power supply to the atmospheric pressure function module.

依據本揭示內容更具有之一實施例,其中參考電位高壓電晶體之基極(bulk)係與參考電位高壓電晶體之源極相連接。According to the present disclosure, there is an embodiment in which the base of the reference potential high voltage transistor is connected to the source of the reference potential high voltage transistor.

依據本揭示內容再具有之一實施例,其中負載模組包含複數相串聯之二極體連接形式(diode-connected)高壓電晶體。電壓過低鎖定電路更包含延遲開關,連接於負載模組之高壓電晶體至少其中之一之兩端,並用以接收電源啟動訊號,當第一供應電壓降低至第一特定低電壓準位,延遲開關係使高壓電晶體至少其中之一短路,以使輸出汲極繼續輸出電源啟動訊號。當第一供應電壓降至低於第一特定低電壓準位之第二特定低電壓準位,比較高壓電晶體係關閉,輸出汲極停止輸出電源啟動訊號。當第一供應電壓提升至特定高準位時,第一供應電壓係大於負載模組之高壓電晶體之臨界電壓以及比較高壓電晶體之臨界電壓之和。According to still another embodiment of the present disclosure, the load module includes a plurality of diode-connected diode-connected high voltage transistors. The undervoltage lockout circuit further includes a delay switch connected to at least one of the high voltage transistors of the load module and configured to receive the power supply start signal, when the first supply voltage is lowered to the first specific low voltage level, The delayed open relationship shorts at least one of the high voltage transistors to cause the output drain to continue to output a power enable signal. When the first supply voltage drops to a second specific low voltage level lower than the first specific low voltage level, the high voltage cell system is turned off, and the output buck is stopped to output the power supply start signal. When the first supply voltage is raised to a certain high level, the first supply voltage is greater than the sum of the threshold voltage of the high voltage transistor of the load module and the threshold voltage of the comparative high voltage transistor.

依據本揭示內容一實施例,電壓過低鎖定電路更包含去耦高壓電晶體,連接於參考電位高壓電晶體之源極。According to an embodiment of the present disclosure, the voltage under-lock circuit further includes a decoupling high voltage transistor connected to a source of the reference potential high voltage transistor.

應用本揭示內容之優點係在於藉由負載模組及比較高壓電晶體之設置,使無法採用電阻的高壓元件電路環境亦能實現電壓過低鎖定之功效,而輕易地達到上述之目的。The advantage of the application of the present disclosure is that the high-voltage component circuit environment in which the resistor cannot be used can also achieve the function of under-voltage locking by the setting of the load module and the comparative high-voltage transistor, and the above purpose can be easily achieved.

請參照第1圖。第1圖為本揭示內容一實施例之一高壓元件電路1之方塊圖。高壓元件電路1包含:電壓過低鎖定電路10、高壓電源啟動電路12以及高壓功能模組14。Please refer to Figure 1. 1 is a block diagram of a high voltage component circuit 1 according to an embodiment of the present disclosure. The high voltage component circuit 1 includes a voltage undervoltage lockout circuit 10, a high voltage power supply startup circuit 12, and a high voltage function module 14.

電壓過低鎖定電路10用以接收第一供應電壓11,以在第一供應電壓11到達一個特定高準位時,產生電源啟動訊號13至高壓電源供應電路12。高壓電源啟動電路12將因而驅動高壓功能模組14中的高壓電源供應電路(未繪示)開始供電,俾使高壓功能模組14啟始運作。於一實施例中,高壓元件電路1亦可包含常壓電源啟動電路12’以及常壓功能模組14’,高壓電源啟動電路12可進一步使常壓電源啟動電路12’驅動常壓功能模組14’中的常壓電源供應電路(未繪示)開始供電,以使常壓功能模組14’啟始運作。The voltage under-lock circuit 10 is configured to receive the first supply voltage 11 to generate the power-on signal 13 to the high-voltage power supply circuit 12 when the first supply voltage 11 reaches a certain high level. The high voltage power supply starting circuit 12 will thus drive the high voltage power supply circuit (not shown) in the high voltage function module 14 to start power supply, so that the high voltage function module 14 starts to operate. In an embodiment, the high voltage component circuit 1 can also include a normal voltage power source starting circuit 12' and a normal voltage function module 14'. The high voltage power source starting circuit 12 can further enable the normal voltage power source starting circuit 12' to drive the normal voltage function module. The normal voltage power supply circuit (not shown) in 14' starts to supply power, so that the atmospheric pressure function module 14' starts to operate.

於一實施例中,高壓功能模組14包含至少一個高壓元件,如高壓的P型及N型金氧半電晶體。一般而言,高壓元件是指可以承受至少10伏特或以上的電子元件,而相對於高壓功能模組14的常壓功能模組14’則包含僅能承受較低的小電壓,如5伏特或3.3伏特的P型及N型金氧半電晶體。需注意的是,上述之數值僅為舉例,並非用以限定高壓及常壓元件所承受的電壓值。In one embodiment, the high voltage functional module 14 includes at least one high voltage component, such as a high voltage P-type and N-type metal oxide semiconductor. In general, a high voltage component refers to an electronic component that can withstand at least 10 volts or more, while a normal voltage functional module 14' with respect to the high voltage functional module 14 contains only a small, low voltage, such as 5 volts or 3.3 volt P-type and N-type gold oxide semi-transistors. It should be noted that the above values are only examples, and are not intended to limit the voltage values that high voltage and atmospheric components are subjected to.

請同時參考第2圖。第2圖為本揭示內容一實施例中,第1圖中的電壓過低鎖定電路10更詳細之電路圖。電壓過低鎖定電路10包含:負載模組20、參考電位高壓電晶體22、偏壓電流源模組24、比較電流源模組26以及比較高壓電晶體28。Please also refer to Figure 2. Fig. 2 is a more detailed circuit diagram of the voltage under-lock circuit 10 of Fig. 1 in an embodiment of the disclosure. The under voltage lockout circuit 10 includes a load module 20, a reference potential high voltage transistor 22, a bias current source module 24, a comparison current source module 26, and a comparative high voltage transistor 28.

負載模組20之第一端用以接收第一供應電壓11。於本實施例中,負載模組20是由數個相串聯之二極體連接形式高壓電晶體形成。一實施例中,此些二極體連接形式高壓電晶體為二極體連接形式之P型高壓金氧半電晶體。參考電位高壓電晶體22於本實施例中,為一基極(bulk)與源極相連接之P型高壓金氧半電晶體,其閘極用以接收參考預設電位。於本實施例中,參考預設電位為約零伏特之接地電位GND。參考電位高壓電晶體22之源極則連接於負載模組20的第二端。由於參考電位高壓電晶體22之設置,將可確保第一供應電壓11的值是相對此參考預設電位GND而非相對於負接地電位VGL。The first end of the load module 20 is configured to receive the first supply voltage 11. In this embodiment, the load module 20 is formed by a plurality of high voltage transistors in the form of a diode connected in series. In one embodiment, the diode-connected high voltage transistors are P-type high voltage MOS semi-transistors in the form of a diode connection. In the present embodiment, the reference potential high voltage transistor 22 is a P-type high voltage MOS transistor connected to a source and a source for receiving a reference preset potential. In the present embodiment, the reference potential is a ground potential GND of about zero volts. The source of the reference potential high voltage transistor 22 is connected to the second end of the load module 20. Due to the setting of the reference potential high voltage transistor 22, it will be ensured that the value of the first supply voltage 11 is relative to the reference preset potential GND and not to the negative ground potential VGL.

偏壓電流源模組24連接於參考電位高壓電晶體22之汲極(於第2圖中繪示為I點)以及負接地電位VGL間。於一實施例中,偏壓電流源模組24包括第一電流源240,依據第一供應電壓11而運作,以及第二電流源242,依據第二供應電壓(未繪示)運作,其中第二供應電壓低於第一供應電壓11。於一實施例中,第一供應電壓11之電壓準位可供應至高壓元件,而第二供應電壓之電壓準位係供應至常壓元件。藉由第一電流源240及第二電流源242之設置,偏壓電流源模組24可以在較高的第一供應電壓尚未準備完全(如電路剛啟動而未達到準位時)而無法使第一電流源240運作時,仍可藉由第二電流源242輸出偏壓電流。比較高壓電晶體28於本實施例中為一N型高壓金氧半電晶體,其輸入閘極連接於參考電位高壓電晶體22之汲極(即I點),而其輸出汲極(於第2圖中繪示為O點)則連接於比較電流源模組26。於一實施例中,比較電流源模組26亦可如偏壓電流源模組24,包含兩個接收不同電壓而運作的電流源。The bias current source module 24 is connected between the drain of the reference potential high voltage transistor 22 (shown as point I in FIG. 2) and the negative ground potential VGL. In one embodiment, the bias current source module 24 includes a first current source 240 that operates in accordance with the first supply voltage 11 and a second current source 242 that operates in accordance with a second supply voltage (not shown), wherein The two supply voltages are lower than the first supply voltage 11. In an embodiment, the voltage level of the first supply voltage 11 can be supplied to the high voltage component, and the voltage level of the second supply voltage is supplied to the atmospheric component. By the arrangement of the first current source 240 and the second current source 242, the bias current source module 24 can not be made when the higher first supply voltage is not ready (if the circuit is just started but not up to the level) When the first current source 240 is in operation, the bias current can still be output by the second current source 242. The comparative high voltage transistor 28 is an N-type high voltage MOS transistor in this embodiment, the input gate of which is connected to the drain of the reference potential high voltage transistor 22 (ie, point I), and its output drain ( Connected to the comparison current source module 26 as shown in FIG. 2 as point O. In one embodiment, the comparison current source module 26 can also be a bias current source module 24, including two current sources that operate with different voltages.

請同時參照第3圖。第3圖為本揭示內容一實施例中,第一供應電壓11隨時間變化之示意圖。在初始之情形下,第一供應電壓11之準位較低,尚不足以使負載模組20中相串聯的P型金氧半電晶體導通,因此第2圖中的I點之電位將維持在低準位。比較高壓電晶體28因此而未導通,使得其輸出汲極O點由於比較電流源模組26之存在而維持在高準位。於本實施例中,輸出汲極O點更與奇數個反相器280相連接,以輸出低準位的訊號,因此使高壓電源啟動電路12尚未對高壓功能模組14的電源進行驅動。Please also refer to Figure 3. FIG. 3 is a schematic diagram of the first supply voltage 11 as a function of time in an embodiment of the disclosure. In the initial situation, the level of the first supply voltage 11 is low, which is not enough to turn on the P-type MOS transistors in the load module 20, so the potential at the I point in FIG. 2 will be maintained. At low levels. The comparative high voltage transistor 28 is thus not turned on such that its output drain O point is maintained at a high level due to the presence of the comparator current source module 26. In the present embodiment, the output drain O point is further connected to the odd number of inverters 280 to output a low level signal, so that the high voltage power supply starting circuit 12 has not yet driven the power of the high voltage function module 14.

在第一供應電壓11逐漸提升以後,將使I點的電位提高,進而使比較高壓電晶體28導通。於本實施例中,由於負載模組20具有三個相串聯的P型金氧半電晶體,再加上一個比較高壓電晶體28,因此第一供應電壓11需達到大於負載模組10之高壓電晶體之臨界電壓Vthp以及比較高壓電晶體之臨界電壓Vthn之和,即為3Vthp+Vthn的特定高準位,以使比較高壓電晶體28導通。After the first supply voltage 11 is gradually increased, the potential at the I point is increased, and the comparative high voltage transistor 28 is turned on. In this embodiment, since the load module 20 has three P-type MOS transistors connected in series, and a comparative high-voltage transistor 28, the first supply voltage 11 needs to be greater than that of the load module 10. The sum of the threshold voltage Vthp of the high-voltage crystal and the threshold voltage Vthn of the comparative high-voltage transistor is a specific high level of 3Vthp+Vthn to turn on the comparative high-voltage transistor 28.

因此,第一供應電壓11在提升至特定高準位後,將使比較高壓電晶體28導通。在比較高壓電晶體28導通後,其電流汲取能力將大於比較電流源模組26之電流供應能力,因此將拉低輸出汲極O點的電位。在經過奇數個反相器280後,將產生高電位之電源啟動訊號13。Therefore, after the first supply voltage 11 is raised to a certain high level, the comparative high voltage transistor 28 will be turned on. After comparing the high voltage transistor 28 to conduct, its current draw capability will be greater than the current supply capability of the comparator current source module 26, thus pulling down the potential of the output drain O point. After an odd number of inverters 280 have passed, a high potential power enable signal 13 will be generated.

請參照第4圖。第4圖為本揭示內容一實施例中,高壓電源啟動電路12及常壓電源啟動電路12’詳細之電路圖。高壓電源啟動電路12在接收到電源啟動訊號13,將產生高壓電源驅動訊號VGH_OKH,以啟始高壓功能模組14。高壓電源驅動訊號VGH_OKH可進一步做為驅動常壓電源啟動電路12’的訊號,以使其啟始常壓功能模組14’,並進入第3圖所繪示電源啟動之週期。需注意的是,於一實施例中,高壓電源啟動電路12所連接的VGH與VGL即相當於第2圖中的第一供應電壓11以及負接地電位,而常壓電源啟動電路12’所連接的VDD與VSS相當於第二供應電壓以及零接地電位。Please refer to Figure 4. Fig. 4 is a detailed circuit diagram of the high voltage power source starting circuit 12 and the normal voltage source starting circuit 12' in the embodiment of the present disclosure. Upon receiving the power start signal 13, the high voltage power start circuit 12 generates a high voltage power drive signal VGH_OKH to start the high voltage function module 14. The high voltage power supply driving signal VGH_OKH can be further used as a signal for driving the normal voltage power supply starting circuit 12' to start the normal voltage function module 14', and enter the cycle of the power supply starting as shown in Fig. 3. It should be noted that, in an embodiment, the VGH and VGL connected to the high voltage power supply starting circuit 12 correspond to the first supply voltage 11 and the negative ground potential in FIG. 2, and the normal voltage power source starting circuit 12' is connected. VDD and VSS correspond to the second supply voltage and zero ground potential.

而在第一供應電壓11降低後,在低於3Vthp+Vthn的特定高準位時,將無法再使比較高壓電晶體28導通,因此電源啟動訊號13將轉為低準位而使高壓電源啟動電路12及常壓電源啟動電路12’停止啟動高壓功能模組14及常壓功能模組14’。After the first supply voltage 11 is lowered, when the specific high level is lower than 3Vthp+Vthn, the comparative high-voltage transistor 28 can no longer be turned on, so the power-on signal 13 will be turned to the low level to make the high-voltage power supply. The starting circuit 12 and the normal voltage power starting circuit 12' stop starting the high voltage function module 14 and the normal pressure function module 14'.

因此,本揭示內容之電壓過低鎖定電路可藉由負載模組及比較高壓電晶體之設置,使無法採用電阻的高壓元件電路環境亦能實現電壓過低鎖定之功效,達到電路保護之作用。須注意的是,上述實施例中,負載模組20中的高壓電晶體之數目,以及P型及N型金氧半電晶體之配置,均可視實際需求進行調整,不為以上之敘述所限。Therefore, the voltage under-locking circuit of the present disclosure can achieve the function of under-voltage locking by using a load module and a comparative high-voltage transistor, so that the high-voltage component circuit environment in which the resistor cannot be used can achieve the function of circuit protection. . It should be noted that, in the above embodiments, the number of high-voltage transistors in the load module 20 and the configuration of the P-type and N-type MOS transistors can be adjusted according to actual needs, not the above description. limit.

請同時參照第5圖及第6圖。第5圖為本揭示內容另一實施例中,第1圖中的電壓過低鎖定電路10之電路圖。第6圖為本揭示內容另一實施例中,第一供應電壓11隨時間變化之示意圖。本實施例中之電壓過低鎖定電路10與第2圖所繪示的大同小異。第5圖中的電壓過低鎖定電路10更包含延遲開關50,連接於負載模組20之高壓P型電晶體至少其中之一之兩端。於本實施例中,延遲開關50連接於一個高壓P型電晶體的兩端,並接收電源啟動訊號13。於本實施例中,延遲開關50實質上是接收輸出汲極O點在經過兩個反相器後的訊號,相當於電源啟動訊號13之反相。Please also refer to Figure 5 and Figure 6. Fig. 5 is a circuit diagram of the voltage under-lock circuit 10 in Fig. 1 in another embodiment of the disclosure. FIG. 6 is a schematic diagram showing the first supply voltage 11 as a function of time in another embodiment of the disclosure. The voltage under-lock circuit 10 in this embodiment is similar to the one shown in FIG. The under-voltage lockout circuit 10 in FIG. 5 further includes a delay switch 50 connected to both ends of at least one of the high-voltage P-type transistors of the load module 20. In the present embodiment, the delay switch 50 is connected to both ends of a high voltage P-type transistor and receives the power start signal 13. In the present embodiment, the delay switch 50 is substantially a signal after receiving the output gate D point after passing through the two inverters, which is equivalent to the inversion of the power source start signal 13.

在電源啟動訊號13為高準位的情形下,延遲開關50將不會導通,因此不會對電壓過低鎖定電路10造成影響。然而在電源啟動訊號13由於第一供應電壓11降低至一個第一特定低電壓準位,如第6圖所繪示的3Vthp+Vthn,而自高準位轉換為低準位時,延遲開關50將導通而使其所連接的高壓P型電晶體短路。因此即使第一供應電壓11降低,亦可延遲其使電源啟動訊號13關閉的時間,達到使輸出汲極O點繼續輸出高準位之電源啟動訊號13,延遲電源之關閉的功效。因此,第一供應電壓需降至低於前述第一特定低電壓準位之第二特定低電壓準位,如第6圖所繪示的2Vthp+Vthn,才會使高壓電源啟動電路12及常壓電源啟動電路12’將電源關閉。In the case where the power-on signal 13 is at a high level, the delay switch 50 will not be turned on, and thus the voltage under-lock circuit 10 will not be affected. However, when the power supply start signal 13 is lowered to a first specific low voltage level due to the first supply voltage 11 as shown in FIG. 6 and 3Vthp+Vthn as shown in FIG. 6, the delay switch 50 is switched from the high level to the low level. It will be turned on to short-circuit the high-voltage P-type transistor to which it is connected. Therefore, even if the first supply voltage 11 is lowered, the time for turning off the power-on signal 13 can be delayed, and the power-on signal 13 for continuously outputting the high level at the output drain O point can be delayed, and the power supply is turned off. Therefore, the first supply voltage needs to be reduced to a second specific low voltage level lower than the first specific low voltage level, as shown in FIG. 6 of 2Vthp+Vthn, so that the high voltage power supply starting circuit 12 is The voltage source startup circuit 12' turns off the power.

本實施例中之電壓過低鎖定電路10可更包含一電容52,在此以去耦高壓電晶體實現,連接於參考電位高壓電晶體22之源極,以提供一個穩壓之作用。The voltage under-locking circuit 10 in this embodiment may further include a capacitor 52, which is implemented by decoupling a high voltage transistor, and is connected to the source of the reference potential high voltage transistor 22 to provide a voltage regulation function.

因此,本揭示內容之電壓過低鎖定電路可藉由負載模組及比較高壓電晶體之設置,使無法採用電阻的高壓元件電路環境亦能實現電壓過低鎖定之功效,達到電路保護之作用。更進一步的,藉由延遲開關之設置,可以達到延遲電源關閉之功效,使設計上更具有彈性。Therefore, the voltage under-locking circuit of the present disclosure can achieve the function of under-voltage locking by using a load module and a comparative high-voltage transistor, so that the high-voltage component circuit environment in which the resistor cannot be used can achieve the function of circuit protection. . Furthermore, by setting the delay switch, the effect of delaying the power-off can be achieved, making the design more flexible.

雖然本揭示內容已以實施方式揭露如上,然其並非用以限定本揭示內容,任何熟習此技藝者,在不脫離本揭示內容之精神和範圍內,當可作各種之更動與潤飾,因此本揭示內容之保護範圍當視後附之申請專利範圍所界定者為準。The present disclosure has been disclosed in the above embodiments, but it is not intended to limit the disclosure, and any person skilled in the art can make various changes and refinements without departing from the spirit and scope of the disclosure. The scope of protection of the disclosure is subject to the definition of the scope of the patent application.

1...高壓元件電路1. . . High voltage component circuit

10...電壓過低鎖定電路10. . . Low voltage lockout circuit

11...第一供應電壓11. . . First supply voltage

12...高壓電源啟動電路12. . . High voltage power supply starting circuit

12’...常壓電源啟動電路12’. . . Atmospheric power supply starting circuit

13...電源啟動訊號13. . . Power start signal

14...高壓功能模組14. . . High voltage function module

14’...常壓功能模組14’. . . Atmospheric pressure function module

20...負載模組20. . . Load module

22...參考電位高壓電晶體twenty two. . . Reference potential high voltage transistor

24...偏壓電流源模組twenty four. . . Bias current source module

240...第一電流源240. . . First current source

242...第二電流源242. . . Second current source

26...比較電流源模組26. . . Comparison current source module

28...比較高壓電晶體28. . . Comparing high voltage transistors

280...反相器280. . . inverter

50...延遲開關50. . . Delay switch

52...電容52. . . capacitance

為讓本揭示內容之上述和其他目的、特徵、優點與實施例能更明顯易懂,所附圖式之說明如下:The above and other objects, features, advantages and embodiments of the present disclosure will become more apparent and understood.

第1圖為本揭示內容一實施例之一高壓元件電路之方塊圖;1 is a block diagram of a high voltage component circuit according to an embodiment of the present disclosure;

第2圖為本揭示內容一實施例中,第1圖中的電壓過低鎖定電路更詳細之電路圖;2 is a more detailed circuit diagram of the voltage under-lock circuit of FIG. 1 in an embodiment of the disclosure;

第3圖為本揭示內容一實施例中,第一供應電壓隨時間變化之示意圖;3 is a schematic diagram of a first supply voltage changing with time in an embodiment of the disclosure;

第4圖為本揭示內容一實施例中,高壓電源啟動電路及常壓電源啟動電路詳細之電路圖;4 is a circuit diagram showing details of a high voltage power source starting circuit and a normal voltage power source starting circuit in an embodiment of the disclosure;

第5圖為本揭示內容另一實施例中,第1圖中的電壓過低鎖定電路之電路圖;以及Figure 5 is a circuit diagram of the voltage under-lock circuit of Figure 1 in another embodiment of the present disclosure;

第6圖為本揭示內容另一實施例中,第一供應電壓隨時間變化之示意圖。Figure 6 is a schematic diagram of the first supply voltage as a function of time in another embodiment of the disclosure.

10...電壓過低鎖定電路10. . . Low voltage lockout circuit

11...第一供應電壓11. . . First supply voltage

13...電源啟動訊號13. . . Power start signal

20...負載模組20. . . Load module

22...參考電位高壓電晶體twenty two. . . Reference potential high voltage transistor

24...偏壓電流源模組twenty four. . . Bias current source module

240...第一電流源240. . . First current source

242...第二電流源242. . . Second current source

26...比較電流源模組26. . . Comparison current source module

28...比較高壓電晶體28. . . Comparing high voltage transistors

280...反相器280. . . inverter

Claims (21)

一種電壓過低鎖定(under voltage lock-up)電路,應用於一高壓元件電路中,該電壓過低鎖定電路包含:一負載模組,該負載模組之一第一端用以接收一第一供應電壓;一參考電位高壓電晶體,包含接收一參考預設電位之閘極,以及連接於該負載模組之一第二端之源極;一偏壓電流源模組,連接於該參考電位高壓電晶體之汲極以及一負接地電位間;一比較電流源模組;以及一比較高壓電晶體,包含連接於該參考電位高壓電晶體之汲極之一輸入閘極以及連接於該比較電流源模組之一輸出汲極;其中當該第一供應電壓提升至一特定高準位,係使該比較高壓電晶體導通,且使其電流汲取能力大於該比較電流源模組之電流供應能力,進一步使該輸出汲極產生一電源啟動訊號。An under voltage lock-up circuit is applied to a high voltage component circuit, the voltage under low lock circuit includes: a load module, and the first end of the load module is configured to receive a first Supply voltage; a reference potential high voltage transistor, comprising a gate receiving a reference preset potential, and a source connected to a second end of the load module; a bias current source module connected to the reference a drain of the potential high voltage transistor and a negative ground potential; a comparison current source module; and a comparative high voltage transistor including one of the drain gates connected to the reference potential high voltage transistor and the connection And outputting a drain to one of the comparison current source modules; wherein when the first supply voltage is raised to a specific high level, the comparison high voltage transistor is turned on, and the current extraction capability is greater than the comparison current source mode The current supply capability of the group further causes the output buck to generate a power-on signal. 如請求項1所述之電壓過低鎖定電路,其中該偏壓電流源模組包括一第一電流源,依據該第一供應電壓而運作,以及一第二電流源,依據一第二供應電壓運作,其中該第二供應電壓係低於該第一供應電壓。The voltage under-locking circuit of claim 1, wherein the bias current source module comprises a first current source, operates according to the first supply voltage, and a second current source according to a second supply voltage Operating, wherein the second supply voltage is lower than the first supply voltage. 如請求項1所述之電壓過低鎖定電路,其中該輸出汲極連接於奇數個反相器,以藉由該奇數個反相器輸出該電源啟動訊號。The voltage under-locking circuit of claim 1, wherein the output drain is connected to an odd number of inverters to output the power-on signal by the odd-numbered inverters. 如請求項3所述之電壓過低鎖定電路,其中該電源啟動訊號係輸出至一高壓電源啟動電路或一常壓電源啟動電路,俾控制該高壓元件電路之一高壓電源供應電路以及一常壓電源供應電路分別提供一高壓電源以及一常壓電源。The voltage under-locking circuit of claim 3, wherein the power-on signal is output to a high-voltage power-start circuit or a normal-voltage power-start circuit, and a high-voltage power supply circuit and a normal voltage of the high-voltage component circuit are controlled. The power supply circuit provides a high voltage power supply and a normal voltage power supply, respectively. 如請求項1所述之電壓過低鎖定電路,其中該參考電位高壓電晶體之基極(bulk)係與該參考電位高壓電晶體之源極相連接。The voltage under-locking circuit of claim 1, wherein a base of the reference potential high voltage transistor is connected to a source of the reference potential high voltage transistor. 如請求項1所述之電壓過低鎖定電路,其中該負載模組包含複數相串聯之二極體連接形式(diode-connected)高壓電晶體。The voltage under-locking circuit of claim 1, wherein the load module comprises a plurality of diode-connected diode-connected high voltage transistors. 如請求項6所述之電壓過低鎖定電路,更包含一延遲開關,連接於該負載模組之該等高壓電晶體至少其中之一之兩端,並用以接收該電源啟動訊號,當第一供應電壓降低至一第一特定低電壓準位,該延遲開關係使該等高壓電晶體至少其中之一短路,以使該輸出汲極繼續輸出該電源啟動訊號。The voltage under-locking circuit of claim 6, further comprising a delay switch connected to at least one of the high-voltage transistors of the load module, and configured to receive the power-on signal, A supply voltage is reduced to a first specific low voltage level that shorts at least one of the high voltage transistors such that the output drain continues to output the power enable signal. 如請求項7所述之電壓過低鎖定電路,當該第一供應電壓降至低於該第一特定低電壓準位之一第二特定低電壓準位,該比較高壓電晶體係關閉,該輸出汲極係停止輸出該電源啟動訊號。The voltage under-locking circuit of claim 7, wherein when the first supply voltage falls below a second specific low voltage level of the first specific low voltage level, the comparative high-voltage cell system is turned off. The output bungee stops outputting the power start signal. 如請求項6所述之電壓過低鎖定電路,其中當該第一供應電壓提升至該特定高準位時,該第一供應電壓係大於該負載模組之該等高壓電晶體之臨界電壓以及該比較高壓電晶體之臨界電壓之和The voltage under-locking circuit of claim 6, wherein the first supply voltage is greater than a threshold voltage of the high-voltage transistors of the load module when the first supply voltage is raised to the specific high level And the sum of the threshold voltages of the comparative high voltage transistors 如請求項1所述之電壓過低鎖定電路,更包含一電容,連接於該參考電位高壓電晶體之源極。The voltage under-locking circuit of claim 1 further includes a capacitor connected to the source of the reference potential high voltage transistor. 一種高壓元件電路,包含:至少一高壓功能模組,包含至少一高壓元件;一高壓電源供應電路,用以根據一電源啟動訊號供應一高壓電源至該高壓功能模組;以及一電壓過低鎖定電路,包含:一負載模組,該負載模組之一第一端用以接收一第一供應電壓;一參考電位高壓電晶體,包含接收一參考預設電位之閘極,以及連接於該負載模組之一第二端之源極;一偏壓電流源模組,連接於該參考電位高壓電晶體之汲極以及一負接地電位間;一比較電流源模組;以及一比較高壓電晶體,包含連接於該參考電位高壓電晶體之汲極之一輸入閘極以及連接於該比較電流源模組之一輸出汲極;其中當該第一供應電壓提升至一特定高準位,係使該比較高壓電晶體導通,且使其電流汲取能力大於該比較電流源模組之電流供應能力,進一步使該輸出汲極產生一電源啟動訊號。A high voltage component circuit comprising: at least one high voltage function module comprising at least one high voltage component; a high voltage power supply circuit for supplying a high voltage power supply to the high voltage function module according to a power supply start signal; and a voltage under low lock The circuit includes: a load module, a first end of the load module is configured to receive a first supply voltage; a reference potential high voltage transistor includes a gate receiving a reference preset potential, and is coupled to the a source of the second end of the load module; a bias current source module connected between the drain of the reference potential high voltage transistor and a negative ground potential; a comparison current source module; and a relatively high a piezoelectric crystal comprising an input gate connected to one of the drains of the reference potential high voltage transistor and an output drain connected to the comparison current source module; wherein the first supply voltage is raised to a specific high level The position is such that the comparative high voltage transistor is turned on, and the current extraction capability thereof is greater than the current supply capability of the comparison current source module, further causing the output drain to generate a power activation signal. . 如請求項11所述之高壓元件電路,其中該偏壓電流源模組包括一第一電流源,依據該第一供應電壓而運作,以及一第二電流源,依據一第二供應電壓運作,其中該第二供應電壓係低於該第一供應電壓。The high voltage component circuit of claim 11, wherein the bias current source module comprises a first current source, operates according to the first supply voltage, and a second current source operates according to a second supply voltage. Wherein the second supply voltage is lower than the first supply voltage. 如請求項11所述之高壓元件電路,其中該輸出汲極連接於奇數個反相器,以藉由該奇數個反相器輸出該電源啟動訊號。The high voltage component circuit of claim 11, wherein the output drain is connected to an odd number of inverters to output the power enable signal by the odd number of inverters. 如請求項11所述之高壓元件電路,更包含一高壓電源啟動電路,該電源啟動訊號係使該高壓電源啟動電路啟動該高壓電源供應電路,以供應該高壓電源至該高壓功能模組。The high voltage component circuit of claim 11 further comprising a high voltage power supply starting circuit, wherein the power supply starting signal causes the high voltage power starting circuit to activate the high voltage power supply circuit to supply the high voltage power supply to the high voltage function module. 如請求項11所述之高壓元件電路,更包含一常壓電源啟動電路、至少一常壓功能模組以及一常壓電源供應電路,該電源啟動訊號更輸出至該常壓電源啟動電路,以供應一常壓電源至該常壓功能模組。The high voltage component circuit of claim 11, further comprising a normal voltage power source starting circuit, at least one normal voltage function module, and a normal voltage power supply circuit, wherein the power source startup signal is further output to the normal voltage power source starting circuit, Supply a normal voltage power supply to the atmospheric pressure function module. 如請求項11所述之高壓元件電路,其中該參考電位高壓電晶體之基極係與該參考電位高壓電晶體之源極相連接。The high voltage component circuit of claim 11, wherein a base of the reference potential high voltage transistor is coupled to a source of the reference potential high voltage transistor. 如請求項11所述之高壓元件電路,其中該負載模組包含複數相串聯之二極體連接形式(diode-connected)高壓電晶體。The high voltage component circuit of claim 11, wherein the load module comprises a plurality of diode-connected diode-connected high voltage transistors. 如請求項17所述之高壓元件電路,其中該電壓過低鎖定電路更包含一延遲開關,連接於該負載模組之該等高壓電晶體至少其中之一之兩端,並用以接收該電源啟動訊號,當第一供應電壓降低至一第一特定低電壓準位,該延遲開關係使該等高壓電晶體至少其中之一短路,以使該輸出汲極繼續輸出該電源啟動訊號。The high voltage component circuit of claim 17, wherein the voltage undervoltage locking circuit further comprises a delay switch connected to at least one of the high voltage transistors of the load module and configured to receive the power source The start signal, when the first supply voltage is lowered to a first specific low voltage level, the delayed open relationship shorts at least one of the high voltage transistors, so that the output drain continues to output the power start signal. 如請求項18所述之高壓元件電路,當該第一供應電壓降至低於該第一特定低電壓準位之一第二特定低電壓準位,該比較高壓電晶體係關閉,該輸出汲極係停止輸出該電源啟動訊號。The high voltage component circuit of claim 18, when the first supply voltage falls below a second specific low voltage level of the first specific low voltage level, the comparative high voltage die system is turned off, the output The bungee system stops outputting the power start signal. 如請求項17所述之高壓元件電路,其中當該第一供應電壓提升至該特定高準位時,該第一供應電壓係大於該負載模組之該等高壓電晶體之臨界電壓以及該比較高壓電晶體之臨界電壓之和。The high voltage component circuit of claim 17, wherein when the first supply voltage is raised to the specific high level, the first supply voltage is greater than a threshold voltage of the high voltage transistors of the load module and Compare the sum of the threshold voltages of the high voltage transistors. 如請求項11所述之高壓元件電路,其中該電壓過低鎖定電路更包含一電容,連接於該參考電位高壓電晶體之源極。The high voltage component circuit of claim 11, wherein the voltage undervoltage locking circuit further comprises a capacitor connected to a source of the reference potential high voltage transistor.
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CN115987260A (en) * 2023-03-17 2023-04-18 钰泰半导体股份有限公司 Threshold circuit, chip, power supply system and electronic equipment

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US6545510B1 (en) * 2001-12-10 2003-04-08 Micron Technology, Inc. Input buffer and method for voltage level detection
TW200640136A (en) * 2005-05-13 2006-11-16 Chern-Lin Chen A start-up circuit with undervoltage lockout and method for the same

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CN115987260A (en) * 2023-03-17 2023-04-18 钰泰半导体股份有限公司 Threshold circuit, chip, power supply system and electronic equipment
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