TW201304370A - Semiconductor device, start-up circuit and operating method for the same - Google Patents

Abstract

A semiconductor device, a start-up circuit and an operating method for the same are provided. The start-up circuit comprises a semiconductor unit, a first circuit, a second circuit, a voltage input terminal and a voltage output terminal. The first circuit is constituted by one diode or a plurality of diodes electrically connected to each other in series. The second circuit is constituted by one diode or a plurality of diodes electrically connected to each other in series. The semiconductor unit is coupled to a first node between the first circuit and the second circuit. The voltage input terminal is coupled to the semiconductor unit. The voltage output terminal is coupled to a second node between the semiconductor unit and the first circuit.

Description

Semiconductor device, startup circuit and operation method thereof

The present invention relates to a semiconductor device, a startup circuit, and a method of operating the same, and more particularly to a startup circuit applied to a power supply device and an operation method thereof.

In recent years, the issue of green energy has attracted much attention, and the development of technology has also tended to have high conversion efficiency and low standby power consumption. High press cycles have been widely used in power supplies such as switched power supplies. Switched power supply integrated circuits require integrated start-up circuitry and pulse width modulation (PWM) circuitry. Generally, the starting circuit of the high voltage device uses a resistor to supply a charging current to the charging capacitor until the voltage on the capacitor reaches the starting voltage of the pulse width modulation circuit, and the starting circuit stops. However, after the start-up circuit stops, its resistance continues to generate power consumption, so power saving effects cannot be achieved. In some techniques, the startup circuit uses an N-type depletion transistor to replace the resistor. However, in the state where the startup circuit is stopped, the N-type depletion transistor is more likely to generate a high leakage current by manufacturing a larger negative threshold voltage (Vt).

The present invention relates to a semiconductor device, a startup circuit, and a method of operating the same, which can provide a high output voltage (Vcc) and a low leakage current and power consumption when stopped.

A startup circuit is provided. The startup circuit includes a semiconductor unit, a first circuit, a second circuit, a voltage input terminal, and a voltage output terminal. The first circuit is composed of a diode or a plurality of diodes electrically connected in series. The second circuit is composed of a diode or a plurality of diodes electrically connected in series. The semiconductor unit is coupled to the first node between the first circuit and the second circuit. The voltage input terminal is coupled to the semiconductor unit. The voltage output is coupled to the second node between the semiconductor unit and the first circuit.

A method of operating a startup circuit is provided. The startup circuit includes a semiconductor unit, a first circuit, a second circuit, a voltage input terminal, and a voltage output terminal. The first circuit is composed of a diode or a plurality of diodes electrically connected in series. The second circuit is composed of a diode or a plurality of diodes electrically connected in series. The semiconductor unit is coupled to the first node between the first circuit and the second circuit. The voltage input terminal is coupled to the semiconductor unit. The voltage output is coupled to the second node between the semiconductor unit and the first circuit. The method of operating the startup circuit includes providing an input voltage to the voltage input such that current flows from the voltage input through the semiconductor unit to the voltage output and produces an output voltage at the voltage output. The output voltage is reverse biased to the diodes of the first circuit and the second circuit.

A semiconductor device is provided. The semiconductor device includes a semiconductor unit, a first diode element, and a second diode element. The semiconductor unit includes a source, a drain, and a gate. The gate is located between the source and the drain. The first diode component is coupled between the source and the gate. The gate is coupled to the first node between the first diode element and the second diode element.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the preferred embodiment will be described in detail with reference to the accompanying drawings.

FIG. 1 is a circuit diagram of a semiconductor device in an embodiment. FIG. 2 is a schematic diagram of a startup circuit in an embodiment. FIG. 3 is a graph showing the relationship between the output voltage and the current of the semiconductor unit in an embodiment.

Referring to FIG. 1, the semiconductor device may be a power supply device such as a switch mode power supply. The semiconductor device is operated by inputting a voltage (Vin) at the first voltage terminal 12, and an output voltage (Vcc) is generated at the voltage output terminal 14 through the startup circuit 2 to charge the capacitor 22. When the voltage on the capacitor 22 reaches the startup voltage of the switching controller 4, such as a pulse width modulation (PWM) circuit, the switching controller 4 will begin to control the power switch 24, such as an enhanced transistor, for performing the transformer 26. Switch to generate power. After the startup process is completed, the startup circuit 2 stops functioning.

Referring to FIG. 2, the startup circuit 2 includes a semiconductor unit 6, a first circuit 8, and a second circuit 10. The first circuit 8 shown in Fig. 2 is composed of a diode. However, the disclosure is not limited to this. In other embodiments, the first circuit 8 is composed of a plurality of diodes electrically connected in series. The second circuit 10 shown in FIG. 2 is composed of a plurality of diodes electrically connected in series. However, the disclosure is not limited to this. In other embodiments, the second circuit 10 is comprised of a diode. The diodes of the first circuit 8 and the second circuit 10 may include a PN junction diode, a Zener diode, or a Schottky diode. The semiconductor unit 6 includes a semiconductor (MOS) such as the depletion transistor shown in FIG. However, the invention is not limited thereto. In other embodiments, the semiconductor unit 6 may include a Lateral Double Diffusion transistor (LDMOS), a Double Diffusion Drain (DDD) transistor, or an Extension Drain transistor (EDMOS). ).

The gate of the semiconductor unit 6 is coupled to the first node 16 between the first circuit 8 and the second circuit 10. The first voltage terminal 12 is coupled to the drain of the semiconductor unit 6. The second voltage terminal 14 is coupled to the first circuit 8 and the source of the semiconductor unit 6, and more specifically, to the second node 18 between the first circuit 8 and the source. In an embodiment, the second voltage terminal 14 is also coupled to the base of the adjacent source of the semiconductor unit 6. The third voltage terminal 20 is coupled to an end of the second circuit 10 that is away from the first node 16 . In an embodiment, the first voltage terminal 12 is a voltage input terminal (Vin). The second voltage terminal 14 is a voltage output terminal (Vcc). The third voltage terminal 20 is a ground terminal (GND).

Referring to FIG. 2, the operation method of the startup circuit 2 is to input a voltage (Vin) at the first voltage terminal 12, so that a current is generated from the first voltage terminal 12 through the semiconductor unit 6 to the second voltage terminal 14 to generate an output voltage (Vcc). . The output voltage of the second voltage terminal 14 causes a reverse bias to the diodes of the first circuit 8 and the second circuit 10. In an embodiment, the condition of the diodes of the first circuit 8 and the second circuit 10, for example, may be appropriately configured according to a desired output voltage (Vcc) and a condition of the semiconductor unit 6, such as a threshold voltage (Vt). A high output voltage is also available. For example, the number of diodes of the first circuit 8: the number of diodes of the second circuit 10 may be 1:1 to 8 and so on.

Referring to FIG. 2, in more detail, for example, the semiconductor unit 6 is an N-type depletion transistor having a threshold voltage of -3V. The gate is coupled to the anode of the diode of the first circuit 8 and the cathode of the diode of the second circuit 10. The first voltage terminal (voltage input terminal) 12 is coupled to the drain. The second voltage terminal (voltage output terminal) 14 is coupled to the source (and the base) and the cathode of the diode of the first circuit 8. The anode of the diode of the second circuit 10 is coupled to the third voltage terminal (ground) 20 . In this example, the first circuit 8 and the second circuit 10 use diodes having characteristics substantially the same as the reverse breakdown voltage. For example, when the input voltage of the first voltage terminal 12 is 18V, the output voltage of the second voltage terminal 14 is 17.8V, which is substantially close to the input voltage of the first voltage terminal 12. The output voltage causes a voltage division of the two-pole system of the first circuit 8 and the second circuit 10. In detail, the terminal voltage caused by the output voltage to the second circuit 10 is substantially five-fifth of the output voltage (the number of diodes of the second circuit 10 is greater than the number of diodes of the first circuit 8 and the second circuit 10) Total number of bodies). The terminal voltage caused by the output voltage to the first circuit 8 is substantially one-sixth of the output voltage (the number of diodes of the first circuit 8 is greater than the total number of diodes of the first circuit 8 and the second circuit 10). Therefore, taking the gate-to-source voltage difference (V _GS ) -3 V of the semiconductor unit 6 as an example, the magnitude of |V _GS | of the semiconductor unit 6 is substantially greater than the threshold voltage, so that the semiconductor unit 6 is in a closed state, such as Figure 3 shows. In addition, no additional power is generated. In the case where the input voltage is less than 18V, the V _{GS of the} semiconductor unit 6 will not reach the threshold voltage and remain on to continue to supply the charging voltage. In an embodiment, a fixed power source can be provided.

4 is a cross-sectional view showing a semiconductor device in an embodiment. The semiconductor device may have a circuit diagram as shown in FIGS. 1 and 2. The semiconductor device includes a semiconductor unit. The semiconductor unit includes a source 128, a drain 130, and a gate 132. Gate 132 is located between source 128 and drain 130. The source 128 and the doping region 150 are formed in the doping region 134. In an embodiment, doped region 150 acts as a base. A doped region 134 is formed in the doped region 136. A doped region 138 is formed in the doped region 140. The drain 130, the doped region 136, and the doped region 140 are formed in the doped region 142. A doped region 142 is formed in the substrate 144. A doped region 146 is formed in the doped region 148. Doped regions 148 and doped regions 152 are formed in substrate 144.

In one embodiment, the semiconductor unit is an N-type depletion transistor. The source 128, the drain 130, the doped region 134, the doped region 138, and the doped region 142 have a first conductivity type such as an N-type conductivity. The doped region 150, the doped region 136, the doped region 140, the doped region 146, the doped region 148, the doped region 152, and the substrate 144 have a second conductivity type, such as a P-type conductivity type, opposite to the first conductivity type. The source 128, the drain 130, the doped region 146 and the doped region 150 are heavily doped. The doped region 150 serves as a base.

Referring to Figure 4, the diode 154 is separated from the semiconductor unit by a dielectric structure 156. The dielectric structure 156 is not limited to the field oxide shown in FIG. 4, but may include shallow trench isolation, deep trench isolation, and the like. The diode 154 can be formed of polycrystalline germanium. The diode 154 can include a portion 158, a portion 160, and a portion 162. For example, portion 160 and portion 162 have a first conductivity type, such as an N-type conductivity type. Portion 158 has a second conductivity type, such as a P-type conductivity type, opposite to the first conductivity type. Portion 158 and portion 162 are heavily doped, and portion 160 has a doping concentration that is less than portion 158 and portion 162. In one embodiment, the diode 154 is a diode of the first circuit 8 as shown in FIG. In some embodiments, the diodes 154 are formed using direct contact with two portions that are both heavily doped and have opposite conductivity types. In other embodiments, the diode 154 can be formed using a doped structure of P+/NW, P+/HVNW, P+/NWD, or N+/PWI.

The first voltage terminal 112 is coupled to the drain 130. The second voltage terminal 114 is coupled to the source 128, the portion 162 of the diode 154, and the doped region 150. Portion 158 of diode 154 is coupled to gate 132. The third voltage terminal 120 is coupled to the doping region 146. In some embodiments, the first voltage terminal 112 is a voltage input. The second voltage terminal 114 is a voltage output terminal. The third voltage terminal 120 is a ground terminal. Portion 158 is the anode of diode 154. Portion 162 is the cathode of diode 154.

In an embodiment, the semiconductor device can be fabricated in a standard HV process, so there is no need to add additional masks or steps. The semiconductor device can be formed by a blanket overlying (SOI), epitaxial process, or non-epilation process.

FIG. 5 illustrates a top view of a semiconductor device in an embodiment, for example, a source 228, a drain 230, a gate 232, a doped region 246, a doped region 250, and a dielectric structure 256. The semiconductor device shown in FIG. 5 may have a circuit diagram as shown in FIGS. 1 and 2. The semiconductor device includes a first diode element and a second diode element. The first diode element has a diode 254A and can be represented by a first circuit 8 as shown in FIG. The second diode element has a diode 254B, a diode 254C, a diode 254D, a diode 254E, and a diode 254F electrically connected in series, and can be the second circuit shown in FIG. 10 said. However, the disclosure is not limited to this. In other embodiments, the first diode element has a plurality of diodes electrically connected in series. The second diode element has a single diode.

In the embodiment, the diode is not limited to the elongated shape as shown in FIG. 5, but may include a shape of a circle, a square, a ring, or the like.

In an embodiment of the present disclosure, the startup circuit utilizes a semiconductor unit and a diode. The conditions of the diode are appropriately configured in accordance with the desired output voltage and the threshold voltage of the semiconductor unit. Therefore, a high output voltage can be obtained. In addition, the leakage current when the startup circuit stops functioning is low and the power consumption is low.

While the present invention has been described in its preferred embodiments, the present invention is not intended to limit the invention, and the present invention may be modified and modified without departing from the spirit and scope of the invention. The scope of protection is subject to the definition of the scope of the patent application.

2. . . Startup circuit

4. . . Switching controller

6. . . Semiconductor unit

8. . . First circuit

10. . . Second circuit

12, 112. . . First voltage terminal

14, 114. . . Voltage output

16. . . First node

18. . . Second node

20, 120. . . Third voltage terminal

twenty two. . . capacitance

twenty four. . . Power switch

26. . . transformer

128, 228. . . Source

130, 230. . . Bungee

132, 232. . . Gate

134, 136, 138, 140, 142, 146, 148, 150, 152, 246, 250. . . Doped region

144. . . Base

154, 254A, 254B, 254C, 254D, 254E, 254F. . . Dipole

156, 256. . . Dielectric structure

158, 160, 162. . . section

FIG. 1 is a circuit diagram of a semiconductor device in an embodiment.

FIG. 2 is a schematic diagram of a startup circuit in an embodiment.

FIG. 3 is a graph showing the relationship between the output voltage and the current of the semiconductor unit in an embodiment.

4 is a cross-sectional view showing a semiconductor device in an embodiment.

Fig. 5 is a top view showing a semiconductor device in an embodiment.

2. . . Startup circuit

6. . . Semiconductor unit

8. . . First circuit

10. . . Second circuit

12. . . First voltage terminal

14. . . Voltage output

16. . . First node

18. . . Second node

20. . . Third voltage terminal

Claims (10)

A start-up circuit comprising: a semiconductor unit; a first circuit formed by a diode or a plurality of diodes electrically connected in series; and a second circuit consisting of a diode or a plurality of diodes electrically connected in series, wherein the semiconductor unit is coupled to a first node between the first circuit and the second circuit; a voltage input end coupled to the semiconductor unit And a voltage output coupled to a second node between the semiconductor unit and the first circuit. The start-up circuit of claim 1, wherein the semiconductor unit comprises a source, a drain and a gate, the voltage input being coupled to the drain and the source, the voltage The output end is coupled to the drain and the other of the source, the first node is coupled to the gate, and the voltage at the voltage output is caused by the diodes of the first circuit and the second circuit A reverse bias. The start-up circuit of claim 1, wherein the semiconductor unit is an N-type depletion transistor, and includes a source, a drain and a gate, and the voltage input terminal is coupled to the drain The voltage output end is coupled to the cathode of the source and the diode of the first circuit, the first node is located at the gate, the anode of the diode of the first circuit, and the second circuit Between the cathodes of the polar body, the anode of the diode of the second circuit is grounded. The start-up circuit of claim 1, wherein the first circuit and the diodes of the second circuit comprise a PN junction diode or a Zener diode. The start-up circuit of claim 1, wherein the start-up circuit is applied to a switched-mode power supply. A method for operating a startup circuit, wherein the startup circuit comprises: a semiconductor unit; a first circuit formed by a diode or a plurality of diodes electrically connected in series; a second circuit The diode unit is configured by a diode or a plurality of diodes electrically connected in series, wherein the semiconductor unit is coupled to a first node between the first circuit and the second circuit; a voltage input end And a voltage output end coupled to a second node between the semiconductor unit and the first circuit, the method for operating the startup circuit includes: providing an input voltage to the voltage input end So that a current flows from the voltage input terminal through the semiconductor unit to the voltage output terminal, and an output voltage is generated at the voltage output terminal, wherein the output voltage is the first circuit and the second circuit The diode causes a reverse bias. The method of operating a startup circuit as described in claim 6, wherein the input voltage is substantially similar to the output voltage. The method of operating the startup circuit of claim 6, further comprising cutting off the semiconductor unit, wherein the method of turning off the semiconductor unit comprises: aligning the startup circuit to: the gate of the semiconductor unit to the source The voltage difference (V _GS ) is substantially greater than the threshold voltage of the semiconductor unit. A semiconductor device comprising: a semiconductor unit comprising a source, a drain and a gate, wherein the gate is located between the source and the drain; a first diode component coupled to the Between the source and the gate; and a second diode component, wherein the gate is coupled to a first node between the first diode component and the second diode component. The semiconductor device of claim 9, further comprising a dielectric structure, wherein the first diode component and the second diode component are on the dielectric structure and through the dielectric structure Separate from the semiconductor unit.