TW201243618A - Load balancing in heterogeneous computing environments - Google Patents

Abstract

Load balancing may be achieved in heterogeneous computing environments by first evaluating the operating environment and workload within that environment. Then, if energy usage is a constraint, energy usage per task for each device may be evaluated for the identified workload and operating environments. Work is scheduled on the device that maximizes the performance metric of the heterogeneous computing environment.

Description

201243618 VI. INSTRUCTIONS: c Inventing the technical field of the households. 3 Cross-references to the relevant applications. This is a non-provisional patent application. The US Provisional Patent Application No. 61/434947 filed on January 21, 2011 The priority patent application is hereby expressly incorporated herein by reference. FIELD OF THE INVENTION The present invention is generally related to graphics processing techniques, and more particularly to techniques for load balancing between a central processing unit and a graphics processing unit. BACKGROUND OF THE INVENTION The present invention is generally related to graphics processing techniques, and more particularly to techniques for load balancing between a central processing unit and a graphics processing unit. Many computing devices include both a central processing unit and a graphics processing unit for general use. These graphics processing units are primarily dedicated to graphics purposes. The central processing unit performs general tasks such as running applications. Load balancing can improve performance by switching tasks between different devices within a system or network. Load balancing can also be used to reduce energy usage. A heterogeneous computing environment includes different types of processing or computing devices in the same system or network. Therefore, a typical platform having both a central processing unit and a graphics processing unit is an example of a heterogeneous computing environment. 201243618 SUMMARY OF INVENTION Summary of the Invention In accordance with an embodiment of the present invention, a method is specifically provided comprising the steps of: between at least two processors, based on the workload characteristics and the two processors The ability to electronically select a processor to perform a workload. In accordance with an embodiment of the present invention, a non-transitory computer readable medium storing instructions is provided, the instructions being executed by a processor to perform the following steps: based on the workload characteristics and two or more The ability of the processors to distribute the workload among the at least two processors, one processor for executing a workload. According to an embodiment of the present invention, an apparatus is specifically provided, comprising: a graphics processing unit; and a central processing unit coupled to the graphics processing unit, the central processing unit is configured to be based on the workload characteristics and These two processors have the ability to select a processor to execute a workload. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a flow chart of an embodiment; Fig. 2 depicts a plot for determining an average energy for each task; and Fig. 3 is a hardware depiction of an embodiment. C Embodiment 3 Detailed Description of the Preferred Embodiment In a heterogeneous computing environment, such as Open Computing Language (OpenCL), a given workload 201243618 can be any computing device in this computing environment. Execute on I. In the "two flats" there are two such devices, a central processing unit (: two processing units, cpu) and a graphics processing unit (_ies P - fairy g (10), GPU) ... different f sensory load balancer The m on the available processing H is scheduled to maximize the reachability within these electromechanical and design constraints. However, although a given job load can be performed on any of the operational shards in the computing environment, each device will have its (4) characteristics so it may be best suited to perform some difficult workload. Ideally, there will be a perfect controller for workload characteristics and behavior so that a given workload can be scheduled on a processor that maximizes performance. But in general, the approximation of the performance predictor is best able to be implemented on the fly. This performance predictor combines both mosquito-based and statistical information about this workload (static and dynamic) and its operating environment (static and dynamic). Operating environment estimates take into account processor capabilities that match specific operating conditions. For example, there may be platforms where the CPU is more capable than the GPU, or vice versa. However, in a given client platform, the GPU may be more capable than a CPU for some workloads. This operation % environment may have some static characteristics. Some examples of static characteristics include device type or class, operating frequency range, number and location of cores, samplers and the like, arithmetic precision, and electromechanical limitations. Examples of dynamic device capabilities that determine dynamic operating environment characteristics include actual frequency and temperature margins, actual energy margins, actual 201243618 number of idle cores, actual state of electromechanical characteristics and margins, and power policy choices such as battery mode versus adaptability mode. Some floating-point matching/transcend functions are simulated in the GPU. However, the cpu system can achieve the highest performance to local reduction. This can also be determined at the compile time. Some OpenCL algorithms utilize "shared local memory." A GPU may have specialized hardware to support this memory model that compensates for load balancing benefits. Any prior knowledge of the workload, including characteristics such as how small or small it affects actual performance, may be used to determine how much load balancing can be. As another example, there may not be 64-bit support in an older version of a given GPU. Applications may also have features that significantly support or disable the effectiveness of load balancing. In image processing, a GPU with sampler hardware performs better than a CPU. In surface sharing with the appHcati〇n program interfaces (API), 〇penCL allows surface sharing between Open Graphics Language (OpenGL) and DirectX. For such use cases, it may be preferable to use a GPU to avoid copying the surface from the video memory to the system memory. Preemptive requirements for workloads can affect the benefits of load balancing. For OpenCL to work in True-Vision Targa format bit map graphics (IVB), this IVB OpenCL implementation must allow OpenCL workloads to be preemptive and continuous in the IVB GPU. An application that attempts to micro-control the balance of a particular hardware target is improperly made 6

S 201243618 The following may damage any dynamic workload characterization that causes the CPU/GPU to be flushed. Information about the load. This includes long-term history, short history of this work, past history, and current history. For example, silk implementation of the first material is an example of current history, and depending on the average time period or time, the average day (4) for a new task can be long-term money. Previously, the time spent on a particular core was an example of past history. All of the methods can be an effective reward for the schedule that can be applied. The future performance of the tasks can be implemented in software, hardware or firmware in accordance with the previous one. The touch can also be applied through a soft (off), Hunan food storage instruction - (four) time computer readable media. Examples of such non-transitory computer readable media include optical, magnetic or semiconductor storage devices. In some embodiments, this sequence can begin with an evaluation of the operating environment. Force = _ indicates that the I operating environment may be important for determining static or dynamic devices. Then the system can evaluate the specific work = block (1). _ ground, the system can be widely divided into the load characteristics of the security (four). Next, this (4) can determine whether there is any = limit, for example, as indicated by block 14. "Load balancing in the amount of (4) implementation of the shot may be different from the amount of money that is not considered. Using a de facto limit, this sequence 4 " is task-by-task to determine the processor energy usage of 201243618 for the identified 4 workloads and operating environment (block 丨6). Finally, in any case, Work is scheduled on the processor to maximize performance metrics, as indicated in block 18. If there are no energy usage restrictions, then simply bypass block 16. The target scheduling policy/algorithm can maximize any Given a metric, it is often attributed to an internal-to-group benchmark of 35. Scheduling policies/algorithms can be designed based on both static characterization and dynamic characterization. Based on these static and dynamic characteristics,: Producing a metric for each device is different for the workload schedule. The device with the best responsibilities for a particular processor type is likely to be scheduled at that processor type. The platform may have a maximum frequency limit with energy limitations. The two energy-limited platform can implement the best need for energy-limited constraints: a sampler format for scheduling algorithms. The version of the shortest schedule estimator that drives the schedule/load parallel workload will be enforced in one (four) schedule decision in a shorter but sparsely distributed cluster. For a cluster workload, The platform will look like a load. It will look like an energy-limited one. It seems to be frequency-limited. If we don’t know before, it’s a bundle of hairpins. But we With an estimate of the potential for this work. The estimate of @ possibility can be used to drive the 201243618 policy. The processor energy to run a task is: Processor A energy to run the next task by processor A The power consumed * on the processor A to run the next task of the processor B energy consumed by the processor B * the duration on the processor B when the workload behavior is When the former is unknown, calculations for these magnitudes may be required. If the actual energy consumption is not directly available (eg, from the on-die energy counter), then an estimate of the individual components of the energy consumption may be used instead. Generalized for the processor X),

Processor X energy to run the next task Estimated power for processor X * Estimated duration on processor X Power_estimate_for processor X static power estimate (v,f,T) + dynamic—power—estimate (v,f, T, t), where static_power_estimate(v, f, T) is a value that takes into account the voltage v, the normalized frequency f, and the temperature T dependency, but is not a workload-dependent immediate update. Dynamic_power_estimate(v,f,Τ, t) takes into account the workload-dependent real-time information t. E.g,

Dynamic power-estimate (v,f,Τ,η) 201243618 (lb) * Dynamic power estimate (v, f, T, n-1) + b * instantaneous_power_estimate(v, f, T, n) · where "b" Is a constant to control how far to go to the dynamic_power_ estimate. Then, instantaneous—power_estimate (V, f, Τ, η) C_estimate*vA2*f + Ι(ν, Τ)*ν » where C_eStimate is a variable that tracks the capacitive portion of the workload power, and I(v, T ) is to track the leakage-dependent part of the workload power. Similarly, it is possible to make an estimate of the workload based on measurements of clock counts for past and present workloads and processor frequencies. The parameters defined in the above equations can be specified values based on the profile data. An example of an energy-economy self-bias can be based on which processor type ends up with a task to schedule a new task. On average, a processor that processes tasks quickly is more often available. If there is no current information, a default initial processor can be used. Alternatively, the metrics generated for processor A and processor B can be used to specify the processing I for the last end, as long as the processor that ends last is: the energy of the task is lower than: G * non-final 4 The energy to run the service,

S 10 201243618 where "G" is a value that is determined to maximize overall performance. In Figure 2, the horizontal axis shows the most recent event on the left side of the figure, and

And the older event goes to the right. Then C, D, E, F, G, and Y are OpenCL tasks. Processor B runs some non-0penCL tasks r other, and both processes 15 experience some idle periods. The next OpenCL task to be scheduled, task Z. All processor a tasks are shown as equal power levels and are also equal to processor B OpenCL task Y to reduce the complexity of this paradigm.

The OpenCL task γ takes a long time (top of Figure 2) and therefore consumes more energy than the other 〇penCL tasks running on processor A (Fig. 2, lower below). A new task is scheduled on the preferred processor until it takes a new task to be processed on the processor for more than a critical value, and then the task is assigned to another processor. If you do not see H §fi, you can use a default initial processor. Alternatively, if the energy conscious context work takes more than a threshold for the predetermined processor and the energy cost estimated by the switching processor is reasonable, then the energy conscious context work is assigned to the other processor. New tasks can be scheduled on the processor with the shortest average time for a new batch buffer to be processed. If there is no current information, a default initial processor can be used. Additional permutations for these concepts are possible. There are many different types of estimates that can be used interchangeably as predictors (Proportional integral Differemial (pID) controllers, Kalman 201243618 (Kalman) filters, etc.). There are also many different ways to approximate the operational energy margin, depending on the characteristics of the particular implementation. It is also possible to take into account other implementation permutations by performance characterization and/or other metrics such as minimum processing time, memory footprint, and the like. Metrics that can be used to adjust/modulate policy decisions or decision thresholds to take energy efficiency or power budgeting into account, including GPU and GPU usage, frequency, energy consumption, efficiency and budget, GPU and GPU input/output (input/output) , I/O) use, memory usage, electromechanical state (eg operating temperature and its optimal range), floating point arithmetic, and CPU and CPU usage specific to OpenCL or other heterogeneous environment types. For example, if we know that processor A is currently I/O limited but processor B does not, then this fact can be used to reduce the efficiency of task A projection running a new task, and thus reduce processor A will be The possibility of choice. A good load balancing implementation not only takes advantage of all the information about the workload and the computing environment to maximize its performance, it also changes the characteristics of the operating environment. In an accelerated implementation, there is no guarantee that the CPU and GPU acceleration points will be energy-efficient. The accelerated design goal is for spike performance of non-heterogeneous non-similar CPU/GPU workloads. In the case of the same CPU/GPU workload, the allocation of available energy budget is not determined by any consideration of the energy economy or the end user's perceived benefit. However, 'OpenCL is a type of load that can work with CPUs and GPUs in the same way' and its end users who are available for power budget allocation are more ambiguous than other workload types.

12 S 201243618 For example, a J-Right A can be used as a better processor for a task-like task while the HA is operating at its maximum operating frequency, and there is also a power budget. Therefore, the processor W also runs the twisted workload. Then, as long as processor A's power budget is not reduced so that it does not run at its maximum frequency, processor B is used to increase throughput (assuming that processing HB can accomplish these tasks quickly) Very reasonable. The maximum performance can be achieved by not being able to handle the HA performance and still use the minimum processing HB frequency (and/or the number of cores) of the budget, rather than the default operating system or pcu selection for non-OpenCL workloads. The scope of this algorithm can be further advanced - the step is widened. Some of the characteristics of this task can be evaluated between the compilations and also at the execution time to derive a more accurate estimate of the time and resources required to perform this task. The set-up time for OpenCL on cpu and GPU is another example. If a given task must be completed within a certain time limit, multiple queues can be implemented with various priorities. Then, this schedule will be more likely to be in a higher priority queue than a queue with lower priority. In OpenCL, the interaction correlation is implemented as 〇pen(:L event entity is known. It is possible to minimize the latency of interactions. ^ GPU tasks are typically created by creating a command. The buffer is scheduled for execution. This command buffer may, for example, contain a plurality of tasks based on dependencies. The number of tasks or subtasks may be presented to the device based on this algorithm. 13 201243618 GPU is typically used Used to visualize graphical API tasks. The scheduler can be responsible for any OpenCL or GPU task (ie, a task that is longer than the scheduled completion time) that affects the danger of interactive or graphically visible experiences. Such tasks can be in non-OpenCL or The presentation workload is also preempted while it is running. The computing system 130 shown in Figure 3 can include a hard drive 134 and a removable media 136 'Removable media 136 coupled by a busbar 丨〇4 To a chipset core logic 110. The computer system can be any computer system, including a smart mobile device, such as a smart phone, an input pad, or a mobile internet device. A keyboard and mouse 12, or other conventional components, are coupled to the graphics processor 112 via a bus bar 105 and are lightly coupled to the primary or host processor. The graphics processor 12 can also be A bus bar 106 is coupled to a frame buffer 114. The frame buffer 114 can be coupled to a display screen 118 by a bus bar 〇 7. In one embodiment, a graphics processor 112 can be A multi-threaded multi-core parallel processor using a single instruction muhiple (% SIMD) architecture, which may be implemented by one of at least two processors evaluated in one embodiment The processor selects the algorithm. In this case, when making a choice between the graphics and the central processor, in one embodiment, the central processing unit can select. In other cases, the system can be a special Or a special processing wire to implement the selection algorithm. In the case of a software implementation, the relevant code can be stored in any suitable semiconductor, magnetic, or optical memory, including the main record. Body 132 or any available memory within the graphics processor. Thus, in a 14 € 201243618 embodiment, the code used to perform the sequence of the first diagram may be stored on a non-transitory machine or computer readable medium. , for example, in memory 132, and in one embodiment, may be performed by processor 10 or graphics processor 112. Figure 1 is a flow diagram. In some embodiments, the sequence depicted in this flow diagram is shown. The system can be implemented in a hardware, a soft body or a firmware. In the embodiment, a non-transitory computer readable medium can be used, for example, a semi-conductive device, a magnetic memory, or a The optical memory stores instructions and can be executed by a processor to implement the sequence shown in the middle. The graphics processing techniques described herein can be implemented in a variety of hardware architectures. For example, the graphics function can be integrated into a single chipset. Or, a discrete graphics processor can be used. As another example 2, these graphics functions can be implemented by a general purpose processor' including a multi-core processor. The phrase "one embodiment" or "an embodiment" in this specification means that the specific feature, structure, or feature described in connection with the embodiment includes at least one of the features included in the present invention. The appearances of the words "in the embodiment" or "in the embodiment" are not necessarily referring to the same embodiment. In addition, these specific features, structures, or characteristics may be made in other suitable forms than those of the specific embodiments, and all of these may be covered by the scope of the present application. While the invention has been described with respect to a limited number of embodiments, the skilled artisan recognizes many modifications and variants derived therefrom. It is intended to cover all such modifications and variations within the true spirit and scope of the invention. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a flow chart of one embodiment; FIG. 2 depicts a plot for determining an average energy for each task; and FIG. 3 is a hardware depiction of an embodiment. [Main component symbol description] 118.. Display screen 120.. Keyboard and mouse 130.. Operation system 132.. Memory 134.. Hard drive 136.. Removable media 10~18 ...block 100.. main or host processor 104~107... bus bar 110.. chipset core logic 112.. graphics processor 114.. frame buffer 16

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Claims (1)

201243618 VII, the scope of application for patents: ! · A method, which includes the following steps: At least _ judged n "the edge of the two processors and the load characteristics and the device to perform - a ^ ^ ^ load. And electronically select a process 2, such as the application method (4) the old method, which is used for the workload, for the workload, to evaluate which processor has a = energy, such as the method of claiming 1 item, including The following steps: selection between the tangible and central processing unit. As in the method of claim 1, the method comprises the steps of: identifying energy usage restrictions, and::: equal energy usage restrictions and selection - one processing The method of claim 1 wherein the method of claim 1 includes the following steps: scheduling the processor on a processor with better performance for a given workload. 6 The method of claim 5, comprising the steps of: evaluating the performance metric under static and dynamic workloads, such as the method of claim 5, comprising the following steps: selecting can be performed in the shortest time The processor that acts as a load. A computer readable ship that stores instructions (4) that are to be executed by a process H to perform the following (4): based on the workload characteristics and two or more processors The ability to allocate a workload between the at least two processors, one processor is used to execute a workload, and the medium of claim 8 is further stored for performing the following steps. Directive: For the workload, evaluate which processor has lower energy usage. 10. As in the medium of claim 8 of the patent, it further stores instructions for performing the following steps: Between the graphics and the central processing unit 11. The medium of claim 8 of the patent application further stores instructions for performing the following steps: Identifying energy usage restrictions and selecting a processor to perform the workload based on the energy usage restrictions. _ As for the media in the scope of patent application No. 8, it further stores instructions for performing the following steps: The processor is scheduled to work on a processor with a better performance metric for a given workload. 13. The media of claim 12, further storing instructions for performing the following steps: in static and dynamic The performance metric is evaluated under workload. 14. The media of claim 12, further storing instructions for performing the following steps: Selecting the processor that can execute the workload in the shortest amount of time. 18 S 201243618 15. — Apparatus comprising: a graphics processing unit; and a central processing unit coupled to the graphics processing unit, the central processing unit for utilizing the workload characteristics and the capabilities of the two processors Select a processor to perform a workload. 16_ As for the equipment of claim 15 of the patent scope, the central processing unit is for: evaluating, for the workload, which processor has a lower energy usage. 17. The apparatus of claim 15 wherein the central processing unit is operative to: identify an energy usage limit and select a processor to perform the workload based on the energy usage limits. 18. The apparatus of claim 15 wherein the central processing unit is operable to: schedule work on the processor for a given workload with better performance. 19. As for the equipment of claim 18, the central processing unit is used to: Evaluate the performance metric under static and dynamic workloads. 20. For the equipment of claim 18, the central processing unit is used for: 19 201243618 Select the processor that can execute the workload in the shortest amount of time.