TW201238243A - Adaptive impedance matching - Google Patents
Adaptive impedance matching Download PDFInfo
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- TW201238243A TW201238243A TW101102841A TW101102841A TW201238243A TW 201238243 A TW201238243 A TW 201238243A TW 101102841 A TW101102841 A TW 101102841A TW 101102841 A TW101102841 A TW 101102841A TW 201238243 A TW201238243 A TW 201238243A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H7/00—Multiple-port networks comprising only passive electrical elements as network components
- H03H7/38—Impedance-matching networks
- H03H7/40—Automatic matching of load impedance to source impedance
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/02—Transmitters
- H04B1/04—Circuits
- H04B1/0458—Arrangements for matching and coupling between power amplifier and antenna or between amplifying stages
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- Input Circuits Of Receivers And Coupling Of Receivers And Audio Equipment (AREA)
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Abstract
Description
201238243 六、發明說明: L 明所屬^^技系奸領威】 相關申請案之交互參照 此專利申請案請求2011年1月27曰提出申請的美國臨 時專利申請案第61/436,768號案的權益,其全部内容以引用 方式被併入本文。 發明領域 此發明大體有關於傳輸線阻抗匹配領域,且更具體而 言’有關於適應性阻抗匹配技術。 t 冬好】 發明背景 ’ 環形天線,諸如近距離通訊(NFC)天線典型地耦合可攜 式電子裝置及/或終端機。環形天線,包括NFC裝置中所使 用的那些環形天線之固定調諧導致一阻抗失配,導致1^1?(: 發射器近距離功率反射。所產生的反射復可能導致接收器 中之雜訊,以及由於發射器之大負載所引起的傳輸誤差。 由附近的金屬物體引起之解諧進一步縮小傳輸範圍。此 外,天線容差可導致性能變化。類似的阻抗匹配問題存在 於功率傳輸之電感搞合方面,諸如經由一功率衰減器裝置 之電感耦合。因此,固定阻抗調諧方法不能有效克服由於 附近的金屬物體解諧’容差變化,及其他變異因素而造成 的阻抗失配。201238243 VI. Description of the invention: L Ming belongs to the ^^Technical system. The relevant application cross-references this patent application requesting the US Provisional Patent Application No. 61/436,768 filed on January 27, 2011 The entire content of which is incorporated herein by reference. FIELD OF THE INVENTION This invention relates generally to the field of transmission line impedance matching and, more particularly, to adaptive impedance matching techniques. t 冬好] Background of the Invention A loop antenna, such as a Near Field Communication (NFC) antenna, is typically coupled to a portable electronic device and/or terminal. The fixed tuning of loop antennas, including those used in NFC devices, results in an impedance mismatch resulting in 1^1? (: transmitter near-field power reflection. The resulting reflection complex can cause noise in the receiver, And the transmission error caused by the large load of the transmitter. The detuning caused by nearby metal objects further narrows the transmission range. In addition, the antenna tolerance can cause performance changes. Similar impedance matching problems exist in the inductance of power transmission. Aspects, such as inductive coupling via a power attenuator device. Therefore, fixed impedance tuning methods are not effective in overcoming impedance mismatch caused by nearby metal object detuning 'tolerance variations, and other variability factors.
然而’目前有用於適應性阻抗匹配的方法,諸如 Automatic Impedance Matching for 13.56 MHz NFC 201238243 如⑽mw,IEEE(電機及電子工程師協會)(著作權2008)中所 討論的那些方法依賴於相位資訊,且因此,導致相當大的 組件複雜性及實施費用(例如要求一具有相位檢測器模級 的量測電路)。因此,某些人會重視天線系統的進一步改良。 C 明内 J 發明概要 提供用於藉由使用電壓反饋來適應性地匹配一端子的 阻抗以摒除依賴相位資訊之需求的系統、方法及相關電略 拓撲。這導致簡化電路拓撲,且由於生產容差放寬而減少 實施成本’由於組件數減少而可靠性增加,通訊範圍增大, 通訊可靠性增加,及發射器負載調節之穩定性增加,以及 其他優勢。在各種實施例中,提供的天線匹配電路利用複 數動態可調諧無功組件’以及一用以適應性地匹配一端子 之阻抗的電壓反饋電路,該端子被連接至一天線,諸如〜 行動裝置中的近距離通§fL (NFC)環形天線β在各種實施例 中,本文所述之匹配電路依賴於電壓反饋並使用一分離電 容器調諧網路來適應性地匹配窄帶電感天線之阻抗變化。 可選擇地’分離電感器調諧網路用於窄帶電容天線之適應 性阻抗匹配。本文所述之匹配電路拓撲及相關方法可用以 動態地匹配與電感或電容耦合相關聯之許多電力組件之陡 抗’電力組件包括但並不限於天線(包括由於使用者及/或枣 境互動而易阻抗失配的行動電話天線)、電感式功率衰減 器、無線射頻識別(RHD)轉換器(諸如門匙讀取器)、F]v^ 射器(例如將可攜式播放器連接至一車輛收音機者)等。 4 201238243 在一層面中,用以匹配一端子的阻抗的一系統被提 供。該系統包含一信號產生器、連接至該信號產生器的一 匹配電路,及一反饋電路。該匹配電路包括至少一可變電 抗元件用以動態地調整複數無功組件之值,該至少一可變 電抗元件被配置成:(a)對該等無功組件中的一無功組件之 一值執行第一調整以最小化或最大化至少近乎共振時的一 反饋電壓,及(b)對多個無功組件之值執行第二調整,同時 維持該多個無功組件之間的一預定關係是一常數以匹配該 阻抗。該反饋電路被連接至該匹配電路且被配置成用以改 變該反饋電壓。 在另一層面中,用以匹配一端子的阻抗的一匹配電路 被提供。該匹配電路包含至少一可變電抗元件用以動態地 調整複數無功組件之值,該至少一可變電抗元件被配置 成:(a)對該等無功組件中的一無功組件之一值執行第一調 整以最小化或最大化至少近乎共振時的一反饋電壓,及(b) 對多個無功組件之值執行第二調整,同時維持該多個無功 組件之間的一預定關係是一常數以匹配該阻抗。 在又一層面中,藉由適應性地調整一匹配電路之複數 無功組件之值來匹配一端子的阻抗的一方法被提供。該方 法包含對該等無功組件中的一無功組件之一值執行第一調 整以最小化或最大化至少近乎共振時的一反饋電壓,及對 多個無功組件之值執行第二調整,同時維持該多個無功組 件之間的一預定關係是一常數以匹配該阻抗。 圖式簡單說明 201238243 雖然所附申請專利範圍詳細櫚述本發明之特徵,本發 明及其優勢由結合附圖的下述詳細說明獲充分理解,其中: 第1A圖是繪示依據本發明之一實施例,用於一電感負 載之適應性阻抗匹配的電路拓撲之示意圖; 第1B圖是繪示依據本發明之一實施例,反映經由第1A 圖之電路拓撲執行的一適應性調諧步驟的一史密斯圖的一 示意圖; 第1C圖是繪示依據本發明之一實施例,對應於第1B圖 之史密斯圖的一散點圖的一示意圖; 第1D圖是繪示依據本發明之一實施例,反映經由第1A 圖之電路拓撲執行的又一適應性調諧步驟的一史密斯圖的 一示意圖; 第1E圖是繪示依據本發明之一實施例,對應於第1D圖 之史密斯圖的一散點圖的一示意圖; 第2A圖是繪示依據本發明之一實施例,用於一電感負 載之適應性阻抗匹配的另一電路拓撲的一示意圖; 第2B圖是繪示依據本發明之一實施例,反映經由第2A 圖之電路拓撲執行的一適應性調諧步驟的一史密斯圖的一 示意圖; 第2C圖是繪示依據本發明之一實施例,對應於第2B圖 之史密斯圖的一散點圖的一示意圖; 第2D圖是繪示依據本發明之一實施例,反映經由第2A 圖之電路拓撲執行的又一適應性調諧步驟的一史密斯圖的 一示意圖; 6 201238243 第2E圖是繪示依據本發明之一實施例,對應於第2D圖 之史密斯圖的一散點圖的一示意圖; 第3A圖是繪示依據本發明之一實施例,用於一電感負 載之適應性阻抗匹配的另一電路拓撲的一示意圖; 第3B圖是繪示依據本發明之一實施例,與第3A圖之電 路拓撲相關聯的一史密斯圖的一示意圖; 第3C圖是繪示依據本發明之一實施例,與第3A圖之電 路拓撲相關聯的另一史密斯圖的一示意圖; 第3D圖是繪示依據本發明之一實施例,與第3A圖之調 諧電路之一狀態相關聯的一散點圖的一示意圖; 第3E圖是繪示依據本發明之一實施例,與第3A圖之電 路拓撲相關聯的一史密斯圖的一示意圖; 第3F圖是繪示依據本發明之一實施例,與第3A圖之電 路拓撲相關聯的另一史密斯圖的一示意圖; 第3G圖是繪示依據本發明之一實施例,與第3A圖之調 諧電路相關聯的一散點圖的一示意圖; 第4A圖是繪示依據本發明之一實施例,用於一電感負 載之適應性阻抗匹配的另一電路拓撲的一示意圖; 第4B、4C圖是繪示依據本發明之一實施例,與第4A圖 之電路之各別狀態相關聯之史密斯圖的示意圖; 第4D圖是繪示依據本發明之一實施例,與第4C圖相關 聯的一散點參數圖的一示意圖; 第4E、4F圖是繪示依據本發明之一實施例,與第4A圖 之電路之各別狀態相關聯之史密斯圖的示意圖; 201238243 第4G圖是繪示依據本發明之一實施例,與第4F圖相關 聯的一散點參數圖的一示意圖; 第5A及5B圖是繪示用於連接至一非-50歐姆源之一端 子的適應性阻抗匹配的一電路拓撲之另一實施例的示意 圖; 第5C圖是繪示依據本發明之一實施例,與第5B圖之電 路拓撲之一狀態相關聯的一史密斯圖的一示意圖; 第5D圖是繪示依據本發明之一實施例,與第5B圖之電 路拓撲之一狀態相關聯的一散點參數圖的一示意圖; 第5E圖是繪示依據本發明之一實施例,與第5B圖之電 路拓撲相關聯的一調諧步驟的一示意圖; 第5F圖是繪示依據本發明之一實施例,第5E圖之一電 抗元件之各種調諧值的一示意圖; 第5G圖是繪示依據本發明之一實施例,與第5F圖之調 諧步驟相關聯的一散點參數圖的一示意圖; 第5H圖是繪示依據本發明之一實施例,與第5B圖之電 路拓撲相關聯之另一調諧步驟的一示意圖; 第51圖是繪示依據本發明之一實施例,第5H圖之電抗 元件之各種調諧值的一示意圖; 第5J圖是繪示依據本發明之一實施例,與第5H圖之調 諧步驟相關聯的一散點參數圖的一示意圖; 第6A圖是繪示依據本發明之一實施例,用於一電容負 載之適應性阻抗匹配之電路拓撲的示意圖;However, there are currently methods for adaptive impedance matching, such as Automatic Impedance Matching for 13.56 MHz NFC 201238243 as in (10) mw, those methods discussed in IEEE (Association of Electrical and Electronics Engineers) (Copyright 2008) rely on phase information and, therefore, This results in considerable component complexity and implementation costs (eg, requiring a measurement circuit with a phase detector mode). Therefore, some people will pay attention to the further improvement of the antenna system. C Ming J Summary of the Invention A system, method and associated electrical topology for the need to adaptively match the impedance of a terminal by using voltage feedback to eliminate phase-dependent information. This results in a simplified circuit topology and reduced implementation cost due to production tolerance relaxation. 'Reliability increases due to reduced component count, increased communication range, increased communication reliability, increased stability of transmitter load regulation, and other advantages. In various embodiments, an antenna matching circuit is provided that utilizes a complex dynamic tunable reactive component 'and a voltage feedback circuit for adaptively matching the impedance of a terminal that is coupled to an antenna, such as a mobile device The close range §fL (NFC) loop antenna β In various embodiments, the matching circuit described herein relies on voltage feedback and uses a separate capacitor tuning network to adaptively match the impedance variations of the narrowband inductive antenna. Optionally, the split inductor tuning network is used for adaptive impedance matching of narrowband capacitive antennas. The matching circuit topology and related methods described herein can be used to dynamically match the steep impedance of many power components associated with inductive or capacitive coupling, including but not limited to antennas (including due to user and/or interaction). Easy-to-impedance mismatched mobile phone antenna), inductive power attenuator, radio frequency identification (RHD) converter (such as a key reader), F]v (for example, connecting a portable player to a Vehicle radio) and so on. 4 201238243 In one level, a system for matching the impedance of a terminal is provided. The system includes a signal generator, a matching circuit coupled to the signal generator, and a feedback circuit. The matching circuit includes at least one variable reactance element for dynamically adjusting a value of the plurality of reactive components, the at least one variable reactance element being configured to: (a) a reactive component of the reactive components One value performs a first adjustment to minimize or maximize a feedback voltage at least near resonance, and (b) performs a second adjustment on values of the plurality of reactive components while maintaining between the plurality of reactive components A predetermined relationship is a constant to match the impedance. The feedback circuit is coupled to the matching circuit and is configured to change the feedback voltage. In another aspect, a matching circuit for matching the impedance of a terminal is provided. The matching circuit includes at least one variable reactance component for dynamically adjusting a value of the plurality of reactive components, the at least one variable reactance component being configured to: (a) a reactive component of the reactive components One value performs a first adjustment to minimize or maximize a feedback voltage at least near resonance, and (b) performs a second adjustment on the values of the plurality of reactive components while maintaining between the plurality of reactive components A predetermined relationship is a constant to match the impedance. In yet another aspect, a method of matching the impedance of a terminal by adaptively adjusting the value of a plurality of reactive components of a matching circuit is provided. The method includes performing a first adjustment on one of the reactive components of the reactive components to minimize or maximize a feedback voltage at least near resonance, and performing a second adjustment on values of the plurality of reactive components While maintaining a predetermined relationship between the plurality of reactive components is a constant to match the impedance. BRIEF DESCRIPTION OF THE DRAWINGS The present invention and its advantages are fully understood from the following detailed description in conjunction with the accompanying drawings, in which: FIG. Embodiments, a schematic diagram of a circuit topology for adaptive impedance matching of an inductive load; FIG. 1B is a diagram illustrating an adaptive tuning step performed by a circuit topology of FIG. 1A, in accordance with an embodiment of the present invention A schematic diagram of a Smith chart; FIG. 1C is a schematic diagram showing a scatter diagram corresponding to the Smith chart of FIG. 1B according to an embodiment of the present invention; FIG. 1D is a diagram illustrating an embodiment of the present invention a schematic diagram of a Smith chart reflecting another adaptive tuning step performed via the circuit topology of FIG. 1A; FIG. 1E is a diagram showing a dispersion of the Smith chart corresponding to the 1D map according to an embodiment of the present invention FIG. 2A is a schematic diagram showing another circuit topology for adaptive impedance matching of an inductive load according to an embodiment of the present invention; FIG. 2B Is a schematic diagram showing a Smith chart reflecting an adaptive tuning step performed by the circuit topology of FIG. 2A in accordance with an embodiment of the present invention; FIG. 2C is a diagram illustrating an embodiment of the present invention, corresponding to A schematic diagram of a scatter plot of the Smith chart of FIG. 2B; FIG. 2D is a Smith chart of another adaptive tuning step performed by the circuit topology of FIG. 2A, in accordance with an embodiment of the present invention 6 201238243 2E is a schematic diagram showing a scatter diagram corresponding to the Smith chart of the 2D diagram according to an embodiment of the present invention; FIG. 3A is a diagram illustrating an embodiment of the present invention, A schematic diagram of another circuit topology for adaptive impedance matching of an inductive load; FIG. 3B is a schematic diagram of a Smith chart associated with the circuit topology of FIG. 3A, in accordance with an embodiment of the present invention; 3C is a schematic diagram showing another Smith chart associated with the circuit topology of FIG. 3A according to an embodiment of the present invention; FIG. 3D is a diagram showing an embodiment of the present invention, and FIG. 3A A schematic diagram of a scatter plot associated with one of the states of the tuned circuit; FIG. 3E is a schematic diagram of a Smith chart associated with the circuit topology of FIG. 3A, in accordance with an embodiment of the present invention; The figure is a schematic diagram showing another Smith chart associated with the circuit topology of FIG. 3A according to an embodiment of the present invention; FIG. 3G is a diagram illustrating tuning with FIG. 3A according to an embodiment of the present invention. A schematic diagram of a scatter plot associated with a circuit; FIG. 4A is a schematic diagram showing another circuit topology for adaptive impedance matching of an inductive load in accordance with an embodiment of the present invention; 4B, 4C Is a schematic diagram of a Smith chart associated with respective states of the circuit of FIG. 4A in accordance with an embodiment of the present invention; FIG. 4D is a diagram associated with FIG. 4C in accordance with an embodiment of the present invention A schematic diagram of a scatter parameter diagram; FIGS. 4E and 4F are schematic diagrams showing a Smith chart associated with respective states of the circuit of FIG. 4A according to an embodiment of the present invention; 201238243 FIG. 4G is a diagram According to one of the inventions Embodiments, a schematic diagram of a scatter parameter map associated with FIG. 4F; FIGS. 5A and 5B are diagrams showing a circuit topology for adaptive impedance matching connected to one of the terminals of a non-50 ohm source FIG. 5C is a schematic diagram showing a Smith chart associated with one of the circuit topologies of FIG. 5B according to an embodiment of the present invention; FIG. 5D is a diagram illustrating the present invention according to the present invention One embodiment, a schematic diagram of a scatter parameter map associated with one of the states of the circuit topology of FIG. 5B; FIG. 5E is a diagram showing the circuit topology associated with FIG. 5B, in accordance with an embodiment of the present invention A schematic diagram of a tuning step; FIG. 5F is a schematic diagram showing various tuning values of a reactance component of FIG. 5E according to an embodiment of the present invention; FIG. 5G is a diagram illustrating an embodiment of the present invention a schematic diagram of a scatter parameter map associated with the tuning step of FIG. 5F; FIG. 5H is a diagram illustrating another tuning step associated with the circuit topology of FIG. 5B in accordance with an embodiment of the present invention Schematic; Figure 51 is a diagram showing A schematic diagram of various tuning values of the reactance component of FIG. 5H according to an embodiment of the present invention; FIG. 5J is a scatter parameter diagram associated with the tuning step of FIG. 5H according to an embodiment of the present invention; Figure 6A is a schematic diagram showing a circuit topology for adaptive impedance matching of a capacitive load in accordance with an embodiment of the present invention;
第6B圖是繪示依據本發明之一實施例,反映經由第6A 201238243 圖之電路拓撲執行的一適應性調諧步驟的一史密斯圖的一 示意圖; 第6C圖是繪示依據本發明之一實施例,對應於第6B圖 之史密斯圖的一散點圖的一示意圖; 第6D圖是繪示依據本發明之一實施例,反映經由第6A 圖之電路拓撲執行的又一適應性調諧步驟的一史密斯圖的 一示意圖; 第6E圖是繪示依據本發明之一實施例,對應於第6D圖 之史密斯圖的一散點圖的一示意圖; 第7圖是繪示本發明之實施例之一通用系統組件佈局 的一示意圖;以及 第8圖是繪示依據本發明之實施例的一適應性阻抗調 諧方法的一流程圖。 L實方方式]1 發明之詳細說明 下述範例進一步說明本發明,不過當然不應被理解為 以任一種方式限制其範圍。 提供用於藉由使用電壓反饋來適應性地匹配一端子的 阻抗以摒除依賴於相位資訊之需求的系統、方法及相關電 路拓撲。這導致簡化電路拓撲,且由於生產容差放寬而減 少實施成本,由於組件數減少而可靠性增加,通訊範圍增 大,通訊可靠性增加,及發射器負載調節之穩定性增加, 以及其他優勢。在各種實施例中,所提供的天線匹配電路 利用複數動態可調諧無功組件,及一用以適應性地匹配一 201238243 端子之阻抗的電壓反饋電路,該端子被連接至一天線,諸 如一行動裝置中的近距離通訊(N F C)環形天線。在各種實施 例中,本文所述之匹配電路依賴於電壓反饋並使用一分離 電容器調諧網路來適應性地匹配窄帶電感天線之阻抗變 化。可選擇地,分離電感器§周5皆網路用於窄帶電容天線之 適應性阻抗匹配。本文所述之匹配電路拓撲及相關方法也 可同樣用於動態四配與電感或電容耦合相關聯的各種其他 電力元件之阻抗,包括但並不限於天線(包括由於使用者及 /或環境互動而易阻抗失配的行動電話天線)、電感式功率衰 減器、無線射頻識別(RFID)轉換器(諸如門匙讀取器)、fm 發射器(例如將可搞式播放器連接至一車輛收音機裝置者) 等。較佳地是,反饋電壓Vfb之一預定臨界值觸發下文所述 之匹配演算法之實施例之啟動。同樣地,當反饋電壓Vfb 降至另一預定臨界值以下時,可變電抗元件回復預定義初 始值。 轉參第1A圖,用於適應性匹配連接至電感元件之一端 子之阻抗的一電路拓撲之實施例被繪示。在此實施例中, 電感元件是一電感環形天線,諸如一行動裝置,諸如使用 在行動電話、智慧型手機、平板裝置、膝上型電腦等中的 NFC環形天線。在其他實施例中,天線是使一行動裝置與 一基地台耦合的一主RF天線,或一無線射頻識別(RFID)裝 置天線。在其他實施例中,電感元件形成一電感耦合端子 付費終端機、一電子門匙、一電感耦合電源或其他實施電 感耦合之裝置的一部分。電路拓撲100包括連接至一反饋電 10 201238243 路104的一信號產生器102 〇信號產生器i〇2包括輸入阻抗 R0,諸如50歐姆(例如代表-行動裝置發射器之一%歐姆輸 入阻抗)。信號產生器102之一端子被連接至一高阻抗反饋 電路104之一電阻器106之第—端子。電阻器1〇6具有一值 R 4,例如99 5 0歐姆。信號產生器丨〇 2之第二端子被連接至地 108。電阻器106之第二端子被連接至一放大器1〇9,放大器 109復被連接至第二50歐姆可變信號源11〇。 匹配電路112包括具有各自的可調諧值C^C2的適應 性可變電容器114、丨16。可變電容器114、116是經由至^ -可變電k元件118 ’諸如數位或類比微電機(或微電子)系 統(MEMS)裝置、電+變容器、數位可調諧電容器電路、切 換電容器陣列等而實施的。在—實施例中,適應性可觸 電容器C1及C2中的每-者是通過—專屬可變電抗元件 被實施。 可選擇地,-單-可變電抗元件118被配置成—適應性 可觸電容器網路cn、c2,其中C1AC2共享—可切換無功 元件庫。在-電㈣組實施態樣中,複數無功元件視需要 被配置成串聯,且例如為增加電容被個別短接。_多掷開 關選擇電容分裂。可選擇地或另外’電容器組中的每―: 功元件由一微控制器的處理器以數位方式控制,該處理器 執行一儲存在記憶體中之電腦可讀指令且包含被配置成基 於—反饋信號來選擇一切換配置的一演算法。在—實施二 令,反饋信號觸發不同模式,像待機,啟動調諧共振,及 進行一阻抗調諧(分裂)。 201238243 在另外的實施例中,調諧在實施上是透過用於電容器 的壓控介電材料(BST)(或在下文中針對匹配電容負載描述 之電感調諧情況下,一具有活動鐵心的鐵磁調諧電感器)、 具有例如使用步進馬達致動器之移動導電板或介電質的機 械調諧電容器。可選擇地,中繼交換、MOSFET或其他電 晶體切換,或一PIN二極體開關可被利用。 在所示實施例中,可變電容器114之第一端子被連接至 反饋電路104之電阻器106之第一端子,而可變電容器114之 第二端子被連接至可變電容器116之第一端子,可變電容器 116進一步連接至地。在此實施例中,電感天線120被跨接 在匹配電路118之可變電容器116之端子兩端。電感天線120 由具有一值L1的一電感器122及具有一值R1(例如50歐姆) 的一電阻器124表示’電阻器124代表輻射及熱損耗。 一調諧演算法之一實施例起始包括藉由調諧可變電容 器114之值C1來最小化反饋電壓之絕對值來實現共振。一旦 共振實現,可變電容器114、116的值C1及C2被調諧成使反 饋電壓Vfb之絕對值成為產生器電壓Vgeni絕對值(一已知 值)的%,同時保持值的總和C1+C2是一常數。這基於反饋 電壓適應性匹配天線阻抗的變化,而無需相位資訊。藉由 消除阻抗之無功成分,負載阻抗被最小化-因此,電壓也被 最】、化。在一貫施例中,一演算法控制調諧是經由一微控 制器利用對反饋電壓之類比對數位轉換器(adc)的類比輸 入而實施。微控制器包括用以控制串聯或並聯配置的電抗 件開關的一或多個數位輸出腳。若變容器作為可調错電 12 201238243 容器,則控制一外部數位對類比轉換器(D AC)或使用一嵌入 式DAC轉換回類比域。 與第1A圖之一電路拓撲相關聯之適應性阻抗匹配之一 實施例另外參照第1B-1E圖更加詳細地描述。電容器114的 初始值(值C1)及電容器116的初始值(值C2)是根據下述公 式:6B is a schematic diagram showing a Smith chart reflecting an adaptive tuning step performed by the circuit topology of FIG. 6A 201238243 according to an embodiment of the present invention; FIG. 6C is a diagram showing implementation according to the present invention For example, a schematic diagram of a scatter plot corresponding to the Smith chart of FIG. 6B; FIG. 6D is a diagram illustrating yet another adaptive tuning step performed by the circuit topology of FIG. 6A, in accordance with an embodiment of the present invention. A schematic diagram of a Smith chart; FIG. 6E is a schematic diagram showing a scatter diagram corresponding to the Smith chart of FIG. 6D according to an embodiment of the present invention; FIG. 7 is a diagram illustrating an embodiment of the present invention A schematic diagram of a general system component layout; and FIG. 8 is a flow chart showing an adaptive impedance tuning method in accordance with an embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION The following examples further illustrate the invention, but should not be construed as limiting the scope in any way. Systems, methods, and associated circuit topologies for adaptively matching the impedance of a terminal by using voltage feedback to eliminate the need for phase information are provided. This results in simplified circuit topologies and reduced implementation costs due to production tolerances, increased reliability due to reduced component count, increased communication range, increased communication reliability, increased stability of transmitter load regulation, and other advantages. In various embodiments, an antenna matching circuit is provided that utilizes a plurality of dynamic tunable reactive components, and a voltage feedback circuit for adaptively matching the impedance of a 201238243 terminal, the terminal being coupled to an antenna, such as an action Near Field Communication (NFC) loop antenna in the device. In various embodiments, the matching circuit described herein relies on voltage feedback and uses a separate capacitor tuning network to adaptively match the impedance variations of the narrowband inductive antenna. Alternatively, the split inductor § 5 is networked for adaptive impedance matching of narrowband capacitive antennas. The matching circuit topology and related methods described herein can also be used to dynamically mate the impedance of various other power components associated with inductive or capacitive coupling, including but not limited to antennas (including due to user and/or environmental interactions). Easy-impedance mismatched mobile phone antenna), inductive power attenuator, radio frequency identification (RFID) converter (such as a key reader), fm transmitter (such as connecting a player to a vehicle radio) )). Preferably, a predetermined threshold of the feedback voltage Vfb triggers the initiation of an embodiment of the matching algorithm described below. Similarly, when the feedback voltage Vfb falls below another predetermined threshold, the variable reactance element returns to a predefined initial value. Referring to Figure 1A, an embodiment of a circuit topology for adaptively matching the impedance connected to one of the terminals of the inductive component is shown. In this embodiment, the inductive component is an inductive loop antenna, such as a mobile device, such as an NFC loop antenna for use in a mobile phone, smart phone, tablet device, laptop, or the like. In other embodiments, the antenna is a primary RF antenna that couples a mobile device to a base station, or a radio frequency identification (RFID) device antenna. In other embodiments, the inductive component forms an inductively coupled terminal payment terminal, an electronic key, an inductively coupled power supply, or other device that implements inductive coupling. Circuit topology 100 includes a signal generator 102 coupled to a feedback power 10 201238243 path 104. The signal generator i 〇 2 includes an input impedance R0, such as 50 ohms (e.g., representative of one of the mobile device transmitters, ohmic input impedance). One of the terminals of signal generator 102 is coupled to a first terminal of resistor 106 of a high impedance feedback circuit 104. Resistor 1〇6 has a value R 4 , such as 99 5 0 ohms. The second terminal of signal generator 丨〇 2 is coupled to ground 108. The second terminal of resistor 106 is coupled to an amplifier 1〇9, which is coupled to a second 50 ohm variable signal source 11A. Matching circuit 112 includes adaptive variable capacitors 114, 丨16 having respective tunable values C^C2. The variable capacitors 114, 116 are via a variable electrical k-element 118' such as a digital or analog micro-motor (or micro-electronic) system (MEMS) device, an electrical + varactor, a digital tunable capacitor circuit, a switched capacitor array, etc. And implemented. In the embodiment, each of the adaptive contact capacitors C1 and C2 is implemented by a dedicated variable reactance element. Alternatively, the -single-variable reactive component 118 is configured to be an adaptive contactable capacitor network cn, c2, wherein the C1AC2 share-switchable reactive component library. In the embodiment of the electric (four) group, the plurality of reactive elements are arranged in series as needed, and for example, the added capacitance is individually shorted. _ Multi-throw switch selects capacitor splitting. Alternatively or in addition to each of the 'capacitor banks': the work elements are digitally controlled by a processor of a microcontroller executing a computer readable instruction stored in the memory and including being configured to be based on - The feedback signal is used to select an algorithm for switching configurations. In the implementation of the second command, the feedback signal triggers different modes, such as standby, starting the tuning resonance, and performing an impedance tuning (split). 201238243 In a further embodiment, the tuning is implemented by a voltage controlled dielectric material (BST) for the capacitor (or in the case of an inductive tuning described below for a matched capacitive load, a ferromagnetic tuned inductor with a movable core) And a mechanically tuned capacitor having a moving conductive plate or dielectric, for example using a stepper motor actuator. Alternatively, relay switching, MOSFET or other transistor switching, or a PIN diode switch can be utilized. In the illustrated embodiment, the first terminal of the variable capacitor 114 is coupled to the first terminal of the resistor 106 of the feedback circuit 104, and the second terminal of the variable capacitor 114 is coupled to the first terminal of the variable capacitor 116. The variable capacitor 116 is further connected to ground. In this embodiment, the inductive antenna 120 is connected across the terminals of the variable capacitor 116 of the matching circuit 118. Inductor antenna 120 is represented by an inductor 122 having a value L1 and a resistor 124 having a value of R1 (e.g., 50 ohms). Resistor 124 represents radiation and heat loss. An embodiment of a tuning algorithm initially includes resonating by tuning the value C1 of the variable capacitor 114 to minimize the absolute value of the feedback voltage. Once the resonance is achieved, the values C1 and C2 of the variable capacitors 114, 116 are tuned such that the absolute value of the feedback voltage Vfb becomes % of the absolute value (a known value) of the generator voltage Vgeni, while the sum of the held values C1 + C2 is A constant. This is based on feedback voltage adaptive matching of antenna impedance changes without phase information. By eliminating the reactive component of the impedance, the load impedance is minimized - so the voltage is also maximized. In a consistent embodiment, an algorithmic control tuning is implemented via a microcontroller using an analog input to an analog-to-digital converter (adc) such as a feedback voltage. The microcontroller includes one or more digital output pins for controlling the reactor switches in a series or parallel configuration. If the varactor is used as an adjustable power 12 201238243 container, then control an external digit to the analog converter (D AC) or use an embedded DAC to convert back to the analog domain. One of the adaptive impedance matching associated with one of the circuit topologies of Figure 1A is described in more detail with reference to Figures 1B-1E. The initial value of the capacitor 114 (value C1) and the initial value of the capacitor 116 (value C2) are based on the following formula:
Ctune = —I— ω2ΠCtune = —I— ω2Π
Cl = Ν * Ctune C2 - Ctune - Cl 適應性調諸程序之第一步驟需要調整^的值,直到反 饋電路104之埠2的|Vfb|最小化為止,這在天線線圈電抗被 電容C1+C2消除的共振時發生’如第1B圖之史密斯圖及第 1C圖之一對應的散點參數圖所示者。在此調諧步驟之後, sii在所欲頻率下近似實數(第1]8圖),且vfb在所欲頻率下 被最小化(第ic圖),在此範例中,所欲頻率為13 56MHz。 第1B及1C圖繪示C1改變2pF實現共振,然而,阻抗匹配仍 不理想。在Cdelta = 2pF時,|Vfb|或|S21|的值被最小化。 適應性調諧程序之第二步驟需要調整C1&C2,同時保 持(:山1^ = (:1+€2不變,如第11)及化圖中所示者。做如下 設定.若02’ = €2-〇£16如’(:1,=(:1+€(1611&。調整藉由使 用不同的Cdelta值來執行,直到|第汨圖中之丨vfb丨或丨S21丨達i 為止’這指示-理想匹配。第1〇及1£圖繪示cddta = 4pF 表示-理想匹配’因為自產生器所看到的su非常接近於史 13 201238243 密斯圖中心(第ID圖)且|Vfb| = l/2 * |Vgenerator|或S21非常 接近於1(第1E圖)。 第1A圖之一匹配方法之一實施例之數學證明 如上文所討論者,第一步驟需要使用C1藉由使如下的 產生器端子兩端電壓Vfb最小化來產生共振: j〇)C2 j(〇C\ K\Cl = Ν * Ctune C2 - Ctune - Cl The first step of the adaptive tuning procedure needs to adjust the value of ^ until the |Vfb| of the feedback circuit 104 is minimized, which is the capacitance of the antenna coil by the capacitor C1+C2 The elimination of the resonance occurs as shown in the scatter parameter diagram corresponding to one of the Smith chart and the 1C chart in FIG. 1B. After this tuning step, sii approximates the real number at the desired frequency (Fig. 1 8), and vfb is minimized at the desired frequency (the ic diagram). In this example, the desired frequency is 13 56 MHz. Figures 1B and 1C show that C1 changes 2pF to achieve resonance, however, impedance matching is still not ideal. When Cdelta = 2pF, the value of |Vfb| or |S21| is minimized. The second step of the adaptive tuning procedure needs to adjust C1 & C2 while maintaining (: Shan 1 ^ = (: 1 + € 2 unchanged, as shown in Figure 11) and the figure shown in the diagram. Make the following settings. If 02' = €2-〇£16 as '(:1,=(:1+€(1611&. Adjustments are performed by using different Cdelta values until |汨 in the figure 丨vfb丨 or 丨S21丨达i So far this indication - ideal match. The first and first plots show that cddta = 4pF means - ideal match 'because the su seen from the generator is very close to the history 13 201238243 Miestu Center (ID map) and | Vfb| = l/2 * |Vgenerator| or S21 is very close to 1 (Fig. 1E). One of the matching methods of Figure 1A is a mathematical proof of the embodiment. As discussed above, the first step requires the use of C1. Resonate by minimizing the voltage Vfb across the generator terminal as follows: j〇)C2 j(〇C\ K\
V,N j〇)C2 jcoC2 + Rl) j(〇C\ j(〇C2 (jaLl + R\) 由於Cl是唯一的變量且設定:J + = jcoCi j〇)C2 + (jwL\ + R\) 結果是 VFB =\VC2\ V,s jc〇ClV,N j〇)C2 jcoC2 + Rl) j(〇C\ j(〇C2 (jaLl + R\) Since Cl is the only variable and is set: J + = jcoCi j〇)C2 + (jwL\ + R\ The result is VFB =\VC2\ V, s jc〇Cl
A + jBA + jB
VIN jc〇C\VIN jc〇C\
+ A + JB R〇 j(〇C\+ A + JB R〇 j(〇C\
+ A + jB j〇>c\+ A + jB j〇>c\
+ A + jB 方程式可僅藉由設定而被最小化。共振並不意 ωΒ 味著理想匹配,因為共振可意指任一實數阻抗而理想匹配 僅在A = R〇時發生。 第二匹配步驟需要以維持共振方式的同時改變C1及 C2。共振發生條件為: 14 201238243 ωΒ α = Β mC\ j(〇C2 jcoC2 *(jaLl + Rl) (j0Ll + R\) 由於Q值高,我們知道丨jcoLl| » |R1|,允許一忽略R1 的近似值。則我們得到The + A + jB equation can be minimized only by setting. Resonance is not intended to be an ideal match because resonance can mean any real impedance and ideal match occurs only when A = R〇. The second matching step requires changing C1 and C2 while maintaining the resonance mode. The resonance occurs as follows: 14 201238243 ωΒ α = Β mC\ j(〇C2 jcoC2 *(jaLl + Rl) (j0Ll + R\) Since the Q value is high, we know 丨jcoLl| » |R1|, allowing one to ignore R1 Approximate value. Then we get
B ωΟΙ jcoC2 j(〇L\ jcoC2 + jcoL\ ωΠ coC2 ωΙΛ ®(C1 + C2); 定義 = Cl + C2 ω2Π 且使其保持不變,則共振被維 持不變-因此若C2變化AC,則C1也變化-AC。共振時,網路 阻抗Zm(天線及匹配電容器)是實數,如下所示:B ωΟΙ jcoC2 j(〇L\ jcoC2 + jcoL\ ωΠ coC2 ωΙΛ ®(C1 + C2); Definition = Cl + C2 ω2Π and keep it constant, the resonance is maintained - so if C2 changes AC, then C1 Also changes -AC. At resonance, the network impedance Zm (antenna and matching capacitor) is a real number as follows:
Zm j(〇C\ · + jcoCl < (/*^1+ 7?l)Zm j(〇C\ · + jcoCl < (/*^1+ 7?l)
Re jcoC2Re jcoC2
Re jmL\ + R\ jcoCl + jcolA + Λ1 jwC2 + j〇)L\ + R] \-ω21\α + j^C2R\Re jmL\ + R\ jcoCl + jcolA + Λ1 jwC2 + j〇)L\ + R] \-ω21\α + j^C2R\
Re 〇ωΠ + - ω2Πα - jcoC2R\) fy-a2L\C2f + {〇)C2R\)2 /?1-6j2Z1C2/?1 + ^2Z1C2/?1 i\-m2L\C2f +{aC2R\)2 (]-a2L\C2f +{〇)C2R\)2 1 + {ω2ηα} - 2m2L\C2 + (coC2R\)2 則若線圈為高Q值(0)L1»R1): 15 201238243 1 + {ωΟΙωη)2 - 2iy2LlC2 + {〇}C2R\f \ + ^2L\Clf -2m2L\C2 產生器端子兩端之反饋電壓: R\Re 〇ωΠ + - ω2Πα - jcoC2R\) fy-a2L\C2f + {〇)C2R\)2 /?1-6j2Z1C2/?1 + ^2Z1C2/?1 i\-m2L\C2f +{aC2R\)2 ( ]-a2L\C2f +{〇)C2R\)2 1 + {ω2ηα} - 2m2L\C2 + (coC2R\)2 If the coil is high Q (0)L1»R1): 15 201238243 1 + {ωΟΙωη) 2 - 2iy2LlC2 + {〇}C2R\f \ + ^2L\Clf -2m2L\C2 Feedback voltage across the generator terminals: R\
yFB R] (\-M2L\C2fyFB R] (\-M2L\C2f
vIN ίί 及〇 +- R\ -a2L\C2j R\ +R\ 且接著使用常 (C1 + C2) 我們得到:vIN ίί and 〇 +- R\ -a2L\C2j R\ +R\ and then use constant (C1 + C2) we get:
VFB R\ R〇VFB R\ R〇
X~^-2C2 +RXX~^-2C2 +RX
vFBvFB
V,N · _1_ ^ C2 1 \2 C1 + C2 + 1 解此方程式當其等於%時,提供一理想匹配 16 201238243 __C2 R\{ C1 + C2 R0 (χ C2 R\{ CI + C2V,N · _1_ ^ C2 1 \2 C1 + C2 + 1 Solve this equation and provide an ideal match when it equals % 16 201238243 __C2 R\{ C1 + C2 R0 (χ C2 R\{ CI + C2
C1 + C2 CI + C2 C2 Cl y R0 CtuneC1 + C2 CI + C2 C2 Cl y R0 Ctune
C\ = N^ Ctune * Ctune = —-— = Cl + C2 ω2α C2 = Ctune-Cl 其等於針對第1A-1E圖在上文所討論的近似公式。 轉參第2A圖,用於適應性匹配被連接至一電感元件, 諸如天線的一端子之阻抗的一電路拓撲之另一實施例被繪 示。電路拓撲200類似於相關於前述第1A圖所述者,只是高 阻抗反饋電路104’之電阻器106之第一端子被連接至可變 電容器116之第一端子,可變電容器116進一步連接至地 108。電感天線120被連接在電阻器106之第一端子與地108 之間。與此電路拓撲相關聯之反饋電壓Vfb是並聯電容器C2 兩端的電壓。 在此實施例中,調諧演算法一般以兩個步驟執行。首 先,共振藉由調諧可變電容器114之值C1來最大化電壓反饋 而得以實現。調諧C1消除產生器所看到的無功成分,且因 17 201238243 此最大化自產生器所汲取之電流。接著,天線端子兩端之 電壓被最大化。因此,第二步驟一般再次包括藉由調諸c 1 及C2的值同時保持C1+C2—定來最大化電壓反饋。因此’ 適應性地匹配天線120無需相位資訊。在所示實施例中,產 生器102具有一 50歐姆的阻抗。 與第2A圖之一電路拓撲相關聯之適應性阻抗匹配之一 實施例另外參照第2B-2E圖更加詳細地描述。在此實施例 中,電容器114之初始值(值C1)及電容器116之初始值(C2) 是根據下述公式:C\ = N^ Ctune * Ctune = —-— = Cl + C2 ω2α C2 = Ctune-Cl This is equal to the approximation formula discussed above for the 1A-1E plot. Referring to Figure 2A, another embodiment of a circuit topology for adaptive matching being coupled to an inductive component, such as the impedance of a terminal of the antenna, is shown. The circuit topology 200 is similar to that described above with respect to FIG. 1A except that the first terminal of the resistor 106 of the high impedance feedback circuit 104' is coupled to the first terminal of the variable capacitor 116, and the variable capacitor 116 is further coupled to ground. 108. Inductor antenna 120 is coupled between the first terminal of resistor 106 and ground 108. The feedback voltage Vfb associated with this circuit topology is the voltage across the shunt capacitor C2. In this embodiment, the tuning algorithm is typically performed in two steps. First, resonance is achieved by tuning the value C1 of the variable capacitor 114 to maximize voltage feedback. Tuning C1 eliminates the reactive component seen by the generator and, as a result of 201232243, maximizes the current drawn from the generator. Then, the voltage across the antenna terminals is maximized. Therefore, the second step generally again includes maximizing the voltage feedback by adjusting the values of c 1 and C 2 while maintaining C1 + C2. Therefore, adaptively matching the antenna 120 does not require phase information. In the illustrated embodiment, the generator 102 has a 50 ohm impedance. One of the adaptive impedance matching associated with one of the circuit topologies of Figure 2A is described in more detail with reference to Figures 2B-2E. In this embodiment, the initial value of capacitor 114 (value C1) and the initial value of capacitor 116 (C2) are based on the following equation:
Ctune =-- ω2ΙΑCtune =-- ω2ΙΑ
Cl = * Ctune C2 = Ctune - Cl 調譜程序之此一實施例之第一步驟需要適應性地調整 C1的值,直到反饋電路104,之埠2的丨vfb|被最大化為止,這 發生在天線線圈電抗被電容C1+C2消除而共振時,如第2B 圖之史密斯圖及第2C圖之一對應的散點參數圖所示者。在 此調諧步驟之後,S11近似實數(第2B圖)且Vfb被最大化(第 2C圖)。第2B及2C圖繪示C1改變2pF實現共振,然而,阻抗 匹配仍不理想。在Cdelta = 2 pF時,|Vfb|或|S21|的值被最大 化。 適應性調諧程序之所示實施例之第二步驟需要調整C1 及02’同時保持〇11狀=(:1+€2不變,如第20及2£圖所示 者做如下 5史疋.右C2, = C2 - Cdelta ,則 C1,= Cl + Cdelta。 18 201238243 調整是藉由使用不同的Cdelta值來執行的,直到第2E圖中的 |Vfb|或|S21|被最大化為止,這指示一理想匹配。 第2A圖之一匹配方法之一實施例之數學證明 使用C1藉由最大化C2兩端之電壓Vfb來產生共振:Cl = * Ctune C2 = Ctune - Cl The first step of this embodiment of the spectrum modulation procedure needs to adaptively adjust the value of C1 until the feedback circuit 104, after 丨vfb| of 埠2 is maximized, this occurs in When the antenna coil reactance is canceled by the capacitance C1+C2 and resonated, as shown in the scatter parameter diagram corresponding to one of the Smith chart and the 2C chart of FIG. 2B. After this tuning step, S11 approximates the real number (Fig. 2B) and Vfb is maximized (Fig. 2C). Figures 2B and 2C show that C1 changes 2pF to achieve resonance, however, impedance matching is still not ideal. When Cdelta = 2 pF, the value of |Vfb| or |S21| is maximized. The second step of the illustrated embodiment of the adaptive tuning procedure requires adjustment of C1 and 02' while maintaining 〇11-like = (:1+€2 unchanged, as shown in Figures 20 and 2, as follows: 5 history. Right C2, = C2 - Cdelta, then C1, = Cl + Cdelta. 18 201238243 Adjustment is performed by using different Cdelta values until |Vfb| or |S21| in Figure 2E is maximized, this Indicates an ideal match. One of the matching methods of one of the methods of Figure 2A illustrates the use of C1 to generate resonance by maximizing the voltage Vfb across C2:
Ffi = \VCl\ ZFfi = \VCl\ Z
vIN A—)AW) j(〇C\ + 1 /. ,,vIN A—)AW) j(〇C\ + 1 /. ,,
A + jB jcoCl *(]ωΣ\ + R\) jcoC2 + 〇ωΖ1 + Λΐ) 此式並不包括Cl,結果是:A + jB jcoCl *(]ωΣ\ + R\) jcoC2 + 〇ωΖ1 + Λΐ) This formula does not include Cl. The result is:
VfB=\VC2[VfB=\VC2[
VINVIN
A + jBA + jB
Rn j(〇C\Rn j(〇C\
+ A + jB R〇 1 j(〇C\+ A + jB R〇 1 j(〇C\
+ A + jB 僅改變Cl導致一簡單的一階方程式。Vfb藉由使C1 = J- ωΒ 而被最大化,因此消除分母之無功部分。產生器看到的阻 抗為Ζ = —-—+ = ,為指不共振的一貫數。 jc〇C\ 共振並不意味著理想匹配,因為共振可指任一實數阻 抗而一理想匹配在A = R0也成立時發生。 19 201238243 第二匹配步驟需要同時改變Cl及C2,同時維持共振。 C1 ωΒ+ A + jB Changing only Cl results in a simple first-order equation. Vfb is maximized by making C1 = J- ω ,, thus eliminating the reactive part of the denominator. The impedance seen by the generator is Ζ = — — — + = , which is the consistent number of non-resonances. The resonance of jc〇C\ does not mean an ideal match, since resonance can refer to any real impedance and an ideal match occurs when A = R0 also holds. 19 201238243 The second matching step requires simultaneous changes in Cl and C2 while maintaining resonance. C1 ωΒ
B ωΟ\ jmC2 ja>C2 .+ (joLl + R\) 由於Q值高,我們知道jc〇Ll»Rl,這允許一忽略R1的 近似值。在此情況下:B ωΟ\ jmC2 ja>C2 .+ (joLl + R\) Since the Q value is high, we know that jc〇Ll»Rl, which allows an approximation of R1 to be ignored. In this situation:
B ωΟΙ im j〇)C2 j〇)C2 )G)L\ ωΙ\ 〇)C2 ω (Cl + C2) = ωη 共振藉由定義〇匿= 且使其保持不變而被 ω L\ 維持。因此,C2的值變化△(:需要Cl的值變化-△(:。在共振 時,網路阻抗Zin是實數: zB ωΟΙ im j〇)C2 j〇)C2 )G)L\ ωΙ\ 〇)C2 ω (Cl + C2) = ωη Resonance is maintained by ω L\ by defining the concealment = and keeping it constant. Therefore, the value of C2 changes Δ (: the value of Cl needs to be changed - Δ (:. At resonance, the network impedance Zin is a real number: z
IN jwC2 j〇)C2 + jcoLX + R\ '(jwL\ + R\) '1 *{jwL\ + R\) jwC2 =Re jwL\-l· R\ 1 jcoC2 + Jd)lA + /U _\-w2L\C2 + jwC2R\ {jaL\ + 7?l)(l - o2L\C2 - jcoC2R\) ^-m2L\Clf +{coC2R\yIN jwC2 j〇)C2 + jcoLX + R\ '(jwL\ + R\) '1 *{jwL\ + R\) jwC2 =Re jwL\-l· R\ 1 jcoC2 + Jd)lA + /U _\ -w2L\C2 + jwC2R\ {jaL\ + 7?l)(l - o2L\C2 - jcoC2R\) ^-m2L\Clf +{coC2R\y
Re R\-m2L\C2R\ + m2L\C2R\ {^-m2L\Clf +{f〇C2R\)2 R\ ^-m2L\Clf + {〇)C2R\y· 1 + (ω2Πα^ - 2a2L\C2 + (〇)C2R\f 20 201238243 則若線圈為高Q值((〇Ll»Rl): Z...=_ 讯_a_R\_ 川 l + (®C2iyZ,l)2-2ft)2Z,lC2 + (iyC2/?l)2 1 + (^1102^-2^1102 (\-a2L\C2f 若我們接著看C2兩端之反饋電壓: VFB ZlN jd V,N {\-w2L\C2f j 禮 Λ0 + (ΐ-ω2πα^Re R\-m2L\C2R\ + m2L\C2R\ {^-m2L\Clf +{f〇C2R\)2 R\ ^-m2L\Clf + {〇)C2R\y· 1 + (ω2Πα^ - 2a2L\ C2 + (〇)C2R\f 20 201238243 If the coil is high Q ((Ll»Rl): Z...=_ News_a_R\_ 川 l + (®C2iyZ,l)2-2ft)2Z , lC2 + (iyC2/?l)2 1 + (^1102^-2^1102 (\-a2L\C2f If we then look at the feedback voltage across C2: VFB ZlN jd V, N {\-w2L\C2f j Ritual 0 + (ΐ-ω2πα^
Rl + j .(\-a2L\C2f wC\ Κ0(\-ω2Π€2} +R\ 使用常數Cftme = a + C2: ω2Π <=> ω2 L\ = (C1 + C2) 我們得 到: ii C2 丫 Ri + j- ^ Ctune J yFa wC\ vIN f D 1 C2 V ni 1 + 7' Ctune C2、 Ctune, R\wC\ ' C2 1Rl + j .(\-a2L\C2f wC\ Κ0(\-ω2Π€2} +R\ Use constant Cftme = a + C2: ω2Π <=> ω2 L\ = (C1 + C2) We get: ii C2 丫Ri + j- ^ Ctune J yFa wC\ vIN f D 1 C2 V ni 1 + 7' Ctune C2, Ctune, R\wC\ ' C2 1
CtuneCtune
^tuneA(zuC\R\f +C\A (cCm)2+f 1. C2 Ctune, wCl ( C2 + 1 Λ1 + Λ0 1—V Ctune \2^tuneA(zuC\R\f +C\A (cCm)2+f 1. C2 Ctune, wCl ( C2 + 1 Λ1 + Λ0 1—V Ctune \2
vFBvFB
V,NV, N
ctCI Ctune2 R\ + R0CVctCI Ctune2 R\ + R0CV
VIN Ctune R\ + R0Cl 將此方程式對Cl微分並將Cl設定成等於零(0)以找到 最大值及最小值,我們得到: 21 201238243 d dClVIN Ctune R\ + R0Cl This equation is differentiated from Cl and Cl is set equal to zero (0) to find the maximum and minimum values. We get: 21 201238243 d dCl
VFH 2 * Ctunia'RQCm2 - Ctuni02aRl+ 4ctu^ii〇2R\2 +C12 (ctunio^Rl2 ^IClunimC\2R\+ω^Ο2Cl4) C1 = 0 或VFH 2 * Ctunia'RQCm2 - Ctuni02aRl+ 4ctu^ii〇2R\2 +C12 (ctunio^Rl2 ^IClunimC\2R\+ω^Ο2Cl4) C1 = 0 or
Vfb被最小化或最大化。 選擇Vfb is minimized or maximized. select
Cl = Ctune , \R0~ w2L\ 因為C1=0得到最小值且Cl 必須為正,於是我們使用限制式Cl + C2 = -^-〇C2 = 一一-C1 ω L\ ω L\ 來確定匹配已發生: Z, «S___Λ___ (ΐ~ω2πα}Cl = Ctune , \R0~ w2L\ Since C1=0 gets the minimum and Cl must be positive, we use the restricted formula Cl + C2 = -^-〇C2 = one--C1 ω L\ ω L\ to determine the match Has occurred: Z, «S___Λ___ (ΐ~ω2πα}
Rl \λ· \-ω2η ω2Π ω2Π (Rl' R〇. R0 \ 轉參第3A圖,另一用於適應性匹配被連接至一電感元 件’諸如天線的一端子之阻抗的一電路拓撲之實施例被繪 示°電路拓撲300包括被連接至一高阻抗包絡反饋電路3〇4 的一信號產生器302。信號產生器302之一實施例具有一輸 入阻抗R0,諸如50歐姆。信號產生器302之一端子被連接至 反饋電路3〇4之一電阻器306之第一端子。電阻器306之一實 施例具有一值R4 ’例如9950歐姆。信號產生器3〇2之第二端 子被連接至地308。電阻器306之第二端子被連接至一放大 器309,放大器309復連接至第二50歐姆可變信號源31〇。 匹配電路312包括具有各自可調諧值C3及C4的適應性 22 201238243 可變電容器314、316。如上所述者,可變電容器314、316 是經由至少一可變電抗元件318,諸如數位或類比微電機 (或微電子)系統(MEMS)裝置、電子變容器、數位可調諧電 容器電路、切換電容器陣列等而實施的。在所示實施例中, 可變電容器316之第一端子被連接至反饋電路3〇4之電阻器 3〇6之第一端子,而可變電容器316之第二端子被連接至地 308。可變電容器316之第一端子也被連接至可變電容器314 之第一端子。在此實施例中,電感天線120被連接在可變電 容器314之第二端子與地308之間。電感天線320由具有一值 L2的一電感器322及具有一值R2(例如50歐姆)的一電阻器 324表示,電阻器324代表輻射及熱損耗。 在此一調諧演算法之實施例中,共振藉由調諧可變電 容器316之值C4以最大化電壓反饋來接近。接下來,電容器 316的值(C4)及314的值(C3)被調諸,同時保持比率 1/(1/C3+1/C4)是一常數,直到反饋電壓等於產生器電壓之 一半(即Vfb = MVgenerator)為止。因此,無需相位資訊來 實現一匹配。 更詳細而言,C3及C4的初始值依下式被找出: C3- 1 仍 Lanl ~ ^-\lRani C4 = -T-i-r δΤ L (-- C3 在此範例中,調譜導致C4偏移百分之30且C3增加 20pF。首先,C4的值被調整,直到反饋電路304之埠4(S42) 的|Vfb|在非常接近於共振時被最大化,天線線圈電抗被串 23 201238243 聯電容消除為止: 第3Β圖繪示一初始匹配之一史密斯圖,而第3C及3D圖 ’會不C4減小U〇pF的結果,其發生在非常接近於共振及最大 化乂伪時。 接下來’ C3及C4均被調整,同時維持關係式 3 + H = CTl⑽不變,因此維持共振,直到反饋S42變成1 ’ 對應於Vfb=l/2*Vgen為止。第3E圖描繪在此步驟之前的一 史达、斯圖。第3F及3G圖分別繪示當C3減小20pF且C4被調整 同時維持共振時依據此步驟的一史密斯圖及一散點參數 圖。第3F圖繪示當c:3減小2〇pF,Vfb=1/2*Vgen(即第3(3圖 之散點參數圖中S42=l)時非常接近一理想匹配。 轉參第4A圖’用於適應性匹配被連接至一電感元件, 諸如天線的一端子之阻抗的一電路拓撲之另一實施例被繪 示。電路拓撲400類似於相關於前述第3A圖所述者’只是高 阻抗反饋電路304’之電阻器306之第一端子被連接至可變 電容器316之第二端子。 在此實施例中,C3及C4的初始值基於下述公式: C3 =___1 0)2L«m 首先,C4的值被調整,直到天線端子的丨Vfb丨被最大化 24 201238243 為止,此發生在天線線圈電抗被電容1/(1/C3+1/C4)消除的 共振時。第4B-4D圖繪示前述步驟,其中第4B圖繪示在此 步驟之前的一史密斯圖,而第4C-4D圖繪示一史密斯圖及一 對應的散點參數圖’其中共振是藉由改變C4直到|Vfb|被最 大化(S11近似實數)為止而獲得的。具體而言,它表明仍然 不是一理想匹配的共振是藉由C4減小140pF而被達成。在此 實施例中,在Cdelta = -140pF時,|Vfb|或|S42|被最大化。 接下來,C3及C4均被調整,同時保持ctune = 1/(1/C3+1/C4)不變。具體而言,不同的cdelta值被使用,直 到第4F及4G圖中的|Vfb|或|S42|分別被最大化為止。這指示 一近似理想匹配。 利用非-50歐姆產生器的電感天線匹配 轉參第5A-5J圖,使用一非-50畝姆產生器,用於適應 性匹配被連接至一電感天線的一端子之阻抗的一電路拓撲 的一實施例被繪示。反饋點的信號位準藉由將一 R 0=5 0歐姆 天線加載在發射器上來計算,其中產生器功率及阻抗是已 知的。具體而言,若產生器輸出Vg且產生器阻抗為Rg而非 R0 ;則Vfb為Vg*R0/(R0+Rg)。調諧步驟於是首先改變C1 以最小化Vfb,這使得天線及匹配成為共振。其次,阻抗改 變成保持C1+C2不變(C1減小AC且C2增大AC,反之亦然), 直到Vfb等於Vg*R0/(R0+Rg)為止。如第5 A-5D圖中所示 者,使用前述方法,不管產生器阻抗多大,對一50歐姆負 載,匹配近乎理想。 在一適應性設計實施例中,Cl delta為56pF時Vfb被最 25 201238243 小化(第5E-5G圖),得出Cla=8〇pF。利用此值,天線及匹 配網路在13.56MHz下進入共振。在後續步驟中,ci及C2 均改變,同時Cl + C2 == Cm。這意味著,舉例而言,c】增 加lpF意指C2減去lpF(第5H-5J圖)。 在所示實施例中,爲了自一10歐姆發射器獲得〇dBm的 一50歐姆匹配,一50歐姆的負載對應於〇.236Vp的Vfb。Clb 自80pF減少32pF,結果是48pF,且同樣地,C2b增加32pF, 結果是287pF,Vfb = 0.242 Vp。 使用電感器的電容天線匹配 轉參第6A圖,用於適應性匹配被連接至一電容元件, 諸如電容天線的一端子之阻抗的一電路拓撲的一實施例被 繪示。一電容天線被設計成代表輻射及損耗的一串聯電阻 器Ra,以及代表一電抗的一電容器Ca。在所示實施例中, 匹配電路包含二可變電感器。在一實施例中,一可調諧電 感器或一正無功阻抗使用一電感器元件被實現。例如,藉 由將一鐵心移動到一線圈中,電抗增大(或若一導電表面, 例如機械地更接近於一電感器,電抗由於寄生電容的增大 而減小)。可選擇地,一並聯可調諧電容器可被添加至一大 電感器,在此情況下,來自該電容器的寄生電容可接著被 調諧成使有效電感減少。在一實施例中,可調諧電感器是 串聯的。在較高頻率下,透過一四分之一波長傳輸線被連 接的一可調諧電容器可被利用作用為一正無功元件,諸如 電感器。 產生器電路看見之阻抗為: 26 201238243Rl \λ· \-ω2η ω2Π ω2Π (Rl' R〇. R0 \ Refer to Figure 3A, another implementation of a circuit topology for adaptive matching of the impedance of a terminal connected to an inductive component such as an antenna The circuit topology 300 includes a signal generator 302 coupled to a high impedance envelope feedback circuit 〇4. One embodiment of the signal generator 302 has an input impedance R0, such as 50 ohms. The signal generator 302 One of the terminals is connected to a first terminal of one of the resistors 306 of the feedback circuit 〇 4. One embodiment of the resistor 306 has a value R4 'eg, 9950 ohms. The second terminal of the signal generator 3 〇 2 is connected to Ground 308. The second terminal of resistor 306 is coupled to an amplifier 309 that is multiplexed to a second 50 ohm variable signal source 31. Matching circuit 312 includes an adaptation 22 having respective tunable values C3 and C4 201238243 Variable capacitors 314, 316. As noted above, the variable capacitors 314, 316 are via at least one variable reactance element 318, such as a digital or analog micro-electromechanical (or microelectronic) system (MEMS) device, an electronic varactor, Digital tunable electricity The container circuit, the switched capacitor array, etc. are implemented. In the illustrated embodiment, the first terminal of the variable capacitor 316 is coupled to the first terminal of the resistor 3〇6 of the feedback circuit 〇4, and the variable capacitor 316 The second terminal is connected to ground 308. The first terminal of variable capacitor 316 is also coupled to the first terminal of variable capacitor 314. In this embodiment, inductor antenna 120 is coupled to second of variable capacitor 314. Between the terminal and ground 308. Inductor antenna 320 is represented by an inductor 322 having a value L2 and a resistor 324 having a value R2 (e.g., 50 ohms), and resistor 324 represents radiation and heat loss. In an embodiment of the algorithm, the resonance is approximated by tuning the value C4 of the variable capacitor 316 to maximize voltage feedback. Next, the values of the capacitor 316 (C4) and the value of 314 (C3) are tuned while maintaining the ratio 1/(1/C3+1/C4) is a constant until the feedback voltage is equal to one-half of the generator voltage (ie Vfb = MVgenerator). Therefore, phase information is not needed to achieve a match. More specifically, C3 and C4 The initial value is found according to the following formula C3- 1 is still Lanl ~ ^-\lRani C4 = -Tir δΤ L (-- C3 In this example, the modulation results in a C4 offset of 30% and a C3 increase of 20pF. First, the value of C4 is adjusted until feedback The |Vfb| of 埠4 (S42) of circuit 304 is maximized when it is very close to resonance, and the antenna coil reactance is eliminated by string 23 201238243 coupling capacitor: Figure 3 shows an initial match of one Smith chart, and 3C And the 3D graph 'will not C4 reduce the result of U〇pF, which occurs very close to resonance and maximizes falsehood. Subsequent 'C3 and C4 are both adjusted while maintaining the relationship 3 + H = CTl(10) unchanged, thus maintaining resonance until feedback S42 becomes 1 'corresponding to Vfb = l/2 * Vgen. Figure 3E depicts a Stella, Stu before this step. The 3F and 3G graphs respectively show a Smith chart and a scatter parameter map according to this step when C3 is reduced by 20 pF and C4 is adjusted while maintaining resonance. Figure 3F shows that when c:3 is reduced by 2〇pF, Vfb=1/2*Vgen (ie, 3 (S42=l in the scatter parameter diagram of Fig. 3) is very close to an ideal match. Figure 2 is another embodiment of a circuit topology for adaptive matching being connected to an inductive component, such as the impedance of a terminal of an antenna. Circuit topology 400 is similar to that described in relation to Figure 3A above. The first terminal of resistor 306 of high impedance feedback circuit 304' is coupled to the second terminal of variable capacitor 316. In this embodiment, the initial values of C3 and C4 are based on the following equation: C3 = ___1 0) 2L « m First, the value of C4 is adjusted until the 丨Vfb丨 of the antenna terminal is maximized 24 201238243, which occurs when the antenna coil reactance is cancelled by the capacitance 1/(1/C3+1/C4). 4B-4D illustrates the foregoing steps, wherein FIG. 4B depicts a Smith chart before the step, and FIG. 4C-4D shows a Smith chart and a corresponding scatter parameter graph where the resonance is caused by C4 is changed until |Vfb| is maximized (S11 approximates real number). Specifically, it shows that the resonance that is still not an ideal match is achieved by reducing C4 by 140 pF. In this embodiment, |Vfb| or |S42| is maximized when Cdelta = -140pF. Next, both C3 and C4 are adjusted while keeping ctune = 1/(1/C3+1/C4) unchanged. Specifically, different cdelta values are used until |Vfb| or |S42| in the 4F and 4G maps are maximized, respectively. This indicates an approximate ideal match. An inductive antenna matching non--50 ohm generator is used to match the 5A-5J diagram, using a non-50 nm generator for adaptively matching a circuit topology connected to the impedance of a terminal of an inductive antenna. An embodiment is shown. The signal level of the feedback point is calculated by loading a R 0 = 50 ohm antenna on the transmitter, where the generator power and impedance are known. Specifically, if the generator outputs Vg and the generator impedance is Rg instead of R0; then Vfb is Vg*R0/(R0+Rg). The tuning step then first changes C1 to minimize Vfb, which causes the antenna and matching to resonate. Second, the impedance is changed to keep C1 + C2 constant (C1 decreases AC and C2 increases AC, and vice versa) until Vfb is equal to Vg*R0/(R0+Rg). As shown in Figures 5-5-5, using the foregoing method, the match is nearly ideal for a 50 ohm load regardless of the generator impedance. In an adaptive design embodiment, Vfb is minimized by the 25 201238243 when the Cl delta is 56 pF (Fig. 5E-5G), and Cla = 8 〇 pF is obtained. With this value, the antenna and matching network enter resonance at 13.56 MHz. In the subsequent steps, both ci and C2 change while Cl + C2 == Cm. This means, for example, that c] increasing lpF means subtracting lpF from C2 (Fig. 5H-5J). In the illustrated embodiment, a 50 ohm load corresponds to a Vfb of 236.236 Vp in order to obtain a 50 ohm match of 〇dBm from a 10 ohm transmitter. Clb was reduced by 32 pF from 80 pF and the result was 48 pF, and similarly, C2b was increased by 32 pF, resulting in 287 pF and Vfb = 0.242 Vp. Capacitive Antenna Matching Using Inductors Referring to Figure 6A, an embodiment of a circuit topology for adaptive matching being coupled to a capacitive element, such as the impedance of a terminal of a capacitive antenna, is shown. A capacitor antenna is designed as a series resistor Ra representing radiation and loss, and a capacitor Ca representing a reactance. In the illustrated embodiment, the matching circuit includes two variable inductors. In one embodiment, a tunable inductor or a positive reactive impedance is implemented using an inductor component. For example, by moving a core into a coil, the reactance increases (or if a conductive surface, such as mechanically closer to an inductor, the reactance decreases due to an increase in parasitic capacitance). Alternatively, a parallel tunable capacitor can be added to a large inductor, in which case the parasitic capacitance from the capacitor can then be tuned to reduce the effective inductance. In an embodiment, the tunable inductors are connected in series. At higher frequencies, a tunable capacitor connected through a quarter-wavelength transmission line can be utilized as a positive reactive component, such as an inductor. The impedance seen by the generator circuit is: 26 201238243
Zin = ㈣2 + 7^) ;wi,2+/wLl + Ra + j^ }ω12 ·Zin = (four) 2 + 7^) ; wi, 2+/wLl + Ra + j^ }ω12 ·
TwCa Ϊω12 + ]ωϋ + 若下述關係被滿足,則共振得以實現: 1 Ra2 1TwCa Ϊω12 + ]ωϋ + If the following relationship is satisfied, resonance is achieved: 1 Ra2 1
12 = ——--L1 + -τ~λ-r* ^ —----LI 扮 2Ca 〇_-ω2ΐ{^ ω2€α 若在共振時Ra << l/(c〇Ca) ’則Q值高且我們可藉由忽略 更小的組分Ra來簡化關係式。一旦共振得以實現,阻抗就 被調Ί皆,同時藉由保持關係式L1 +L2=常數不變來維持共 振。 具體而言,爲了調諧電路,並聯電感器L2被逐次調整 以獲得共振,且接著阻抗被調諧,同時保持上述關係式不 變-藉由逐次增加dL至L1及由[2減去dL來調整L1及L2,從 而維持共振。 程序藉由使用來自天線端子的反饋並最大化反饋振幅 而被控制。首先,藉由使用L2使電路共振且接著藉由同時 調整L1及L2並保持Ll+L2=常數來匹配阻抗並保持共振。在 此二調諧步驟期間,反饋振幅被最大化。 參照第6B-6E圖’反饋電壓藉由使網路阻抗盡可能地接 近所示史密斯圖之中心而被最大化。例如,對於L1 = 125uH,減小L2使電路在L2接近152nH時共振並使反饋電 路之振幅最大化(第6B-6C圖)。接下來,L1及L2均被調整, 同時維持Ll+L2=l_25uH+ 152nH。如第6E圖中所示者,反 饋振幅藉由將60nH自L1移至L2而被最大化。 27 201238243 轉參第7圖,繪示前述發明實施例之一般系統組件佈局 的一圖式被繪示。系統700包括一源/產生器7〇2、一負載 706 ’以及將產生器連接至負載並依據上述適應性可調諧電 路拓撲及相關調諧演算法之實施例運作的匹配/反饋電路 704。 最後,第8圖是繪示依據本發明之實施例的一適應性阻 抗調諧方法的一流程圖。在步驟8〇〇中,對無功組件中之一 者的值被執行第一調整,以依據上述電路拓撲之對應實施 例最小化或最大化一反饋電壓。在步驟802中,調整繼續直 到電路至少近乎共振為止。若是這樣,在步驟8〇2中,對多 個無功組件之值做第二調整,同時維持該多個無功組件之 間的一預定關係是一常數,以匹配阻抗,如上文詳細描述 者。 本文所引用的所有參考文獻,包括出版物、專利申請 案,及專利是採引用方式,以如同單獨且明碟指出每一參 考文獻以引用方式被併入且其全部内容在本文中被陳述的 相同程度被併入。 除非本文另行指出或與上下文明顯抵觸,在描述本發 明中(特別是在下述申請專利範圍下)使用「一(a)」及「一 (an)」以及「該」及類似參考用詞欲被解釋成涵蓋單數及複 數。除非另行指出,用詞「包含」、「具有」、「包括」及「含 有」欲被解釋成開放式用詞(即意指「包括但並不限於」)。 除非本文另行指出’本文中值範圍的列舉僅欲用作個別指 落入範圍内的每一單獨值的一簡寫法,且每一單獨值被併 28 201238243 入說明書有如其被個別地 一 出或與上下文明顯抵觸,本文所列舉。除非本文另Ί 合的順序來執行。除非二之所有方法可以任一適 .汗乃外要未,使用本文所提供之任一 有犯例’或示範語言(例如「諸如」难旨在更好地閣明 明且不對本發明之範圍加以限制。說明書中的語言不 〜 '破理解為表示任—非請求元件是實施本發明不可或缺 的。 本u之車乂佳實施例在本文十被描述包括發明人所 用以實施本發明之最佳模式^在閱讀上述說明時,那些 較佳實關1㈣絲祕咕者可以錢❹見的。 發明人預期熱練技工會在適當時彻此類變化形式,且發 月人打算以本文明確描述以外的方式實施本發明。因此, 此發明包括適収律所允許的咖”專郷财所述之 標的物之所有修改及等效物。此外,除非本文另行指出或 與上下文明顯抵觸’上述元件的所有可能變化形式之任— 種組合皆被包含在本發明中。 【圖式簡單說明】 第1A圖疋繪示依據本發明之一實施例用於一電感負 栽之適應性阻抗匹配的電路拓撲之示意圖; 第1B圖疋繪示依據本發明之一實施例,反映經由第工八 圖之電路拓撲執行的一適應性調諧步驟的一史密斯圖的— 示意圖; 第1C圖疋繪示依據本發明之一實施例,對應於第1B圖 之史密斯圖的一散點圖的一示意圖; 29 201238243 第ID圖是繪示依據本發明之一實施例,反映經由第ΙΑ 圖之電路拓撲執行的又一適應性調諧步驟的一史密斯圖的 一示意圖; 第1Ε圖是繪示依據本發明之一實施例,對應於第1D圖 之史密斯圖的一散點圖的一示意圖; 第2Α圖是繪示依據本發明之一實施例,用於一電感負 載之適應性阻抗匹配的另一電路拓撲的一示意圖; 第2Β圖是繪示依據本發明之一實施例,反映經由第2Α 圖之電路拓撲執行的一適應性調諧步驟的一史密斯圖的一 不意圖, 第2C圖是繪示依據本發明之一實施例,對應於第2Β圖 之史密斯圖的一散點圖的一示意圖; 第2D圖是繪示依據本發明之一實施例,反映經由第2Α 圖之電路拓撲執行的又一適應性調諧步驟的一史密斯圖的 一示意圖; 第2Ε圖是繪示依據本發明之一實施例,對應於第2D圖 之史密斯圖的一散點圖的一示意圖; 第3Α圖是繪示依據本發明之一實施例,用於一電感負 載之適應性阻抗匹配的另一電路拓撲的一示意圖; 第3Β圖是繪示依據本發明之一實施例,與第3Α圖之電 路拓撲相關聯的一史密斯圖的一示意圖; 第3C圖是繪示依據本發明之一實施例,與第3Α圖之電 路拓撲相關聯的另一史密斯圖的一示意圖; 第3D圖是繪示依據本發明之一實施例,與第3Α圖之調 30 201238243 諧電路之一狀態相關聯的一散點圖的一示意圖; 第3E圖是繪示依據本發明之一實施例,與第3A圖之電 路拓撲相關聯的一史密斯圖的一示意圖; 第3F圖是繪示依據本發明之一實施例,與第3A圖之電 路拓撲相關聯的另一史密斯圖的一示意圖; 第3G圖是繪示依據本發明之一實施例,與第3A圖之調 諧電路相關聯的一散點圖的一示意圖; 第4A圖是繪示依據本發明之一實施例,用於一電感負 載之適應性阻抗匹配的另一電路拓撲的一示意圖; 第4B、4C圖是繪示依據本發明之一實施例,與第4A圖 之電路之各別狀態相關聯之史密斯圖的示意圖; 第4D圖是繪示依據本發明之一實施例,與第4C圖相關 聯的一散點參數圖的一示意圖; 第4E、4F圖是繪示依據本發明之一實施例,與第4A圖 之電路之各別狀態相關聯之史密斯圖的示意圖; 第4G圖是繪示依據本發明之一實施例,與第4F圖相關 聯的一散點參數圖的一示意圖; 第5A及5B圖是繪示用於連接至一非-50歐姆源之一端 子的適應性阻抗匹配的一電路拓撲之另一實施例的示意 圖, 第5C圖是繪示依據本發明之一實施例,與第5B圖之電 路拓撲之一狀態相關聯的一史密斯圖的一示意圖; 第5D圖是繪示依據本發明之一實施例,與第5B圖之電 路拓撲之一狀態相關聯的一散點參數圖的一示意圖; 31 201238243 第5E圖是繪示依據本發明之一實施例,與第5B圖之電 路拓撲相關聯的一調諧步驟的一示意圖; 第5F圖是繪示依據本發明之一實施例,第5E圖之一電 抗元件之各種調諧值的一示意圖; 第5G圖是繪示依據本發明之一實施例,與第5F圖之調 言皆步驟相關聯的·一散點參數圖的一不意圖, 第5H圖是繪示依據本發明之一實施例,與第5B圖之電 路拓撲相關聯之另一調諧步驟的一示意圖; 第51圖是繪示依據本發明之一實施例,第5H圖之電抗 元件之各種調諧值的一示意圖; 第5J圖是繪示依據本發明之一實施例,與第5H圖之調 諧步驟相關聯的一散點參數圖的一示意圖; 第6A圖是繪示依據本發明之一實施例,用於一電容負 載之適應性阻抗匹配之電路拓撲的示意圖; 第6B圖是繪示依據本發明之一實施例,反映經由第6A 圖之電路拓撲執行的一適應性調諧步驟的一史密斯圖的一 示意圖; 第6C圖是繪示依據本發明之一實施例,對應於第6B圖 之史密斯圖的一散點圖的一示意圖; 第6D圖是繪示依據本發明之一實施例,反映經由第6A 圖之電路拓撲執行的又一適應性調諧步驟的一史密斯圖的 一示意圖; 第6E圖是繪示依據本發明之一實施例,對應於第6D圖 之史密斯圖的一散點圖的一示意圖; 32 201238243 第7圖是繪示本發明之實施例之一通用系統組件佈局 的一示意圖;以及 第8圖是繪示依據本發明之實施例的一適應性阻抗調 諧方法的一流程圖。 【主要元件符號說明】 100、200、300、400...電路拓撲 102.. .信號產生器/產生器 104.. .反饋電路/高阻抗反饋電路 104’...高阻抗反饋電路/反饋電路 106、124...電阻器 108.. .地 109.. .放大器 110…第二50歐姆可變信號源 112.. .匹配電路 114、116...適應性可變電容器/可變電容器/電容器 118.. .可變電抗元件/專屬可變電抗元件/匹配電路 120.. .電感天線/天線 122.. .電感器 302.. .信號產生器 304.. .高阻抗包絡反饋電路/反饋電路 304’...高阻抗反饋電路 306.. .電阻器 308. •.地 309.. .放大器 33 201238243 310.. .第二50歐姆可變信號源 312.. .匹配電路 314、316...適應性可變電容器/可變電容器 318.. .可變電抗元件 320.. .電感天線 322.. .電感 324.. .電阻器 700.. .系統 702.. .源/產生器 704.. .匹配/反饋電路 706…負載 800、802、804·.·步驟12 = ——--L1 + -τ~λ-r* ^ —----LI Dress 2Ca 〇_-ω2ΐ{^ ω2€α If at resonance Ra << l/(c〇Ca) ' Then the Q value is high and we can simplify the relationship by ignoring the smaller component Ra. Once the resonance is achieved, the impedance is tuned and the resonance is maintained by keeping the relationship L1 + L2 = constant. Specifically, in order to tune the circuit, the shunt inductor L2 is successively adjusted to obtain resonance, and then the impedance is tuned while maintaining the above relationship - by increasing dL to L1 successively and adjusting L1 by subtracting dL from [2] And L2 to maintain resonance. The program is controlled by using feedback from the antenna terminals and maximizing the feedback amplitude. First, the circuit is resonated by using L2 and then the impedance is matched and maintained by simultaneously adjusting L1 and L2 while maintaining L1 + L2 = constant. During this two tuning steps, the feedback amplitude is maximized. Referring to Figures 6B-6E, the feedback voltage is maximized by bringing the network impedance as close as possible to the center of the Smith chart shown. For example, for L1 = 125uH, decreasing L2 causes the circuit to resonate and maximize the amplitude of the feedback circuit when L2 approaches 152nH (Fig. 6B-6C). Next, both L1 and L2 are adjusted while maintaining Ll+L2=l_25uH+ 152nH. As shown in Fig. 6E, the feedback amplitude is maximized by shifting 60 nH from L1 to L2. 27 201238243 Referring to Figure 7, a diagram showing the layout of the general system components of the foregoing inventive embodiment is shown. System 700 includes a source/generator 702, a load 706', and a match/feedback circuit 704 that couples the generator to the load and operates in accordance with an embodiment of the adaptive tunable circuit topology and associated tuning algorithms described above. Finally, Figure 8 is a flow chart showing an adaptive impedance tuning method in accordance with an embodiment of the present invention. In step 8A, a first adjustment is made to the value of one of the reactive components to minimize or maximize a feedback voltage in accordance with a corresponding embodiment of the circuit topology described above. In step 802, the adjustment continues until the circuit is at least nearly resonant. If so, in step 8〇2, a second adjustment is made to the values of the plurality of reactive components while maintaining a predetermined relationship between the plurality of reactive components is a constant to match the impedance, as described in detail above. . All references, including publications, patent applications, and patents, cited herein are hereby incorporated by reference in their entirety in their entirety in the entirety in The same degree is incorporated. The use of "a" and "an" and "the" and the like Interpreted as covering both singular and plural. Unless otherwise stated, the words "including", "having", "including" and "including" are intended to be interpreted as an open-ended term (meaning "including but not limited to"). Unless otherwise indicated herein, the <RTI ID=0.0> </ RTI> </ RTI> </ RTI> <RTI ID=0.0> </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> Clearly contradictory to the context, as listed in this article. Execute in the order in which they are combined. Unless all methods of the second method can be used in any way, use any of the crimes or model language provided in this article (for example, "such as" is difficult to better understand and not to the scope of the present invention. Restrictions. The language in the specification is not to be construed as a non-required component that is indispensable for the practice of the invention. The preferred embodiments of the present invention are described herein as including the inventors' practice of the invention. Good mode ^When reading the above instructions, those who are better at the 1 (4) silk secrets can see the money. The inventor expects the hot training union to make such changes when appropriate, and the moon person intends to clearly describe this article. The invention is embodied in other ways, and thus, the invention includes all modifications and equivalents of the subject matter described herein. Any combination of all possible variations is included in the present invention. [Schematic Description] FIG. 1A illustrates an embodiment of the present invention for use in an inductor. Schematic diagram of a circuit topology for adaptive impedance matching; FIG. 1B is a schematic diagram showing a Smith chart of an adaptive tuning step performed by a circuit topology of the eighth drawing; FIG. 12 is a schematic diagram showing a scatter diagram corresponding to the Smith chart of FIG. 1B; 29 201238243 The ID diagram is a diagram illustrating a second map according to an embodiment of the present invention. A schematic diagram of a Smith chart of another adaptive tuning step performed by the circuit topology; FIG. 1 is a schematic diagram showing a scatter diagram corresponding to the Smith chart of the 1D map according to an embodiment of the present invention; FIG. 2 is a schematic diagram showing another circuit topology for adaptive impedance matching of an inductive load according to an embodiment of the present invention; FIG. 2 is a diagram illustrating a second embodiment according to an embodiment of the present invention 2A is a schematic diagram of a Smith chart of an adaptive tuning step performed by the circuit topology of the figure, and FIG. 2C is a diagram illustrating Smith corresponding to the second figure according to an embodiment of the present invention A schematic diagram of a scatter plot; FIG. 2D is a schematic diagram of a Smith chart reflecting another adaptive tuning step performed via the circuit topology of the second diagram, in accordance with an embodiment of the present invention; Is a schematic diagram showing a scatter diagram corresponding to the Smith chart of the 2D graph according to an embodiment of the present invention; FIG. 3 is a diagram showing the adaptability for an inductive load according to an embodiment of the present invention. A schematic diagram of another circuit topology of impedance matching; FIG. 3 is a schematic diagram showing a Smith chart associated with the circuit topology of FIG. 3 according to an embodiment of the present invention; FIG. 3C is a diagram showing One embodiment of the invention, a schematic diagram of another Smith chart associated with the circuit topology of FIG. 3; FIG. 3D is a diagram showing one of the harmonic circuits of 201238243 according to an embodiment of the present invention A schematic diagram of a scatter plot associated with a state; FIG. 3E is a schematic diagram showing a Smith chart associated with the circuit topology of FIG. 3A in accordance with an embodiment of the present invention; FIG. 3F is a graphical representation this A schematic diagram of another Smith chart associated with the circuit topology of FIG. 3A; FIG. 3G is a scatter associated with the tuning circuit of FIG. 3A, in accordance with an embodiment of the present invention FIG. 4A is a schematic diagram showing another circuit topology for adaptive impedance matching of an inductive load according to an embodiment of the present invention; FIGS. 4B and 4C are diagrams showing the present invention. An embodiment, a schematic diagram of a Smith chart associated with respective states of the circuit of FIG. 4A; FIG. 4D is a diagram of a scatter parameter map associated with FIG. 4C, in accordance with an embodiment of the present invention 4E and 4F are schematic diagrams showing a Smith chart associated with respective states of the circuit of FIG. 4A according to an embodiment of the present invention; FIG. 4G is a diagram illustrating an embodiment of the present invention, A schematic diagram of a scatter parameter map associated with FIG. 4F; FIGS. 5A and 5B are diagrams showing another implementation of a circuit topology for adaptive impedance matching connected to one of the terminals of a non-50 ohm source Schematic diagram of the example, Figure 5C is a diagram A schematic diagram of a Smith chart associated with one of the states of the circuit topology of FIG. 5B in accordance with an embodiment of the present invention; FIG. 5D is a circuit topology diagram of FIG. 5B in accordance with an embodiment of the present invention A schematic diagram of a scatter parameter map associated with a state; 31 201238243 Figure 5E is a schematic diagram showing a tuning step associated with the circuit topology of Figure 5B, in accordance with an embodiment of the present invention; Is a schematic diagram showing various tuning values of a reactive component of FIG. 5E according to an embodiment of the present invention; FIG. 5G is a diagram showing steps related to the fifth embodiment of FIG. 5 according to an embodiment of the present invention; A schematic diagram of a scatter parameter map, FIG. 5H is a schematic diagram showing another tuning step associated with the circuit topology of FIG. 5B in accordance with an embodiment of the present invention; A schematic diagram showing various tuning values of the reactance component of FIG. 5H according to an embodiment of the present invention; FIG. 5J is a scatter diagram associated with the tuning step of FIG. 5H according to an embodiment of the present invention; a schematic diagram of a parameter map; FIG. 6A is a schematic diagram showing a circuit topology for adaptive impedance matching of a capacitive load according to an embodiment of the present invention; FIG. 6B is a diagram illustrating a sixth embodiment according to an embodiment of the present invention. A schematic diagram of a Smith chart of an adaptive tuning step performed by the circuit topology; FIG. 6C is a schematic diagram showing a scatter diagram corresponding to the Smith chart of FIG. 6B according to an embodiment of the present invention; The figure is a schematic diagram showing a Smith chart reflecting another adaptive tuning step performed via the circuit topology of FIG. 6A according to an embodiment of the present invention; FIG. 6E is a diagram illustrating an embodiment of the present invention, A schematic diagram of a scatter plot corresponding to the Smith chart of FIG. 6D; 32 201238243 FIG. 7 is a schematic diagram showing the layout of a general system component of an embodiment of the present invention; and FIG. 8 is a diagram showing the layout of a general system component according to the present invention; A flow chart of an adaptive impedance tuning method of an embodiment. [Main component symbol description] 100, 200, 300, 400... Circuit topology 102.. Signal generator/generator 104.. Feedback circuit/high impedance feedback circuit 104'... High impedance feedback circuit/feedback Circuits 106, 124... Resistors 108.. Ground 109.. Amplifier 110...Second 50 Ohm Variable Signal Source 112.. Matching Circuits 114, 116...Adaptive Variable Capacitors/Variable Capacitors /capacitor 118.. Variable Reacting Component / Exclusive Variable Reactive Component / Matching Circuit 120.. Inductor Antenna / Antenna 122.. Inductor 302.. Signal Generator 304.. High Impedance Envelope Feedback Circuit/Feedback Circuit 304'... High Impedance Feedback Circuitry 306.. Resistor 308. • Ground 309.. Amplifier 33 201238243 310.. Second 50 Ohm Variable Signal Source 312.. Matching Circuit 314 316...Adaptive Variable Capacitor/Variable Capacitor 318.. Variable Reacting Element 320.. Inductor Antenna 322.. Inductance 324.. Resistor 700.. System 702.. Source / Generator 704.. Match/Feedback Circuit 706... Loads 800, 802, 804.. Steps
Cl、C2...可調諧值/適應性可調諧電容/適應性可調諧電容器網路/值 C2...可調諧值/適應性可調諧電容/適應性可調諧電容器網路/值/ 並聯電容器 C3、C4...可調諧值/值 Ra...串聯電阻器 Ca...電容器 U、L2...值 Rl、R2、R4…值 34Cl, C2... Tunable Value / Adaptive Tunable Capacitance / Adaptive Tunable Capacitor Network / Value C2... Tunable Value / Adaptive Tunable Capacitance / Adaptive Tunable Capacitor Network / Value / Parallel Capacitor C3, C4... Tunable value/value Ra... Series resistor Ca... Capacitor U, L2... Values Rl, R2, R4... Value 34
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EP3010148A1 (en) | 2014-10-16 | 2016-04-20 | Nxp B.V. | Automatic impedance adjustment |
US20240275340A1 (en) * | 2023-02-14 | 2024-08-15 | Bae Systems Information And Electronic Systems Integration Inc. | Reactively matched and distributed power amplifier toplogy |
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CN100533996C (en) * | 2005-01-31 | 2009-08-26 | 松下电器产业株式会社 | Mobile radio apparatus capable of carrying self-adapting impedance matching |
US8299867B2 (en) * | 2006-11-08 | 2012-10-30 | Research In Motion Rf, Inc. | Adaptive impedance matching module |
US8072285B2 (en) * | 2008-09-24 | 2011-12-06 | Paratek Microwave, Inc. | Methods for tuning an adaptive impedance matching network with a look-up table |
-
2012
- 2012-01-25 WO PCT/US2012/022554 patent/WO2012103222A2/en active Application Filing
- 2012-01-30 TW TW101102841A patent/TW201238243A/en unknown
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WO2012103222A3 (en) | 2012-09-20 |
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