TW201235682A - Signal error adjusting system, signal processor and adjusting method thereof - Google Patents

Abstract

A signal error adjusting system is disclosed. The signal error adjusting system includes an error adjusting host, a simulation signal generator and a signal processor. The error adjusting host generates a signal generating command according to a plurality of test data, and receives a plurality of un-adjusted results for generating an adjusting data by comparing the test data and the un-adjusted results. The simulation signal generator receives the signal generating command and generates the test data accordingly. The signal processor having a plurality of interface circuits and receives the test data from the simulation signal generator through the interface circuits and obtains a plurality of collection data. The signal processor obtains a plurality of processing results by calculating the collection data. The error adjusting host obtains the un-adjusted results by reading the processing results from the signal processor.

Description

201235682 0004-10-022 36787twf.doc/I VI. Description of the Invention: [Technical Field] The present invention relates to a signal error adjustment system and an adjusted signal processor, and more particularly to an adjustment A signal error adjustment system, a signal processor, and an adjustment method thereof due to an error generated by an interface circuit. [Prior Art] In today's technology field, a signal processing benefit for signal detection has been widely used, for example, military applications can monitor the state on the battlefield; environmental aspects of pollution verification and detection The ecological monitoring application can monitor various health data of the human body; the household application can be used for home preservation and indoor environmental testing applications; the industrial and commercial application can be used for factory automation control, and the like. Referring to Figure 1, there is shown a system architecture diagram of a conventional signal processor 12A. The signal processor 12 is coupled between the control center U0 and the signal devices 131-138. The signal processor 12A has a plurality of interface circuits 121-124 for receiving a plurality of input data transmitted by the signal devices 131-138. The interface circuits 121-124 perform a moderate physical or chemical conversion of the detected input data to a condition that the signal processor 12 can receive and process. For example, when the signal processor 12 inputs the resolvable signal level fc to the G~5 female H'' (10)b, when the physical quantity of the input data input by the money device (for example, the signal device 131) is a certain value of the current signal, , 201235682

0004-10-022 36787twf.doc/I ===:, and related processing work corresponding to its relative value. After the "7 4 to the positive information for the subsequent processing" of the hexadecimal center 110, the signal processor 120 system can be correspondingly: it is possible to judge the subsequent whole because of the conversion of the electrical data through the data result. Or the signal that is sensitive to environmental sensitivity == is distorted, and further: the second correct number i H 127 is pre-processed in the object (4). [Invention] The present invention provides a signal error adjustment system and an adjustment method thereof to adjust the signal. The error generated by the processor through the interface circuit (4). The valve 3 is further provided with a signal processor that relies on the aforementioned signal error 2 and its difficult method to detect errors in the data received by its parent interface circuit. The invention relates to a signal error adjustment system, which comprises an error adjustment main modulo, a 彳: a production u and a signal processing ^. The error adjustment host generates a money generation command according to the test (4), adjusts the error adjustment field and receives f, and adjusts the result to turn the m data according to the unsuccessful result to generate the adjustment=material. The analog signal generator is coupled to the error adjustment host, and the received signal generates a command and generates test data according to the signal generation command. Signal processor 201235682

0004-10-022 36787twf.doc/I between the machine and the analog signal generator. The signal processor includes a number of "face" circuits, and II is controlled by the interface circuit to receive the test data, and the domain obtains (10) crane money. The money service operates on the 3 signals to process the processing wires. The towel, the erroneous sound, the host read the money to handle the treatment of the n towel has not adjusted the results. > In the example of this I, the above-mentioned signal processor receives the adjustment of the poor material and adjusts the result based on the difficult data to transfer the test result. This: In the consistent application, the above signal processing The device further includes a control module coupled to the control circuit, and/or the control module, and an error adjustment host for processing, recording the test (4) to transfer the unadjusted knot, the present invention - the actual wipe, the above The control group includes error bias = week, module and storage. The error-shifting bile module receives and adjusts according to the adjustment. The storage model is saved and the results are adjusted carefully. In an embodiment of the present invention, the error adjustment host includes a life-span module, a signal processor control module, a difference calculation module, and a storage module. The command generation module is lightly connected to the analog signal generator, and generates a command according to the test material (f) to transmit to the analog signal generator. The signal k-module module is coupled to the signal processor for controlling the signal processor to transmit the processing result. The difference is calculated by modulating the signal processor, receiving some of the results, and the results are not entangled, and the difference between the silk and the test data is obtained to obtain the calibration data. The storage module receives and stores the uncalibrated knot 201235682

0004-10-022 36787twf.doc/I and test data. - In an embodiment of the invention, the analog signal generator comprises a command receiving module, a command response module and a command execution module. The command receiving module is coupled to the error adjustment host for receiving a signal generating command. The command response module is coupled to the command receiving module and generates a test and data according to the signal generation command. The command execution module is coupled to the command response module and the signal processing is to transmit the test data to the signal processor. In a consistent embodiment of the present invention, the error adjustment host generates a command to the hard memory generation by the first transmission interface, and receives the unadjusted result by the signal processor through the second transmission interface.

In the embodiment of the present invention, the first transmission interface is a general purpose ^ ^ ^ IV IV (General Purpose Input Output Interface, GHO), and the second transmission interface is an RS485 interface. The invention proposes a method for adjusting the trust difference of the age number, and the signal processor has a device interface. The error adjustment method of the money error adjustment method is based on a plurality of test data to generate a ϊ ίί: order; providing an analog signal generator to receive the signal to generate a "second 唬 generation command to generate test data; providing a signal processor and two pseudo signal generators to receive Test data, by the == address operation signal processing 3 towel @纽24 纠 彳 差 差 差 差 差 差 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Data to generate calibration data. The present invention proposes a signal processor comprising a plurality of interface circuits

201235682 0004-10-022 36787twf.doc/I and control module. The interface circuit is configured to receive the group coupled to the interface circuit, and receive the second by the interface circuit. Control mode adjusts the results. (4) Touching multiple ungrouped. The error offset adjustment module is based on the calibration data, and the operation result of the storage module. The storage model is based on the fact that the gamma is as light as the error; the majority of the test data is transmitted; the host receives the money processing 11 according to the received test (four) to produce the processing result. The error adjustment host then compares the test data with the uncorrected processing result read, and obtains the calibration data by comparing the results. The error adjustment host transmits the adjustment data to the signal processor under test as a basis for the signal processor to adjust the processing result thereof, and thereby compensates the signal processor for receiving the test information through the interface circuit. Error, improve the accuracy of signal interpretation. The above described features and advantages of the present invention will become more apparent from the description of the appended claims. [Embodiment] Referring first to Figure 2, there is shown a schematic diagram of a signal error adjustment system 200 in accordance with an embodiment of the present invention. The signal error adjustment system 2 includes an error adjustment host 210, an analog signal generator 23A, and a signal processor 220. The error adjustment host 21 is coupled to the module through the transmission interface 2012 201235682

0004-10-022 36787twf.doc/I pseudo-signal generator 230, the error adjustment host 210 is coupled to the signal processor 220 through the transmission interface RSI, and the analog signal generator 230 is coupled to the signal through the transmission interface INTER The interface circuits 2221 to 2228 of the processor 220. In this embodiment, the transmission interface GI may be a General Purpose Input Output Literface (Gn〇), the transmission interface RSI may be an RS485 interface, and the transmission interface INTER may use a general transmission interface. The error adjustment host 210 generates a signal generation command based on the plurality of test data, and transmits a signal generation command to the analog signal generation block 230 via the transmission interface GI. This signal generated by the error adjustment host 21 is used to instruct the analog signal generator 230 to transmit the test data to the signal processor 220. That is, when the error adjustment host 21 generates a signal generation command, the test data can be attached to the signal generation command and transmitted to the analog signal generator 230. After the analog signal generator 23 receives the signal generating command, the test information in the signal generating command can be retrieved and transmitted to the signal processor 220. The L processor 220 receives the test transmitted by the analog signal generator 23 through one or more of its built-in interface circuits 2221 to 2228, and the internal processing of the L processor 220 is performed through the interface. The circuits 2221 to 2228 receive the test data to which the analog signal generator 230 is transmitted, and thereby obtain a plurality of collected signals. In addition to this, the signal processor 22() performs arithmetic processing on the received collected signal to obtain a plurality of processing results. Please note here that due to the accuracy of various electronic components on the interface circuits 2221 to 2228 (such as differences in process) or high environmental sensitivity 201235682

The influence of the 0004-10-022 36787twf.doc/I (e.g., ambient temperature), the combination of the collected signal received by the signal processor 22 via the interface circuits 2221~2228 and the test data produces an error amount. In other words, the processing result obtained by the signal processor 220 for performing the arithmetic processing on the received signal is not correct, but is a so-called unadjusted result. More specifically, with the interface circuit 2221 as an example, when the test data is transmitted to the interface circuit 2221, the test circuit has a certain degree of attenuation due to the input impedance of the interface circuit 2221. When the interface circuit 2221 performs, for example, a class for the received test data, the acquired digital information in the digital format is smaller than the digital data corresponding to the undecimated data. As a result, the collected signal transmitted by the interface circuit 222ι is incorrect and needs to be corrected. Here, the error adjustment host 21 receives the unadjusted result generated by the signal processor 220 through the transmission interface RSi. And comparing the unadjusted result with the preset test data, and by using the circuit to obtain the error value between the collected signal and the received measurement data, and according to the error value, the calibration is generated. data. u Note that the count values caused by the interface circuits 2221 to 2228 due to the circuit drift of the circuit may not be the same. Therefore, when the error adjustment host 21 performs the generation operation of the calibration data, the comparison between the collected signal generated by the collected signal and the test data received by the interface circuit 2221 to 2228 may be performed one by one, and The calibration data corresponding to the plurality of values of the respective interface circuits 2221 to 2228 is generated. 201235682

0004-10-022 36787twf.doc/I After the calculation of the calibration data is completed, the error adjustment host 210 further transmits the calibration data to the signal processor 220 via the transmission interface RSI. In this way, when the signal processor 220 performs the actual input signal reception (through the interface circuits 2221 2228) and processing, the uncalibrated result obtained by the direct calculation of the signal processor 220 can be adjusted according to the calibration data. , to get more accurate results. Incidentally, the signal error adjustment system 2 of the present embodiment can be applied to an operation of performing signal error adjustment when the signal processor 220 has just been produced. After that, the signal processor 22 can use the calibration data generated by the signal processor 220 to adjust the operation result. After the signal processor 220 is used for a certain period of time, the signal error adjustment system 200 can provide another signal error adjustment action for the b processor 220 at that time (which may cause a change in circuit characteristics), and thereby New tuning data is obtained for signal processor 22 application. Please refer to FIG. 3. FIG. 3 illustrates a manner of implementing the signal processor 22A according to an embodiment of the present invention. The nickname processor 220 includes a plurality of interface circuits 2221 to 2228, and further includes a control module 22, a control module 221, interface interface circuits 2221 to 2228, and an error adjustment host 210 coupled to the transmission interface RSI. The control module 221 is configured to perform arithmetic processing according to the received collected signal, and can adjust (4) the unadjusted result obtained after the county processing is performed according to the adjustment data provided by the error adjustment host 21〇. The control module 221 includes an error offset adjustment module 2211 and a storage module 22Ϊ2, and the error offset adjustment module and the storage module 2212 are mutually exhausted. The unadjusted result obtained by the control module 221 can be 201235682

0004-10-022 36787twf.doc/I is temporarily stored in the storage module 2212, and the calibration data provided by the error adjustment host 210 can also be stored in the storage module 2212. The error offset adjustment module 2211 can read the calibration data and the unadjusted result by the storage module 2212 and adjust the calibration data according to the uncalibrated result to obtain the correct operation result. Referring to FIG. 4, FIG. 4 illustrates an embodiment of an error adjustment host 210 according to an embodiment of the present invention. The error adjustment host 21 includes a command generation module 211, a signal processor control module 212, a difference calculation module 213, and a storage module 214. The command generation module 211 is coupled to the analog signal generator 230 via the transmission interface 〇1. The a command generation module 211 generates a signal generation command based on the test data, and transmits a signal generation command to the analog signal generator 23A. The signal processor control module 212 is coupled to the signal processor 220 through the transmission interface RSI, and is used to control the signal processor 22 to transmit the processing result generated by the signal processor 22, which is a so-called unadjusted result. In brief, according to the embodiment shown in FIG. 3, since the operation result is stored in the storage module 2212, the control=signal processor 220 only needs to transfer the memory to the storage module 2212. Read the result of the operation and get the unadjusted result. Poorly, the calculation module 213 is coupled to the signal processor=〇 through the transmission interface RSI, and receives the processing result of the signal processor 220 to obtain the unadjusted, the result of the unadjusted result and the difference of the test data. In addition, the difference calculation module 213 transmits the calibration module through the transmission interface RSI; the '' is transmitted to the nickname processor 220. The storage module 214 is used to receive and store unexamined money information. 12 201235682

0004-10-022 36787twf.doc/I

5 and FIG. 5 shows an embodiment of an analog signal generator 230 according to an embodiment of the present invention. The analog signal generator 23 includes a command receiving module 231, a command response module 232, and a command execution module 233. The command receiving module 231 is coupled to the error adjustment host 21A for receiving a signal generated by the error adjustment host 21 through the transmission interface GI to generate a command. The command response module 232 is coupled to the command receiving module 231 and generates test data according to the signal generation command. The command execution module 233 is coupled to the command response module 232 and the k5 tiger processor 220. The command execution module 233 transmits the test data to the signal processor 220 through the transmission interface INTER. Referring to FIG. 6, FIG. 6 illustrates an embodiment of a signal error adjustment method according to an embodiment of the present invention. In the present embodiment, first, an error adjustment host is provided to generate a signal generation command based on a plurality of test data (S61). Next, an analog signal generator is provided to receive the signal generation command, and the test data is generated based on the signal generation command (S620). Then, the signal processing is provided, and the test data is received by the analog signal generator by the interface circuit 'by the gentry: a collected signal (S630), and the signal processor processes the nickname operation to obtain a plurality of processing results (S64G) ). Finally, the error = week = machine reads the processing result in the signal processor to obtain the unadjusted result, and generates the calibration data based on the comparison of the unadjusted result and the test data. . In addition, the steps of the above-mentioned signal error adjustment method are described in detail in the preceding embodiments and the actual financial formula: not to be repeated. In summary, the present invention utilizes an analog signal generator to transmit a test signal to the measured signal processing H, and then adjusts the host by error = 13 201235682

0004-10-022 36787twf.doc/I The result of the operation generated in the signal processor is taken as the unadjusted result. Adjustment, the machine and the comparison between the test signal and the unadjusted result to obtain the j school data 'to enable the 彳s processing, can use the calibration data to adjust the unadjusted results obtained by the calculation, and Get more accurate results. As a result, the interface of the signal processor is effectively compensated to improve the performance of the signal processor. Although the present invention has been disclosed in the above embodiments, it is not intended to limit the invention, and any one of ordinary skill in the art can make a few changes without departing from the spirit and scope of the invention. The scope of protection of the present invention is defined by the scope of the appended patent application. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram of a conventional signal processor system. Fig. 2 is a schematic view showing a signal error adjustment system of an embodiment of the present invention. FIG. 3 illustrates an embodiment of a signal processor in accordance with an embodiment of the present invention. 4 illustrates an embodiment of an error adjustment host in accordance with an embodiment of the present invention. Fig. 5 is a diagram showing an embodiment of an analog signal generator in accordance with an embodiment of the present invention. FIG. 6 is a diagram showing an embodiment of a signal error adjustment method according to an embodiment of the present invention. [Main component symbol description]

201235682 0004-10-022 36787twf.doc/I 110 : Control Centers 131 to 138 : Signaling Devices 127 , 221 : Control Module 200 : Signal Error Adjustment System 210 : Error Adjustment Host 230 : Analog Signal Generators 120 , 220 : Signals Processors 121 to 124, 2221-2228: interface circuit 2211: error offset adjustment module 2212, 214: storage module 211: command generation module 212: signal processor control module 213: difference calculation module 231: command Receiving module 232: command response module 233: command execution module S610~S650: steps of signal error adjustment method RSI, INTER, GI: transmission interface b 15

Claims (1)

201235682 0004-10-022 36787twf.doc/I VII. Patent application scope: 1. A signal error adjustment system, comprising: an error adjustment host, generating a signal generation command according to a plurality of test data, the error adjusting the host and receiving The majority of the unadjusted results are based on comparing the unadjusted results with the test data to generate a calibration data; 'an analog signal generator coupled to the error adjustment host, receiving the signal to generate a command, and The signal generating command generates the test data; and the chirp processing is coupled between the error adjustment host and the analog signal generator, and the signal processing n includes a plurality of interface circuits, and by using the interface circuit The analog signal generator receives the test data and obtains a majority of the money, and the recording operation is performed on the observation signal to obtain a plurality of processing results, wherein the decision adjustment host reads the signal processor The processing results in the middle to obtain the unadjusted results. 2. If the signal error adjustment system L1 mentioned in item 1 of the patent scope is applied, the Qiangeng 11 further receives the school data and adjusts the uncalibrated results according to the adjustment data to transfer the test data. The signal error adjustment system of claim 2, wherein the signal processor further comprises: a control module 'lightly connecting the interface circuits and the error adjustment main powder processing, and according to the suspect data To adjust the unrecognized knots. 201235682 0004-10-022 36787twf.doc/I 4. The signal error adjustment system as described in claim 3, wherein the control module comprises: $ difference offset 4 whole module 'received and adjusted according to the adjustment Information to adjust the unadjusted results; and a storage module to store the unadjusted results and the adjustment information. 5. The signal error adjustment system of claim 1, wherein the error adjustment host comprises: a generation module coupled to the analog signal generator, and generating a $signal according to the two test data. Generating a command to transmit to the analog signal generator; a "number processor control module coupled to the signal processor for controlling the signal processor to transmit the processing results; a difference computing module coupled The signal processor receives the processing results to obtain the silk thread, the silk, and calculates the difference between the unsigned result and the test data to obtain the calibration data; and a storage module 'receives and stores the The result of the uncorrected test and the test data. 6. The signal error adjustment system of claim 1, wherein the analog signal generator comprises: a command receiving module coupled to the error adjustment host, Receiving the signal to generate a command; a command response module 'couples the command receiving module and generates the test data according to the signal generating command; and a command execution The line module is coupled to the command response module and the signal device, and the test data is transmitted to the signal processor. 7. The signal error adjustment system, wherein the error adjustment host transmits the signal by a first transmission interface to generate a command to the analog signal generator, and the signal processor receives the unadjusted signals through a second transmission interface The result of the school is as follows: 8. The signal error adjustment system described in claim 7 wherein the first transmission interface is a general purpose input output interface (GPIO), and the second transmission interface is an RS485 interface. 9. A method for adjusting a signal error of a signal processor, wherein the signal processor has a plurality of interface circuits, comprising: providing an error adjustment host to generate a signal generation command according to a plurality of test data; for providing an analog signal generator Receiving the signal to generate a command, and generating the test data according to the = number generating command; H is used by the interface circuits to generate the (four) test data from the analog signal to obtain a majority of the set signals; the signal processor is provided to perform an operation process on the collected signals to obtain a plurality of processing results; Providing the error adjustment host to read the processes in the signal processor, and the results of the unadjusted results, and based on the unadjusted results and the test data to generate a calibration data 1〇. The signal error adjustment method described in claim 9 of the patent scope, which further includes: 201235682 0004-10-022 36787twf.doc/I Providing the money to process the H-connection data and according to the adjustment material Adjust the unadjusted results to obtain the job information. 11. A signal processor comprising: f a plurality of interface circuits for receiving a plurality of test signals; and: a control module, _ to the interface circuits, by means of the interfaces: In order to obtain a large number of collected signals, and for the performance of these models, the results of the township oil are not successful, the control of this error (10) transfer the module, according to the adjustment of the dragon to adjust the. also,,'. If you borrow, and get the correct result of the operation; a storage module for storing the unadjusted results and the calibration package, such as the signal processor described in claim 11 of the patent specification, wherein the 4 transmission "face, δ海彳§ processor passes the The transmission interface is connected to the :: tune: i machine' and receives the μ i3 by the error adjustment host through the transmission interface. The signal processor described in claim 12 is the RS485 interface. "中 19