TW201232216A - Dynamic control parameter adjustment in a power supply - Google Patents

Abstract

A power supply controller produces a compensation value based at least in part on: an estimated or known output capacitance of the power supply, a specified rate of changing a magnitude of the output voltage as specified by the voltage setting information, and/or a load-line resistance of the power supply. The power supply controller utilizes the compensation value to adjust a magnitude of the output voltage during a voltage transition in which the output voltage is changed from an initial output voltage setting to a target output voltage setting at a pre-specified rate.

Description

201232216 VI. Description of the Invention: [Technical Field of the Invention] The present invention relates to dynamic control parameter adjustment in a power supply. [Prior Art] A conventional power supply can be set with an analog current detecting circuit that is matched with an external load line resistance circuit. The controller can calculate the load line regulation voltage based on the analog current detection circuit and the external load line resistance. The final reference voltage can be generated by subtracting this load line regulation voltage from the fixed reference voltage of the power supply to adjust the output voltage of the power supply. If the load line voltage adjustment method as disclosed above is used, when the output current of the power supply is relatively high, the load line voltage adjustment 値 will be quite large, and the magnitude of the output voltage will be decremented by a considerable amount. In contrast, when the output current of the power supply is relatively low, the load line voltage adjustment 値 will be relatively small, and the magnitude of the output voltage will decrease by a relatively small amount. Therefore, with the so-called adjustable voltage positioning device, the output voltage 电源 of the power supply can vary depending on whether the output voltage supplies a large or small amount of current to different loads. Using this AVP adjustment will help reduce the need for large output capacitors and/or filters. The conventional power supply system can also be designed to generate an output voltage based on the received voltage setting information. For example, the power supply can receive a so-called VID (Voltage Identifier) from the power supply of the processor, which is driven by the output voltage. In general, the VID specifies the output that will be generated by the power supply and used to drive the processor load. Therefore, the power supply terminal of the processor can provide a setting that will be generated by the power supply to drive the output voltage of the processor. There are often many disadvantages. For example, the voltage 値, then, as described above, the change from one setting 其他 to the other setting VID information sets the output voltage to the influence of the output capacitor of the converter during the voltage conversion, so that the conventional power supply The input is to the actual output voltage of the load. The raw output voltage 値 reaches a first capacitor between time τ 1 and T2 to the power supply available at time T1, however, the conventional power supply is charged or discharged at the output capacitance. The desired output voltage is generated due to the ground. The size of the VID値 can be set with the time according to the first VID. After that, the processor can issue a notification message of the voltage when the output voltage is adjusted to the new VID setting due to a change in operating conditions. SUMMARY OF THE INVENTION As is known in the art, the power supply system first changes the reference to use the reference voltage 値 to output the voltage 値. However, conventional power does not consider charging or discharging the power supply to control the output voltage of the power supply during the period of switching to other settings. The timing of the output voltage will fall behind and will be supplied. In other words, the power supply can be produced. The processor load can request a power supply for a specific slope to increase the output voltage. It is not known that the power supply cannot change accurately during the conversion of the output voltage between the conventional T2. For example, the power supply of the processor generates an output voltage, and the processor can request the power supply. Supply. Therefore, how to set the output when the power supply is operated under different conditions -6 - 201232216 The embodiment of this patent will be different from the conventional application technology. For example, embodiments of the present patent primarily propose one or more unique methods to adjust the control signal in the power supply whereby the power supply is requested to convert its output voltage from one voltage to another. At the time of conversion, the output capacitors that need to be charged and/or discharged are estimated. More specifically, embodiments of the present patent include a controller that can be programmed to control the output voltage of the power supply to drive the load. The controller can receive output voltage setting information that specifies how to control the output voltage of the power supply to drive the load. In an embodiment, the power supply terminal of the load can specify and notify the controller of the output voltage setting information. In one embodiment, the output voltage setting information is specified when to achieve one or more output voltage settings. This output voltage setting information can also specify a specific ratio of the output voltage of the power supply from one voltage setting to another voltage setting. In the example of the embodiment of the present patent, in order to consider the influence of variations in the output voltage on the output capacitor, the controller will generate a compensation 値. In one embodiment, the compensation is based at least in part on a particular ratio of the output capacitance 値 of the power supply to the output voltage 变动 specified by the voltage setting information. During voltage conversion, the controller uses this compensation 値 to adjust the output voltage. As disclosed above, since the controller considers the output capacitor of the power supply to be charged and/or discharged when the output voltage 値 fluctuates, the power supply will more accurately generate the output voltage required to drive the load. . Further, according to a specific embodiment, the controller can receive output voltage setting information specifying the initial output power 201232216 voltage setting 値 and the target output voltage setting 値. The controller may also receive a voltage slope 表示 indicating a specific ratio of the output voltage of the power supply from the initial voltage setting to the target output voltage setting 値 during the output voltage transition. In still further embodiments, the output voltage setting information can be set according to different output voltages to specify when and/or when the output voltage is generated. As disclosed above, the controller generates compensation 至少 based at least in part on the output capacitance of the power supply and the particular ratio of output voltage 値 variations specified by the voltage setting information. In more specific embodiments, the controller multiplies the output capacitance of the power supply by a specific ratio of the varying output voltage to produce a surge current 値. This sudden current 値 can be positive or negative. When the output voltage is converted from the initial output voltage setting to the target output voltage setting, the sudden current is the amount of current that varies due to the output voltage of the output capacitor. This controller can also be set to retrieve or retrieve the load line resistance of the power supply. It should be noted that the 表示 indicating the output capacitance 値 and the load line resistance 値 can be stored as power supply configuration information, which can be accessed by the controller to produce the calculations as disclosed above. In one embodiment, the controller multiplies the calculated surge current 値 by the load line resistance 値 to produce a compensation 値. For example, in one embodiment, the controller generates compensation 値VC0MP according to the following equation:

Vc〇MP = RlL * C〇UT * VSL0PE where V C 0 Μ P = compensation 値;

Rll = load line resistance associated with the power supply; -8 - 201232216 C〇ut = output capacitance of the power supply 値; ν^οι>Ε=predetermined by the initial output voltage setting 値 change to the target voltage setting ratio. According to an embodiment, the controller applies a compensation 至 to a set point V of the VID, such as a power supply, to produce an adjusted set point 値. This set point or voltage reference 値 can be compared to the existing 输出 of the output voltage to generate an error voltage to control the power supply. In a further embodiment, the controller will adjust the output voltage of the power supply using this compensation 値VC0MP during voltage conversion. For example, during a voltage transition from VID値 to other voltages, the controller will control the power supply's switch based on the adjusted VID値 or setpoint , to estimate the charging or discharging of the output capacitor of the power supply. Sudden current needs. In one embodiment, the controller can be configured to sum the sum of the compensation 値 and control parameters (e.g., the error voltage of the power supply) to produce the adjusted error voltage. Therefore, the controller controls the state of one or more sets of switches in at least one power converter phase of the power supply based on estimating the adjusted error voltage of the VC0MP. More specifically, when the output voltage fluctuates to the target specified by the output voltage setting information for voltage conversion, the controller uses this compensation 値 to adjust the control signal generated by the controller. When the output voltage fluctuates to the target voltage, the controller applies the adjusted control signal to at least one of the switching circuits of the power supply to adjust the output voltage of the power supply. These and other more specific embodiments will be disclosed in detail as follows. -9 - 201232216 It will thus be appreciated that the systems, methods, apparatus, etc., as disclosed herein, can be fully configured as hardware, a combination of software and hardware, or used alone as a processor, operating system, or software application. Software in the device. Exemplary embodiments of the patent will be implemented in products and/or software applications as developed and manufactured by CHiL Semiconductor of Tewksbury, Massachusetts, USA. As disclosed herein, the technology of this patent will be fully applicable to, for example, switched power supplies, voltage regulators, low voltage processors, step-down power converters, step-up voltage regulators, buck-boost voltage regulators. And so on. However, it should be noted that the scope of use of the present embodiment is not limited thereto, and the above-described applications and the above-disclosed technologies are also fully applicable to other applications. Furthermore, it is noted that although each distinct feature, technique, structure, etc., will be expressed in a different manner in the techniques disclosed herein, that is, each complication can be selectively independent or in a mutually It is implemented that one or more of the techniques disclosed herein may be embodied and viewed in a variety of different ways. Further, the preliminary discussion of the present embodiments is intended to not specifically specify each embodiment and/or increase the scope of the disclosure or patent application. Instead, the present disclosure merely sets forth the general embodiments relating to the prior art. 'For more detailed and/or possible views (or combinations) of this patent', the reader should focus on the detailed paragraphs that will be discussed later. Corresponding to the illustrations disclosed in this patent. -10- 201232216 [Embodiment] This embodiment will include a unique and cost effective technique for performing compensation at the time of output voltage conversion. For example, in one embodiment, a power supply control outputs a setting specified by the output voltage setting information to control the output voltage. The output voltage setting information specifies, for example, an output voltage setting 値 and information on a specific ratio of the output voltage of the power supply from one change to another setting, and the like. In one embodiment, the power supply controller includes circuitry for line voltage compensation, based at least in part on: power supply estimates or known output capacitances, specific ratios of voltage fluctuations from voltage setting information, and/or ) Power supply resistance. The power supply controller adjusts the output voltage at least after voltage-compensation, so that the output voltage can be varied from an initial setting to a target setting. As described above, since the output voltage of the test device is charged and/or discharged to generate a voltage when the output voltage fluctuates, the voltage generated by the power supply and supplied to drive the voltage can be more accurate. Therefore, the control device as disclosed herein will supply the output voltage more accurately to drive the different j. FIG. 1 is a power supply 100 according to the present embodiment. As shown in FIG. 1, the power supply 10 includes The controller 1 40 controls the complex driver 110 to generate a supply: the output voltage 190 required for the power supply. The driver 110 is configured to receive the load line of the specified output device that generates the load supplier when the drive load is implemented, and uses a predetermined ratio to supply the load line to compensate the load line. The load of the load and the power supply are available for loading. Each figure. 140. Control the load 1 1 8 to control the state of the switch -11 - 201232216 150 and 160. The controller 140 receives the input 121 of the number, and the controller 140 can monitor the configuration parameters such as Vin, I parameters, and Rload-mne, C0UT, etc. according to the received input 1 2 1 and the controller 1 40 140 will generate a signal through the control signal generator 182. The control signals will be output to the driver 1 1 〇 at 150 and 160°. For example, the controller 1 40 outputs a control signal (generated by the control 1 8 2) to switch the control switch. 1 5 0 (eg, off) and synchronous switch 160 (eg, ON and OFF on the low side. Properly turning control switch 150 and sync ON and OFF will generate drive 1 1 8 . The control signal generated by 1 40, in the electric drive 110-1 will control the state of the control switch 150 1 10-2 will control the state of the synchronous switch 160. In addition, attention should be paid to the driver circuit 1 1 〇 (for example, 1 10-1 and The driver circuit 1 10-2 ) can be placed in any suitable bit 1 as controlled by the terminal associated with the controller 1 40. When the control switch 150 is generated by the controller 140 is switched ON (eg, enabled, this When the timing synchronization I is OFF), the control switch 150 will be at the power source 120. Providing a highly conductive path between the source side and the source side, according to the high path, the current through the power supply side of the inductor 144 is increased in the switching mode, and when the synchronous switch 160 is controlled by the power supply, the L1, Vout, etc. The state setting 値, the control signal is controlled to control the switch signal generator on the high side open switch respectively) switch 160 switch: output voltage 190 source supply 100 state, and driver, driver circuit 140, Or set. The control signal and I 160 state of the inductor 1 44 electrical conductivity of the circuit controller 100 produced -12- 201232216 raw control signal (when the state of the control switch 150 is OFF) is switched to ON (for example) When enabled, the synchronous switch 160 will provide a highly conductive path between the power supply side of the inductor 1 44 and the illustrated ground terminal. According to this highly conductive path, the power supply side of the inductor 144 will be passed. The current is reduced. The controller 140 adjusts the output voltage 1 9000 according to the switching mode of the control switch 150 and the synchronous switch 160 in a continuous or discontinuous switching mode so as to fall within the required range of the driving load 1 18 . The controller can implement one or more load line voltage correction techniques, which will be discussed later in this specification. In one embodiment, the power supply 100 includes a complex phase circuit, each of which is operable in a manner similar to the example phase circuit of FIG. 1. In this embodiment, the controller 100 will operate the phase circuit to The output voltage 190 remains within the range required to drive the load 118. These complex phase circuits can be operated independently without being affected by each other. Each phase circuit may include a different high side switching circuit and a low side switching circuit in the phase circuit of FIG. 1 as described above, in order to disable the phase circuit of the different phase circuit controller 1 40 in the phase circuit The high-side switch circuit and the low-side switch circuit are set to the OFF state. When the phase circuit is OFF or not enabled, the current used to drive the load U8 will not be generated. Controller 1 40 can select how many phase circuits are to be enabled based on the amount of current consumed by load n8. For example, when load 1 18 consumes a significant amount of current, controller 100 will enable a complex phase circuit to drive load 1 1 8 . When the load 1 18 consumes a relatively small amount of current, the controller 1 4 - 13 - 201232216 enables a single phase circuit or fewer phase circuits to drive the load 118. Any of a variety of methods that can be used to detect the amount of current consumed by the load 1 18 and the output capacitance of the output capacitor 125 値C〇ut, etc., for example, by estimation or actual measurement, etc., can be applied to This embodiment. The controller 140 receives the output voltage setting information 170 from any suitable source, for example, a processor that can detect the electrical power or current consumption requirements of the load 118. In other words, an element such as a processor can feedback the amount of current that would be consumed by the load 118 during the time period. In one embodiment, the source terminal can specify the output voltage setting information 1 70 and notify the controller 140 via the aforementioned communication link between the load (or other source) and the controller 140. In an embodiment, the output voltage setting information 170 may specify, for example, when different output voltage settings are implemented, the output voltage of the power supply is changed from a voltage setting to a predetermined ratio of other settings, and is consumed in different time periods. The amount of current, the initial value of the output voltage, and the output voltage target 値 and so on. In still further embodiments, the controller 140 includes a compensation 値 generator 145. In one embodiment, the compensation 値 generator M5 generates a compensation 至少 based at least in part on the capacitance 値 of the output capacitor 125 of the power supply and the predetermined ratio of the output voltage 190 specified by the voltage setting information 170. At each single or more voltage transitions, controller 140 then passes control signal generator 182 to modulate output voltage 1 90 using the generated compensation 値. As described above, the output voltage 1 90 generated by the power supply 1 且 and supplied to drive the load is more accurate than the prior art, which is performed by -14-20122216 through the compensation 値 generator 145 The resulting compensation 値, when the varying output voltage 190 is implemented, the control 182 of the controller 140 takes into account the charging and/or discharging of the output capacitor 125 of the power supply 100. FIG. 2 is the control according to the embodiment. And the compensation 値 produces a fine circuit diagram. As described above, the controller 140 receives the output voltage setting information specifying how the output voltage 190 of the source supplier 1 is in the period. In this example, it is assumed that the output voltage setting information 170 specifies the voltage setting 値 and the target output voltage setting. value. As described above, the voltage setting information 170 received from the source terminal may include a ratio indicating that the output voltage 1 90 of the power supply 1 値 is changed from an initial input setting to a target output voltage setting during output power. Rate information. The output voltage setting information received by the controller 140 sets the timing and timing of when the power supply should generate a particular output voltage. As previously described, the controller 140 includes a compensation 値 generator 145 that is based in part on the desired ratio of the output capacitance of the power supply 以及 and the varying output voltage 1 90 specified by the voltage SNR 値 VC0MP. More specifically, in one embodiment, the output capacitor 相关 associated with the capacitor 125 is passed through the compensation 値 generator controller 140 by the desired controller signal generator of the variable output voltage specified by the voltage setting information 170. The detailed control power 170. Initial input remote voltage conversion voltage voltage ramp is also specified (or) to set the capital to generate 145, by the ratio, -15- 201232216 to generate sudden current 値. This surge current 値 represents the amount of current that the output voltage 190 varies over the output capacitor 125 during the transition from the initial output voltage setting to the particular target output voltage setting 输出 after the output voltage 190. In a particular embodiment, controller 140 retrieves or retrieves load line resistance 电源 of power supply 1 値 to calculate compensation 値. In addition, it is noted that the output capacitance 値 (e.g., COUT) and the load line resistance 値 (e.g., RL0AD.LINE) can be stored as power supply configuration information that can be accessed by controller 140 to produce the calculations so described. In one embodiment, controller 140 multiplies the surge current 値 by the load line resistance 値 to produce a compensation 値. For example, the arithmetic operator function 214 (e.g., multiplier) receives the ruler 1-1^, 0) 〇 1_|1', '^5.1_〇? £ and generates a compensation 値乂 (: 〇 1^, as follows:

VcOMP = RlOADUNE* C〇ur*VsLOPE where VCOMP = compensation 估算 estimated by the surge current; RLL = load line resistance associated with the power supply; C0UT = output capacitance associated with the output capacitor 125 of the power supply 値; VSL0PE = the desired ratio from the initial output voltage setting 値 to the target voltage setting 値. As described above, the controller 1404 adjusts the output voltage 1 90 of the power supply by the compensation 値VC0MP while the output voltage 190 is switched from one turn to another. According to an embodiment, the controller 140 also includes an arithmetic function 229 that adjusts the power supply 100 Vsp with -16 - 201232216 to apply the compensation 値Vc 〇 MP. According to this embodiment, the controller 140 will compensate for the set point of the reference voltage of the power supply to generate the adjusted value. In one embodiment, the set point 値Vsp is the VID voltage indicating the setting of the desired size. . The output voltage is proportional to the reference voltage VREF. Therefore, the variation of the V output voltage 190 is changed. Applying compensation 値 to adjust the power supply set point includes subtracting the power supply setpoint voltage from the compensation 値 output voltage reference 値VREF as shown. 'When the output voltage 190 is switched from one turn to the other, the control signal of the controller 1 40 in the power supply generates an adjustment set point 値VREF = VSP-VC0MP (relative to the set point 不 of the unknown technology) to control the switch 1 50 and 1 60 are used to estimate the surge current required to charge or discharge the output capacitor 125 when the voltage fluctuates. More specifically, in one embodiment, the error voltage is compared to the reference voltage VREF and the output voltage 190. The error voltage is 275-1. Based on the error voltage 275-1, the control 182 generates a control signal to control the switches 150 and 160.

This embodiment includes utilizing the generated compensation 値 (such as the received VID setting information, and/or using the error voltage of the compensation supplier 1 产生 to produce a more accurate output map 10), that is, when the voltage changes, The setpoint voltage of the compensation 値VC0MP is applied to, for example, the set point 値. After the voltage 190 is 1 190, the system can cause the transmission, and the Vc 〇 MP can be used to generate the 値 conversion. The 182 is based on the switching state of the compensation ,, the electric power supply generator Circuit 260 generates a difference, i.e., the signal generator (Fig. 2) adjusts the 値 to adjust the supply voltage 190 (e.g., to estimate the amount of rush current required to charge and/or discharge the output -17-201232216 capacitor 125. In the example, the error voltage 275-1 is equal to the difference between vREF and the output voltage 190. Figure 10 is a diagram illustrating an alternative compensation method in accordance with the present embodiment. In this embodiment, the controller includes an error. The voltage generating circuit 1 060. The error voltage generating circuit 1 060 receives the set point voltage 値VSP and the output voltage 190. The error voltage generating circuit 1060 generates an error voltage 1075-1, which is an output voltage 190 and Set the difference between the points 算. The arithmetic function 1 050 (for example, subtractor or accumulator, etc.) receives the error voltage 1 0 7 5- 1 and VC0MP, and produces the adjusted error voltage 1 075-2. This adjusted error voltage 1 075-2 is equal to the error voltage 1 075-1 minus the compensation 値 VC0MP. Similarly to the foregoing, the control signal generator 1 82 also controls the state of the switches 1 50 and 1 60 to control the output voltage 1 90. Figure 3 An exemplary timing diagram illustrating the theoretical results of output voltage 190 in accordance with a conventional power supply system that does not implement VCOMP as described. As shown in timing diagram 300, conventional power supplies are at timings T1 and T2. Change the VID setting of the conventional power supply. VSP stands for VID値, or the required output voltage to be applied during a specific time period in timing diagram 300. In the power supply of the prior art, the reference voltage or The VID voltage is not adjusted according to the VCOMP as described in the foregoing embodiment. When the T1 and T2 period are converted, the new set point VSP is received as described above, since the conventional power supply does not estimate the supply to the conventional power supply. 18- 201232216 The amount of sudden current required to charge the output capacitor in the inverter. Therefore, the output voltage of the conventional power supply 190 (VOUT) will fall behind the setting 値VSP, so when the voltage is converted, the conventional power supply The device does not produce an accurate output voltage as required by the processor load or other sources. Figure 4 is an exemplary timing diagram illustrating the theoretical results of implementing compensation to achieve a more accurate output voltage when performing voltage conversion in accordance with the present embodiment. As shown in the timing circuit 400 of FIG. 4, based on the use of the VCOMP as described, when the voltage conversion is performed, the power supply 100 is between the periods T3 to T4, changing the VID setting of the power supply 100 and/or The error voltage is set to compensate for the amount of current required to charge the output capacitor 125. In one embodiment, the VSP as previously described is represented as VID 値 or an output voltage 1 90 to be applied during a particular time period in the timing diagram 400. As shown, the output voltage 190 値VOUT is substantially equal to the set 値VSP because the power supply 100 will estimate the swell current required to charge the output capacitor 125 during voltage conversion, and therefore, during voltage conversion, phase The power supply 100 will more accurately generate the output voltage 190 required for the processor load, as compared to conventional power supplies. Fig. 5 is a diagram showing an exemplary circuit diagram of a power supply unit according to the present embodiment. In general, the operation mode of the power supply unit of Fig. 5 is similar to that of the circuit of the present embodiment. However, the power supply in FIG. 5 illustrates that the compensation 値 generator 145 includes the implementation of the switching function 510 and the filter circuit 520. -19- 201232216 During operation, the switching function 5 1 0 is enabled during the respective voltage transitions such that VC0MP is used to adjust the set point or error voltage during the output voltage transition as previously described. Filter circuit 520 can be viewed as a digital low pass filter that matches the standard analog load line voltage regulation circuit in the control circuit. As previously described, the controller 1 40 can be configured to monitor, for example, a processor or other source to comply with a dynamic VID (Voltage Identification) change request. This VID voltage request may be received by a processor (e.g., load 118) or by other sources that control the output voltage 190 during the time period. The processor can request the power supply to generate an output voltage 190 that is compliant with a particular voltage 値. In addition to specifying the VID voltage, the processor can also specify the ratio by which the output voltage varies during a specific time period. Therefore, as mentioned above, the processor or other source can control the timing and magnitude of the output voltage of the power supply. Furthermore, in the non-limiting example, assuming that the initial voltage of the output voltage is 0.8 volts, the processor can request the power supply to vary the output voltage to 1.2 volts, in addition to this voltage 値 information, the controller can also receive processing The slope information specified by the device to vary the output voltage from the initial voltage 至 to a preset ratio such as 1.2 volts at the end. By way of a non-limiting example, the processor will specify a ratio of output voltage variations of 5 millivolts per microsecond. The ratio of this variation can be specified as one, ranging from 1 to 500 millivolts per microsecond, or any suitable defect in other embodiments. The capacitor 相关 associated with the output capacitor 1 2 5 can be programmed into a storage device such as the register of the power supply -20-201232216 provider 100. Since the capacitance of the output capacitor is known, it depends on how the components of the power supply are constructed. Therefore, c0UT is known and stored in a voltage regulator (such as a 'power supply'). body. In one embodiment, the estimated capacitance 値C〇 UT °C ουτ is provided by the manager, user, etc. of the design power supply 100, based on the capacity of the physical output capacitor 125 of the power supply 100. The sudden rise current required to charge the capacitor 値C0UT during voltage fluctuations is expressed as follows: swell current = C〇uT*dv/dt' where 'C〇ut is the programmed capacitor 値, and dv/dt It is the expected ratio of VID changes in the period. The following example will estimate (forward or negative) the surge current required to charge and/or discharge C〇UT. For example, when the output voltage changes from a lower voltage 値 to a higher output voltage ,, the sudden current is positive; when the output voltage changes from a higher output voltage 较低 to a lower output voltage , The current is negative. This surge current is a current estimate (charged by controller 140) that charges the output capacitor based on the expected ratio of output voltage variations. Sudden load line voltage compensation 値 (V C 0 Μ P ) = sudden current multiplied by the load line resistance. The load line resistance can be programmed into the power supply's scratchpad. By way of an unrestricted example, the load line resistance 値 is usually between 〇. 〇1 to 50,000 milliohms. However, the load line resistance 値 can be within the above range or outside the range. In the case of the rising current, the sudden load line voltage compensation - ( -21 - 201232216, for example, VC0MP) can be positive or negative, depending on the initial and final voltages of the output voltage 値. The controller circuit can include a filtered analog to implement load line voltage compensation 値. The frequency bandwidth of the filter circuit 520 can be matched to the analog band width characteristics of the implementation filter. In one embodiment, the bandwidth of the filter can be programmed into the scratchpad (memory). The boost load line voltage compensation 输出 output by the multiplier function 5 82 can be digitally filtered by the filter circuit 520. In this embodiment, the accumulation of the filtered boost load line voltage and the digital error 値 is digitized to eliminate the effects of the sudden load line voltage:

^REF = ^SP ~ ^LLCOMP ~ ^COMP where VREF is the adjusted reference voltage or set point 输入 input to the error voltage generator circuit 260; VSP is the unadjusted set point received by the processor or other source Or VID値;

Vm^comp is a conventional load line compensation 値 'based on the amount of current supplied to the load through the inductor of the power supply: and VC0MP is used to calibrate the output capacitor 125 as described in this embodiment (or ) Compensation for discharge 値. As shown in FIG. 3, by accumulating the estimated boost load line voltage 値 to provide the error voltage Verr()r, this embodiment will eliminate the effect of the boost current, and the output voltage 190 will be more accurately reflected by The desired output voltage is specified by the output voltage setting information 170. Therefore, the controller of Figure 5 is based on the compensation error voltage 値 or has been -22- 201232216

The way to compensate for the VID is to replace the conventional use of the Verr()r term to achieve the purpose of controlling the output voltage. Adjust the power supply term and/or VID値 by (RL0ADLINE ) * ( C0UT ) * ( DVID rate or VSL0PE ) and estimate the current supplied or received by the output capacitor when the output voltage changes, Figure 5 The middle controller 140 will provide a more accurate output voltage to drive the processor load depending on the input power supply command. Figure 6 is a flow chart 600 of an exemplary method of controlling operation of the power supply 1 according to the present embodiment. It should be noted that some of the processes in this flowchart 600 are repeated with the foregoing in this embodiment, and all steps can be performed in any suitable order. In step 61, the controller 140 receives an output voltage setting information 170 specifying how to control the output voltage 190 of the power supply 1 to drive the load 118. In step 62, the controller 140 is based at least in part on the desired ratio of the output capacitance 値 (eg, the output capacitor 125) of the power supply 100 and the output voltage 190 specified by the voltage information setting information 170. Generate compensation値. In step 63 0, the controller 140 adjusts the output voltage 1 9000 by using the compensation 値 according to the output voltage setting information 1 7 。. 7 and 8 are combined to form a flowchart 700 (e.g., flowchart 7 00-1 and flowchart 700-2), which is a detailed example of operating a power supply unit 1 in accordance with the present embodiment. It is noted that portions of flowchart 700 will be repeated with the foregoing in this embodiment, and all steps may be performed in any suitable order. -23- 201232216 In step 710 of flowchart 700-1, the controller 140 controls the output voltage between the output voltages 190 in the time period 170 » In sub-step 715, the controller 140 receives the initial output 値. In sub-step 720, controller 140 receives the target output 値. In sub-step 725, the controller 140 receives the voltage slope 依 according to the desired ratio of the power supply output voltage from the initial output voltage setting to the target output 値 (eg, VSI^P in step 73 0, the controller 140 The compensation 値 is generated based at least in part on the output capacitance 値 (eg, compatible with the output capacitor 125) and the predetermined ratio of the output voltage specified by the voltage setting information 170 (eg, VSLOPE). In step 73, the controller 140 multiplies the power supply output capacitor 値 by the desired ratio of the output voltage 190, which is the estimated surge current when the output voltage is expected to fluctuate on the output capacitor 125. Estimating the amount of current. The estimated current amount is expressed as the sudden rise of the current (positive or negative 需要) required to charge the output capacitor 125 when the output voltage is changed from the initial voltage to the target output voltage. In 740, controller 140 obtains a power supply load line resistance 値 (eg, RL 0 AD - L_ 1 NE ). In sub-step 745, a designation is received for receipt with output capacitor 125. The information off voltage setting voltage of setting voltage 100 E) associated with the power supply 190 ° source 100 fluctuates in accordance with the current of 190 words, the beginning or the discharge output power of the projection 100 liters -24-201232216

Current, controller 140 multiplies this current by the load line resistance 値Rl〇ad.uNE to generate load line voltage compensation 値VC0MP. In other words, according to an embodiment, controller 140 will calculate VC0MP as follows:

Vc 〇 MP = RlOADUNE* SLOPE In step 810 of FIG. 8, the controller 140 uses the compensation 値vC0MP to calibrate the magnitude of the output voltage 190. In sub-step 8 15 5, the controller 1 400 applies the compensation 値V c 〇M p to the set point voltage VSP. In an embodiment, the controller applies the compensation 値VCOMP to the set point voltage to generate The setpoint voltage has been adjusted or the reference 値Vref has been adjusted. In sub-step 820, controller MO controls the plurality of switches in at least one of the power converter phases of power supply 100 in accordance with adjusted setpoint voltage VREF. In sub-step 825, when the output voltage 190 transitions to the target target specified by the output voltage setting information 170, the controller 140 will utilize the compensation 値VCOMP to modulate the control of the drive driver 110-1 and the driver 110-2. signal. In sub-step 830, when the output voltage is switched to the target ,, the controller 140 applies the calibrated control signal to at least one of the switching circuits of the power supply 1 (eg, the control switch 150 and the synchronization) Switch 1 60) provides compensation for the output voltage 1 90 of the power supply 1 〇〇. It should be noted that the controller 140 and/or the power supply may be supplied or included in a computer, a processor, a microcontroller, a digital signal processor, etc., may be planned to implement and/or support any or all of the embodiments. The exposed exercise -25-201232216. In other words, controller 140, as described above, may include one or more computerized devices or processors, etc., that may be programmed and/or programmed to achieve the foregoing operations to implement different embodiments of the present invention. It should be noted that the present embodiment further includes one or more software programs, and the execution code is stored in a computer readable medium to perform the steps and operation methods summarized above and disclosed in detail below. For example, one embodiment includes a computer program product including a computer storable medium (eg, a non-transitory computer readable medium (medium) or a non-transitory computer readable medium (media)) having a computer that can be encoded Program logic to program the processor to perform the operations as disclosed in this embodiment when executed in a computerized device having a processor and a corresponding storage unit. This design can be implemented in software, code, and/or other materials (eg, data structures) that can be planned or encoded in computer readable media such as optical media (eg, CD-ROM), floppy Machine or hard disk or other media such as firmware or microcoded in one or more ROM or RAM or PROM chips, as well as application special integrated circuits (ASIC) and the like. This software or hardware or other device of similar nature can be stored in the controller! 40, so that the controller 140 executes the aforementioned technique. Therefore, a specific embodiment of the method according to the present disclosure is directed to a computer program product including a non-transitory computer readable hardware storage medium (eg, a memory, a storage, a CD, and an integrated circuit). In other words, the controller 1 40 as disclosed above may include a computer readable hardware medium for storing current estimation and mode control programs, the program supporting the power supply switch control function as disclosed above, for example, In the embodiment of -26-201232216, when the controller MO executes the instruction, the operation as in the flowchart will be completed. FIG. 9 is a diagram showing an exemplary architecture for performing one or more functions provided by the controller according to the embodiment. As shown, the controller 1 40 may be a computerized device or include a computerized device. For example, a processing device, a processor or a digital signal processor, and the like. As shown in the figure, the controller 1 40 of the present example includes an interconnecting line 81 1 for coupling to a computer readable hardware storage medium 8 1 2, for example, for storing or reading digital information. Type media, computer readable and hardware storage media, and more. The controller 140 may further include a processor 813, an I/O interface 814, and a communication interface 8 1 7 that may be connected to the source via the Internet 191 or other communication source; the source terminal is, for example, supplied by the output voltage 1 90. processor. The I/O interface 8 14 provides connectivity to the database 880, which can be a display screen and peripheral devices such as a keyboard, a computer mouse, and the like. The computer readable medium 8 1 2 (e.g., storage media hardware) can be any suitable device and/or hardware such as a memory, optical storage, hardware drive, floppy disk, and the like. The computer storable medium can be a non-transitory storage medium for storing instructions associated with the controller application 1 40-1, such instructions being executed by different sources, such as the controller 1400, to perform any of the foregoing disclosures. Operation" Communication Interface 8 1 7 Enables Controller 1 40 to communicate with a source such as Internet 1 9 1 to retrieve information from a remote source and interact with other computers, r- Λ -27- 201232216, Client, server, etc. communication, I/O interface 814 power processor 813 to retrieve or attempt to retrieve data stored by database 88 or its files. It can be seen from the patented technology that the controller 140 can be a computer system, other steps and/or software and hardware units, for example, to block the distribution and use of the source end to execute the operating system of the controller application unit. It should be noted that the patented technology is fully applicable to the power supply unit. However, it should be noted that the present embodiment is not limited to use in the foregoing procedures. The technology disclosed in this patent is also fully applicable to other sequences. The present invention has been disclosed and described in detail by the preferred embodiments of the present invention. Therefore, the scope of the aforementioned patent application is not limited thereto. More specifically, any limitation of the invention will be defined by the scope of the application. BRIEF DESCRIPTION OF THE DRAWINGS The foregoing and other objects, features, and characteristics of the present invention will be more fully discussed in the preferred embodiments of the present invention, and similar reference features that apply the same elements in different concepts will be referred to in the drawings. 'This illustration does not need to be scaled down or enlarged, and instead can be used to state embodiments, guidelines and content, and the like. The source of the application can be enabled and includes the application application of the hardware 140-1 application. Anything that does not exceed the specific features listed in this special example is as described in the Appendix -28-201232216. An example circuit diagram of a power supply of an embodiment. Fig. 2 is a circuit diagram showing an example of a controller and its associated compensation circuit in accordance with the present embodiment. Figure 3 is a diagram showing an exemplary theoretical timing diagram for inaccurate output voltage generation in accordance with conventional techniques. Fig. 4 is a diagram showing an exemplary theoretical timing chart for more accurately generating an output voltage in accordance with the dynamic VID compensation of the present embodiment. Figure 5 is a circuit diagram showing an example of a controller and its associated compensation circuit in accordance with the present embodiment. Fig. 6 is a flow chart showing an example of performing compensation at the time of output voltage conversion in accordance with the present embodiment. 7 and 8 are combined to illustrate a detailed flowchart of an exemplary method in accordance with the present embodiment. Figure 9 is a diagram showing an example circuit for completing compensation in accordance with the present embodiment. Fig. 1 is a circuit diagram showing an example of a controller and its associated compensation circuit according to the present embodiment. [Main component symbol description] 100 : Power supply 1 2 0 : Voltage source 140 : Controller 182 : Control signal generator 145 : Compensation 値 generator 170 : Output voltage setting information -29 ~ 201232216 1 5 0, 1 6 0 : Switch 110-1, 110-2: Driver 1 44: Inductor 1 90: Output voltage 125: Capacitor 1 18: Load 2 1 4: Multiplier 145: Compensation 値 generator Rload_l <ine: Load line resistance C0UT : Output Capacitance 値VsLOPE: Voltage slope V sp : Set point 値 VC Ο Μ P : Compensation 値 229 : Arithmetic function Vref : Output voltage reference 値 2 7 5 - 1 : Error voltage 260 : Error voltage generator 5 82 : Multiplier 5 1 0: switching function 5 2 0 : filter circuit IlNDUCTOR : inductor current V^COMP : conventional load line compensation 値 5 5 5 : arithmetic function 2 7 5 - 2 : error voltage -30 201232216 265 : control signal generator 8 8 0 :Database 8 0 0 : Computer system 8 1 2 : Computer readable storage medium 8 1 3 : Processor 8 1 4 : I/O interface 8 1 1 : Interconnect line 817 : Communication interface 1 9 1 : Internet Road 140-1: Controller Application Unit 140-2: Controller Processing Unit 1 060: Error Power Generator 1 075- 1 : Error voltage 1 075-2 : Adjusted error voltage

Claims (1)

201232216 VII. Patent application scope: 1. A method comprising: receiving, by a controller in a power supply device, receiving output voltage setting information, which specifies how to control an output voltage of the power supply to drive a load; Generating a compensation 基于 based on at least a portion of the output capacitance of the power supply and a specific ratio of the output voltage 指定 specified by the output voltage setting information; and using the compensation 値 to calibrate the output Voltage. 2. The method of claim 1, wherein the adjusting the output voltage by using the compensation 包括 comprises: applying the compensation 値 to a set point voltage of the power supply to generate a calibrated set point Voltage, the adjusted set point voltage is a difference between the set point voltage specified by the output voltage setting information and the compensation 値: and at least one of the power supply is controlled according to the adjusted set point voltage A complex switch in the phase of the power converter. 3. The method of claim 1, further comprising: transmitting the controller in the power supply: during the period in which the output voltage is switched to a target target specified by the output voltage setting information Compensating 値 calibrating a plurality of control signals generated by the controller; and applying the plurality of calibrated control signals to at least one switching circuit ' of the power supply to during the transition of the output voltage to the target - -32 - 201232216 Adjust the output voltage of the power supply. 4. The method of claim 1, wherein receiving the output voltage setting information comprises receiving a voltage slope 値, which means that the output voltage of the power supply is changed from an initial setting to The specific ratio of one of the target voltages specified by the output voltage setting information. 5. The method of claim 1, wherein receiving the input port comprises: receiving the output voltage setting information from a processor source driven by the output voltage, the output voltage setting information is specified to control the The future setting of the output voltage; and receiving a ratio 値 from the processor source, the ratio 表示 is indicative of the particular ratio of the output voltage of the power supply to a target 。. 6. The method of claim 1, wherein the generating the compensation comprises: obtaining a load line resistance 之一 of the power supply; multiplying the output capacitance by a specific ratio that varies the output voltage to A current 产生 is generated, the current 表示 is indicative of the amount of current that causes the voltage on the output capacitor to fluctuate; and the current 値 is multiplied by the load line resistance 値 to generate the compensation 値. 7. The method of claim 1, wherein the compensating means comprises: applying the compensation to the power source during a period in which the output voltage changes to a target voltage 指定 specified by the output voltage setting information One of the supply voltages is biased to cause charging of the output capacitor. The method of claim 1, wherein generating the compensation includes estimating an amount of current required to be supplied by the power supply to charge the output capacitor 値 of the power supply, The 値 of the output voltage is varied according to the specific ratio of the variation of the output voltage. 9. The method of claim 8, wherein the compensating 値 to adjust the output voltage comprises controlling a driving state of the plurality of switches in the power supply according to the compensation 値. 10. The method of claim 1, wherein the compensating 値 is used to adjust the output voltage, including: during the period when the output voltage fluctuates to a target voltage 指定 specified by the output voltage setting information, The compensation is applied to one of the error voltages of the power supply to cause a discharge of the output capacitor. 11. The method of claim 1, wherein generating the compensation comprises multiplying a first turn by a second turn, the first turn representing the output capacitance of the power supply, the first The second representation represents the specific ratio of the fluctuation of the output voltage specified by the output voltage setting information. The method of claim 1, wherein generating the compensation comprises estimating a current to charge the output capacitor based on the particular ratio of the output voltage. 1 3 · A method comprising: consuming a power supply through a controller - receiving input that specifies a set point of one of the output voltages of the power supply for driving a load; obtaining the configuration Information, the configuration information is specified by the power supply -34-201232216 one output capacitor 値; generating a compensation 突 according to at least part of the output capacitance 値 and the output voltage of the power supply is suddenly increased to Set a specific ratio of points ;; and use the compensation 値 to calibrate the output voltage. 1 4. A power supply system, comprising: - a controller, comprising: a receiver receiving output voltage setting information, the output voltage setting information specifying how to control an output voltage of the power supply to drive a load; the control The device is configured to: generate a compensation 基于 based on at least a portion of the output capacitor of the power supply and a specific ratio of the output voltage specified by the output voltage setting information; and utilizing the Compensation 値 to adjust the output voltage. 15. The power supply system of claim 14, wherein the controller is configured to: apply the compensation 値 to a set point voltage of the power supply to generate a calibrated set point voltage, The adjusted set point voltage indicates a difference between the set point voltage specified by the output voltage setting information and the compensation 値; and controlling at least one power converter of the power supply according to the adjusted set point voltage The complex switch in the phase. The power supply system of claim 14, wherein the controller is configured to: -35- 201232216, the output voltage is converted to one of the targets specified by the output voltage setting information Using the compensation 値 to adjust a plurality of control signals generated by the controller; and applying the plurality of calibrated control signals to at least one of the switching circuits of the power supply to convert the output voltage to the target The output voltage of the power supply is adjusted during the period. The power supply system of claim 14, wherein the controller is configured to: receive a voltage slope 値, which indicates that the output voltage of the power supply is set by an initial setting値 varies to the specific ratio of one of the target voltages specified by the output voltage setting information. 1 8 The power supply system of claim 14, wherein the controller is configured to: receive the output voltage setting information from a processor source driven by the output voltage, the output voltage setting information The system is configured to control the future voltage setting of the output voltage; and receive a ratio 从 from the source of the processor, the ratio 表示 indicating that the output voltage of the power supply is varied to a specific ratio of a target 値. 1 9. The power supply system of claim 14, wherein the controller is configured to: obtain a load line resistance 之一 of the power supply; multiply the output capacitance by a variable output The particular ratio of voltages produces a current 値 that represents the amount of current that causes the output capacitor to fluctuate over the voltage; and -36-201232216 multiplies the current 値 by the load line resistance 値 to produce the compensation 値. 20. The power supply system of claim 14, wherein the controller is configured to: apply the compensation during a period in which the output voltage fluctuates to a target voltage 指定 specified by the output voltage setting information An error voltage is applied to one of the power supplies to cause charging of the output capacitors. 2 1. The power supply system of claim 14, wherein the controller is configured to: estimate one of the requirements required by the power supply to charge the output capacitor of the power supply The electric current flows by varying the output voltage according to the specific ratio at which the output voltage is varied. 2. The method of claim 21, wherein the controller is configured to: control a driving state of the plurality of switches in the power supply according to the compensation 値. 23. The method of claim 14, wherein the controller is configured to: apply the compensation to the period during which the output voltage changes to a target voltage 指定 specified by the output voltage setting information One of the power supplies has an error voltage to cause a discharge of the output capacitor. 24. The method of claim 14, wherein the controller is configured to: multiply a first turn by a second turn, the first turn representing the output capacitance of the power supply値The second port represents the specific ratio of the output voltage that is specified by the output voltage setting information -37-201232216. The method of claim 14, wherein the controller is configured to: estimate a current amount to charge the output capacitor 依据 according to the particular ratio of varying the output voltage. -38-