201228201 六、發明說明： 【發明所屬之技術領域】 [0001] 本發明涉及一種降壓式變換電路的輸出電流監測裝置， 尤其涉及一種應用於電腦主板的多相降壓式變換電路的 各相輸出電流監測裝置。 【先前技彳标】 [0002] 習知的電腦系統中，通常採用降壓式變換電路（Buck電 路）作為主板的供電電路，降壓式變換電路一般包括作 為電子開關的場效應管。為了獲得更為穩定的電壓、較 大的電流以及降低供電電路的溫度，習知的電腦主板的 供電電路大多採用多相降壓式變換電路。 ' [0003] 然，如果電腦主板的電路佈線設計不合理，這將導致多 相降壓式變換電路的各相電流不平衡，進而導致燒毁場 效應管。如何快速、準確監測多相降壓式變換電路的各 相電流，這成為業内急需解決的技術問題。 【發明内容】 (Q [〇〇〇4] 鑒於以上内容，有必要提供一種快速準確監測輸出電流 的降壓式變換電路的輸出電流監測裝置。 [0005] —種降壓式變換電路的輸出電流監測裝置，包括電壓輸 入端、第一輸入控制單元、第一電感、第一接地電容及 第一電壓輸出端，電壓輸入端與第一輸入控制單元連接 以將外部電源輸入降壓式變換電路中，第一輸入控制單 元通過串聯的第一電感及第一接地電容接地，第一電壓 輸出端連接至串聯的第一電感及第一接地電容之間以輸 出一驅動電壓給負載，還包括第一RC積分電路、第一電 099145932 表單編號 A0101 第 5 頁/共 14 頁 0992079048-0 201228201 壓採樣單元及控制單元，第一RC積分電路包括第一電阻 及第一電容，第一電感上並聯第一RC積分電路，第一電 容的一端與第一電阻連接，第一電容的另一端與第一電 壓輸出端連接，第一電壓採樣單元與第一電容連接以採 集第一電容兩端的電壓U1，第一電壓採樣單元與控制單 元連接以將電壓U1傳送給控制單元。 [0006] 上述降壓式變換電路的輸出電流監測裝置通過採集第一 電容的電壓值U1，從而間接獲得第一電感L1的電壓值， 進而計算第一電感的電流，快速、準確監測多相降壓式 變換電路的各相電流。 【實施方式】 [0007] 請參照圖1，本發明較佳實施方式提供降壓式變換電路的 輸出電流監測裝置，包括電壓輸入端V i η、第一輸入控制 單元11、第一RC積分電路13、第一電壓採樣單元12、第 二輸入控制單元14、第二RC積分電路15、第二電壓採樣 單元16、控制單元17及顯示單元18。電壓輸入端Vin分 別與第一輸入控制單元11及第二輸入控制單元14連接以 將外部電源輸入降壓式變換電路中。 [0008] 第一輸入控制單元11包括第一PWM ( pu 1 se wi dth mod-ulation，脈寬調製）驅動單元111、第一場效應管Q1及 第二場效應管Q2。第一PWM驅動單元111分別與第一場效 應管Q1及第二場效應管Q2的柵極連接。第一場效應管Q1 的源極連接至第二場效應管Q2的漏極。第二場效應管Q2 的漏極通過串聯的第一電感L1及第一接地電容C21接地， 即第一輸入控制單元11通過串聯的第一電感L1及第一接 099145932 表單編號A0101 第6頁/共14頁 0992079048-0 201228201 [0009] 地電容C21接地。第一電壓輸出端Voutl連接至串聯的第 一電感L1及第一接地電容C21之間，以輸出一驅動電壓給 負載。 第一電感L1上並聯第一RC積分電路13。第一RC積分電路 13包括第一電阻R1及第一電容C11，第一電容C11的一端 與第一電阻R1連接，第一電容C11的另一端與第一電壓輸 出端Voutl連接。在本實施方式中，第一電阻R1的阻值為 10K歐姆，第一電容C11的容值為1微法。 [0010] 第二輸入控制單元14包括第二PfM (pulse width mod-ulation，脈寬調製）驅動單元141、第三場效應管Q3及 第四場效應管Q4。第三場效應管Q3的源極連接至第四場 效應管Q4的漏極。第三場效應管Q3的漏極通過串聯的第 二電感L2及第二接地電容C22接地，即第二輸入控制單元 14通過串聯的第二電感L2及第二接地電容C22接地。第二 電壓輸出端Vout2連接至串聯的第二電感L2及第二接地電 容C22之間，以輸出另一驅動電壓給負載。 ^ [0011] 第二電感L2並聯第二RC積分電路15。第二RC積分電路15 包括第二電阻R2及第二電容C12，第二電容C12的一端與 第二電阻R2連接，第二電容C12的另一端與第二電壓輸出 端Vout2連接。在本實施方式中，第二電阻R2的阻值為 10K歐姆，第二電容C12的容值為1微法。 [0012] 電壓輸入端Vin連接至第一場效應管Q1及第三場效應管Q3 的漏極，以將外部電源輸入降壓式變換電路10中。 [0013] 第一電壓採樣單元12與第一RC積分電路13的第一電容 099145932 表單編號A0101 第7頁/共14頁 0992079048-0 201228201201228201 VI. Description of the Invention: [Technical Field] [0001] The present invention relates to an output current monitoring device for a buck converter circuit, and more particularly to a phase output of a multi-phase buck converter circuit applied to a computer motherboard Current monitoring device. [Previous technical standard] [0002] In a conventional computer system, a buck conversion circuit (Buck circuit) is generally used as a power supply circuit of a main board, and a buck conversion circuit generally includes a field effect transistor as an electronic switch. In order to obtain a more stable voltage, a larger current, and a lower temperature of the power supply circuit, the power supply circuit of the conventional computer motherboard mostly adopts a multi-phase buck conversion circuit. [0003] However, if the circuit layout of the computer motherboard is unreasonable, this will result in unbalanced currents in the phase of the multi-phase buck converter circuit, which will cause the field effect tube to burn out. How to quickly and accurately monitor the phase currents of multi-phase buck converter circuits has become an urgent technical problem in the industry. SUMMARY OF THE INVENTION (Q [〇〇〇4] In view of the above, it is necessary to provide an output current monitoring device of a buck conversion circuit that quickly and accurately monitors an output current. [0005] An output current of a buck converter circuit The monitoring device includes a voltage input terminal, a first input control unit, a first inductor, a first grounding capacitor and a first voltage output terminal, and the voltage input terminal is connected to the first input control unit to input the external power source into the buck conversion circuit The first input control unit is grounded through the first inductor and the first ground capacitor connected in series, and the first voltage output terminal is connected between the first inductor and the first ground capacitor connected in series to output a driving voltage to the load, and further includes a first RC integration circuit, first electric 099145932 Form No. A0101 Page 5 of 14 0992079048-0 201228201 Pressure sampling unit and control unit, the first RC integration circuit includes a first resistor and a first capacitor, the first inductor is connected in parallel with the first An RC integration circuit, one end of the first capacitor is connected to the first resistor, and the other end of the first capacitor is connected to the first voltage output end, the first electric The voltage sampling unit is connected to the first capacitor to collect the voltage U1 across the first capacitor, and the first voltage sampling unit is connected to the control unit to transmit the voltage U1 to the control unit. [0006] The output current monitoring device of the buck converter circuit described above By collecting the voltage value U1 of the first capacitor, the voltage value of the first inductor L1 is indirectly obtained, thereby calculating the current of the first inductor, and quickly and accurately monitoring the phase currents of the multi-phase buck converter circuit. [Embodiment] 0007] Referring to FIG. 1, a preferred embodiment of the present invention provides an output current monitoring device for a buck converter circuit, including a voltage input terminal V i η, a first input control unit 11, a first RC integration circuit 13, and a first voltage. The sampling unit 12, the second input control unit 14, the second RC integration circuit 15, the second voltage sampling unit 16, the control unit 17, and the display unit 18. The voltage input terminal Vin and the first input control unit 11 and the second input control, respectively The unit 14 is connected to input an external power source into the buck conversion circuit. [0008] The first input control unit 11 includes a first PWM (pu 1 se wi dth mod-ulation, Pulse width modulation drive unit 111, first field effect transistor Q1 and second field effect transistor Q2. The first PWM drive unit 111 is connected to the gates of the first field effect transistor Q1 and the second field effect transistor Q2, respectively. The source of the FET Q1 is connected to the drain of the second FET Q2. The drain of the second FET Q2 is grounded through the first inductor L1 and the first ground capacitor C21 connected in series, that is, the first input control unit 11 Through the first inductance L1 and the first connection 099145932 in series form No. A0101 Page 6 / 14 pages 0992079048-0 201228201 [0009] The ground capacitor C21 is grounded. The first voltage output terminal Vout1 is connected between the first inductor L1 and the first ground capacitor C21 connected in series to output a driving voltage to the load. The first RC integrating circuit 13 is connected in parallel to the first inductor L1. The first RC integration circuit 13 includes a first resistor R1 and a first capacitor C11. One end of the first capacitor C11 is connected to the first resistor R1, and the other end of the first capacitor C11 is connected to the first voltage output terminal Vout1. In the present embodiment, the resistance of the first resistor R1 is 10K ohms, and the capacitance of the first capacitor C11 is 1 microfarad. [0010] The second input control unit 14 includes a second PfM (pulse width modulation) driving unit 141, a third field effect transistor Q3, and a fourth field effect transistor Q4. The source of the third field effect transistor Q3 is connected to the drain of the fourth field effect transistor Q4. The drain of the third field effect transistor Q3 is grounded through the second inductor L2 and the second ground capacitor C22 connected in series, that is, the second input control unit 14 is grounded through the second inductor L2 and the second ground capacitor C22 connected in series. The second voltage output terminal Vout2 is connected between the second inductor L2 and the second ground capacitor C22 connected in series to output another driving voltage to the load. [0011] The second inductor L2 is connected in parallel with the second RC integrating circuit 15. The second RC integration circuit 15 includes a second resistor R2 and a second capacitor C12. One end of the second capacitor C12 is connected to the second resistor R2, and the other end of the second capacitor C12 is connected to the second voltage output terminal Vout2. In the present embodiment, the resistance of the second resistor R2 is 10K ohms, and the capacitance of the second capacitor C12 is 1 microfarad. [0012] The voltage input terminal Vin is connected to the drains of the first field effect transistor Q1 and the third field effect transistor Q3 to input an external power source into the buck converter circuit 10. [0013] The first capacitor of the first voltage sampling unit 12 and the first RC integration circuit 13 099145932 Form No. A0101 Page 7 of 14 0992079048-0 201228201
Cl 1連接，以採集第一RC積分電路13的第一電容Cl 1兩端 的電壓U1。第二電壓採樣單元16與第二RC積分電路15的 第二電容C12連接，以採集第二RC積分電路15的第二電容 C12兩端的電壓U2。 [0014] 第一電壓採樣單元12與第二電壓採樣單元16分別將第一 電容C11的電壓U1與第二電容C12的電壓U2發送到控制單 元17。第一電感L1的等效電阻R_L1和第二電感L2的等效 電阻R_L2預存於控制單元17中。由於第一電感L1的電壓 近似於第一電容C11的電壓，第二電感L2的電壓近似於第 二電容C12的電壓，故第一電感L1的電流I_L1=U1/R_L1 ，第二電感L2的電流I_L2 = U2/R_L2。 [0015] 控制單元1 7將第一電感L1的電流I_L1和第二電感L2的電 流I_L2傳送給顯示單元18，顯示單元18顯示I_L1和 I_L2。 [0016] 由於難以精確直接採集第一電感L1和第二電感L2的瞬間 電學參數狀態，故本發明通過採集第一電容C11的電壓值 U1與第二電容C12的電壓值U2，從而間接獲得第一電感 L1和第二電感L2的電壓值，進而計算第一電感和第二電 感的電流，快速、準確監測多相降壓式變換電路的各相 電流。 [0017] 另外，本領域技術人員還可在本發明申請專利範圍第公 開的範圍和精神内做其他形式和細節上的各種修改、添 加和替換。當然，這些依據本發明精神所做的各種修改 、添加和替換等變化，都應包含在本發明所要求保護的 099145932 表單編號A0101 第8頁/共14頁 0992079048-0 201228201 [0018] 範圍之内。 【圖式簡單說明】 圖1為本發明較佳實施方式的降壓式變換電路的輸出電流 監測裝置的電路圖。 [0019] 【主要元件符號說明】 第一輸入控制單元：11 [0020] 第一PWM驅動單元：111 [0021] 〇 [0022] 第一場效應管：Q1 第二場效應管：Q2 [0023] 第一電感：L1 [0024] 第一接地電容：C21 f [0025] 第一電壓採樣單元：12 [0026] 第一RC積分電路：13 [0027] 0 [0028] 第二輸入控制單元：14 第二PWM驅動單元·· 141 [0029] 第三場效應管：Q3 [0030] 第四場效應管：Q4 [0031] 第二電感：L2 [0032] 第二接地電容：C22 [0033] 第二RC積分電路：15 099145932 表單編號A0101 第9頁/共14頁 0992079048-0 ：16 201228201 [0034] 第二電壓採樣單元 [0035] 控制單元：1 7 [0036] 顯示單元：18 [0037] 電壓輸入端：Vi ηCl 1 is connected to collect the voltage U1 across the first capacitor Cl 1 of the first RC integrating circuit 13. The second voltage sampling unit 16 is connected to the second capacitor C12 of the second RC integrating circuit 15 to collect the voltage U2 across the second capacitor C12 of the second RC integrating circuit 15. [0014] The first voltage sampling unit 12 and the second voltage sampling unit 16 respectively transmit the voltage U1 of the first capacitor C11 and the voltage U2 of the second capacitor C12 to the control unit 17. The equivalent resistance R_L1 of the first inductor L1 and the equivalent resistance R_L2 of the second inductor L2 are prestored in the control unit 17. Since the voltage of the first inductor L1 is approximately equal to the voltage of the first capacitor C11, the voltage of the second inductor L2 is approximately equal to the voltage of the second capacitor C12, so the current of the first inductor L1 is I_L1=U1/R_L1, and the current of the second inductor L2 I_L2 = U2/R_L2. [0015] The control unit 17 transmits the current I_L1 of the first inductance L1 and the current I_L2 of the second inductance L2 to the display unit 18, which displays I_L1 and I_L2. [0016] Since it is difficult to accurately and accurately acquire the instantaneous electrical parameter state of the first inductor L1 and the second inductor L2, the present invention indirectly obtains the first value by collecting the voltage value U1 of the first capacitor C11 and the voltage value U2 of the second capacitor C12. The voltage values of the inductor L1 and the second inductor L2, thereby calculating the currents of the first inductor and the second inductor, quickly and accurately monitor the phase currents of the multi-phase buck converter circuit. [0017] In addition, various modifications, additions and substitutions in the form and details may be made by those skilled in the art in the scope and spirit of the invention. Of course, various modifications, additions and substitutions made in accordance with the spirit of the present invention should be included in the scope of the present invention, 099145932, Form No. A0101, Page 8 of 14 0992079048-0 201228201 [0018] . BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a circuit diagram of an output current monitoring device of a buck converter circuit according to a preferred embodiment of the present invention. [Description of Main Component Symbols] First Input Control Unit: 11 [0020] First PWM Driving Unit: 111 [0021] 〇 [0022] First Field Effect Transistor: Q1 Second Field Effect Transistor: Q2 [0023] First inductance: L1 [0024] First grounding capacitance: C21 f [0025] First voltage sampling unit: 12 [0026] First RC integration circuit: 13 [0027] 0 [0028] Second input control unit: 14 Two PWM drive unit·· 141 [0029] Third field effect transistor: Q3 [0030] Fourth field effect transistor: Q4 [0031] Second inductance: L2 [0032] Second grounding capacitance: C22 [0033] Second RC Integration circuit: 15 099145932 Form number A0101 Page 9/14 page 0992079048-0 :16 201228201 [0034] Second voltage sampling unit [0035] Control unit: 1 7 [0036] Display unit: 18 [0037] Voltage input :Vi η
Vout 1 Vout2 [0038] 第一電壓輸出端： [0039] 第二電壓輸出端： [0040] 第一電阻：R1 [0041] 第一電容：C11 [0042] 第二電阻：R2 [0043] 第二電容：C1 2 099145932 表單編號A0101 第10頁/共14頁 0992079048-0Vout 1 Vout2 [0038] The first voltage output terminal: [0039] The second voltage output terminal: [0040] The first resistor: R1 [0041] The first capacitor: C11 [0042] The second resistor: R2 [0043] Capacitor: C1 2 099145932 Form No. A0101 Page 10 of 14 0992079048-0