201228024 六、發明說明： 【發明所屬之技術領域】 [0001] 本發明涉及一種發光二極體晶粒的製作方法，尤其涉及 一種具有高出光效率的發光二極體晶粒的製作方法。 【先前技術】 [0002] 發光二極體（Light Emitting Diode，LED)是一種可 將電流轉換成特定波長範圍的光的半導體元件。發光二 極體以其亮度高、工作電壓低、功耗小、易與積體電路 匹配、驅動簡單、壽命長等優點，從而可作為光源而廣 ^ 泛應用於照明領域。 [0003] 傳統的發光二極體晶粒通常為矩形結構。由於發光二極 體晶粒所用材料與外界空氣或封裝材料之間的折射率相 差較大，發光二極體晶粒所發出的光線报容易在介面上 發生全反射而返回晶粒内部，而無法出射到外界。為提 尚發光二極艘晶粒的光取出效率::’可將發光二極體晶粒 設置成倒錐狀的結構，而使發光二極體晶粒的側面與底 Q 面傾斜。該結構可破壞光線在侧面發生向下的全反射的 條件’從而使光線從發光二極體晶粒中出射。形成上述 倒錐狀結構的一種方法是採用濕蝕刻的方法，即採用蝕 刻液對發光二極體晶粒的侧面進行蝕刻。由於晶粒底部 的晶格品質低於晶粒頂部的晶格品質，晶粒底部的蝕刻 速度比晶粒頂部的蝕刻速度要快，從而可以形成倒錐狀 結構的發光二極體晶粒。然而，上述的蝕刻過程需在大 於170度的溫度下進行，並且其蝕刻速度亦較為緩慢。 【發明内容】 099146772 表單編號A0101 第3頁/共20頁 0992080351-0 201228024 [0004] 有鑒於此，有必要提供—種發光二極體晶粒的製作方法 ’從而可在較低的溫度下對發光二極體晶粒進行側向蝕 刻，以使發光二極體晶粒形成倒錐狀的結構。 [0005] —種發光二極體晶粒的製作方法，其包括以下步驟： [〇〇〇6]提供一基板，基板上形成有二氧化矽圖案層，該圖案層 將基板分割成多個外延生長區域； [0007] 在外延生長區域生長半導體發光結構，控制外延生長的 條件，使相鄰的半導體發光結構之間具有間隙以顯露出 部分二氧化矽圖案層； [0008] 利用第一種姓刻液去除二氧化石夕圓案層； [0009] 利用第二種餘刻液對半導體發光結構進行侧向#刻，所 述第二種蝕刻液注入半導體發光結構之間的間隙以及二 氧化石夕圖案層去除後所留下的間隙中，從而使半導體發 光結構形成倒錐狀的結構； [0010] 在半導體發光結構的部分區域蘇刻出棄極平臺，然後在 半導體發光結構表面製作電極， [0011] 將基板沿半導體發光結構之間的間隙進行切割，形成多 個發光二極體晶粒。 [0012] 與現有技術相比’本發明藉由在發光二極體晶粒底部形 成一層二氧化矽圖案層，在半導體發光結構生長完成之 後’利用第-種㈣液把二氧化錢案層去除。此時， 在側向㈣的過程中，第二祕難將進人到發先二極 體晶粒的底部並從底部開始㈣，加快了使半導體發光 099146772 表單編號A0101 第4頁/共20頁 201228024 屯成甸錐狀的結構的過程，從而有效提高發光二極 曰曰粒的出光效率，並可有效降低蝕刻過程中所需的溫 度。 【實施方式】201228024 VI. Description of the Invention: [Technical Field] [0001] The present invention relates to a method for fabricating a light-emitting diode die, and more particularly to a method for fabricating a light-emitting diode die having high light-emitting efficiency. [Prior Art] [0002] A Light Emitting Diode (LED) is a semiconductor element that converts current into light of a specific wavelength range. The light-emitting diode has a wide range of brightness, low operating voltage, low power consumption, easy matching with integrated circuits, simple driving, long life, and the like, and can be widely used as a light source in the field of illumination. [0003] Conventional light emitting diode grains are generally rectangular in structure. Since the refractive index difference between the material used for the light-emitting diode crystal grains and the outside air or the packaging material is large, the light emitted by the light-emitting diode crystal grains is easily totally reflected on the interface and returned to the inside of the crystal grain, and cannot be Exit to the outside world. In order to improve the light extraction efficiency of the light-emitting diode chips:: The light-emitting diode crystal grains can be arranged in an inverted tapered shape, and the side faces of the light-emitting diode crystal grains are inclined with respect to the bottom Q-plane. This structure can destroy the condition that the light is totally reflected downward on the side, so that light is emitted from the light-emitting diode grains. One method of forming the above-described inverted tapered structure is to use a wet etching method in which the side faces of the light-emitting diode crystal grains are etched using an etching solution. Since the lattice quality at the bottom of the crystal grains is lower than that at the top of the crystal grains, the etching speed at the bottom of the crystal grains is faster than that at the top of the crystal grains, so that the light-emitting diode crystal grains having an inverted pyramid structure can be formed. However, the above etching process needs to be performed at a temperature of more than 170 degrees, and the etching speed thereof is also slow. SUMMARY OF THE INVENTION 099146772 Form No. A0101 Page 3 of 20 0992080351-0 201228024 [0004] In view of this, it is necessary to provide a method for fabricating a light-emitting diode die, which can be used at a lower temperature. The light-emitting diode grains are laterally etched so that the light-emitting diode grains form an inverted tapered structure. [0005] A method for fabricating a light-emitting diode crystal grain, comprising the steps of: [6] providing a substrate on which a ruthenium dioxide pattern layer is formed, the pattern layer dividing the substrate into a plurality of epitaxes a growth region; [0007] growing a semiconductor light-emitting structure in the epitaxial growth region, controlling epitaxial growth conditions, and having a gap between adjacent semiconductor light-emitting structures to expose a portion of the ceria pattern layer; [0008] using the first surname The engraving liquid removes the layer of the cerium oxide layer; [0009] lateral etching of the semiconductor light-emitting structure by using the second residual liquid, the second etching liquid is injected into the gap between the semiconductor light-emitting structures and the dioxide And removing the gap left after the pattern layer is removed, thereby forming the semiconductor light emitting structure into an inverted tapered structure; [0010] etching a pole platform in a portion of the semiconductor light emitting structure, and then forming an electrode on the surface of the semiconductor light emitting structure, [0011] The substrate is cut along a gap between the semiconductor light emitting structures to form a plurality of light emitting diode crystal grains. [0012] Compared with the prior art, the present invention removes the dioxide layer by using the first (four) liquid after forming a layer of ruthenium dioxide pattern on the bottom of the light-emitting diode crystal grain after the semiconductor light-emitting structure is grown. . At this time, in the lateral (four) process, the second secret will enter the bottom of the first diode die and start from the bottom (four), speeding up the semiconductor light 099146772 form number A0101 page 4 / total 20 pages 201228024 The process of the pyramid-shaped structure of Fuchengdian effectively improves the light-emitting efficiency of the light-emitting diode particles and effectively reduces the temperature required during the etching process. [Embodiment]
[0013] [0014] G Q [0015] 099146772 圖1圖5為本發明的發光二極體晶粒的製作過程示意圖。 如圖1所； ., 吓不，"T先提供一基板110，該基板11()選自藍寶石 基板碳化矽基板與氮化矽基板其中之一。然後在基板 110上製作二氡化矽圖案層120。該二氧化矽圖案層120 將基板11〇分割成多個外延生長區域130。在本實施例中 ’基板110的厚度為43〇微米。所述二氧化矽圖案層120 由多條交又排列形成栅格結構的直線组成，如圖2所示。 所述二氧化矽圖案層120圍成多個正方形的外延生長區域 13〇 ’所述直線的線寬為2〇微米，所述外延生長區域130 的邊長為300微米。根據需要，該基板110亦可為圖案化 藍寶石基板（patterned .sapphire, sub.strate，PSS )0 如圖3所示’在外延生長區域130生長半導體發光結構140 。該半導體發光結構140包括沿遠離基板110方向依次排 列的GaN緩衝層141、η型GaN層142、InGaN/GaN多量子 阱結構143以及p型GaN層144。其中’ n型GaN層142的厚 度為4微米，p型GaN層144的厚度為〇. 1微米。控制外延 生長的條件，使相鄰的半導體發光結構140之間形成間隙 150，用以顯露出部分二氧化矽圖案層120。 如圖4所示，使用缓衝钱刻液（Buffered 〇xide Etch )去除二氧化矽圖案層120。該緩衝蝕刻液由氫氟酸與氟 表單編號A0101 第5頁/共20頁 0992080351-0 [0016] 201228024 化銨按一定的比例混合而成，其可有效對二氧化矽圖案 層120進行蚀刻。當二氧化矽圖案層120被完全去除後， 在原二氧化矽圖案層120所在的位置形成有空隙16〇。 [0017] [0018] [0019] [0020] 如圖5所示’使用氫氧化鉀溶液對半導體發光結構丨4〇進 行側向蝕刻。該氫氧化鉀溶液的濃度為2摩爾每升 (mol/L)到7摩爾每升（m〇i/L)之間，所述蝕刻的溫度小 於100度，蝕刻時間在5分鐘到30分鐘之間。該氫氧化鉀 溶液注入到半導體發光結構140之間的間隙1 5〇中，由於 液體的流動性’該氫氧化鉀溶液可進入二氧化矽圖案層 120去除後所留下的空隙16〇中：因此，氫氧化鉀溶液可 以從半導體發光結構140的側面與底部同時進行麵刻，可 有效地使半導體發光結構140形成倒錐狀的結構。所述氫 氧化鉀溶液對GaN的蝕刻過程的化學反應式如下： 2GaN+ 3Η2Ο—χ0ίί >Ga2〇3 +2碼 .: -..：...:...：： 優選地’使用2摩爾每升（mol/L)的氫氧化鉀溶液，在75 度的溫度下對半導體發光結構綱〇侧向蝕刻15分鐘，可使 半導體發光結構14 0形成倒錐狀結構，以提高半導體發光 結構140的出光效率。其中，半導體發光結構14〇的側面 與底板所在平面的夾角範圍為57度到62度之間。 如圖6所示，在半導體發光結構丨4〇的部分區域蝕刻出電 極平臺170。即將半導體發光結構140從p型〇^層144延 伸到η型GaN層142，顯露出η型GaN層142的表面。然後分 別在p型GaN層144與η型GaN層142的表面製作p型接觸電 極171與η型接觸電極172。該p型接觸電極171與n型接觸 099146772 表單編號Α0101 第6頁/共20頁 0992080351-0 201228024 '電極172與外界電源相連接，為半導體發光結構140提供 驅動電流而使其發光。 [0021] 如圖7所示，將基板110沿半導體發光結構140之間的間隙 進行切割，從而形成多個發光二極體晶粒100。 [0022] 如圖8所示，當在p型接觸電極171與η型接觸電極172兩 端施加正向電壓時，ρ型GaN層144中的空穴與η型GaN層 142中的電子將在電場的作用下在InGaN/GaN多量子阱結 構143中複合，能量以光線的形式釋放。當發出的光線傳 Q 輸到半導體發光結構140的侧面時，由於半導體發光結構 140呈倒錐狀結構，該結構可減小光線在半導體發光結構 140側面的入射角，從而減少光線在侧面發生的向下的全 反射。因此，該倒錐狀的半導體發光結構140可以避免因 光線在側面發生向下的全反射而返回發光二極體晶粒100 内部的情況，提高了發光二極體晶粒100的光出射效率。 如，從InGaN/GaN多量子阱結構143中發出的朝向半導體 .….. .. , 發光結構140頂部的入射角大於24. 6度的光線將可以在半 Q 導體發光結構140的頂部發生全反射，然後入射到半導體 發光結構140的侧面，然後從側面出射。同時，從InGaN/GaN多量子阱結構143 中發出的朝向半 導體發 光結構 140底部的入射角大於48. 6度的光線將可以在半導體發光 結構140的底部發生全反射，然後再經由半導體發光結構 140的侧面發生全反射後，從半導體發光結構140的頂面 出射。 [0023] 在上述實施例中，由於預先在半導體發光結構140的底部 形成了二氧化矽圖案層120。當使用緩衝蝕刻液（BOE) 099146772 表單編號A0101 第7頁/共20頁 0992080351-0 201228024 去除二氧切圖案層120後，半導體發光結構U0底部 GaN結構的N原子表面（_…將可以顯露出來。秋後 再利用氫氧化鉀溶液對半導體發光結構140進行側向㈣ 。此時’由於氫氧化㈣液可進入半導體發光結構140的 底部，該溶液可從半導體發光結構140的側面與底部同時 進行姓刻，加快半導體發光結構14〇形成倒錐狀結構的過 私。-般情況下上述敍刻所遺留下的敍刻面為（.H )與⑴-2-2)，這兩個面與（刚])平面之間的夾 角分別為57度與62度左右。因此，由於上賴刻過程是 在半導體發光結構14G職部與侧面料進行的，A可以 在較低的溫度下（小於100度）進行，從而縮短了關所 用的時間。 [0024] [0025] [0026] [0027] [0028] 综上所述，本發明確已符合發明專利之要件，遂依法提 出專利巾請。惟，以上所述者僅為本發明之較佳實施方 式’自不能以此限制本案之中請專利範圍。舉凡熟悉本 案技藝之人士援依本發明之精神所作之等效修飾或變化 ，皆應涵蓋於以下申請專利範面内。 【圖式簡單說明】 圖1係本發明實施例所提供的藍寶石基板的截面示意圖。 圖2係圖1中的藍寶石基板的俯視示意圖。 圖3係在圖1中的藍寶石基板上生長半導體發光結構的截 面示意圖。 圖4係對圖3中的二氧化矽圖案層進行腐蝕後的載面示意 圖。 099146772 表單編號A0101 0992080351-0 201228024 [0029] ’圖5係對圖4中的半導體發光結構進行側面腐蝕後的截面 [0030] 示意圖。 圖6係在圖5中的半導體發光結構製作電極的過程。 [0031] 圖7係將圖6中的基板切割而形成發光二極體晶粒的截面 示意圖。 [0032] 圖8係本發明實施例的發光二極體晶粒的光線出射示意圖 〇 〇 [0033] 【主要元件符號說明】 發光二極體晶粒：100 [0034] 基板：110 [0035] 二氧化矽圖案層：120 [0036] 外延生長區域：130 [0037] 半導體發光結構：140 [0038] GaN缓衝層：141 〇 [0039] η型GaN層：142 [0040] InGaN/GaN多量子阱結構：143 [0041] p型GaN層：144 [0042] 間隙：150 [0043] 空隙：160 [0044] 電極平臺：170 [0045] P型接觸電極：171 099146772 表單編號A0101 第9頁/共20頁 0992080351-0 172 201228024 [0046] η型接觸電極 099146772 表單編號Α0101 第10頁/共20頁 0992080351-0[0014] G Q [0015] FIG. 1 FIG. 5 is a schematic view showing a process of fabricating a light-emitting diode die according to the present invention. As shown in Fig. 1, . . , scare, "T first provides a substrate 110 selected from one of a sapphire substrate and a tantalum nitride substrate. A tantalum ruthenium pattern layer 120 is then formed on the substrate 110. The ceria pattern layer 120 divides the substrate 11 into a plurality of epitaxial growth regions 130. In the present embodiment, the thickness of the substrate 110 is 43 Å. The ceria pattern layer 120 is composed of a plurality of straight lines which are arranged to form a grid structure, as shown in FIG. 2 . The ceria pattern layer 120 encloses a plurality of square epitaxial growth regions 13 〇 'the line has a line width of 2 μm and the epitaxial growth region 130 has a side length of 300 μm. The substrate 110 may also be a patterned sapphire substrate (sub.strate, PSS) 0 as shown in FIG. 3 to grow the semiconductor light emitting structure 140 in the epitaxial growth region 130. The semiconductor light emitting structure 140 includes a GaN buffer layer 141, an n-type GaN layer 142, an InGaN/GaN multiple quantum well structure 143, and a p-type GaN layer 144 which are sequentially arranged in a direction away from the substrate 110. The thickness of the 'n-type GaN layer 142 is 4 μm, and the thickness of the p-type GaN layer 144 is 0.1 μm. The conditions for epitaxial growth are controlled such that a gap 150 is formed between the adjacent semiconductor light emitting structures 140 to expose a portion of the ceria pattern layer 120. As shown in FIG. 4, the ceria pattern layer 120 is removed using Buffered(R) xetch Etch. The buffer etchant is formed by mixing hydrofluoric acid and fluorine Form No. A0101 Page 5 of 20 0992080351-0 [0016] 201228024 Ammonium hydride in a certain ratio, which can effectively etch the ruthenium dioxide pattern layer 120. When the ceria pattern layer 120 is completely removed, a void 16 is formed at a position where the original ceria pattern layer 120 is located. [0020] [0020] [0020] As shown in FIG. 5, the semiconductor light emitting structure 丨4〇 was laterally etched using a potassium hydroxide solution. The concentration of the potassium hydroxide solution is between 2 moles per liter (mol/L) and 7 moles per liter (m〇i/L), the etching temperature is less than 100 degrees, and the etching time is between 5 minutes and 30 minutes. between. The potassium hydroxide solution is injected into the gap 15 5 between the semiconductor light emitting structures 140, and the potassium hydroxide solution can enter the voids 16 留下 left after the removal of the ceria pattern layer 120 due to the fluidity of the liquid: Therefore, the potassium hydroxide solution can be simultaneously engraved from the side and the bottom of the semiconductor light emitting structure 140, and the semiconductor light emitting structure 140 can be effectively formed into an inverted tapered structure. The chemical reaction formula of the etching process of the potassium hydroxide solution to GaN is as follows: 2GaN+ 3Η2Ο—χ0ίί >Ga2〇3 +2 code.: -..:...:...:: preferably 'using 2 moles The semiconductor light-emitting structure is laterally etched for 15 minutes at a temperature of 75 degrees per liter (mol/L) of the potassium hydroxide solution to form an inverted pyramid structure of the semiconductor light-emitting structure 140 to improve the semiconductor light-emitting structure 140. Light output efficiency. Wherein, the angle between the side surface of the semiconductor light emitting structure 14A and the plane of the bottom plate ranges from 57 degrees to 62 degrees. As shown in Fig. 6, the electrode platform 170 is etched in a portion of the semiconductor light emitting structure 丨4〇. That is, the semiconductor light emitting structure 140 is extended from the p-type germanium layer 144 to the n-type GaN layer 142 to expose the surface of the n-type GaN layer 142. Then, a p-type contact electrode 171 and an n-type contact electrode 172 are formed on the surfaces of the p-type GaN layer 144 and the n-type GaN layer 142, respectively. The p-type contact electrode 171 is in contact with the n-type 099146772 Form No. 1010101 Page 6 of 20 0992080351-0 201228024 'The electrode 172 is connected to an external power source to supply a driving current to the semiconductor light-emitting structure 140 to emit light. [0021] As shown in FIG. 7, the substrate 110 is cut along the gap between the semiconductor light emitting structures 140, thereby forming a plurality of light emitting diode crystal grains 100. [0022] As shown in FIG. 8, when a forward voltage is applied across the p-type contact electrode 171 and the n-type contact electrode 172, holes in the p-type GaN layer 144 and electrons in the n-type GaN layer 142 will The electric field is combined in the InGaN/GaN multiple quantum well structure 143, and the energy is released in the form of light. When the emitted light is transmitted to the side of the semiconductor light emitting structure 140, since the semiconductor light emitting structure 140 has an inverted pyramid structure, the structure can reduce the incident angle of the light on the side of the semiconductor light emitting structure 140, thereby reducing the occurrence of light on the side. Total reflection down. Therefore, the inverted tapered semiconductor light-emitting structure 140 can avoid the return of the light to the inside of the light-emitting diode die 100 due to the downward total reflection of the light on the side surface, thereby improving the light-emitting efficiency of the light-emitting diode die 100. For example, the light emitted from the InGaN/GaN multiple quantum well structure 143 toward the semiconductor ....., the incident angle of the top of the light emitting structure 140 is greater than 24.6 degrees, which may occur at the top of the half Q conductor light emitting structure 140. The reflection is then incident on the side of the semiconductor light emitting structure 140 and then exits from the side. At the same time, light rays incident from the InGaN/GaN multiple quantum well structure 143 toward the bottom of the semiconductor light emitting structure 140 having an incident angle greater than 48.6 degrees may be totally reflected at the bottom of the semiconductor light emitting structure 140, and then passed through the semiconductor light emitting structure 140. After the side surface is totally reflected, it is emitted from the top surface of the semiconductor light emitting structure 140. In the above embodiment, the ceria pattern layer 120 is formed in advance at the bottom of the semiconductor light emitting structure 140. When using buffer etchant (BOE) 099146772 Form No. A0101 Page 7 / Total 20 Page 0992080351-0 201228024 After removing the dioxin pattern layer 120, the N-atom surface of the GaN structure at the bottom of the semiconductor light-emitting structure U0 (_... will be revealed After the autumn, the semiconductor light-emitting structure 140 is laterally (4) by using a potassium hydroxide solution. At this time, since the hydrogen (four) liquid can enter the bottom of the semiconductor light-emitting structure 140, the solution can be simultaneously performed from the side and the bottom of the semiconductor light-emitting structure 140. The surname is engraved, and the semiconductor light-emitting structure 14加快 is accelerated to form an inverted cone-shaped structure. In general, the above-mentioned narration is left with (.H) and (1)-2-2). The angle between the planes is about 57 degrees and 62 degrees. Therefore, since the upper etching process is performed on the semiconductor light emitting structure 14G and the side material, A can be performed at a lower temperature (less than 100 degrees), thereby shortening the time taken for the off time. [0028] In summary, the present invention has indeed met the requirements of the invention patent, and the patent towel is required according to law. However, the above description is only a preferred embodiment of the present invention, which is not intended to limit the scope of the patent application in this case. Equivalent modifications or variations made by those skilled in the art in light of the spirit of the invention are intended to be included in the following claims. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic cross-sectional view of a sapphire substrate provided by an embodiment of the present invention. 2 is a top plan view of the sapphire substrate of FIG. 1. Fig. 3 is a schematic cross-sectional view showing the growth of a semiconductor light emitting structure on the sapphire substrate of Fig. 1. Fig. 4 is a schematic view of a carrier surface after etching the cerium oxide pattern layer of Fig. 3. 099146772 Form No. A0101 0992080351-0 201228024 [0029] FIG. 5 is a schematic cross-sectional view of the semiconductor light emitting structure of FIG. 4 after side etching. Figure 6 is a process of fabricating an electrode in the semiconductor light emitting structure of Figure 5. [0031] FIG. 7 is a schematic cross-sectional view showing the substrate of FIG. 6 cut to form a light-emitting diode die. 8 is a schematic diagram of light emission of a light-emitting diode die according to an embodiment of the invention [0033] [Explanation of main component symbols] Light-emitting diode die: 100 [0034] Substrate: 110 [0035] Cerium oxide pattern layer: 120 [0036] Epitaxial growth region: 130 [0037] Semiconductor light-emitting structure: 140 [0038] GaN buffer layer: 141 〇 [0039] η-type GaN layer: 142 [0040] InGaN/GaN multiple quantum well Structure: 143 [0041] p-type GaN layer: 144 [0042] Gap: 150 [0043] Void: 160 [0044] Electrode platform: 170 [0045] P-type contact electrode: 171 099146772 Form No. A0101 Page 9 of 20 Page 0992080351-0 172 201228024 [0046] n-type contact electrode 099146772 Form number Α 0101 Page 10 / Total 20 page 0992080351-0