TW201227662A - Method of compensating pixel voltage for a display panel and the structure thereof - Google Patents

Method of compensating pixel voltage for a display panel and the structure thereof Download PDF

Info

Publication number
TW201227662A
TW201227662A TW99146179A TW99146179A TW201227662A TW 201227662 A TW201227662 A TW 201227662A TW 99146179 A TW99146179 A TW 99146179A TW 99146179 A TW99146179 A TW 99146179A TW 201227662 A TW201227662 A TW 201227662A
Authority
TW
Taiwan
Prior art keywords
voltage
pixel
compensated
compensation
common electrode
Prior art date
Application number
TW99146179A
Other languages
Chinese (zh)
Other versions
TWI424406B (en
Inventor
Yi-Hsuan Cheng
Teng-Chieh Yang
Chia-Lin Liu
Wen-Chih Tai
Original Assignee
Chunghwa Picture Tubes Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Chunghwa Picture Tubes Ltd filed Critical Chunghwa Picture Tubes Ltd
Priority to TW99146179A priority Critical patent/TWI424406B/en
Publication of TW201227662A publication Critical patent/TW201227662A/en
Application granted granted Critical
Publication of TWI424406B publication Critical patent/TWI424406B/en

Links

Abstract

The present invention discloses a method of compensating pixel voltage for a display panel, which includes: constructing a compensating chart of pixel voltage in a look up table unit; determining a compensated gray value of a pixel under compensation based on the compensating chart of the pixel voltage by a timing control unit; transmitting the compensated gray value to a source controller by the timing control unit; corresponding the compensated gray value to a compensated voltage by the source controller; transmitting the compensated voltage to the pixel under compensation by the source controller.

Description

201227662 六、發明說明: 【發明所屬之技術領域】 多開Ϊ:::係關於一種電虔補償方法,特別係關於掃描線 夕间木構顯不面拓之查冬φ两 阳伋之畫素電壓補償方法。 【先前技術】 光源不;先的液晶顯不器本身不會自行發光,因此在外 所’必須使用照明的方式來發光。例如,手201227662 VI. Description of the invention: [Technical field to which the invention belongs] Multi-opening::: relates to an electric enthalpy compensation method, in particular to the picture of the winter φ two yang 汲 关于 关于 扫描Voltage compensation method. [Prior Art] The light source is not; the first liquid crystal display itself does not emit light by itself, so it must be illuminated by means of illumination. For example, hand

ΙΓΓ11使關單的切料為㈣;汽車電錶或 、、“而機等所使用的液晶顯示器係由後方的照明光源發 能得到鮮明的顯示。這些在背面❹薄型白色光源 名工、稱為月光(Back Light)。-般的液晶顯示器係利用彩 色滤光片過瀘、光源,使單一畫素同時顯示三原色之成分, ^顯不所需色彩。在此種具彩色濾光片之液晶顯示器中, 母個晝素均係由三個子畫素(sub_pixei)組合而成,以分別 對應至彩色濾、光片之紅、綠及藍色濾光片,而人眼接收光 ,通過彩色渡光片後所顯示出的紅、綠及藍光,即可將其 此合’進而感知得此畫素的色彩。然而,#色濾光片會影 響液晶顯示器整體的光穿透率,此外’彩色遽光片亦影響 液晶顯不器之單一晝素的顯示點(d〇t)尺寸大小,導致液晶 顯示器的解析度受到彩色濾光片的限制。 為了改善上述解析度與光穿透率等問題,現今遂發展 出一種色序法(Color Sequential)液晶顯示器。色序法液晶 顯示器可依序顯現出一個畫素的三個原色成分而呈現出色 衫。此種色序式液晶顯示器之每個畫素藉由三個發光源, 201227662 分別發出紅、綠及藍光以作為背光源。在一圖框時間中, 此晝素可依據顯示資料分別對應開啟紅、綠及藍光。 2眼的視覺暫留’人即可辨識出此畫素的色彩。因此,色 序法液晶顯示器不需設置彩色渡光片,且由於色 個畫素的尺寸小於具彩色據光片之液晶顯示; 高解析度。 序法液曰曰顯不為可降低成本,且可提 色:法液晶顯示器之畫素是依據其控制 知描訊號與資料訊號, ^座生之 晶顯示写像。此外,此種色序式液 二 素必須藉由三原色發光源,分別於同-ΙΓΓ11 makes the cutting of the cut order (4); the electric meter used in the car electric meter or the "machine" is clearly displayed by the rear illumination source. These thin white light sources on the back are called moonlight. Back Light). The general liquid crystal display uses a color filter to pass through the light source, so that a single pixel simultaneously displays the components of the three primary colors, and displays an undesired color. In such a liquid crystal display with a color filter, The parental element is composed of three sub-pixels (sub_pixei), which respectively correspond to the color filter, the red, green and blue filters of the light film, while the human eye receives the light and passes through the color light film. The displayed red, green and blue light can be combined to 'receive the color of the pixel. However, the # color filter will affect the overall light transmittance of the liquid crystal display, in addition, the 'color color film It also affects the size of the display point (d〇t) of a single element of the liquid crystal display, which causes the resolution of the liquid crystal display to be limited by the color filter. In order to improve the above resolution and light transmittance, etc. development of A color Sequential liquid crystal display. The color sequential liquid crystal display can sequentially display three primary color components of one pixel to present an excellent shirt. Each of the pixels of the color sequential liquid crystal display is provided by three The light source, 201227662 emits red, green and blue light respectively as backlights. In the frame time, the pixels can respectively turn on red, green and blue according to the display data. The visual persistence of 2 eyes can be recognized by people. Therefore, the color sequential liquid crystal display does not need to be provided with a color light-emitting sheet, and the size of the color pixel is smaller than that of the liquid crystal display with a color light film; high resolution. It can not reduce the cost, and can be improved: the pixel of the liquid crystal display is based on its control signal and data signal, and the crystal display of the seat is displayed. In addition, the color sequence liquid must be composed of three primary colors. Light source, respectively in the same -

圖框發出紅、綠及諮杏 J . 4 先以作為背光源,以顯示出彩色影像, 口此母一掃描訊號需在每一 ’、像 -顏色背光源,故色序法液=顯不_必須掃描每 必須槎# 序法液日日顯示器之掃描速度(或頻率) 义从升至傳統液晶顯示器的3倍。 半) 解決色序法液晶顯示器所需的高頻問題,-種掃 私線多開的面板架構因應而生種知 線同時開啟並同時_ 、 σ係將夕條掃描 晝素,進而描4 時開關多條掃描線上的 開之架S==r。具體而言,以掃描線三 掃描線之開關時間量與傳統架構相同,且 開、關-條::=:而傳統液晶顯示器-次只 線三開架構因此,在相 卞攝所此知描之晝素量為傳統 描所有畫素的時間僅為傳統架構的三;之一::此故二 4 201227662 架構3倍。故’利用掃描線多開之 顯示器的顯二質s的掃描頻率,進而提升色序法液晶 題,若用於色開木構易發生畫素電容耦合量不均之問 格現象,若用於夜晶顯示器中,易產生明顯的彩色棋盤 問題。且體而」=晶顯示器中,則易造成晝面閃爍的 開架構,由圖中可觀師▲— 勹種…田線一 規察讦知,在tl至t2的時間内,掃描 扩線GiPU、^4會同時Μ開啟’同時在t2關閉,掃 :關的瞬二_ ’而由於掃描線㈣3、及G4從開 ’曰’在电何守恆的情況下’晝素電極上的電荷不再 邊入貝料線’則會造成電容麵合效應的產生,此效應會反 映在晝素及掃描線之間的雜散電容Cpg上,進而影響書 的顯:電屋,由圖j可看出,由於掃描線⑺值為關閉:、 故電谷Cpgl將無電容耦合效應的問題,而掃描線Q合從 開啟轉為關閉,故Cpg2會產生電容麵合效應,因此 顯示錢vdispI會受_合至掃描線G2的電容如2影 響,同理可知,第二顯示電塵Vdlsp2則會受到耦合至掃描 線G2的電容Cpg2,及耦合至掃描線⑺的電容所影 $ ’而第三顯示電塵Vdisp3會受到輕合至掃描線G3的電 容Cpg3’及耦合至掃描線G4的電容Cpg4所影響。由上述 可知,第一顯示電壓Vd1Spl僅受到一個雜散電容的影響, 而第二顯示電壓Vdisp2及第三顯示電壓Vdisp3則受到兩 個雜散電容的影響,& Vdispl受電容耗合效應的影響轉 5 201227662 小,進而導致三顆晝素顯示電壓的不對稱程度不一致,造 成共電極電廢調整上的困難’俾使共電極電壓無法收敛^ 進而在色序法顯示器造成彩色棋盤格現象,在一般液晶顯 示器造成晝面閃爍的現象。 由於電容耦合量不同所造成晝素顯示電壓的不對稱程 度不一致。若搭配色場的點轉換與共電極電壓的調整方 式’會導致原本應顯示灰階的晝面顯示為彩色棋盤格,舉 例而言,其三種通常例示之態樣分別顯示於圖2的第一態 鲁樣、第二態樣及第三態樣,其中,將共電極電壓調整至第 一態樣時,可使得第一顯示電壓Vdispl對稱,進而可顯示 正常灰階,然而第二顯示電壓Vdisp2及第三顯示電壓The frame emits red, green and apricot J. 4 first as a backlight to display a color image. The mother scans the signal at each ', image-color backlight, so the color sequence liquid = display _The scanning speed (or frequency) of each day must be scanned. The scanning speed (or frequency) of the daily display is increased to 3 times that of the conventional LCD. Half) Solving the high-frequency problem required for color-sequential liquid crystal display, - the panel structure of the multi-sweep line is opened and the seed line is opened at the same time and _, σ system will scan the celestial layer, and then trace the 4 Switch the open frame S==r on multiple scan lines. Specifically, the switching time of the three scan lines of the scan line is the same as that of the conventional architecture, and the on/off-bar::=: and the conventional liquid crystal display-the third-line three-open architecture is thus known. The amount of the prime is the traditional three of the traditional architecture; one of the following:: This is the second 4 201227662 architecture 3 times. Therefore, the scanning frequency of the display binary s of the display with the scanning line is increased, thereby improving the color-sequence liquid crystal problem, and if it is used for the color-opening wood structure, the phenomenon of uneven coupling of the pixel capacitance is likely to occur, if used In the night crystal display, it is easy to produce an obvious color checkerboard problem. And the body" = crystal display, it is easy to cause the open frame of the flashing of the face, from the figure in the figure ▲ 勹 勹 ... 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 tl tl tl tl tl tl tl tl ^4 will simultaneously turn on 'At the same time turn off at t2, sweep: off the second instant _' and because the scan line (4) 3, and G4 from the open '曰' in the case of electricity and conservation, the charge on the element of the halogen is no longer Into the shell line' will cause the capacitance surface effect, this effect will be reflected in the stray capacitance Cpg between the halogen and the scan line, which will affect the book's display: electric house, as can be seen from Figure j, Since the scan line (7) value is off:, the electric valley Cpgl will have no capacitive coupling effect, and the scan line Q will turn from on to off, so Cpg2 will produce a capacitive surface effect, so the display money vdispI will be affected by The capacitance of the scanning line G2 is affected by 2, and similarly, the second display electric dust Vdlsp2 is subjected to the capacitance Cpg2 coupled to the scanning line G2, and the capacitance coupled to the scanning line (7) and the third display electric dust Vdisp3. Capacitor Cpg3' that is lightly coupled to scan line G3 and capacitor Cpg4 coupled to scan line G4 influences. As can be seen from the above, the first display voltage Vd1Spl is only affected by one stray capacitance, and the second display voltage Vdisp2 and the third display voltage Vdisp3 are affected by two stray capacitances, and & Vdispl is affected by the capacitance consuming effect. Turn 5 201227662 small, which leads to the inconsistency of the asymmetry of the voltage display of the three halogens, which makes the adjustment of the common electrode electric waste 'the common electrode voltage can not converge ^ and thus cause the color checkerboard phenomenon in the color sequential display. Generally, the liquid crystal display causes the flickering of the face. The degree of asymmetry of the display voltage of the halogen is inconsistent due to the difference in the amount of capacitive coupling. If the point conversion with the color field and the adjustment method of the common electrode voltage 'will result in the display of the gray surface that should be displayed as a color checkerboard, for example, the three commonly illustrated aspects are shown in the first figure of FIG. 2, respectively. The state, the second state, and the third aspect, wherein the first display voltage Vdispl is symmetrical when the common electrode voltage is adjusted to the first state, and the normal gray scale is displayed, but the second display voltage Vdisp2 And the third display voltage

Vdisp3則仍無法對稱,而無法顯示正常灰階;若將共電極 電壓調整至第二態樣時,雖可使得第二顯示電壓Vdisp2 及第三顯示電壓Vdisp3對稱,但是卻造成第一顯示電壓Vdisp3 is still not symmetrical, and cannot display the normal gray scale; if the common electrode voltage is adjusted to the second state, the second display voltage Vdisp2 and the third display voltage Vdisp3 can be made symmetric, but the first display voltage is caused.

Vdispl無法對稱,而無法顯示正常灰階。因此,第一態樣 泰與第二態樣的晝面會因部分晝素的顯示電壓不對稱而產生 彩色棋盤格的現象,進而造成畫面的橫條紋感,因此為了 使彩色棋盤格的現象與橫條紋感沒這麼明顯,選擇折衷的 第二態樣的共電極電壓調整方式,但是彩色棋盤格現象依 然存在。 ” vT、上所述’在習知的掃描線多開架構中,仍存在一些 困難及缺點,以待克服。 【發明内容】 為克服上述之困難及缺點,本發明提供一種畫素電壓 201227662 之補償方法,特別係用於掃描線多開架構之畫素電壓補償 方法。 本發明之一目的為在色序法液晶顯示器中,改善掃描 線多開架構所造成的彩色棋盤格現象及橫條紋感。 本發明之另一目為在一般液晶顯示器中,改善掃描線 多開架構所造成的畫面閃爍及直流殘留的問題。 為了達到上述目的,本發明提供一種用於面板之畫素 電壓補償方法,其中,上述面板具有複數畫素群,每一上 述複數晝素群包括一第一晝素及複數其他畫素,本發明之 ^驟·首先,利用一查表單元(look up table unit)建立 一畫素電壓補償表;然後,利用一時序控制單元根據上述 ^素電壓補償表決定上述第—晝素之—補償後灰階值;接 著利用上述時序控制單元將上述補償後灰階值傳送至一 源極控制器;再來,利用上述源極控制器將上述補償後灰 階值對應至一補償後電壓;最後,利用上述源極控制器將 #上述補償後電壓輸出至上述第一晝素。其中,上述第—晝 素及複數其他畫素所耦接閘極線均同時開啟及關閉,亦即 掃榣線多開之架構。本發明所揭露之晝素電壓補償表係透 過下列方法所建立,其步驟如下所述:首先,設定一第二 共電極電壓,使其他晝素呈灰階;接著,設定一第一共電 極電壓,使第一晝素呈灰階;然後,將上述第一共電極電 壓與上述第二共電極電壓之差值定義為一補償電壓;再 來,將第一晝素之顯示電壓減去上述補償電壓,以得到— 補償後電壓;最後,將上述補償後電壓對應至上述補償今 201227662 二:白值β在本方法中,第二共電極電壓係定為收斂後之丑 電極電壓,亦即整個面板之共電極電遷辛 畫素均呈灰階,因此,欲解決的問二= 第一畫素也呈灰階。藉由上述方法,本發 素的t 一灰階值之正極性及負極剛,分別:定;; 之仙後灰階值,以建立畫素電壓補償表,接著,由Vdispl cannot be symmetrical and cannot display normal gray levels. Therefore, the first aspect of the Thai and the second aspect of the facet will produce a color checkerboard phenomenon due to the asymmetry of the display voltage of some of the elements, thereby causing the horizontal stripe of the picture, so in order to make the color checkerboard phenomenon The horizontal stripe is not so obvious, and the co-electrode voltage adjustment method of the second aspect of the compromise is selected, but the color checkerboard phenomenon still exists. In the conventional scan line multi-open architecture, there are still some difficulties and shortcomings to be overcome. SUMMARY OF THE INVENTION To overcome the above difficulties and shortcomings, the present invention provides a pixel voltage 201227662. The compensation method is especially a pixel voltage compensation method for a scanning line multi-open structure. One of the objects of the present invention is to improve the color checkerboard phenomenon and the horizontal stripe feeling caused by the multi-open structure of the scanning line in the color sequential liquid crystal display. Another object of the present invention is to improve the image flicker and DC residual caused by the multi-open structure of the scanning line in a general liquid crystal display. To achieve the above object, the present invention provides a pixel voltage compensation method for a panel, wherein The panel has a plurality of pixel groups, each of the plurality of pixel groups includes a first pixel and a plurality of other pixels, and the first step of the present invention first establishes a picture by using a look up table unit a voltage compensation table; then, using a timing control unit to determine the first-order-graded grayscale value according to the above-mentioned voltage compensation table; And transmitting the compensated grayscale value to a source controller by using the timing control unit; and, by using the source controller, the compensated grayscale value is corresponding to a compensated voltage; and finally, using the source The controller outputs the above-mentioned compensated voltage to the first element, wherein the first and second pixels coupled to the gate line are simultaneously turned on and off, that is, the structure of the broom line is opened. The pixel voltage compensation table disclosed in the present invention is established by the following method, and the steps are as follows: first, setting a second common electrode voltage to make other halogens are gray scale; then, setting a first common electrode voltage The first pixel is gray-scaled; then, the difference between the first common electrode voltage and the second common electrode voltage is defined as a compensation voltage; and then, the display voltage of the first pixel is subtracted from the compensation Voltage, to obtain - compensated voltage; finally, the above compensated voltage corresponds to the above compensation today 201227662 2: white value β In this method, the second common electrode voltage is determined to be ugly after convergence The voltage, that is, the common electrode of the entire panel, is gray-scaled. Therefore, the second pixel to be solved is also gray-scale. By the above method, the t-gray value of the present element The positive polarity and the negative polarity, respectively: fixed;; after the fairy gray value, to establish a pixel voltage compensation table, then, by

此畫素電壓補償表輸出補償後灰階值至源極 ^再由源極控制器產生-相應之補償後電壓並傳送 =-晝素,使得第一晝素呈灰階,且由於其他晝素均呈 义F白’故可消㈣色棋盤格現象及畫面閃爍的問題。 上述方法係針對每一畫素群之第一晝素做電壓補償, r二=明亦可針對每一晝素群之其他晝素做電壓補 ^步驟如下所述:首先,利用―查表單元建立一 ,壓補償表;然後,利用一時序控制單元根據上述畫=電 ,補償表決定上述複數其他畫素之—補償後灰階值;接 利用上述時序控制單元將上述補償後灰階值傳送至一 源極控制H ;再來,洲上述源極㈣器將 階值對,至-補償後電㈣後,利用上述源極控二: 上j補乜後電壓輪出至上述複數其他畫素。在本方法中, 第、電極電壓係定為收敛後之共電極電壓,亦即 板之共電極電壓’故僅有每畫素群中的第一晝素呈灰階, 口此奴解決的問題在於如何使其他晝素也呈灰階。藉由 上述方法,本發明可針對複數其他畫素的每一灰階值2正 極性及負極性電壓’分別設定一對應之補償後灰階值,以 201227662 ΪΙΐίΐΐΓΓ,接著,由時序控制單元根據此晝素 電貝表可輪出補償後灰階值至源極控制器,藉此產生 償後電壓傳送至複數其他畫素,使得複數其他 晝素呈灰階,且由於每-晝素群中第-畫素均呈灰階,故 可㈣彩色棋盤格現象及畫面閃爍的問題。 於t發明之另一觀點中,更提供一種面板架 二一、Γ資料傳輸率同步動態隨機存取記憶體⑽R 述.供-祖:處理影像訊號;一時序控制單元,耦合至上 :俊;二:一Γ率。同步動態隨機存取記憶體’並接收上述 〜、° k二一 一表單70,耦合至上述時序控制單元,其中, 上述查表單元具有一晝素電壓補償表,用 償後灰階值;一源極控制器,輕合至上述時序控制單元 以接收由上述時序控制單元所輸出之上述至少一補償後灰 :皆值’並輸出複數源極訊號至複數資料線;及一閉極控制 =播=至上述時序控制單元,以輸出複數閘極訊號至複 知描線,其中’上述複數源極訊號包含至少—補償後電 壓,其係由上述源極控制器根據上述補償後灰階值決定r 错此,本發明之面板架構可根據畫素電壓補償表將補償後 電屢傳至每個欲補償之晝素,使其呈灰階,進而消㈣色 祺盤格現象及畫面閃爍的問題。 〜以上所述係用以闡明本發明之目的、達成此目的之技 術手;又以及其產生的優點等等。而本發明可從以下較佳 實施例之敘述並伴隨後附圖式及申請專利· 更加清楚了解。 201227662 【實施方式】 解釋ί:!將以較佳實施例及觀點加以敘述,此類敘述係 明之申-糞非用以限制本發 太菸昍:圍。因此,除說明書中之較佳實施例以外, 本發明亦可廣泛實行於其他實施例中。 “本發明係揭露—種用於面板之畫素電壓補償方法,盆 错由建構一晝素雷厭 、 ~ 補佔表,並由時序控制單元利用查表 ’針對顯7F電壓錯誤之畫素進行電壓 改變顯示電壓錯誤之〜㈣稭以 欲顯示之灰階,進而而使此晝素呈現 4坪於色棋盤格及畫面閃爍之現象。The pixel voltage compensation table outputs the compensated grayscale value to the source^ which is then generated by the source controller-corresponding to the compensated voltage and transmits the =- halogen, so that the first pixel is grayscale and due to other elements Both of them are represented by F-white, so they can eliminate the problem of the color of the checkerboard and the flickering of the screen. The above method performs voltage compensation for the first element of each pixel group, and r== can also perform voltage compensation for other elements of each pixel group as follows: First, use the “check table unit” Establishing a pressure compensation table; then, using a timing control unit to determine the compensated grayscale value of the plurality of other pixels according to the above-mentioned picture=electricity; and transmitting the compensated grayscale value by using the timing control unit To a source control H; again, the above-mentioned source (four) of the continent will be the value of the pair, after the compensation of the power (four), using the above source control two: after the j complement, the voltage is rounded to the above plurality of other pixels . In the method, the first electrode voltage is determined as the convergence of the common electrode voltage, that is, the common electrode voltage of the plate, so that only the first element in each pixel group is gray-scale, and the slave solves the problem. It is how to make other elements also grayscale. By the above method, the present invention can respectively set a corresponding compensated grayscale value for each grayscale value 2 positive polarity and negative polarity voltage of the other pixels, to 201227662 ΪΙΐίΐΐΓΓ, and then, according to the timing control unit The alizarin electric meter can rotate the compensated gray scale value to the source controller, thereby generating the post-compensation voltage and transmitting it to the plurality of other pixels, so that the plurality of other alizarins are gray-scale, and because each of the alizarin groups - The pixels are grayscale, so (4) the phenomenon of color checkerboard and the flickering of the screen. In another aspect of the invention of the invention, a panel frame is provided, and a data transmission rate synchronous dynamic random access memory (10) R is described. The ancestor: processing the image signal; a timing control unit coupled to the upper: Jun; : A rate. Synchronizing the dynamic random access memory' and receiving the above-mentioned ~, ° k two-one form 70, coupled to the timing control unit, wherein the look-up unit has a pixel voltage compensation table, and the used grayscale value; a source controller, coupled to the timing control unit to receive the at least one compensated gray outputted by the timing control unit: a value of 'the total source signal to the plurality of data lines; and a closed-loop control=broadcast = to the timing control unit to output a plurality of gate signals to the complex trace, wherein 'the plurality of source signals include at least the compensated voltage, which is determined by the source controller according to the compensated gray scale value Therefore, the panel structure of the present invention can repeatedly transmit the compensated power to each pixel to be compensated according to the pixel voltage compensation table, so that it is gray-scaled, thereby eliminating the problem of the (four) color disk phenomenon and the flickering of the picture. The above description is for explaining the object of the present invention, the technical hand for achieving the object, the advantages thereof, and the like. The present invention will become more apparent from the following description of the preferred embodiments and the accompanying drawings and claims. 201227662 [Embodiment] Explanation ί:! will be described in terms of preferred embodiments and viewpoints, and such descriptions are intended to limit the present invention. Therefore, the present invention may be widely practiced in other embodiments in addition to the preferred embodiments in the specification. "The present invention discloses a pixel voltage compensation method for a panel. The basin error is constructed by a singularity, a replenishment table, and the timing control unit uses a look-up table for the pixel of the 7F voltage error. The voltage change shows that the voltage error is ~ (4) straw in the gray scale to be displayed, and thus the element appears to be 4 pings in the color checkerboard and the picture flickers.

本發明可應用之而起7 A 面板可包含,但不侷限於,色序法液晶顯 不為0 百先况明本發明用以執行晝素電壓補償方法之面板架 :請參閱圖3所示’本圖係揭露本發明面板架構之較佳 其包含—處理裝置1G卜—時序控制電路板102、 一連接103、一書面智左 —面暫存态(frame buffer) 1〇4、一特殊應 積肢電㉟ 1G5(a—㈣脱 integrated circuit, =)、-雙倍資料傳輸率同步動態隨機存取記憶體(職 AM)106、—查表單元1G7、—時序控制單元108、-一amma 1C 109、一閉極控制器"〇、一源極控制器⑴及 』不面板112。上述之處理裝置1〇1可包含,但不侷限 =,電腦或筆記型電腦等運算處理裝置,其目的在於傳送 原始影像訊號給時序控制電路板1〇2,而時序控制電路板 匕3連接器103、晝面暫存器j 〇4、特殊應用積體電路 10 201227662 (AS1C) 1G5、及Gamma IC1()9。上述特殊應用積體電路(址) 105更包含DDR控制單元1〇6、查表單元ι〇7、及時序控 制單元1〇8。連接器103係電性輕合至處理裝置ι〇ι,以接 收原始影像訊號’具體而言’可利用咖^社連接此連 接器⑼與處理裝置101以進行訊號傳輸,連接器ι〇3接 收原始影像訊號後可將其傳輸至特殊應用積體電路1〇5 中的DDR控制單元1〇6,而此贿控制單元⑽可將所 接收之原始影像訊號傳至畫面暫存器1G4進行重新排列, 而DDR控制早疋1()6隨之將重新排列後之影像訊號讀 回’並傳遞於時序控制單元1〇8。查表單元mi有一主 素電壓補償表,其可針對任何欲補償電壓之 々 :灰階值、原始電壓、欲補償電壓、補償後電壓 灰靠所構成之資料或數據,此補償表之目的在於調整因 電谷輕合量不均所導致顯示電壓錯誤之晝素,提供苴正確 的顯示電壓,使其顯示正確的灰階,進而克服晝面閃爍、 及彩色棋盤格之問題。關於此畫素電壓補償表之詳細技術 Γ二,本說明書後續部分另外敘明。而時序控制單元 108係耦合至閘極控制器11〇及源極控制器⑴,盆係用以 :源極訊號及閘極訊號分別提供給源極控制器⑴及間極 二制杰:。具體而言’源極訊號為迷你低電壓差動訊號 (mim-LVD),而閘極訊號包令舵 ΓΓΚν、μ 現已3起始心虎(stv)及基頻訊號 源極控制器111再將源極訊號輸出至複數 制11110則將閉極訊號輸出至複數掃描 错以決疋顯示面板112中所有畫素的顯示電愿及開關 201227662 時間,其中’源極訊號包含至少一補償後電麼,其係由源 ,控制n 根據時序控制單元⑽所傳送之補償後灰階 i斤决々用以4整因電容搞合量不均所導致顯示電麼錯 2之晝素,使其顯示正確的灰階,進而消弭彩色棋盤格及 :面閃蝶之現象。GammaIclG9係用以決定畫素灰階值所 、應之電壓’並將此對應關係傳送給源極控制器111,例 如’於Gamma IC中可定義第一畫素的3〇個灰階值所對應 之電壓,並將此對應關係傳輸至源極控制器⑴中,而源 /工制5 111貝|J可根據上述30個灰階值的對應關係計算出 斤有灰階值所對應之電壓,而此技術並非本發明之特徵所 在’於本文將不詳加贅述。 請參閱圖4所示,本圖揭露本發明基於上述之架構所 應用於面板畫素電壓補償方法之較佳實施例,其中,本方 斤適用之面板較佳為掃描線多開式架 =於,掃描線三開、四開、五開...N開等等、。具體而疒The invention can be applied to the 7 A panel, but is not limited to, the color sequential liquid crystal display is not 0. The panel frame of the present invention for performing the pixel voltage compensation method is shown in FIG. The present invention discloses a preferred embodiment of the panel structure of the present invention. The processing device includes a processing device 1G, a timing control circuit board 102, a connection 103, a written wisdom left-plane buffer, a frame buffer, a special response. Limb power 35 1G5 (a-(four) de-integrated circuit, =), - double data transmission rate synchronous dynamic random access memory (job AM) 106, - look-up unit 1G7, - timing control unit 108, - amma 1C 109, a closed-end controller "〇, a source controller (1) and a non-panel 112. The processing device 1〇1 described above may include, but is not limited to, an arithmetic processing device such as a computer or a notebook computer, the purpose of which is to transmit the original image signal to the timing control circuit board 1〇2, and the timing control circuit board 匕3 connector 103, face buffer register j 〇 4, special application integrated circuit 10 201227662 (AS1C) 1G5, and Gamma IC1 () 9. The special application integrated circuit (address) 105 further includes a DDR control unit 1-6, a lookup unit ι7, and a timing control unit 〇8. The connector 103 is electrically connected to the processing device ι〇ι to receive the original image signal. Specifically, the connector (9) and the processing device 101 can be connected for signal transmission, and the connector ι 3 receives. The original image signal can be transmitted to the DDR control unit 1〇6 in the special application integrated circuit 1〇5, and the bribe control unit (10) can transmit the received original image signal to the picture register 1G4 for rearrangement. The DDR control is as early as 1 () 6 and then the rearranged image signal is read back ' and passed to the timing control unit 1〇8. The look-up table unit mi has a main component voltage compensation table, which can be used for any data or data to be compensated for: the gray scale value, the original voltage, the voltage to be compensated, and the voltage after the compensation. The purpose of the compensation table is Adjusting the quality of the display voltage error caused by the unevenness of the electric valley, providing the correct display voltage to display the correct gray scale, thereby overcoming the problem of flashing of the face and the color of the checkerboard. Detailed techniques for this pixel voltage compensation table are described in the subsequent sections of this manual. The timing control unit 108 is coupled to the gate controller 11 and the source controller (1), and the basin system is configured to: the source signal and the gate signal are respectively supplied to the source controller (1) and the interpole diode: Specifically, the 'source signal is a mini low voltage differential signal (mim-LVD), and the gate signal package makes the rudder ΓΓΚ ν, μ now 3 start heart (stv) and the base frequency signal source controller 111 Outputting the source signal to the complex system 11110 outputs the closed-circuit signal to the complex scan error to determine the display power of all the pixels in the display panel 112 and the switch 201227662 time, where the 'source signal contains at least one compensation power? It is controlled by the source, and the n is compensated according to the timing control unit (10). The gray scale is used to compensate for the unevenness of the 4 factor capacitors. The grayscale, in turn, eliminates the phenomenon of colored checkerboards and: the face of the butterfly. GammaIclG9 is used to determine the voltage of the pixel grayscale value and transmit the corresponding relationship to the source controller 111. For example, the corresponding grayscale values of the first pixel can be defined in the Gamma IC. Voltage, and the corresponding relationship is transmitted to the source controller (1), and the source/work system 5 111 Å | J can calculate the voltage corresponding to the gray scale value according to the correspondence relationship of the above 30 gray scale values, and This technique is not a feature of the present invention and will not be described in detail herein. Referring to FIG. 4, the present invention discloses a preferred embodiment of the panel pixel voltage compensation method according to the above-mentioned architecture, wherein the panel to which the square is applied is preferably a scanning line multi-opening frame= The scanning line is three open, four open, five open, N open, and so on. Specifically

St:複數畫素群,每一晝素群包括-[畫素及複 音A _二,舉例而言’若掃描線為三開架構,則其他晝 : 右為知描線四開架構’則有三個其他畫素數目為 ^金^:此類推’可知若掃描線為N開架構,則有(Ν_υ個其 ^ A '者’上述第—晝素及其他晝素所連接的閑 同時開啟及關閉’而本實施例之面板共電極電壓係 :::使其他畫素顯示電壓對稱之電壓,亦即使複數其 ^ f確灰階之電壓,舉例而言,在掃描線三開架 可使第2、3顆畫素顯示電壓對稱,如圖2中的第二 201227662 態樣所顯示。於此態樣下, 畫辛之顯-f Γ· ^ 本貫施例之目的在於使第1顆St: complex pixel group, each element group includes -[pixels and polyphonic A _ 2, for example, if the scan line is a three-open architecture, then the other 昼: right is a known line four open architecture' then there are three The number of other pixels is ^金^: This type of push knows that if the scan line is N-opened, then there are (Ν_υ一^^'' the above-mentioned first---------------------------- In the embodiment, the panel common electrode voltage system::: causes other pixels to display a voltage symmetrical voltage, and even if the voltage is a plurality of gray voltages, for example, the scan line three open frames can make the second and third The pixels show voltage symmetry, as shown in the second 201227662 aspect of Figure 2. In this aspect, the symplectic display -f Γ· ^ The purpose of this example is to make the first

St 亦為對稱,其步驟係如下所述:首先,參 芦於步驟2〇1中’利用查表單元預先建立之書辛電 壓補償表,使得杳矣罝;π 。疋儿<旦系电 針對所有灰階值^㈣ 何欲補償—之畫素’ 值、原始電壓、欲補償^及負=電^建立由原始灰階 所槿忐夕次纟,丨·+ 補鉍後電壓及補償後灰階值 不均所// 據表袼,其目的在於調整因電容箱合量 不句所導致顯不電壓錯誤 壓,使苴顧-τ企从― 旦素‘供其正確的顯示電 盤格之問題。於太竇m 士 / 门禪及π色棋 技 本“e例中,係針對第-晝素之每一灰階 值之正極性電壓及負極性 後,於步驟2021利素電塵補償表;然 表決定第-書辛之補制早兀根據晝素電屬補償 一素之補仏後灰階值。具體而言,當欲控 -旦素顯示第一灰階時’例如正極性電塵下 f始灰階值為88,則時序控制單元會查詢畫素補償2 原始灰I5白值8 8所對應之補償後灰階值,例如正極性電壓 下之100灰階’則補償後之灰階值為100 ;接著,於步驟 203中利用日守序控制單元將補償後灰階值傳送至源極押 制器’其中此補償後灰階值即係由時序控制單元杳詢佥^ 電壓補償表所得到的值’例如上述之1〇〇。然後7於二驟 2〇4中’利用源極控制||將補償後灰階值㈣至補償後 壓,具體而言,由於源極控制器中具有各個灰階值 電壓之對應_’故其接收所得到之任何灰階值,均可ς 應轉換為電壓’故可在源極控制器中,將時序控制單元傳 [ 13 201227662 送的補償後灰階值對應轉換為一電壓值,而此電 補償後電壓。最後,於步驟205中,利用源極控制器將: 步驟204所得到的補償後電壓輸出至第一畫素,進而改變 第一晝素之顯示電壓,传並供酿; , 电!使其此顯不正確的灰階,從而消强 彩色棋盤格、畫面閃堞之現象。 關於建立畫素電壓補償表方法則可參閱圖5,本圖係 揭路本發明建立畫素電壓補償表之一實施例,其步驟如下 所述·首先’於步驟3〇1中, 搭 中°又疋一原始灰階值,其係由 於旦素電壓補償表係針對第一晝素的每一灰階值之正極性 及負極性電塵建立一對應之補償後電壓及補償後灰階值, 故建立本表的第一步驟為選定一原始灰階值η,以8位元 ==為例,η包含。、咖之整數;然後,選定好原 =灰Ρ白值後,即進入步驟3〇2中,設定一第二共電極電壓 C°m2,俾使每一畫素群之其他畫素呈灰階,舉例而t,若 為掃描線三開架構,將如圖2之第二態樣所示,第°2、3 顆晝素係顯示灰階t卜冰 抓— 白此外並將此第二共電極電壓Veom2 疋=此面板之共電極電壓。接著,於步驟303中,將第 圭'、电極,麼Vcom2調整為第一共電極電壓Vcoml,使每-Ϊ素群之第—畫素呈灰階,舉例而言,若為掃描線三開架 :目2之第—悲樣所示’第1顆晝素係顯示灰階; 於步驟304中,將第一共電極電壓與第二共電極電 C之,值疋義為—補償電㊣’其較佳$此差值之絕對值, ^ 併參閱圖6,其顯示本發明畫素電壓補償表之具 了其係以8位元256灰階為例,其中,補償電壓 14 201227662 為△VOONVcom丨_Vc〇m2| ;接著,於步驟3〇5中,將第—佥 素之顯示電壓減去補償電壓,以得到補償後電壓,即2 -畫素於第η個灰階之顯示電壓V⑷減去上述雷: △V(n),亦即ν(η)-Λν(η);最後,於步驟鳩中 f 述補償後電壓對應至-相應之灰階值,即可得到補复 階值㈣y⑻,將此補償後灰階值儲存之後,則 = 中,對其他灰階值(例如下—灰階值州二驟 302·遍之步驟。藉由上述方法,即可得到第 :: -灰階值所對應之補償後電壓及補償後灰階值,例如 。火广值η—88 ’經過此表的運算可得到補償值 gray(88)=l〇〇。 又丨白值 以上實施例均係針對複數晝素群的查 補償,例如,掃描線三開架構的第!查去仃電壓 另-實施例中,亦可針對複數畫=二 :進仃電壓補償’例如’掃描線三開架構的第2、3二二 或7、8顆晝素。在此可參閱圖7 、 m ^ ^ . 土 汁不本圖係揭露本發明 用:面板之晝素電壓補償方法之另一實施例 = ^例之面板共電極電壓係設定為可 鹿本實 言一示正確灰階之電壓,舉例而 如圖2中的第一態樣所示。電壓對稱, …在於對第2、3顆晝素之顯示電壓二:本實施例 步驟係如下所述:首先’於步驟4〇ι 早兀建立-晝素電壓補償表利用查表 、體而έ,係針對其他晝素 r γ· 15 201227662 之所有灰階值之正極性及負極 主甘士 、【電I建立此書素電壓福禮 表,其t ’上述之其他書辛 —π μ補知 蚩去冰夕痛士4 —震係心母一晝素群令’除了第一 畫素外之所有畫素,例士 ^ —飞例如.知描線三開架構下為笛9 顆畫素,掃描線四開架構 、 丹厂兩弟2、3、4顆書音,LV心細 推;然後,於步驟402尹, —素乂此類 Μ補賴表決定其他書紊夕强产# > —瓦电 、他旦I之補償後灰階值,具體而t,告# 控制其他畫素顯示某一灰階丰 '、 口田队 火丨白Βτ ’例如正極性電壓 火階,其原始灰階值為8 8,則時序γ _ i ^ 〜吋序控制早兀會查詢畫素電 ,壓補侦表中原始灰階值88所對;δ h —St is also symmetrical, and the steps are as follows: First, in step 2〇1, the book symplectic voltage compensation table pre-established by the look-up unit is used to make 杳矣罝;π.疋儿<旦电 for all grayscale values^(4) What to compensate for - the pixel's value, the original voltage, the compensation ^ and the negative = electricity ^ established by the original grayscale 槿忐 纟, 丨 · + After the voltage is compensated, the gray scale value is not uniform after the compensation. According to the table, the purpose is to adjust the voltage error voltage caused by the capacitor box combination, so that the supplier can be supplied from the source. It correctly displays the problem of the electric panel. In the case of the antrum m 士 / 禅 禅 and the π color chess technique, in the case of e, the positive polarity voltage and the negative polarity of each gray scale value of the first-halogen are obtained in step 2021. However, the table determines that the first book is supplemented by the gray scale value of the compensation element. Specifically, when the first gray scale is to be controlled, for example, the positive electric dust The lower f start grayscale value is 88, then the timing control unit will query the compensated grayscale value corresponding to the pixel compensation 2 original gray I5 white value 8 8 , for example, the gray scale of the 100 gray scale under the positive polarity voltage The order value is 100; then, in step 203, the compensated gray scale value is transmitted to the source binder by using the day-sequence control unit, wherein the compensated gray scale value is queried by the timing control unit. The value obtained by the table is, for example, 1 上述 above. Then 7 in the second step 2〇4 'Using the source control|| will compensate the post-gradation value (4) to the post-compensation pressure, specifically, due to the source controller There is a corresponding value of each gray scale value voltage, so any gray scale value obtained by the receiver can be converted into a voltage. In the source controller, the timing control unit transmits [13 201227662 the compensated gray scale value correspondingly to a voltage value, and the electric compensation voltage. Finally, in step 205, the source controller is used: The compensated voltage obtained in step 204 is output to the first pixel, thereby changing the display voltage of the first pixel, and transmitting and supplying; and generating the incorrect gray scale, thereby suppressing the color checkerboard, The phenomenon of flashing the picture. For the method of establishing the pixel voltage compensation table, reference may be made to FIG. 5, which is an embodiment of the present invention for establishing a pixel voltage compensation table, the steps of which are as follows: First, 'in step 3〇 In the middle, the original gray scale value is set in the middle, and the voltage compensation matrix is used to establish a corresponding compensation voltage for the positive polarity and the negative electric dust of each gray scale value of the first halogen. After the compensation of the gray scale value, the first step of establishing the table is to select an original gray scale value η, taking 8 bits == as an example, η contains the integer of the coffee, and then, the original = gray value is selected. After that, proceed to step 3〇2 to set a second common electrode. The voltage C°m2, so that the other pixels of each pixel group are grayscale, for example, t, if it is a scan line three-open architecture, as shown in the second aspect of Figure 2, the second, the third The halogen display shows the gray scale t-ice grab-white and the second common electrode voltage Veom2 疋 = the common electrode voltage of the panel. Next, in step 303, the first step, the electrode, the Vcom2 is adjusted to The first common electrode voltage Vcoml is such that the first pixel of each-quin group is gray-scaled, for example, if it is a scan line three open frame: the second of the head--the sad picture shows the 'first one element display Gray scale; in step 304, the value of the first common electrode voltage and the second common electrode voltage C is defined as - the absolute value of the difference between the compensation and the positive electric energy, ^ and see FIG. The pixel voltage compensation table of the present invention is shown as an example of an 8-bit 256 gray scale, wherein the compensation voltage 14 201227662 is ΔVOONVcom丨_Vc〇m2|; then, in step 3〇5, the first - the display voltage of the halogen is subtracted from the compensation voltage to obtain the compensated voltage, that is, the display voltage V(4) of the n-pixel in the ηth gray scale minus the above-mentioned lightning: ΔV(n), that is, ν(η)-Λν(η); Finally, in step 鸠f, the compensated voltage corresponds to the corresponding grayscale value, and the complementary step value (4) y(8) is obtained. After the compensated grayscale value is stored, = Medium, for other grayscale values (for example, the lower-gray value state is the second step of 302. By the above method, the compensated voltage corresponding to the :: - gray scale value and the compensated gray scale value can be obtained, for example. The fire wide value η - 88 ' can be obtained by the operation of this table to obtain the compensation value gray (88) = l 〇〇. The white value of the above examples are all for the compensation of the complex element group, for example, the scan line three open architecture! In addition, in the embodiment, it is also possible to compensate for the complex voltage = two: the voltage of the input voltage, for example, the second, third or second, or seven or eight elements of the scanning line three-open structure. Referring to FIG. 7 , m ^ ^ . The soil is not shown in the figure. Another embodiment of the method for compensating the voltage of the panel is as follows: ^ The panel common electrode voltage system is set to be deer The voltage of the correct gray scale is shown, for example, as shown in the first aspect of FIG. The voltage is symmetrical, ... lies in the display voltage of the 2nd and 3rd halogens. The steps in this embodiment are as follows: First, 'in step 4〇ι 兀 兀 昼 昼 昼 昼 昼 昼 昼 昼 昼 昼 昼 昼 昼 昼 昼 昼 昼 昼 昼 昼 昼 电压 电压For the positive polarity of the other gray scale values of the other elements r γ· 15 201227662 and the negative main glyce, [Electrical I establish this book voltage voltage gift table, t 'the other book above sin - π μ complement蚩 冰 冰 痛 4 — — — — — — — — — — — — — — — — — — — — — — — — — — 4 4 4 4 冰 冰 冰 冰 冰 冰 冰 冰 冰 冰 冰 冰 冰 冰 冰 冰 冰Line four open structure, two brothers of Danchang 2, 3, 4 book sounds, LV heart fine push; then, in step 402 Yin, - Su Shi such Μ 赖 决定 决定 决定 决定 决定 决定 决定 决定 决定 决定 决定 决定 决定 决定 决定 决定 决定 决定 瓦 瓦Electricity, hedan I after the compensation of the grayscale value, specifically and t, sue # control other pixels to show a certain grayscale Feng ', the mouth of the team fire 丨 white τ 'such as positive polarity voltage fire level, its original grayscale value 8 8, then the timing γ _ i ^ ~ 吋 sequence control will query the pixel power early, the original gray scale value of the pressure compensation table is 88; δ h —

極性電壓下之1〇〇灰階j M 於牛碑Λ丨自則補仏後之灰階值為100;接著, 於步驟403中’利用時序控制單 早兀將補彳員後灰階值傳送至 源極k制态;然後’於步驟4〇4中 . hf. Ψ利用源極控制器將補 =灰階值對應至補錢,具體而言,係在源極控制 =,將時序控制單元傳送的補償後灰階值對應轉換為一 電壓值’而此電壓值即為補償後電壓;最後,於步驟4〇5 f中,利用源極控制器將由步驟404所得到的補償後電壓輸 出至其他畫素’進而改變其他晝素之顯示電壓,使豆能顯 不正確的灰階,從而㈣彩色棋盤格、畫面閃燦之現象。 關於如何建立其他晝素之晝素電壓補償表,可參閱圖 8所示,其步驟如下所述:首先,於步驟5〇1中,設定一 原始灰階值η,以8位元256灰階為例,n包含〇、^55 之整數;然後,選定好原始灰階值後,即進入步驟5〇2中, 設定一第一共電極電壓Vc()ml,使每—畫素群之第一畫素呈 灰階,舉例而言,若為掃描線三開架構,將如圖2之 ^ r r 1 16 201227662 &樣所示’其第1顆畫素之顯示電壓對稱,呈灰階。此外, ^將此,一共電極電壓設定為此面板之共電極電 壓。接者’於步驟503中,將第-共電極電壓VeQml調整 為第”電極I壓VCQm2,使每一畫素群之其他畫素呈灰 F皆 ^ *{歹h 上, _ S,若為掃描線三開架構,將如圖2之第二態 樣所不#中第2、3顆畫素之顯示電壓對稱,呈灰階;然 後於=驟504中,將第一共電極電壓與第二共電極電壓 值疋義為一補償電壓,其較佳為此差值之絕對值,於 此可併參閱圖6,其顯示本發明畫素電壓補償表之具體實 :二ΪΓ補償電壓為Δν⑻,一-、』;接著,於 步驟505中,a定甘„ …〆/ 、他旦素之顯示電壓減去補償電壓,以得 丄仏後電壓,即為其他畫素於第η個灰階之顯示電壓v(n) 二上述之補償電壓Δν⑻,亦即v⑻· 中將上述補償後電壓對應至一相應之灰階 #到補償後灰階值㈣⑻,將此補償後灰階值儲 =之^則回到步驟训中,對其他灰階值(例如下一灰階 到Γ他書H50^506之步驟。藉由上述方法,即可得 階值。 母—灰階值所對應之補償後電壓及補償後灰 應得以本發明之較佳實施例。此領域之技藝者 張之專利發明而非用以限定本發明所主 範圍而Ϊ專利保護範圍當視後附之申請專利 離太直^,或而疋。凡热悉此領域之技藝者,在不脫 1精神或範圍内,所作之更動或潤飾,均屬於本發 201227662 明所揭示精神下所完成之等效改變或設計,且應包含在下 述之申請專利範圍内。 3 【圖式簡單說明】 圖1顯示習知的掃描線三開架構; 圖2顯示彩色棋盤格之三種態樣; 圖3顯示本發明面板架構之較佳實施例; 貫'施例 圖4顯示本發明用於面板之晝素電壓補償方 i9tl , 圖5顯示本發明建立畫素電壓補償表之 圖6顯示本發明蚩音雷厭社产 知月旦素電壓補償表之具體實施例; 圖7顯不本發明用於面板 實施例; 則反之旦素電壓補償方法之另 /十、震明遷 主要元件符號說明 101處理裝置The gray level value of the 1 〇〇 gray level j M under the polarity voltage is 100 after the Λ丨 Λ丨 Λ丨 ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' 利用 利用 利用 利用 利用To the source k state; then 'in step 4〇4. hf. Ψ use the source controller to match the complement = grayscale value to the money, specifically, in the source control =, the timing control unit The transmitted compensated grayscale value is converted into a voltage value' and the voltage value is the compensated voltage; finally, in step 4〇5 f, the compensated voltage obtained by step 404 is output to the source controller to Other pixels' then change the display voltage of other elements, so that the beans can display the incorrect gray level, and thus (4) the phenomenon of color checkerboard and picture flashing. For details on how to create other pixel voltage compensation tables, refer to Figure 8. The steps are as follows: First, in step 5〇1, set an original grayscale value η to 256 grayscales of 8 bits. For example, n includes an integer of 〇, ^55; then, after selecting the original grayscale value, it proceeds to step 5〇2, setting a first common electrode voltage Vc() ml, so that each of the pixel groups A pixel is grayscale. For example, if the scan line is three-opened, the display voltage of the first pixel is symmetrical as shown in Fig. 2, rr 1 16 201227662 & In addition, ^, a common electrode voltage is set to the common electrode voltage of the panel. In step 503, the first common electrode voltage VeQml is adjusted to the "electrode I voltage VCQm2" so that the other pixels of each pixel group are gray F ^^{歹h, _S, if The scanning line has a three-open structure, and the display voltages of the second and third pixels in the second aspect of FIG. 2 are symmetrical, and are gray-scale; then, in step 504, the first common electrode voltage and the first common electrode voltage are The common electrode voltage value is defined as a compensation voltage, which is preferably the absolute value of the difference. Referring to FIG. 6 , the specific embodiment of the pixel voltage compensation table of the present invention is shown: the compensation voltage of the second is Δν (8). , a-, 』; Next, in step 505, a gan „ ... 〆 /, the display voltage of the other element minus the compensation voltage, in order to obtain the voltage after the ,, that is, other pixels in the ηth gray scale The display voltage v(n) is the above-mentioned compensation voltage Δν(8), that is, v(8)· corresponds to the corresponding compensated voltage to a corresponding gray scale # to the compensated gray scale value (4) (8), and the compensated gray scale value is stored. ^ Then return to the step training, for other grayscale values (for example, the next grayscale to the step of H50^506. By the above method, The compensated voltage corresponding to the mother-gray scale value and the compensated ash should be preferred embodiments of the present invention. The patented art of the art is not limited to the main scope of the present invention. The scope of protection depends on the patent application attached to it. It is too straightforward or ambiguous. Anyone who is eager to learn in this field will make any changes or refinements in the spirit or scope of this article. The equivalent change or design done under the spirit shall be included in the scope of the following patent application. 3 [Simple description of the drawing] Figure 1 shows a conventional scanning line three-open structure; Figure 2 shows three states of the color checkerboard FIG. 3 shows a preferred embodiment of the panel structure of the present invention; FIG. 4 shows a pixel voltage compensation unit i9tl for a panel of the present invention, and FIG. 5 shows FIG. 6 showing the pixel voltage compensation table of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT The specific embodiment of the 月 雷 厌 社 知 知 ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; 具体 具体101 Device

102時序控制電路板 103連接器 電路 同步動態隨機存取記憶體 104晝面暫存器 105特殊應用之積體 106雙倍資料傳輸率 107查表單元 108時序控制單元 109 Gamma 1C 110閘極控制器 201227662 111源極控制器 112顯示面板 201-205 步驟 301-306 步驟 401-405 步驟 501-506 步驟102 timing control circuit board 103 connector circuit synchronous dynamic random access memory 104 face buffer register 105 special application integrated body 106 double data transmission rate 107 lookup unit 108 timing control unit 109 Gamma 1C 110 gate controller 201227662 111 Source Controller 112 Display Panels 201-205 Steps 301-306 Steps 401-405 Steps 501-506 Steps

Gl、G2、G3、G4 掃描線Gl, G2, G3, G4 scan lines

Cpgl、Cpg2、Cpg2’、Cpg3、Cpg3’、Cpg4 雜散電容 # Vdispl第一顯示電壓Cpgl, Cpg2, Cpg2', Cpg3, Cpg3', Cpg4 stray capacitance # Vdispl first display voltage

Vdisp2第二顯示電壓 Vdisp3第三顯示電壓 tl掃描線G2、G3、G4開啟時間 t2掃描線G2、G3、G4關閉時間Vdisp2 second display voltage Vdisp3 third display voltage tl scan line G2, G3, G4 turn-on time t2 scan line G2, G3, G4 turn-off time

1919

Claims (1)

201227662 七 申凊專利範圍: 1· 一種顯示面板之畫素電壓補 素群,每一該複數畫素群包括具::數畫 素,其步驟包含: 第一晝素及複數其他畫 於查表早几㈣立一畫素電麼補償表; =該畫素電壓補償表以—時序控制單元決定該第 直素之補償後灰階值;201227662 Seven application patent scope: 1· A display panel pixel voltage complement group, each of the complex pixel groups includes:: number of pixels, the steps of which include: the first element and the plural other pictures in the table The first few (four) set up a picture of the compensation table; = the pixel voltage compensation table determines the post-compensation gray level value of the first element by the timing control unit; 藉由為時序控制單元將該補償後灰階值傳送至一 控制器; 源極 以該源極控制器將該補償後灰階值對應至一補償後 壓;及 藉由該源極控制器將該補償後電壓輸出至該第一晝素 2. 如凊求項丨所述之顯示面板之畫素電壓補償方法,更包 S對母一5亥衩數晝素群之該第一晝素之每一灰階值之 正極性及負極性電壓分別設定該補償後灰階值。 3. 如請求項1所述之顯示面板之晝素電壓補償方法,其中 上述建立該畫素電壓補償表之步驟包含: 設定一第二共電極電壓,使該複數其他晝素呈灰階; 設定一第一共電極電壓,使該第一畫素呈灰階; 將該第一共電極電壓與該第二共電極電壓之差值定義 為一補償電壓; 將該第一畫素之顯示電壓減去該補償電壓,以得到一補 20 201227662 償後電壓;及 將該補償後電壓對應至該補償後灰階值。 4·如請求項3所述之顯示面板之晝素電壓補償方法,更包 含對該第一晝素之每一灰階值之正極性及負極性電壓 重複建立該畫素電壓補償表,以定義該第一晝素之該每 一灰階值之正極性與負極性電壓所對應之該補償後灰 階值。 5. 一種顯示面板之晝素電壓補償方法 素群,每一該複數晝素群包括一第 素’其步驟包含: ,該面板具有複數 一晝素及複數其他 晝晝 於一查表單兀建立一晝素電壓補償表; 素電壓補償表以-時序控制單元決定該複數 其他晝素之一補償後灰階值; 序控制單元將該補償後灰階值傳送至一源極 以該源極控制 壓;及 益將該補償後灰階值對應至—補償後電 至該複數其他 :由該源極控制器將該補償後電壓輸出 如請求項5所述之 含對每一該複數晝 顯示面板之晝素電壓補償方法,更包 素群之該複數其他晝素中,每—灰階 Γ 21 6. 201227662 值之正極性與負極性電壓分別設定該補償後灰階值。 7. 如請求項5所述之顯示面板之晝素電壓補償方法,其 中’上述建立該畫素電壓補償表之步驟包含: ^ 設定一第一共電極電壓,使該第—晝素呈灰階; 設定一第二共電極電壓,使該複數其他晝素呈灰階; 將該第一共電極電壓與該第二共電極電壓之差值 為一補償電壓; 將該複數其他畫素之顯示電壓減去該補償電壓 一補償後電壓;及 將該補償後電壓對應至該補償後灰階值。 8. 如請求項7所述之顯示面板之晝素電壓補償方 含針對該複數其他畫素之每一灰階值之正極❹= 性電壓重複建立該畫素電壓補償表 ,、負極 币丨貝衣爻步驟,以定義 數其他畫素之該每一灰階值之正極 Λ 對應之該補償後灰階值。 1'貞極性電壓所 9. -種具晝素電壓補償之顯示面板架構,人. -雙倍資料傳輸率同步動態隨機存取記憶3用 影像訊號; 猫用以處 -時序控制單it,電性輕合至該雙 態隨機存取記憶體,以接收該影像訊號憎輸率同步 -查表單元,電性福合至該時序控制單元,其中該杳 22 201227662 彳 1:=了内建晝素電壓補償表,用以定義至少-補償 由^ = H :電性轉合至該時序控制單元,用以接收 制早7^所輸出之該至少—補償後灰階值,旅 輸出硬數源極訊號至複數資料線;及 極控制電㈣合至該時序控制單元,用以輸出 複數閘極訊號至複數掃描線; :中該複數源極訊號包含至少一補償後電壓,其係由該 源極控制器根據該補償後灰階值決定。 3求項9所述之具畫素電壓補償之顯示面板架構,更 包含複數畫素群’每-該複數晝素群包括—第一晝素及 複數其他晝素。 U.如請求項10所述之具畫素電壓補償之顯示面板架構, /、中η亥查表早元係利用一第一共電極電壓及一第二丑 電極電壓以定義該補償後灰階值,且該第一共電極電壓 為。玄第一畫素呈灰階時之電壓,該第二共電極電壓為該 複數其他畫素呈灰階時之電壓。 12·如請求項10所述之具晝素電壓補償之顯示面板架構, 其中該至少一補償後電壓係輸出至每一該複數晝素群 之έ亥第一畫素。 、 23 201227662 13.如請求項10所述之具晝素電壓補償之顯示面板架構, 其中該至少一補償後電壓係輸出至每一該複數晝素群 之該複數其他畫素。Transmitting the compensated grayscale value to a controller by a timing control unit; the source is configured by the source controller to the compensated grayscale value to a compensated voltage; and the source controller The compensated voltage is output to the first pixel 2. The pixel voltage compensation method of the display panel according to the item 凊 , , , , , , 对 对 母 母 母 母 母 母 母 母 母 画 画 画 画 画The positive polarity and the negative polarity voltage of each gray scale value are respectively set to the compensated gray scale value. 3. The method as claimed in claim 1, wherein the step of establishing the pixel voltage compensation table comprises: setting a second common electrode voltage to make the plurality of other pixels gray scale; setting a first common electrode voltage, the first pixel is gray-scale; the difference between the first common electrode voltage and the second common electrode voltage is defined as a compensation voltage; and the display voltage of the first pixel is reduced The compensation voltage is obtained to obtain a compensation voltage of 201227662; and the compensated voltage is corresponding to the compensated grayscale value. The method for compensating the pixel voltage of the display panel according to claim 3, further comprising repeatedly establishing the pixel voltage compensation table for the positive polarity and the negative polarity voltage of each gray scale value of the first pixel to define The compensated gray scale value corresponding to the positive polarity and the negative polarity voltage of each of the gray scale values of the first pixel. 5. A pixel group for a pixel voltage compensation method for a display panel, each of the plurality of pixel groups comprising a first element', wherein the step comprises: the panel has a plurality of elements and a plurality of other forms are created in a check form a pixel voltage compensation table; the prime voltage compensation table determines a compensated gray scale value of the plurality of other pixels by the timing control unit; the sequence control unit transmits the compensated gray scale value to a source to be controlled by the source Pressing and benefiting the compensated grayscale value to - after compensation, to the complex number: the source controller outputs the compensated voltage as described in claim 5 for each of the plurality of display panels The 昼 电压 电压 电压 电压 电压 电压 电压 电压 电压 电压 电压 电压 电压 电压 电压 电压 电压 电压 电压 电压 电压 电压 电压 电压 电压 电压 电压 电压 电压 电压 电压 电压 电压 电压 电压 电压 电压 电压 电压 电压 电压 电压 电压 电压 6. 电压7. The method as claimed in claim 5, wherein the step of establishing the pixel voltage compensation table comprises: ^ setting a first common electrode voltage to make the first pixel gray scale Setting a second common electrode voltage such that the plurality of other elements are gray-scale; the difference between the first common electrode voltage and the second common electrode voltage is a compensation voltage; and the display voltage of the plurality of other pixels The compensation voltage is subtracted from the compensated voltage; and the compensated voltage is corresponding to the compensated grayscale value. 8. The pixel voltage compensation side of the display panel according to claim 7 includes the pixel voltage compensation table for the positive electrode ❹=saturation voltage of each gray level value of the plurality of pixels of the plurality of pixels, and the negative coin methane The grading step is to define the compensated grayscale value corresponding to the positive Λ of each of the grayscale values of the other pixels. 1'贞polarity voltage 9.- Display panel structure with halogen voltage compensation, human. - Double data transmission rate synchronous dynamic random access memory 3 image signal; Cat used - timing control single it, electricity Slightly coupled to the binary random access memory to receive the image signal transmission rate synchronization-checking unit, electrically coupled to the timing control unit, wherein the 杳22 201227662 彳1:= built-in 昼a voltage compensation table for defining at least - compensation by ^ = H: electrical switching to the timing control unit for receiving the at least the compensated grayscale value outputted by the early 7^, the bridging output hard source The pole signal to the plurality of data lines; and the pole control circuit (4) coupled to the timing control unit for outputting the plurality of gate signals to the plurality of scan lines; wherein the plurality of source signals comprise at least one compensated voltage, the source being The pole controller is determined based on the compensated grayscale value. The display panel structure with the pixel voltage compensation described in Item 9 further includes a plurality of pixel groups, each of which includes a first element and a plurality of other elements. U. The display panel structure with pixel voltage compensation according to claim 10, wherein the medium η ray table early uses a first common electrode voltage and a second ugly electrode voltage to define the compensated gray scale Value, and the first common electrode voltage is. The first common pixel is a voltage at a gray level, and the second common electrode voltage is a voltage when the plurality of other pixels are gray scaled. 12. The display panel architecture with a pixel voltage compensation according to claim 10, wherein the at least one compensated voltage is output to the first pixel of each of the plurality of pixel groups. 13. The display panel architecture of claim 10, wherein the at least one compensated voltage is output to the plurality of other pixels of each of the plurality of pixel groups. 24twenty four
TW99146179A 2010-12-27 2010-12-27 Method of compensating pixel voltage for a display panel and the structure thereof TWI424406B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW99146179A TWI424406B (en) 2010-12-27 2010-12-27 Method of compensating pixel voltage for a display panel and the structure thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW99146179A TWI424406B (en) 2010-12-27 2010-12-27 Method of compensating pixel voltage for a display panel and the structure thereof

Publications (2)

Publication Number Publication Date
TW201227662A true TW201227662A (en) 2012-07-01
TWI424406B TWI424406B (en) 2014-01-21

Family

ID=46933358

Family Applications (1)

Application Number Title Priority Date Filing Date
TW99146179A TWI424406B (en) 2010-12-27 2010-12-27 Method of compensating pixel voltage for a display panel and the structure thereof

Country Status (1)

Country Link
TW (1) TWI424406B (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104318900A (en) * 2014-11-18 2015-01-28 京东方科技集团股份有限公司 Organic electroluminescence display device and method
CN110544460A (en) * 2018-05-28 2019-12-06 奇景光电股份有限公司 Liquid crystal display and dynamic compensation system of common electrode voltage thereof

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100951902B1 (en) * 2003-07-04 2010-04-09 삼성전자주식회사 Liquid crystal display, and method and apparatus for driving thereof
KR20070017865A (en) * 2005-08-08 2007-02-13 삼성에스디아이 주식회사 electron emission display device and control method of the same
KR101127843B1 (en) * 2005-10-25 2012-03-21 엘지디스플레이 주식회사 Flat Display Apparatus And Picture Quality Controling Method Thereof
TWI409796B (en) * 2008-09-12 2013-09-21 Innolux Corp Liquid crystal display device
JP4770906B2 (en) * 2008-10-07 2011-09-14 ソニー株式会社 Display device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104318900A (en) * 2014-11-18 2015-01-28 京东方科技集团股份有限公司 Organic electroluminescence display device and method
CN110544460A (en) * 2018-05-28 2019-12-06 奇景光电股份有限公司 Liquid crystal display and dynamic compensation system of common electrode voltage thereof

Also Published As

Publication number Publication date
TWI424406B (en) 2014-01-21

Similar Documents

Publication Publication Date Title
TWI336868B (en) Display device
TWI450241B (en) Data modulation method and liquid crystal display device using the same
US8675054B2 (en) Stereoscopic image display and method for driving the same
TWI308313B (en)
US9110300B2 (en) Display apparatus and method of driving the same
TWI223228B (en) Display device having improved drive circuit and method of driving same
TW567462B (en) Method and apparatus for adjusting subpixel intensity values based upon luminance characteristics of the subpixels for improved viewing angle characteristics of liquid crystal displays
CN102547335B (en) Stereoscopic image display and driving method thereof
US20110149047A1 (en) 3d image display device
US20110157260A1 (en) 3d image display device
CN102024440B (en) Method for compensating pixel voltage of display panel and framework
TW482923B (en) Liquid crystal display device
CN102074212A (en) Method of compensating for pixel data and liquid crystal display
CN103035213A (en) Method of driving a display panel and display apparatus for performing the same
JP3809573B2 (en) Display device
TW201118848A (en) Liquid crystal display and method of local dimming thereof
CN101895778B (en) Method and system for reducing stereo image ghost
JP6208444B2 (en) Display device
CN102802001B (en) Method and device for reducing dynamic crosstalk of shutter type 3D liquid crystal display and liquid crystal display
TW521243B (en) Liquid crystal display device, and method for driving the same
KR20130034515A (en) Device and method for displaying three dimensional images
TW200931388A (en) Data driving apparatus and method thereof
TW201227662A (en) Method of compensating pixel voltage for a display panel and the structure thereof
US9368080B2 (en) Three-dimensional display and driving method thereof
JP4515021B2 (en) Display device

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees