201227257 六、發明說明： 【發明所屬之技術領域】 一種監控系統，特別有關於一種對主機板在運行當中各周邊 元件的電力順序信號的監控系統。 【先前技術】 在習知技術中是由基板管理控制單元偵測主機板的運作。請 參考「第1圖」所不，其係為習知技術之主機板中周邊元件之架 構示意®。-般而言，主機板1〇〇要能正常運行，需要供電單: 能對主機板議正常的供電。若是供電單元所供給的電力不^ 時，將可能導致主機板100中的各項周邊元件毁損。 疋 在習知技術的主機板100中均設置一複雜可編程邏輯元件 110(c〇mplex pr0grammable Logic Device，CPLD)。但在習知技杯 的複雜可編程邏輯元件110僅用以控制供電單元對於周邊元件^ 如：風扇、中央處理單元130或平台控制集線 co減胁卿，上電控制。換言之，複雜可編程邏輯元 件110只負責周邊元件的電力切換，並不對周邊元件的電 監控。這樣-來，當供電單元所供給的電力^穩定導 : 運作異常時，複雜可編程邏輯元件11〇仍無法得知是由哪= 牛 邊元件的供電發生_。這對於廠商而言，無 :周 錯誤來源就無法可以正確的提供解決的方案。 、、測 【發明内容】 黎於以上的問題’本發明在於提供—種電相序信號的監控 201227257 =號用㈣顺物嫩咖過的電力順 電轉 元件之.祕* \ 電力供應單^以提供主機板與周邊 與周邊1.複雜可編程邏輯元件連接於電力供應單元 1、二70，设雜可編程邏輯元件更包括至少一資料暫存器；本 =可:邏輯元件透過通用輸入輸出腳位控制對周邊元件㈣ 力’並由貪料暫存器用以記錄周邊元件的電力順序信號。 板的:::提:’力順序信號的監控方法’用以監控主機 各員周邊兀件在運行中所通過的電力順序信號。 動主：:Γ?—種電力順序信號的監控方法下列步驟··啟 ‘销硬雜可編程邏輯元件依序選擇周邊元件之任— 邊:件=Γ編程邏輯元件透過通用輸入輸出卿位控制對周 2= 並在資料暫存器中記錄不同運作電力時周邊 财=號；複雜可編輯輯元件輸_元件的電力 的複==:種電!順序信號的監控系統與其方法。本發明 來h I轉分別透過制輸人輸a腳位與資料暫存器 號:複雜^元對於周邊元件的電力控制與電力順序信 藉以方便朗者件再透過相接口將電力辩信號輸出， 便用者靦察各周邊元件的運作狀態。 有關本發明的特徵與實作，兹配合圖式作最佳實施例詳細說 201227257 明如下。 【實施方式】 叫參考「第2圖」所不’其係為本發明之架構示意圖。本發 明之電力順序信號的監控系統包括：電力供應單元21〇、複雜可編 程邏輯元件220與基板管理控制單元23〇。電力供應單元21〇用以 提供主機板姻邊元件之運作電力。其巾，周邊元件· 包括：南橋晶片組、新世代周邊連接介面接口㈣細ai_p〇nent interc_etexpi：ess ’Ρα_Ε)、_智酙臺 簡(ι滅㈣201227257 VI. Description of the Invention: [Technical Field of the Invention] A monitoring system, in particular, relates to a monitoring system for power sequence signals of peripheral components of a motherboard during operation. [Prior Art] In the prior art, the operation of the motherboard is detected by the substrate management control unit. Please refer to "Figure 1", which is a schematic diagram of the peripheral components of the motherboard of the prior art. In general, the motherboard 1 must be able to operate normally, and a power supply order is required: The power supply to the motherboard can be normal. If the power supplied by the power supply unit is not good, it may cause damage to various peripheral components in the motherboard 100. A complex programmable logic element 110 (CPLD) is disposed in the motherboard 100 of the prior art. However, the complex programmable logic component 110 of the conventional technology cup is only used to control the power supply unit for peripheral components such as the fan, the central processing unit 130 or the platform control hub. In other words, complex programmable logic element 110 is only responsible for power switching of peripheral components and does not provide electrical monitoring of peripheral components. In this way, when the power supplied by the power supply unit is stable: when the operation is abnormal, the complex programmable logic element 11〇 still cannot know which power supply is generated by the _. For the manufacturer, no: Week error source can not provide the correct solution. [, the content of the invention] Li Yu above the problem 'The invention is to provide a kind of monitoring of the electric phase sequence signal 201227257 = No. Providing a motherboard and peripheral and peripheral 1. Complex programmable logic components are connected to the power supply units 1, 2, 70, and the programmable logic components further include at least one data register; the present = can: the logic components pass through the universal input and output pins The bit controls the peripheral component (four) force' and is used by the greedy register to record the power sequence signal of the peripheral component. The board::: mention: 'the monitoring method of the force sequence signal' is used to monitor the power sequence signal passed by the peripheral members of the host during operation. Mobilizer::Γ?—A method for monitoring the power sequence signal. The following steps··Starting the pin-hard programmable logic component to select the peripheral components in sequence—edge: component=Γ programming logic component through general-purpose input and output level control For the week 2 = and record the different operating power in the data register, the surrounding financial = number; complex editable component of the component of the power of the component = =: kind of electricity! sequential signal monitoring system and its method. According to the present invention, the H I is transmitted through the input and output bits and the data register number respectively: the complex power is used to control the power of the peripheral components and the power sequence is used to facilitate the output of the power signal through the phase interface. The user can observe the operating status of each peripheral component. The features and implementations of the present invention are described in detail with reference to the drawings as a preferred embodiment. [Embodiment] It is referred to as "the second diagram" and is not a schematic diagram of the structure of the present invention. The power sequencing signal monitoring system of the present invention includes: a power supply unit 21, a complex programmable logic element 220, and a baseboard management control unit 23A. The power supply unit 21 is configured to provide operating power of the motherboard marriage component. Its towel, peripheral components, including: South Bridge chipset, new generation peripheral interface interface (four) fine ai_p〇nent interc_etexpi: ess Ρ Ε Ε Ε 、 、 、 、 ι ι ι ι 四
Platform Management Bus ’ IPMB)、雙線記憶體模組㈣ Mne memory module ’ DIMM)、序列埠、網路連接端或風扇。 複雜可編程邏輯元件220電性連接於電力供應單元21〇與周 邊元件240。複雜可編程邏輯元件22〇係透過電力管理匯^排 (P〇醫management Bus ’ PMBus)連接於電力供應單元21〇。複雜 可編程邏輯元件22"更包括至少一資料暫存器 register)。複雜可編程邏輯元件22〇可透過通用輪入輸出腳位 (G—al Pu-se 一/〇啊，GH〇)控制對周邊元件·的運作 電力，並由資料暫存器221記錄周邊元件的電力順序作號。 其中，電力順序錢包括電平邏輯值、持續時間和電源正常啟動 訊號(Power-Good signal)。 基板管理㈣單元⑽健職力t轉麵紐連社至電 力供應單元210。基板管理控制單元23〇另包括通訊接口。複雜可 編程賴元件220透過通訊接π輸出周邊元件的電力順雜 201227257 號。通訊接口可以是但不限定為網路接口(例如RM5)，當缺也可 以透過新世制邊連齡吨啼咖咖int__ express，^Platform Management Bus ’ IPMB), two-wire memory module (4) Mne memory module ’ DIMM), serial port, network connection or fan. Complex programmable logic component 220 is electrically coupled to power supply unit 21A and peripheral component 240. The complex programmable logic element 22 is connected to the power supply unit 21 through a power management bus (PM). The complex programmable logic element 22" further includes at least one data register register). The complex programmable logic device 22 can control the operating power of the peripheral components through the universal wheel input and output pin (G-al Pu-se, GH, GH), and record the peripheral components by the data register 221 The power sequence is numbered. Among them, the power sequence money includes a level logic value, a duration, and a power-good signal. Substrate Management (4) Unit (10) Health Care t Turns New Zealand to Power Supply Unit 210. The substrate management control unit 23 further includes a communication interface. The complex programmable component 220 transmits the power of the peripheral components through the communication connection π 201227257. The communication interface can be, but is not limited to, a network interface (for example, RM5). When it is missing, it can also be passed through the new world system.
Management Bus ’ IPMB)等方式輸出。 為能清楚制本發日种各元件的運作_，還請來考「第3 圖」所示，其係為本發明之運作流程示意圖。本發明運作流程包 括以下步驟： y驟S310啟動主機板’並驅動複雜可編程邏輯元件依序選 擇周邊元件之任一進行上電； 步驟S320 :複雜可編程邏輯树透過通用輸人輸出腳位控制 對周邊元件的運作電力，並在資料暫存器中記錄 不同運作電力時周邊元件的電力順序信號；以及 步驟㈣：_可編轉輯元件輸出周邊元件的電力順序作 號。 ' 首先，在啟動主機板200的過程中，由複雜可編程邏輯元件 220中運行對主機板200的周邊元件的監控程序。複雜可編程 邏輯元件⑽會根據監控程相記錄關邊元件24q的監控= 序’依序的對周邊it件240進行前述的上電與調整供應電力的斤 理。 —由於每-個周邊元件240而言均會有多種不同的工作電壓。 每-個電壓各自具有相應的電源正常啟動訊號。複雜可蝙=輯 辑220可以根據計時器(timer)並通過通用輸入輪出卿位來=制 201227257 周邊元件240的侧電路，用以對周邊元件依序力口電。複雜 可編程邏輯元件220同時由電源正常啟動訊號中獲取周邊元件 240的狀態信息。 所簡雜可編程邏輯元件22〇在調整周邊元件24〇的供應電 力時，資料暫存器221會記錄周邊元件·的電平邏輯值、持續 時間和電源正常啟動訊號(P〇Wer_G〇〇d si㈣等電力順序信號/ 本發明提供-種電力順序信號的監控系統與其方法。本發明 的獅可編程邏輯元件22G分別透過通用輸入輸出腳位與資_ 存器221來控制與記錄供電單元對於周邊元件·的電力控制與 電力順序信號。複雜可編程邏輯元件22G再透過通訊接口將電力 順序信號輸出，藉以方便使用者觀察各周邊元件240的運作狀態。 雖然本發明赠述之較佳實酬揭露如上，然其並非用以限 定本發明，任何熟習相像技藝者，在不脫離本㈣之精神和範圍 内田可作些許之更動與潤飾，因此本發明之專利保護範圍須視 本說明書_之巾請專纖騎界定者鱗。 " 【圖式簡單說明】 第1圖係為習知技術之主機板中周邊元件之架構示意圖。 第2圖係為本發明之架構示意圖。 第3圖係為本發明之運作流程示意圖。 【主要元件符號說明】 主機板100 複雜可編程邏輯元件11() 201227257 風扇120 中央處理單元130 平台控制集線器140 主機板200 電力供應單元210 複雜可編程邏輯元件220 資料暫存器221 基板管理控制單元230 周邊元件240Management Bus ’ IPMB) output. In order to be able to clearly understand the operation of each component of the Japanese version, please also refer to the "3rd figure", which is a schematic diagram of the operational flow of the present invention. The operation flow of the present invention includes the following steps: s: S310 starts the motherboard board and drives the complex programmable logic component to sequentially select any of the peripheral components for power-on; Step S320: The complex programmable logic tree is controlled by the universal input output pin The power sequence of the peripheral components is recorded, and the power sequence signals of the peripheral components when different operating powers are recorded in the data register; and the step (4): _ can be edited to output the power components of the peripheral components. First, in the process of starting the motherboard 200, a monitoring program for peripheral components of the motherboard 200 is run by the complex programmable logic component 220. The complex programmable logic component (10) performs the aforementioned power-on and adjustment supply power to the peripheral component 240 in sequence according to the monitoring of the monitoring phase recording component 24q. - There are many different operating voltages for each of the peripheral components 240. Each voltage has its own power supply normal start signal. The complex bat=edit 220 can be used according to the timer and through the universal input to determine the side circuit of the 201227257 peripheral component 240, which is used to sequentially power the peripheral components. The complex programmable logic component 220 simultaneously acquires state information of the peripheral component 240 from the power up signal. When the programmable logic component 22 adjusts the power supply of the peripheral component 24, the data buffer 221 records the level logic value, duration, and power-on startup signal of the peripheral component (P〇Wer_G〇〇d). Si (four) and other power sequence signals / The present invention provides a power system sequential signal monitoring system and method thereof. The lion programmable logic element 22G of the present invention controls and records the power supply unit to the periphery through a general-purpose input/output pin and a memory 221, respectively. The power control and power sequence signals of the component. The complex programmable logic component 22G then outputs the power sequence signal through the communication interface, thereby facilitating the user to observe the operating state of each peripheral component 240. Although the preferred embodiment of the present invention is disclosed As above, it is not intended to limit the present invention, and any skilled person can make some modifications and refinements without departing from the spirit and scope of the present invention. Therefore, the scope of patent protection of the present invention is subject to the specification. Specialized fiber rides define the scales. " [Simple diagram description] Figure 1 is the peripheral components of the motherboard of the prior art. 2 is a schematic diagram of the structure of the present invention. Fig. 3 is a schematic diagram of the operational flow of the present invention. [Main component symbol description] Motherboard 100 Complex programmable logic component 11() 201227257 Fan 120 Central processing unit 130 Platform Control Hub 140 Motherboard 200 Power Supply Unit 210 Complex Programmable Logic Element 220 Data Scratchpad 221 Substrate Management Control Unit 230 Peripheral Component 240