TW201214999A - Methods and systems for noise and interference cancellation - Google Patents

Methods and systems for noise and interference cancellation Download PDF

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Publication number
TW201214999A
TW201214999A TW100129517A TW100129517A TW201214999A TW 201214999 A TW201214999 A TW 201214999A TW 100129517 A TW100129517 A TW 100129517A TW 100129517 A TW100129517 A TW 100129517A TW 201214999 A TW201214999 A TW 201214999A
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TW
Taiwan
Prior art keywords
value
control setting
parameter
phase
feedback
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TW100129517A
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Chinese (zh)
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TWI461009B (en
Inventor
Wilhelm Steffen Hahn
Wei Chen
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Intersil Inc
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Priority claimed from US13/014,681 external-priority patent/US8724731B2/en
Application filed by Intersil Inc filed Critical Intersil Inc
Publication of TW201214999A publication Critical patent/TW201214999A/en
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Publication of TWI461009B publication Critical patent/TWI461009B/en

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  • Noise Elimination (AREA)

Abstract

Signals propagating from an aggressor communication channel can cause detrimental interference in a victim communication channel. One or more noise cancellers can generate an interference compensation signal to suppress or cancel the interference based on one or more settings. A controller can execute algorithms to find preferred settings for the noise canceller(s). The controller can use a feedback signal (e.g., receive signal quality indicator) received from a victim receiver during the execution of the algorithm(s) to find the preferred settings. One exemplary algorithm includes sequentially evaluating the feedback resulting from a predetermined list of settings. Another algorithm includes determining whether to move from one setting to the next based on the feedback values for both settings. Yet another algorithm includes evaluating a number of sample settings to determine which of the sample settings result in a better feedback value and searching around that sample setting for a preferred setting.

Description

201214999 六、發明說明: 【發明所屬之技術領域】 本發明係關於一種用於補償在兩個或兩個以上通信頻 道之間或一通信系統中之兩個或兩個以上通信元件之間出 現的信號干擾之系統及方法。 相關申請案之交互參照 本專利申請案主張題為「High Power Cascaded Filter Based Noise Canceller」且在2010年2月26日申請之美國 臨時專利申請案第6 1 / 3 0 8,6 9 7號之權利。本申請案亦主張 題為「Methods and Systems for Noise and Interference Cancellation」且在2010年8月20日申請之美國臨時專利 申請案第61/375,491號之權利。本申請案亦有關於與本申 請案在同一日期申請之題為「Cascaded Filter Based Noise and Interference Canceller」之美國專利申請案第 號[代理人案號07982.1 05 112]。前述優先權及有關申請案中 之每一者的全部内容特此以引用的方式完全併入本文中。 【先前技術】 【發明内容】 補償干擾可改良信號品質,提高通信頻寬或資訊載運 能力’或改良接收器敏感性。通信頻道可包含傳輸線、印 刷電路板(PCB )跡線、撓性電路跡線' 電導體、波導、匯 201214999 Λ :流排、通信天線、提供信號路徑之媒體或主動或被動電路 或電路元件(諸如,遽波器、振堡器、二極體、vc〇、pLL、 放大器、數位或混頻信號積體電路)。因此,頻道可包含全 球行動通信系統(GSM)裝置、處理器”貞測器、信號源、 H & '連接器 '電路跡線或數位信 號處理(DSP )晶片(僅舉幾個可能性例子)。 本文中描述之例示性實施例可包括—高輸入功率串接 濾波器(HIPCF)雜訊及干擾消除裝置。本文中描述之例示 性HIPCF消除器可支援選擇性消除、校正、定址或補償干 擾、電磁干擾(麵)、雜訊(例如,相位雜訊、互調變產 物及其他干擾雜訊)、雜波或與通信系統(諸如,在攜帶型 電子裝置令之高速數位通信系統)之—或多個通信路徑相 關聯的其他不良頻譜分量。為了達成此說明書之目的,術 .語「高功率(high P〇wer )」大體指信號具有高達約+33 _ (相對於-毫瓦之分貝數)或更大之功率比。舉例而言, 本文中描述之例示性HIPCF消除器可輕接至具有此量值之 輸出功率的蜂巢式電話功率放大器之輸出端。 HIPCF消除器可獲得自侵犯傳輸裝置之通信路徑強加 干擾的通信信號之樣本,且處理該取樣之信號以產生干擾 補償信號。HIPCF可將干擾補償信號遞送至為干擾之接受 者的受害接收器之通信路徑内或通信路裡上,以消除、減 輕、抑制或另外補償接收之干擾。 【實施方式】 5 201214999 現轉至遍及諸圖同樣的數字指示同樣或對應的(但未 必相同的)元件的圖式,詳細描述本發明之例示性實施例。 圖1為根據某些例示性實施例的__通信系统⑽之功能方 塊圖。參看圖1,通信系統100包括-傳輸器105,其經由 傳輸天線115傳輸電磁信號。包括一或多個電導體之傳輸路 也1 〇7將傳輸器1 05耦接至傳輸天線11 5。在某些例示性實 施例中,傳輸器105使用一或多個通信標準或方法(諸如, =球行動通信系統(GSM)、分碼多重存取(cdma)、長期 决進(LTE )、寬頻分碼多重存取(W-CDMA ) '數位蜂巢式 系統(DCS )、個人通信服務(PCS )及無線區域網路(WLAN)) 將資料傳送至遠端裝置。受益於本發明之一般熟習此項技 術者應瞭解’本文中描述之通信系統⑽不限於前述通信 私準及方法’實情為’可供許多其他類型之信號傳輸技術 使用。 著傳輸器1 05與傳輸天線丨丨5之間的傳輸路徑丄〇7 安置者為—功率放大器11Ge功率放大器UG在傳輸器之輸 出信號由天線115傳播前調整該等信號之功率位準。當功率 放大器110調整信號之功率位準時,可將不良頻譜分量引入 至信號上。舉例而言,傳輸$ 1G5可傳輸具有某—載波頻 率或某-基調之信號。功率放大器m可引人具有與此載波 頻率或基調不同之頻率的互調變產物。與傳輸$ 1〇5相關 聯之其他組件亦可使雜訊或其他不良頻譜分量引入至信號 上。舉例而言,傳輸器1〇5可包括一本地振藍器及/或一或 多個升頻轉換混頻器’其可使包括有時被稱作帶外阻斷信 201214999 的不良頻譜分量 號之帶外雜訊(在傳於 .甘得翰之栺號的頻帶外 引入至信號上。 通信系統!00亦包括_接收器135,其經 120及將接收天線12〇 收大踝 來2〇電耦接至接收器135之接收路徑133 接收信號。在某此你丨千,地奋# ,,丄 —例不性實施例中,接收器135接收處於 料輸器⑼之頻帶相同或不同的頻帶内之信號。舉例而 S ’諸如仃動電話、個人數位助理(pDA)或行動電腦之行 動電子裝置可包括一經由上文論述之通信協定中之一者通 L的傳輸@ 1G5及-在不同頻帶中通信的接收器⑴(諸 如,行動TV調譜器、藍芽接收器、微波存取全球互通 (倾AX)接收器或全球定位系統(Gps)接收器在該 說明之實施例中,接收路徑133包括一可選接收(rx)遽 波器刚。可選接收滤波器⑽可包括—帶通遽波器或其他 慮波器配置,其允許在接收器135之頻帶内由天線12〇接 收之通彳5仏5虎傳遞至接收器135,同時阻斷在接收器135之 頻帶外的信號。201214999 VI. Description of the Invention: [Technical Field] The present invention relates to a method for compensating between two or more communication elements between two or more communication channels or in a communication system System and method for signal interference. RELATED APPLICATIONS RELATED APPLICATIONS STATEMENT OF RELATED APPLICATIONS RELATED APPLICATIONS RELATED APPLICATIONS right. The present application also claims the benefit of U.S. Provisional Patent Application Serial No. 61/375,491, filed on Aug. 20, 2010. The present application also relates to U.S. Patent Application Serial No. [A. No. 07982.1 05 112] entitled "Cascaded Filter Based Noise and Interference Canceller" filed on the same date as the present application. The entire content of each of the aforementioned priority and related application is hereby incorporated by reference in its entirety. [Prior Art] [Summary of the Invention] Compensating for interference can improve signal quality, improve communication bandwidth or information carrying capacity, or improve receiver sensitivity. Communication channels can include transmission lines, printed circuit board (PCB) traces, flexible circuit traces 'electrical conductors, waveguides, sinks 201214999 Λ : flow lines, communication antennas, media providing signal paths, or active or passive circuits or circuit components ( Such as chopper, vibratory, diode, vc〇, pLL, amplifier, digital or mixed signal integrated circuit). Thus, the channel may include Global System for Mobile Communications (GSM) devices, processor "detectors, signal sources, H & 'connector' circuit traces or digital signal processing (DSP) chips (to name a few possibilities) The exemplary embodiments described herein may include high input power series filter (HIPCF) noise and interference cancellation devices. The exemplary HIPCF cancellers described herein may support selective cancellation, correction, addressing, or compensation. Interference, electromagnetic interference (face), noise (eg, phase noise, intermodulation products, and other interfering noise), clutter, or communication systems (such as high-speed digital communication systems enabled by portable electronic devices) - or other bad spectral components associated with multiple communication paths. For the purposes of this specification, the term "high power" refers to signals having up to about +33 _ (relative to - milliwatts). Decibel number) or greater power ratio. For example, the exemplary HIPCF canceller described herein can be connected to the output of a cellular telephone power amplifier having an output power of this magnitude. The HIPCF canceller can obtain a sample of the communication signal that imposes interference from the communication path of the infringing transmission device, and processes the sampled signal to produce an interference compensation signal. The HIPCF may deliver the interference compensation signal to or within the communication path of the victim receiver of the interferer to cancel, mitigate, suppress or otherwise compensate for the received interference. [Embodiment] 5 201214999 The same numerals are used throughout the drawings to indicate the same or corresponding (but not necessarily identical) elements, and the exemplary embodiments of the present invention are described in detail. 1 is a functional block diagram of a __communication system (10), in accordance with some demonstrative embodiments. Referring to Figure 1, a communication system 100 includes a transmitter 105 that transmits electromagnetic signals via a transmission antenna 115. A transmission path including one or more electrical conductors also couples the transmitter 105 to the transmission antenna 11 5 . In certain exemplary embodiments, transmitter 105 uses one or more communication standards or methods (such as = ball mobile communication system (GSM), code division multiple access (cdma), long term decision (LTE), broadband Code Division Multiple Access (W-CDMA) 'Digital Honeycomb System (DCS), Personal Communication Service (PCS) and Wireless Local Area Network (WLAN) transmit data to remote devices. It will be appreciated by those skilled in the art having the benefit of this disclosure that the communication system (10) described herein is not limited to the aforementioned communication standards and methods ' is readily available for use with many other types of signal transmission techniques. The transmission path between the transmitter 105 and the transmission antenna 丄〇5 is set by the power amplifier 11Ge power amplifier UG to adjust the power level of the signals before the output signals of the transmitters are propagated by the antenna 115. When the power amplifier 110 adjusts the power level of the signal, a poor spectral component can be introduced to the signal. For example, transmitting $1G5 can transmit a signal with a certain carrier frequency or a certain tone. The power amplifier m can introduce an intermodulation product having a frequency different from this carrier frequency or tone. Other components associated with transmitting $1〇5 can also introduce noise or other undesirable spectral components onto the signal. For example, transmitter 1〇5 can include a local blue blue and/or one or more upconverting mixers that can include a bad spectral component number, sometimes referred to as an out-of-band blocking signal 201214999. The out-of-band noise (introduced to the signal outside the band transmitted by the nickname of Gandenham. The communication system! 00 also includes a receiver 135 that passes through 120 and receives the receiving antenna 12 for 2〇 The receiving path 133 electrically coupled to the receiver 135 receives the signal. In some cases, the receiver 135 receives the same or different frequency bands in the feeder (9). Signals within the frequency band. For example, a mobile electronic device such as a mobile phone, a personal digital assistant (pDA) or a mobile computer may include a transmission via the one of the communication protocols discussed above, @1G5 and - Receiver (1) for communication in different frequency bands (such as a mobile TV spectrometer, a Bluetooth receiver, a microwave access global interworking (pour AX) receiver, or a global positioning system (Gps) receiver, in the illustrated embodiment, The receive path 133 includes an optional receive (rx) chopper. The receive filter (10) may include a bandpass chopper or other filter configuration that allows the passer 5 仏5 received by the antenna 12 在 in the frequency band of the receiver 135 to pass to the receiver 135 while blocking A signal outside the band of the receiver 135.

接收器135之頻帶可在傳輸器1〇5之頻帶附近,使得 由力率放大器110產生之相位雜訊或其他不良頻譜分量或 沿著傳輸路徑1G7安置之[分量使接收器135之敏感性 降級。舉例而言,通信系統⑽可體現於具有CDMA、GSM 或LTE傳輸器105及作為接收器135之行動τν調證器的行 動裝置中。某些類型之CDMA及GSM傳輸器1〇5在約8〇〇 MHz至900 MHz之頻帶内傳輸信號,且某些類型之LTE傳 輸器105在約698 MHz至798 MHz之頻帶内操作。此等傳 201214999 輸之信號常包括具有處於45 0 MHz與776 MHz之間的頻率 之相位雜訊,該頻率落入一些行動TV調諧器及許多其他通 信裝置之接收頻帶内》若將此帶内相位雜訊強加至接收器 13 5之彳g號路徑上(例如,自傳輸天線11 $空中耦接至接收 天線120),則相位雜訊可使接收器135之敏感性降級。通 常’諸如接收遽波器140之接收濾波器不濾出帶内雜訊, 此係因為該雜訊處於接收器1 3 5之頻帶(及因此接收濾波 器140之通帶)内。因此,相位雜訊可傳遞穿過接收濾波 器140且使接收器13 5之敏感性降級。 為了防止由自傳輸天線115之傳輸所造成的帶内雜訊 (具有處於接收器135之頻帶内的頻率之雜紈)或附近帶 外雜訊造成之接收器135之敏感性的降級,通信系統1〇〇 包括一 HIPCF消除器130〇藉由取樣裝置125在功率放大 器110之輸出端處將HIPCF消除器13〇之輸入端耦接至傳 輸路徑107。取樣裝置125可包括電容器(例如,取樣或子 取樣電容器)、電阻器、耦接器、線圈、變壓器、信號跡線 或天線/彳貞測器。具有兩個谭或兩個端子之取樣裝置(諸如, 電阻器、電容器、線圈、變壓器或信號跡線)可具有電耦 接至傳輸路徑107之第一埠及電耦接至HIpCF消除器13〇 之輸入端之第二埠。在大體具有—個端子之天線/偵測器 中,第二端子由自裝置突出之電磁場形成,從而允許將裝 置定位得靠近傳輸路徑1 〇7。 在該說明之實施例中,取樣裝詈丨 衣罝125在功率放大器110 之輸出端處連接至傳輸路徑1〇7。取檨奘罟 傢忒置125在功率放大 8 201214999 器110之輸出端處獲得信號之樣本(「取樣之傳輸作號) 且將取樣之傳輸信號提供至HIPCF消除器130。在某^ 示性實施例t,取樣裝f 125可對取樣之傳輸信號產:衰 減。舉例而言,取樣之傳輸信號之振幅可比在功率放大器 110之輸出端處的信號低2GdBe (相對於載波之分貝數 在某些例示性實施例中’取樣裝置125包括_壓控電 容器(可變電抗器),其用於將頻率相依衰減修整至所要 值,且因此補償增益波動。在一實例中,取樣裝置125包 括-塵控可變電抗器。可經由控制電壓調整可變電抗号之 電容。此控制電Μ可由mPCF消除# 13()之控制器235 (圖 2)產生,且經由一或多個電導體127傳輸至取樣裝置η。 刪F消除3130選擇性抑制或消除原本會干擾接收 器⑴之敏感性的具有處於接收器135之接收頻帶内或附 近之頻率的由功率放大n UG(或沿著傳輸路徑iG7之另一 組件)產生之干擾信號(例如,相位雜訊、互調變產物、 不良頻譜分量等)。贈CF消除器13Q獲得由功率放大器ιι〇 輸出的信號之樣本’且處理取樣之傳輸信號以產生干擾補 償信號’干擾補償信號當施加至接„ 135之輸入端時抑 制或消除干擾信號。在某些例示性實施例中,HEP消除 器130使用經由包括一或多個電導體之回饋路徑刚自接 收器⑴獲得之回饋(諸如,接收信號品質指示符)· 干擾補償信號。下文結合圖2至圖31進—步詳細描述例示 性HIPCF消除器130。 在消除點134處將干擾補償信號施加至接收器135之 201214999 =收路徑133β在某些例示性實施例中, 133之電導體與沿著Η 关收路仫 ㈣入十〜 ㈣益130之輪出路徑之.電導 13:。° 一」吏得該等電導體進行電接觸來實施消除點 牛歹1而s ’接收路# 134之撓性電路跡線可連接至 HIPCF輸出端之撓性電路跡線。在某些例示性實施例中, 可使用諸如輪接器 ' 求和節,點、加法器或另_合適技術之 組件將干擾補償信號施加至接收器135之接收路徑US。 〃圖1中說明之通信系統100可傳輸具有處於第一頻率 範圍内之頻率的電磁信1,及接收具有處於第二頻率範圍 内之頻率的電磁信號1 __頻率範圍可靠近第二頻率範圍 或甚至包括與第二頻率範圍重疊或包括於第二頻率範圍内 之頻率。在操作中,傳輸器105沿著傳輸路# 107將信號 傳輸至功率放大器110。功率放大器110調整自傳輸器 接收的信號之強度,且將強度調整之信號輸出至傳輸天線 11 5。傳輸天線丨丨5傳輸自功率放大器丨丨〇接收之信號。透 過空中將由傳輸天線115傳輸的信號之一部分耦接至接收 天線120。若由接收器135接收到,則源自傳輸天線ι〇5的 耦接至接收天線120上之信號可干擾接收器135之敏感性 或使接收器13 5之敏感性降級。舉例而言,具有一處於接 收器135之頻帶内或靠近接收器135之頻帶的頻率之由傳 輸天線11 5傳輸之信號(例如,顯得如由功率放大器丨【〇 產生的相位雜訊尾之互調變頻譜)可使接收器135之敏感 性降級。為了補償此干擾或敏感性降級,Hipcf消除器丨3〇 獲得由功率放大器110輸出的信號之樣本(經由取樣裝置 10 201214999 125 ) ’且處理取樣之傳輸信號以產生干擾補償信號,干擾 補償4s號當施加至接收器1 3 5之輸入端時補償由傳輸天線 115所傳輸之信號強加於接收器135上之干擾。 圖2為根據某些例示性實施例的圖1之hipcf消除琴 130之方塊示意圖。例示性HIPCF消除器13〇包括一帶通 濾波器(輸入BPF ) 205,其自取樣裝置1 25接收信號樣本。 在此例示性實施例中,輸入BPF 205包括一電感器li及兩 個可切換電容器C1及C2。藉由調整可切換電容器ci及 C2中之一者或兩者的電容,輸入bpf 205之共振頻率係可 °周D白的。下文結合圖3進一步詳細描述可切換電容器〇1及 C2。 在某些例示性實施例中,電感器L1為高Q電感器。高 Q電感器之使用可提供效能優勢,諸如,將額外衰減提供至 處於輸入BPF 205之通帶外的信號且因此以保護在hipcf 消除器130中之隨後分量,從而允許以線性換取較低雜訊 底限。在某些例示性實施例中,電感器Li為低q電感器。 在某些例示性實施例中,輸入BPF 205包括一 q增強電路 29〇以改良電感器L1之品質因數(Q因數)。然而,一些q 增強電路可將雜訊或干擾引入至傳遞穿過輸入bpf 2〇5之 信號上。 可將輸入BPF 205之共振頻率調諧至接收器135之接 收頻率(或附近)以便傳遞可存在於取樣之傳輪信號上的 此頻率下之干擾信號且阻斷或濾出侵犯信號,諸如,由傳 輸器1〇5傳輸之基調或載波信號以及其他帶外阻斷信號(具 201214999 有^於接收器之頻帶外之頻率的信號)。若接收器i35包括 -行動τν調諧器或其他頻率可調整裝置,則可調整輸入 BPF 205之共振頻率以匹配行動τν調諧器被設^至的當前 頻道之頻率。舉例而言,行動τν調諧器之頻道5〇可具有 處於686應2至692則2之頻帶内的接收頻率。當將行動 τν調諧至此頻率時’亦可自動地將輸入BpF 2〇5調諧至此 頻率。若隨後將行動TV調諧至具有一不同接收頻率之另— 頻道,則可調整輸入BPF 205之共振頻率以匹配新頻道之 接收頻率。舉例而t,控制器235可與接收器135通信以 獲得用於接收H 135之當前接收頻率。作為回應,控制器 235可調整可切換電容器C1及C2使得輸入BPF 2〇5之共 振頻率靠近或等於接收頻率。 輸入BPF 205減小具有與輸入BPF 2〇5之共振頻率不 同的頻率之信號之振幅。舉例而言,若接收器135及傳輸 器105在不同頻率下操作,則輸入BpF 2〇5可減小取樣之 傳輸k號的基調之振幅。在某些例示性實施例中,輸入b抒 2〇5可將位於824 ΜΗζ的取樣之傳輸信號之基調之振幅減 小約13 dBc至18 dBc ’而其中心頻率調諧至749 ΜΗζ (對 應於行動TV調諧器之頻道60 )。輸入BPF 205之輸出電耦 接至低雜訊放大器(LNA)210〇LNA210放大由輸入BPF 2〇5 輸出之信號,且將此放大之信號傳遞至第二帶通濾波器(本 文中被稱作LNA-BPF 2 15 )。在某些例示性實施例中,[ΝΑ 210為串接LNA。 在此例示性實施例中,LNA-BPF 215包括一電感器L2 12 201214999 - 及一可切換電容器C3。在某些例示性實施例中’電感器L2 為尚Q電感器。在某些例示性實施例中,電感器L2為低q 電感器。在某些例示性實施例中,LNA-BPF 2 15包括一 q 增強電路29 1以改良電感器[2之Q因數。在某些例示性實 施例中’ L2之Q因數比l 1之Q因數小。在某些例示性實 施例中’ L2之Q因數比L2之Q因數大。 類似於輸入BPF 205 ’ LNA-BPF 215之共振頻率可設定 至接收器135之接收頻率以傳遞處於此頻率下之信號且進 一步濾、波來自取樣之傳輸信號的基調及帶外阻斷信號。在 某些例示性實施例中,LNA-BPF 215可將位於824 MHz的 基調之振幅減小約1 3 dBc至18 dBc,而其t心頻率調諧至 749 MHz。 LN A BPF 215之輸出端電輕接至調整由lnA-BPF 2 1 5 輸出的信號之振幅之可變增益放大器(VGA) 22〇。在某些 例示性實施例中,VGA 220包括用於調整自LNA BpF 215 接收的·信號之振幅之多個可變增益放大器。由vga 22〇輸 出的振巾田調整之彳5號接著傳遞至第三帶通濾波器(卩增強型 BPF ) 225 〇 Q增強型BPF 225可包括一電感器匕3及一可切換電戈 器615(圖6),電感器L3及可切換電容器615用於將q方 強型bpf 225職至接收器135之接收頻率以傳遞處於a 頻率下之任何信號且進一步渡波取樣之傳輪信號的基⑹ 帶外阻斷m在某些料性實施财,電^l3可^ Q電感b (例如’晶片外)或低Q晶片上螺旋電感器^ 13 201214999 某些例示性實施例中,Q增強型BPF 225亦包括一 Q增強 電路292。在某些例示性實施例中,Q增強型BPF 225包括 電流開關(圖6 )以調整其Q因數。在某些例示性實施例中, Q增強型BPF 225可進一步將位於824 MHz的自VGA 220 接收之信號中剩餘的基調之振幅減小高達26 dBc或更多, 而其中心頻率調諧至749 MHz。Q增強型BPF 225之輸出端 電耦接至I/Q調變器230。 雖然在該說明之實施例中,使用一串帶通濾波器205、 215及225濾波具有處於接收器135之頻帶外的頻率之雜訊 及其他信號,但除了帶通濾波器205、215及225中之一或 多者之外或代替帶通濾波器205、215及225中之一或多 者’亦可利用其他類型之遽波器。舉例而言,在某些例示 性實施例中可使用一或多個高通及/或低通濾波器。該串帶 通濾波器205、2 1 5、225阻斷或減小在接收器丨35之接收 頻帶外的信號之振幅,其通常不會干擾接收器之敏感性。 經由帶通濾波器205、215及225將處於接收器135之接收 頻帶内的信號傳遞至I/Q調變器230 〇此等帶内信號亦由 LNA 210 及 VGA 220 放大。 I/Q調變器230調整自Q增強型BPF 225接收的信號之 相位、振幅及延遲中之至少-者以產生干擾補償信號,干 擾補償信號當施加至接收器135之接收路徑133時減少、 抑制、消除或另外補償由傳輸天線115所傳輸之信號強加的 存在於接收器135之接收路徑丨33上的雜訊及/或干擾。在 某些例示性實施例中,此干擾補償信號具有相對於帶内雜 14 201214999 _ 訊信號之相位的180度相移及靠近帶内雜訊信號之振幅或 與帶内雜訊信號之振幅相同的振幅。因此,干擾補償信號 減少或消除帶内雜訊信號。 在某些例示性實施例中,使用來自受害接收器之接收 1吕號品質指示符的回饋(諸如,位元錯誤率(Ber )、封包 錯誤率(PER )、接收信號強度指示符(RSSI )、雜訊底限、 信雜比(SNR)、錯誤向量幅度(EVM )及位置準確度(對 於GPS)等)基於儲存於記憶體裝置76〇 (圖7)中且由控 制器235執行之一組指令(例如,演算法)調諧振幅、相 位及延遲之前述參數。下文參看圖17至圖31描述用於判 定用於s周整振幅、相位及延遲之設定的例示性演算法。 如圖7中所示,在某些例示性實施例中,HIPCf消除 器丨3〇包括一耦接至I/Q調變器230之輸入端的功率偵測器 745,諸如,峰值偵測器。功率偵測器745感測或量測在 调變益230之輸入端處的信號之功率位準,且將功率位準 之指示提供至控制器235。控制器235使用此功率位準值修 i Q增強型BPF 225之電流及因此Qmax以用於維持由傳輸 天線115所傳輸之信號強加於接收器n5上的雜訊及/或干 擾之可接受抑制。在某些例示性實施例中,肺CF消除器 130包括一類比/數位(A/D)轉換器75〇,其自功率偵測器 川。接收功率位準值且將功率位準值之數位表示提供至控The frequency band of the receiver 135 can be near the frequency band of the transmitter 1〇5 such that the phase noise or other bad spectral components generated by the force amplifier 110 or the components placed along the transmission path 1G7 degrade the sensitivity of the receiver 135. . For example, the communication system (10) can be embodied in a mobile device having a CDMA, GSM or LTE transmitter 105 and as a mobile τ dictator of the receiver 135. Some types of CDMA and GSM transmitters 1〇5 transmit signals in the frequency band of approximately 8〇〇 MHz to 900 MHz, and certain types of LTE transmitters 105 operate in the frequency band of approximately 698 MHz to 798 MHz. These transmitted signals of 201214999 often include phase noise with a frequency between 45 0 MHz and 776 MHz, which falls within the receive band of some mobile TV tuners and many other communication devices. The phase noise is imposed on the path of the receiver 13 5 (e.g., from the transmitting antenna 11 $ to the receiving antenna 120), the phase noise can degrade the sensitivity of the receiver 135. Typically, a receive filter such as receive chopper 140 does not filter out-band noise because the noise is in the band of receiver 135 (and thus the pass band of receive filter 140). Therefore, phase noise can be passed through the receive filter 140 and degrade the sensitivity of the receiver 135. In order to prevent degradation of the sensitivity of the receiver 135 caused by in-band noise (having noise in the frequency band of the receiver 135) caused by the transmission from the transmission antenna 115 or near-band out-of-band noise, the communication system A HIPCF canceller 130 is coupled to the transmission path 107 by the sampling device 125 at the output of the power amplifier 110 at the input of the HIPCF canceller 13A. Sampling device 125 can include a capacitor (e.g., a sampling or sub-sampling capacitor), a resistor, a coupler, a coil, a transformer, a signal trace, or an antenna/detector. A sampling device having two tan or two terminals, such as a resistor, capacitor, coil, transformer or signal trace, can have a first turn electrically coupled to the transmission path 107 and be electrically coupled to the HIpCF canceller 13 The second end of the input. In an antenna/detector having substantially one terminal, the second terminal is formed by an electromagnetic field protruding from the device, thereby allowing the device to be positioned close to the transmission path 1 〇7. In the illustrated embodiment, the sampling cassette 125 is coupled to the transmission path 1〇7 at the output of the power amplifier 110. The home device 125 obtains a sample of the signal at the output of the power amplifier 8 201214999 110 ("sampling transmission number") and provides the sampled transmission signal to the HIPCF canceller 130. In a certain implementation For example t, the sampling device f 125 can produce a decay for the transmitted signal of the sample. For example, the amplitude of the sampled transmission signal can be lower than the signal at the output of the power amplifier 110 by 2 GdBe (relative to the decibel number of the carrier in some In the exemplary embodiment, the 'sampling device 125 includes a voltage controlled capacitor (variable reactor) for trimming the frequency dependent attenuation to a desired value, and thus compensating for gain fluctuations. In an example, the sampling device 125 includes - Dust-controlled varactor. The capacitance of the variable reactance can be adjusted via the control voltage. This control can be generated by the controller 235 (Fig. 2) of the mPCF eliminator # 13() and via one or more electrical conductors. 127 is transmitted to the sampling device η. The F-eliminating 3130 selectively suppresses or eliminates the power amplification n UG (or along the frequency having a frequency in or near the receiving band of the receiver 135 that would otherwise interfere with the sensitivity of the receiver (1). An interference signal generated by another component of the transmission path iG7 (for example, phase noise, intermodulation products, bad spectral components, etc.). The CF canceller 13Q obtains a sample of the signal output by the power amplifier ιι〇' and processes the sample The signal is transmitted to generate an interference compensation signal. The interference compensation signal suppresses or cancels the interference signal when applied to the input of the port 135. In certain exemplary embodiments, the HEP canceller 130 is used to include one or more electrical conductors. The feedback path is just the feedback obtained from the receiver (1) (such as the received signal quality indicator). The interference compensation signal. The exemplary HIPCF canceller 130 is described in more detail below in conjunction with Figures 2 through 31. The interference compensation signal is applied to the receiver 135 201214999 = the receiving path 133β. In some exemplary embodiments, the electrical conductor of 133 and the turn-off path along the turn-off path (four) into ten (4) benefits 130. Conductance 13 :°°” The electrical conductors of the electrical conductors are electrically connected to implement the elimination of the point 1 and the flexible circuit trace of the 'receiver ##134 can be connected to the flexible output of the HIPCF output. Road Traces. In some exemplary embodiments, an interference compensation signal may be applied to the receive path US of the receiver 135 using components such as a tracker 'sum sum, point, adder, or another suitable technique. The communication system 100 illustrated in FIG. 1 can transmit an electromagnetic signal 1 having a frequency within a first frequency range, and receive an electromagnetic signal having a frequency within a second frequency range. The frequency range can be close to the second frequency range or It even includes frequencies that overlap or are included in the second frequency range. In operation, the transmitter 105 transmits signals to the power amplifier 110 along the transmission path #107. The power amplifier 110 adjusts the strength of the signal received from the transmitter and outputs the intensity-adjusted signal to the transmission antenna 115. The transmission antenna 丨丨5 transmits the signal received from the power amplifier 。. One of the signals transmitted by the transmission antenna 115 is partially coupled to the receiving antenna 120 over the air. If received by the receiver 135, the signal from the transmit antenna ι 5 coupled to the receive antenna 120 can interfere with the sensitivity of the receiver 135 or degrade the sensitivity of the receiver 135. For example, a signal transmitted by the transmission antenna 115 having a frequency in or near the frequency band of the receiver 135 (e.g., appears as a phase noise tail generated by a power amplifier 〇 [〇] The modulated spectrum) can degrade the sensitivity of the receiver 135. In order to compensate for this interference or sensitivity degradation, the Hipcf canceller 〇3〇 obtains a sample of the signal output by the power amplifier 110 (via the sampling device 10 201214999 125 ) 'and processes the sampled transmission signal to generate an interference compensation signal, interference compensation 4s The interference imposed by the signal transmitted by the transmitting antenna 115 on the receiver 135 is compensated when applied to the input of the receiver 135. 2 is a block diagram of the hipcf cancellation piano 130 of FIG. 1 in accordance with some exemplary embodiments. The exemplary HIPCF canceller 13A includes a bandpass filter (input BPF) 205 that receives signal samples from the sampling device 125. In this exemplary embodiment, input BPF 205 includes an inductor li and two switchable capacitors C1 and C2. By adjusting the capacitance of one or both of the switchable capacitors ci and C2, the resonant frequency of the input bpf 205 can be white D. The switchable capacitors 〇1 and C2 are described in further detail below in conjunction with FIG. In certain exemplary embodiments, inductor L1 is a high Q inductor. The use of a high Q inductor can provide a performance advantage, such as providing additional attenuation to the signal outside the passband of the input BPF 205 and thus protecting subsequent components in the hipcf canceller 130, allowing for a linear exchange for lower miscellaneous The bottom limit. In certain exemplary embodiments, inductor Li is a low q inductor. In some exemplary embodiments, input BPF 205 includes a q enhancement circuit 29 to improve the quality factor (Q factor) of inductor L1. However, some q enhancement circuits can introduce noise or interference into the signal that passes through the input bpf 2〇5. The resonant frequency of the input BPF 205 can be tuned to the receive frequency (or near) of the receiver 135 to pass the interfering signal at this frequency that can be present on the sampled transmit signal and to block or filter out the infringing signal, such as by The tone or carrier signal transmitted by transmitter 1〇5 and other out-of-band blocking signals (with 201214999 signals having frequencies outside the band of the receiver). If the receiver i35 includes a -action τν tuner or other frequency adjustable device, the resonant frequency of the input BPF 205 can be adjusted to match the frequency of the current channel to which the tuner τν tuner is set. For example, the channel 〇 of the mobile τν tuner may have a receive frequency in the band of 686 should be 2 to 692 then 2. When the action τν is tuned to this frequency, the input BpF 2〇5 can also be automatically tuned to this frequency. If the mobile TV is subsequently tuned to another channel having a different receive frequency, the resonant frequency of the input BPF 205 can be adjusted to match the receive frequency of the new channel. For example, t, controller 235 can communicate with receiver 135 to obtain the current receive frequency for receiving H 135. In response, controller 235 can adjust switchable capacitors C1 and C2 such that the resonant frequency of input BPF 2〇5 is near or equal to the receive frequency. The input BPF 205 reduces the amplitude of the signal having a different frequency than the resonant frequency of the input BPF 2〇5. For example, if receiver 135 and transmitter 105 operate at different frequencies, input BpF 2〇5 can reduce the amplitude of the tone of the transmitted transmission k number. In some exemplary embodiments, the input b抒2〇5 reduces the amplitude of the tone of the transmitted signal at 824 减小 by approximately 13 dBc to 18 dBc′ and its center frequency is tuned to 749 ΜΗζ (corresponding to action) TV tuner channel 60). The output of the input BPF 205 is electrically coupled to a low noise amplifier (LNA) 210. The LNA 210 amplifies the signal output by the input BPF 2〇5 and passes the amplified signal to a second band pass filter (referred to herein as LNA-BPF 2 15). In certain exemplary embodiments, [ΝΑ 210 is a serial LNA. In this exemplary embodiment, LNA-BPF 215 includes an inductor L2 12 201214999 - and a switchable capacitor C3. In some exemplary embodiments, 'inductor L2 is a Q-inductor. In certain exemplary embodiments, inductor L2 is a low q inductor. In some exemplary embodiments, LNA-BPF 2 15 includes a q enhancement circuit 29 1 to improve the Q factor of the inductor [2]. In some exemplary embodiments, the Q factor of 'L2 is smaller than the Q factor of l1. In some exemplary embodiments, the Q factor of 'L2 is greater than the Q factor of L2. The resonant frequency similar to the input BPF 205 ' LNA-BPF 215 can be set to the receive frequency of the receiver 135 to pass the signal at this frequency and further filtered, the tone of the transmitted signal from the sample, and the out-of-band blocking signal. In some exemplary embodiments, the LNA-BPF 215 can reduce the amplitude of the tone at 824 MHz by about 13 dBc to 18 dBc, while its t-heart frequency is tuned to 749 MHz. The output of the LN A BPF 215 is electrically connected to a variable gain amplifier (VGA) 22 that adjusts the amplitude of the signal output by the lnA-BPF 2 1 5 . In some exemplary embodiments, VGA 220 includes a plurality of variable gain amplifiers for adjusting the amplitude of the signals received from LNA BpF 215. The vibrating field adjustment 彳5 output from the vga 22〇 is then passed to the third band pass filter (卩 enhanced BPF) 225 〇Q enhanced BPF 225 can include an inductor 匕3 and a switchable electric device 615 (FIG. 6), the inductor L3 and the switchable capacitor 615 are used to base the q-square strong bpf 225 to the receiving frequency of the receiver 135 to transmit any signal at a frequency and further sample the carrier signal of the wave sampling. (6) Out-of-band blocking m can be implemented in certain materials, and the inductor can be a Q inductor b (eg, 'out-of-chip) or a low-Q on-wafer inductor ^ 13 201214999 In some exemplary embodiments, Q-enhanced The BPF 225 also includes a Q enhancement circuit 292. In certain exemplary embodiments, the Q-enhanced BPF 225 includes a current switch (Fig. 6) to adjust its Q factor. In certain exemplary embodiments, the Q-enhanced BPF 225 may further reduce the amplitude of the remaining tone in the signal received from the VGA 220 at 824 MHz by up to 26 dBc or more, with the center frequency tuned to 749 MHz. . The output of the Q-enhanced BPF 225 is electrically coupled to the I/Q modulator 230. Although in the illustrated embodiment, a series of bandpass filters 205, 215, and 225 are used to filter noise and other signals having frequencies outside the frequency band of receiver 135, in addition to bandpass filters 205, 215, and 225. Other types of choppers may be utilized in addition to or in lieu of one or more of the bandpass filters 205, 215, and 225. For example, one or more high pass and/or low pass filters may be used in certain exemplary embodiments. The string pass filter 205, 2 1 5, 225 blocks or reduces the amplitude of the signal outside the receive band of the receiver 丨 35, which typically does not interfere with the sensitivity of the receiver. The signals in the receive band of the receiver 135 are passed through the bandpass filters 205, 215 and 225 to the I/Q modulator 230. These in-band signals are also amplified by the LNA 210 and VGA 220. The I/Q modulator 230 adjusts at least one of the phase, amplitude, and delay of the signal received from the Q-enhanced BPF 225 to generate an interference compensation signal that is reduced when applied to the receive path 133 of the receiver 135, The noise and/or interference present on the receive path 丨33 of the receiver 135 imposed by the signal transmitted by the transmit antenna 115 is suppressed, cancelled or otherwise compensated. In some exemplary embodiments, the interference compensation signal has a 180 degree phase shift relative to the phase of the in-band impurity 14 201214999 signal signal and is close to the amplitude of the in-band noise signal or the same amplitude as the in-band noise signal. The amplitude. Therefore, the interference compensation signal reduces or eliminates in-band noise signals. In some exemplary embodiments, feedback from the victim receiver's Receive 1 quality indicator is used (such as bit error rate (Ber), packet error rate (PER), received signal strength indicator (RSSI). , noise floor, signal-to-noise ratio (SNR), error vector magnitude (EVM), and positional accuracy (for GPS), etc. based on one stored in memory device 76 (FIG. 7) and executed by controller 235 Group instructions (eg, algorithms) tune the aforementioned parameters of amplitude, phase, and delay. An exemplary algorithm for determining the settings for s-round amplitude, phase, and delay is described below with reference to Figures 17 through 31. As shown in FIG. 7, in some exemplary embodiments, the HIPCf canceller 丨3 includes a power detector 745 coupled to the input of the I/Q modulator 230, such as a peak detector. Power detector 745 senses or measures the power level of the signal at the input of modulation variable 230 and provides an indication of the power level to controller 235. Controller 235 uses this power level value to modify the current of i Q-enhanced BPF 225 and thus Qmax for maintaining acceptable suppression of noise and/or interference imposed on receiver n5 by the signal transmitted by transmission antenna 115. . In certain exemplary embodiments, the lung CF eliminator 130 includes an analog/digital (A/D) converter 75A, which is a self-powered detector. Receiving a power level value and providing a digital representation of the power level value to the control

Hi35。控制器235執行校準常式以確保由傳輸天線115 a。輸之信號強加於接收器135上的雜訊及/或干擾之可接 又程度之抑制。下文參看圖9至圖16描述例示性校準常式。 15 201214999 可按微控制器、微處理器、電腦、狀態機、可程式化 裝置、控制邏輯、類比及數位電路或其他適當技術之形式 實施控制器235。控制器235可執行用於調整帶通濾波器 205 215及225中之每一者的設定及用於操作可切換電容 器C 1至C3及SCA 6 1 5(圖6 )之一或多個處理程序或程式。 在一實例中’控制器235回應於接收器135的頻率之改變 自動調整帶通濾波器205、215、225中之一或多者的共振 頻率。舉例而言,若接收器135包含一行動τν調諧器,則 控制器235調整帶通濾波器205、215、225之共振頻率以 匹配或對應於接收器頻率。控制器235藉由分別調整可切 換電容器C1至C3及SCA 615之電容來調整帶通濾波器 2〇5、215、225之共振頻率,如下參看圖3所論述。 控制器235亦可調整或改進I/Q調變器23〇、帶通濾波 器205、2丨5及225及VGA22〇之設定以考量環境改變諸 如,溫度、供應電壓及天線耦接之改變。在某些例示性實 施例中,控制器235執行-校準常式(g 16 )以基於此等 環境改變識別可接受之設定且儲存識別之最佳設定以用於 隨後使用。演算法可體現為儲存於控制器235上或記憶體 儲存裝置760上之軟體。或者, 硬體裝置(諸如,離散邏輯閘) 演算法可實施於一或多個 中。 HIPCF消除器130亦包括辅助電路240。如圖7中所 不,辅助電路240 &括一溫度感測$ 755、―功㈣測器 745、一或多個類比/數位轉換器75〇、數位/類比轉換器及用 於由HIPCF 4除n 13Q使用的其他類型之電路。輔助電路 16 201214999 - 240亦可包括—或多個記憶體儲存裝置760,諸如,ram、 R〇M及/或快閃記憶體。用於每一帶通濾波器205、215及 225之設定可儲存於記憶體儲存裝置760上。另外,用於UQ 調變器230之設定可儲存於記憶體儲存裝置760上。舉例 而言’用於行動TV調諧器之每一頻道之設定可儲存於記憶 體儲存裝置760上。 HIPCF消除器13〇之某些元件或功能可體現於積體電 路中’例如,如由圖2說明之晶片邊界25〇描繪。舉例而 吕’可切換電容器C1至C3、LNA 210、VGA 220、Q增強 型BPF 225、I/Q調變器23〇、控制器235及輔助電路24〇 中之一或多者可體現於單一積體電路或多個積體電路中。 雖然在該說明之例示性實施例中將電感器Li及L2說明為 晶片外電感器,但其他例示性實施例可使用處於帶通濾波 '器205及215中之晶片上電感器。積體電路及/或電感器L1 及L2可安裝於行動裝置(諸如,行動電話)以及其他通信 裝置上。單一或多個積體電路可體現於互補金氧半導體 (CMOS)中或上。 參看圖1及圖2,HIPCF消除器130抑制、消除或另外 補償由傳輸器105經由傳輸天線115所傳輸之信號強加於接 收器135上的帶内或附近帶外(相對於接收器135之接收 頻率)干擾信號。亦即,HIPCF消除@ UG補償具有處於 接收器135之頻帶内或附近之頻率的由傳輸天線ιΐ5傳輸之 干擾信號。HIPCF消除器130自取樣裝置125獲得由傳輸 器1〇5傳輸的信號之樣本,且處理該等樣本以產生干擾補 17 201214999 償信號’干擾補償信號當施加至接收器i 3 5之輸入端時補 償強加之干擾信號。 例示性HIPCF 130包括三個帶通濾波器2〇5、215及 225,其各自濾波、阻斷或減少相對於接收器ι35之接收頻 率處於帶外的自取樣裝置125接收的取樣之傳輸信號之信 號分量之強度。相對於接收器135處於帶内的取樣之傳輸 仏號之分量用以產生干擾補償信號。取樣之傳輸信號之此 專刀:E之相位、振幅及延遲中的至少一者由I/q調變器230 調整以產生干擾補償信號。控制器235可執行一或多個校 準演算法及/或一或多個調諧演算法以改良干擾補償之位 準。控制器235可獲得來自功率偵測器745或來自接收器 1 3 5之回饋且在演算法之執行期間使用此回饋。下文參看圖 9至圖3 1詳細論述此等演算法。Hi35. The controller 235 performs a calibration routine to ensure that it is transmitted by the antenna 115a. The transmitted signal is imposed on the receiver 135 and the interference and the degree of interference are suppressed. An exemplary calibration routine is described below with reference to Figures 9-16. 15 201214999 Controller 235 may be implemented in the form of a microcontroller, microprocessor, computer, state machine, programmable device, control logic, analog and digital circuitry, or other suitable technique. Controller 235 can perform settings for adjusting each of band pass filters 205 215 and 225 and one or more processes for operating switchable capacitors C 1 through C3 and SCA 6 15 (FIG. 6) Or program. In an example, controller 235 automatically adjusts the resonant frequency of one or more of band pass filters 205, 215, 225 in response to changes in the frequency of receiver 135. For example, if receiver 135 includes a motion τν tuner, controller 235 adjusts the resonant frequencies of bandpass filters 205, 215, 225 to match or correspond to the receiver frequency. The controller 235 adjusts the resonant frequencies of the bandpass filters 2〇5, 215, 225 by adjusting the capacitances of the switchable capacitors C1 to C3 and SCA 615, respectively, as discussed below with reference to FIG. Controller 235 can also adjust or modify the settings of I/Q modulator 23, bandpass filters 205, 2丨5 and 225, and VGA 22〇 to account for environmental changes such as temperature, supply voltage, and antenna coupling changes. In some exemplary embodiments, controller 235 performs a - calibration routine (g 16 ) to identify acceptable settings based on such environmental changes and store the identified optimal settings for subsequent use. The algorithm may be embodied as software stored on controller 235 or on memory storage device 760. Alternatively, a hardware device (such as a discrete logic gate) algorithm can be implemented in one or more. The HIPCF canceller 130 also includes an auxiliary circuit 240. As shown in FIG. 7, the auxiliary circuit 240 & includes a temperature sensing $ 755, a "four" detector 745, one or more analog/digital converters 75A, a digital/analog converter, and for use by HIPCF 4 Other types of circuits used in addition to n 13Q. The auxiliary circuit 16 201214999-240 may also include - or a plurality of memory storage devices 760, such as ram, R〇M, and/or flash memory. The settings for each of the band pass filters 205, 215, and 225 can be stored on the memory storage device 760. Additionally, the settings for the UQ modulator 230 can be stored on the memory storage device 760. For example, the settings for each channel of the mobile TV tuner can be stored on the memory storage device 760. Some of the components or functions of the HIPCF canceller 13 can be embodied in an integrated circuit', e.g., as depicted by the wafer boundary 25〇 illustrated in FIG. For example, one or more of the 'switchable capacitors C1 to C3, LNA 210, VGA 220, Q enhanced BPF 225, I/Q modulator 23, controller 235, and auxiliary circuit 24 can be embodied in a single Integral circuit or multiple integrated circuits. Although inductors Li and L2 are illustrated as out-of-chip inductors in the illustrative embodiment of the description, other exemplary embodiments may use on-wafer inductors in band pass filters 205 and 215. The integrated circuits and/or inductors L1 and L2 can be mounted on mobile devices such as mobile phones as well as other communication devices. Single or multiple integrated circuits can be embodied in or on a complementary metal oxide semiconductor (CMOS). Referring to Figures 1 and 2, the HIPCF canceller 130 suppresses, cancels or otherwise compensates for in-band or near-band out-of-band (carrying in proximity to the receiver 135) imposed by the transmitter 105 via the transmit antenna 115 on the receiver 135. Frequency) Interference signal. That is, the HIPCF cancellation @ UG compensates for an interference signal transmitted by the transmission antenna ι 5 having a frequency in or near the frequency band of the receiver 135. The HIPCF canceller 130 obtains samples of the signals transmitted by the transmitters 1〇5 from the sampling device 125 and processes the samples to generate interference compensation. 201214999 Compensation signal 'Interference compensation signal when applied to the input of the receiver i 35 Compensate for the imposed interference signal. The exemplary HIPCF 130 includes three bandpass filters 2〇5, 215, and 225 that each filter, block, or reduce the transmitted signal of the sample received by the out-of-band self-sampling device 125 with respect to the receive frequency of the receiver ι35. The strength of the signal component. The component of the transmission nickname relative to the receiver 135 is used to generate an interference compensation signal. The special signal of the sampled transmission signal: at least one of the phase, amplitude and delay of E is adjusted by the I/Q modulator 230 to produce an interference compensation signal. Controller 235 can perform one or more calibration algorithms and/or one or more tuning algorithms to improve the level of interference compensation. Controller 235 may obtain feedback from power detector 745 or from receiver 135 and use this feedback during execution of the algorithm. These algorithms are discussed in detail below with reference to Figures 9 through 31.

圖3為根據某些例示性實施例的圖2之hipcf消除器 130之某些組件之方塊示意圖3〇〇。特定言之,圖3為一例 不性輸入BPF 205、一例示性LNA_BpF 215及一例示性LNA 21〇之電晶體級圖。參看圖3,輸入BpF 2〇5包括一第一開 關電容器陣列(SCA) 3〇5及_第二SCA 31〇。sca 3〇5、 310 t之每一者包括一具有數目「n+1」個電容器之陣列, 該等電容器典型地包括1或2個標準電容器大小(單一電 备益)。SC A 305、310中之每_電容器具有一對應的電晶體 開關(例如,MOS電晶體)以用於啟動電容器。可藉由自 SC A 305 & 310選擇電容器中之—或多者來調整輸入犯F 205之共振頻率。可藉由啟動與每一選定電容器相關聯之開 18 201214999 關來選擇電容器。舉例而令,可莊山认如, ° 了藉由啟動(或接通)開關 Μ10來選擇電容器ci〇。SCA 3fts ” Λ 士 — 305、310中之每一電容器可 具有對應於用於輸入BPF 夕τ门u加ρ ° 205之不同共振頻率的不同電容 值,或具有*同加權值以涵蓋接收_ 135之頻帶。在某些 例示性實施例中,控制3 235可啟動及撤銷啟動sca: 及310中之開關以選擇用於輸人BpF 2G5之共振頻率。 SCA 305及310亦可提供分壓器功能。此尤其適用於具 有一寬頻行動τν調諧器作為接收器135 施3 is a block diagram 3D of certain components of the hipcf canceller 130 of FIG. 2, in accordance with some demonstrative embodiments. Specifically, Fig. 3 is a diagram showing an example of a transistor level diagram of an indirect input BPF 205, an exemplary LNA_BpF 215, and an exemplary LNA 21?. Referring to Figure 3, the input BpF 2〇5 includes a first on-off capacitor array (SCA) 3〇5 and a second SCA 31〇. Each of sca 3 〇 5, 310 t includes an array having a number of "n+1" capacitors, which typically include 1 or 2 standard capacitor sizes (single power reserve). Each of the SC A 305, 310 has a corresponding transistor switch (e.g., MOS transistor) for starting the capacitor. The resonant frequency of the input F 205 can be adjusted by selecting one or more of the capacitors from SC A 305 & 310. The capacitor can be selected by activating the turn-on 18 201214999 associated with each selected capacitor. For example, Zhuangshan recognizes that the capacitor ci〇 is selected by starting (or turning on) the switch Μ10. Each of the SCA 3fts Λ — 305, 310 may have a different capacitance value corresponding to a different resonant frequency for inputting the BPF τ τ τ ° 205, or with a * weighting value to cover the reception _ 135 The frequency band. In some exemplary embodiments, control 3 235 can initiate and deactivate the switches in sca: and 310 to select the resonant frequency for the input BpF 2G 5. SCA 305 and 310 can also provide a voltage divider function. This is especially true for a wideband τ tuner as a receiver 135

例。在某些例示性實施例中,心。5及31。具== 之傳輸信號之振幅之額外15 dBc減小的電容器比率(例 如,1:5),因此減少了對隨後階段之線性要求或實現當選擇 較小比率(例如,1:1)時的較多增益。此比率亦可視頻道 而變化以便使在整個行動TV頻帶上之總增益變平或調整 該總增益。為了組態輸入BPF 205以用於具有靠近GSM CDMA或LTE傳輸器1〇5之頻率的頻率之高UHF(超高頻) 頻道(諸如,用於行動TV調諧器之頻道5〇 ),可啟動開關 M61且撤銷啟動開關M60及M62。此提供第一 SCA 3〇5中 之電容器與第二SC A 310中之電容器之間的分壓器。 為了讓組態輸入BPF 205以用於可具有處於542 MHz 與548 MHz之間的頻率之低UHF頻道(諸如,行動τν調 諧器之頻道26 ),可藉由啟動開關M6〇及M62且撤銷啟動 開關M61使第二SCA 310與輸入BPF 205斷開連接。在某 些例示性實施例中,此組態將取樣之信號的衰減減小15 dB。此補償三個帶通濾波器205、2 1 5及225之頻率相依增 19 201214999 益變化。 在某些例示性實施例中,對於電感器L1耦接至之積體 電路’可按照vdd之-半對輸入BPF 205之電感器Μ加偏 壓以便使輸入電壓擺動最大化而不違反積體電路之規範, 同時電容器C4提供至地面之返回路徑。在某些例示性實施 例中,若絲了關於電路之最大崩潰電壓的足夠予貝防措施 (例如,藉由將曾納(zener )二極體用於ESD、串接輸入 級、較大頻道裝置、LDD M0SFET等),則用於電感器L1 之偏壓電壓可較高。 LNA-BPF 215亦包括一具有「n+1」數目個電容器之SCa 315。在此例示性實施例中,SCA 315中之每一電容器包括 一對應的電晶體開關(例如,M〇s電晶體)以用於啟動電 谷器。類似於輸入BPF205,可藉由調整SCA315的電容器 中之一或多者來調整LNA-BPF 215之共振頻率。 在此例示性實施例中,LN A 210為具有兩個電晶體M4 及M5之串接LNA。串接LNA 210可使用頻率相依退化, 可藉由撤銷啟動開關M7在高頻率下啟動頻率相依退化。此 可用於以下目的:藉由啟動開關]V17來增加在高頻率下之輸 入線性以及提供在低頻率下之足夠增益以用於維持LNA 2 10之低雜訊指數。 在SC A 3 05、310及315中之每一者中的電容器及開關 可經組態以避免歸因於其單端性質所致之電荷泵送作用 (charge pumping)。如圖3中所示,可藉由將MOS開關 M10至Min插入於電容器C10至Cln與晶片輸入端之間、 20 201214999 -將M〇S開關M20至M2n插入於電容器C20至C2n與AC 耦接電容器C4之間且將MOS開關M3〇至M3n插入於電容 器C3 0至C3n與LNA 210之輸出端之間來實現此情形。可 在HIPCF消除器130中使用高q外部電感器L1及L2而非 晶片上電感器來提供較高頻率選擇性。SCA 3〇5、31〇及315 與足夠的調諧範圍一起使用可補償兩個晶片外電感器以及 L2·之展頻及與印刷電路板相關聯之寄生電容。具有HipcF 消除器130之組件的積體電路可具有一輸入接腳、一 ac接 地接腳及一 LNA上拉接腳,其各自具有串聯配置之多個 E S D二極體以實現較大信號擺動。 在某些例示性實施例中,將帶通濾波器2〇5、215及225 中之一或多者實施為並聯共振電路。在某些例示性實施例 中,將帶通濾波器205、215及225中之一或多者實施為串 聯共振電路。在某些例示性實施例中,將帶通濾波器2〇5、 2 1 5及225中之一或多者實施為低通濾波器而非帶通濾波 器。舉例而言,若傳輸器1 〇5之主载頻調具有比用於干擾 抑制之頻率範圍大的頻率,則可用低通濾波器替換帶通濾 波器205、2 1 5及225中之每一者。在某些例示性實施例中, 將帶通濾波器205、2 1 5及225中之一或多者實施為高通濾 波器而非帶通濾波器。舉例而言,若傳輸器1〇5之主載頻 調具有比用於干擾抑制之頻率範圍小的頻率,則可用高通 據波器替換帶通濾波器205、215及225中之每一者。在某 些例示性實施例中,可使用低通、高通與帶通濾波器之組 合代替帶通濾波器205、215及225。 21 201214999 圖4描繪根據某些例示性實施例的—受害接收器天線 (諸如,圖i之天線120)處接收之信號之頻譜圖4〇〇。參 看圖1及圖4,頻譜圖400展示相對於信號頻率4〇2繪製的 天線120處接收之仏號之振幅4〇3。頻譜圖4〇〇包括對應於 侵犯傳輸器105之載波頻率Ft的第一峰值4〇4及對應於受 害接收器135之頻道頻率Fr的第二峰值4〇5。頻譜圖4〇〇 亦包括一對應於由侵犯傳輸器1〇5產生之相位雜訊或其.他 不良頻譜分量的雜訊旁頻帶406。在某些例示性實施例中, 第二峰值405與雜訊旁頻帶406之間的振幅差不符合用於 適當接收的受害接收器之較佳信雜比(Snr )。 圖5描繪根據某些例示性實施例的由hjpcf消除器(諸 如,圖1之HIPCF消除器130)消除了帶内不良頻譜分量 後在受害接收器(諸如,圖1之接收器135 )之輸入端處接 收的k喊之頻s普圖500。參看圖1及圖5,頻譜圖500展示 相對於信號頻率4〇2繪製的接收器135處接收之信號之振 幅403。頻譜圖500包括一對應於由侵犯傳輸器1〇5產生之 相位雜訊或其他不良頻譜分量的雜訊旁頻帶506。此雜訊旁 頻帶506與頻譜圖400之雜訊旁頻帶406不同之處在於, 雜訊旁頻帶506包括一居中於受害接收器135之頻道頻率 FR的陷波507。此陷波507自由HIPCF消除器130所產生 且施加至接收器135之輸入端之干擾補償信號提供的補償 產生。在某些例示性實施例中,將信號之SNR改良了對應 於陷波507之深度的量》因此,陷波507改良信號SNR,example. In certain exemplary embodiments, the heart. 5 and 31. An additional 15 dBc reduction in the amplitude of the transmitted signal with == (for example, 1:5), thus reducing the linearity requirement for subsequent stages or achieving when selecting a smaller ratio (eg, 1:1) More gain. This ratio can also be varied in video channels to flatten or adjust the overall gain over the entire mobile TV band. In order to configure the input BPF 205 for a high UHF (Ultra High Frequency) channel with a frequency close to the frequency of the GSM CDMA or LTE transmitter 1 〇 5 (such as channel 5 for the mobile TV tuner), it can be activated Switch M61 and cancel start switches M60 and M62. This provides a voltage divider between the capacitor in the first SCA 3〇5 and the capacitor in the second SC A 310. In order to have the configuration input BPF 205 for a low UHF channel (such as channel 26 of the action τ tuner) that can have a frequency between 542 MHz and 548 MHz, the switches M6 〇 and M 62 can be activated and the start-up can be initiated. Switch M61 disconnects second SCA 310 from input BPF 205. In some exemplary embodiments, this configuration reduces the attenuation of the sampled signal by 15 dB. This compensates for the frequency variation of the three bandpass filters 205, 2 1 5 and 225. In some exemplary embodiments, the integrated circuit 'coupled to the inductor L1' can bias the inductor of the input BPF 205 by a half of the vdd to maximize the input voltage swing without violating the integrated body. The specification of the circuit, while capacitor C4 provides a return path to the ground. In some exemplary embodiments, sufficient precautions are taken regarding the maximum breakdown voltage of the circuit (eg, by using a Zener diode for ESD, serial input stage, larger channel) The device, LDD MOSFET, etc.) can have a higher bias voltage for the inductor L1. The LNA-BPF 215 also includes an SCa 315 having a number of "n+1" capacitors. In this exemplary embodiment, each capacitor in SCA 315 includes a corresponding transistor switch (e.g., M〇s transistor) for activating the grid. Similar to the input BPF 205, the resonant frequency of the LNA-BPF 215 can be adjusted by adjusting one or more of the capacitors of the SCA315. In this exemplary embodiment, LN A 210 is a tandem LNA having two transistors M4 and M5. The series-connected LNA 210 can use frequency dependent degradation, which can be initiated at a high frequency by deactivating the start switch M7. This can be used for the following purposes: to increase the input linearity at high frequencies and to provide sufficient gain at low frequencies to maintain the low noise index of LNA 2 10 by activating the switch]V17. The capacitors and switches in each of SC A 3 05, 310, and 315 can be configured to avoid charge pumping due to their single-ended nature. As shown in FIG. 3, the MOS switches M10 to Min can be inserted between the capacitors C10 to Cln and the chip input terminal, 20 201214999 - the M 〇 S switches M20 to M2n are inserted in the capacitors C20 to C2n and coupled to the AC. This is achieved between capacitors C4 and between MOS switches M3 〇 to M3n interposed between the outputs of capacitors C3 0 to C3n and LNA 210. High q external inductors L1 and L2 can be used in HIPCF canceller 130 instead of on-wafer inductors to provide higher frequency selectivity. SCA 3〇5, 31〇, and 315 are used with sufficient tuning range to compensate for the two off-chip inductors and the spread spectrum of L2· and the parasitic capacitance associated with the printed circuit board. The integrated circuit having the components of the HipcF canceller 130 can have an input pin, an ac ground pin, and an LNA pull-up pin, each having a plurality of E S D diodes arranged in series to achieve a large signal swing. In some exemplary embodiments, one or more of band pass filters 2〇5, 215, and 225 are implemented as parallel resonant circuits. In some exemplary embodiments, one or more of band pass filters 205, 215, and 225 are implemented as a series resonant circuit. In some exemplary embodiments, one or more of band pass filters 2〇5, 2 1 5, and 225 are implemented as low pass filters rather than band pass filters. For example, if the primary carrier tone of the transmitter 1 〇 5 has a frequency greater than the frequency range used for interference suppression, the bandpass filters 205, 2 15 and 225 can be replaced with a low pass filter. By. In some exemplary embodiments, one or more of band pass filters 205, 2 15 and 225 are implemented as high pass filters instead of band pass filters. For example, if the primary carrier frequency of the transmitter 1〇5 has a lower frequency than the frequency range used for interference suppression, each of the bandpass filters 205, 215, and 225 can be replaced with a high-pass data filter. In some exemplary embodiments, a combination of low pass, high pass and band pass filters may be used in place of band pass filters 205, 215 and 225. 21 201214999 FIG. 4 depicts a spectrogram of a signal received at a victim receiver antenna (such as antenna 120 of FIG. i) in accordance with certain exemplary embodiments. Referring to Figures 1 and 4, spectrogram 400 shows the amplitude 4〇3 of the apostrophe received at antenna 120 plotted against signal frequency 4〇2. The spectrogram 4A includes a first peak value 4〇4 corresponding to the carrier frequency Ft of the infringing transmitter 105 and a second peak value 4〇5 corresponding to the channel frequency Fr of the victim receiver 135. The spectrogram 4A also includes a noise sideband 406 corresponding to the phase noise generated by the infringing transmitter 1〇5 or its poor spectral component. In some exemplary embodiments, the difference in amplitude between the second peak 405 and the noise sideband 406 does not correspond to the preferred signal to noise ratio (Snr) of the victim receiver for proper reception. 5 depicts an input at a victim receiver (such as receiver 135 of FIG. 1) after an in-band bad spectral component is removed by a hjpcf canceller (such as HIPCF canceller 130 of FIG. 1), in accordance with certain exemplary embodiments. The k that is received at the end is called the frequency 510. Referring to Figures 1 and 5, spectrogram 500 shows amplitude 403 of the signal received at receiver 135 plotted against signal frequency 4〇2. Spectrogram 500 includes a noise sideband 506 corresponding to phase noise or other undesirable spectral components produced by infringing transmitters 〇5. The noise sideband 506 differs from the noise sideband 406 of the spectrogram 400 in that the noise sideband 506 includes a notch 507 centered on the channel frequency FR of the victim receiver 135. This notch 507 is generated by the compensation provided by the interference compensation signal generated by the HIPCF canceller 130 and applied to the input of the receiver 135. In some exemplary embodiments, the SNR of the signal is improved by the amount corresponding to the depth of the notch 507. Thus, the notch 507 improves the signal SNR,

因此增加了受害接收器135之敏感性。舉例而言,由HIPCF 22 201214999 消除器130進行的相位雜訊或其他不良頻譜分量之改良之 消除導致較深陷波5〇7及因此受害接收器135之較好隨。 圖6為根據某些例示性實施例的圖2之〇增強型Βρρ 225之方塊示意圖。特定言之,圖6為Q增強型BPF 225 之電晶體級圖。例示性Q增強型卿225包括—具有電感 器L3、旁路開關㈣及似615之^槽副。在某些例示 性實施例中,電咸Τ 1k ^。 电J(•器L3為低Q晶片上螺旋電感器。在某些 例示性實施例中,雷咸哭τ 1 λ 一 电以器L3為鬲Q晶片外電感器。類似於 帶通濾波器,205及215,可將Q增強型刪225之共振頻率 設定(例如’由控制器235自動)至接收器135之接收頻 率以傳遞帶内说分量且進—步遽波、阻斷來自取樣之傳 輸信號的基調及帶外阻斷信號或減小其強度。 SCA615包括數目「n+1」個電容器⑽至在該 說明之實施例中,每一電容器C4〇至C4n包括兩個對應的 電晶體開關(例如,M〇s電晶體)以用於啟動電容器。舉 例而言,電容器C40包括電晶體開關M4〇及M5(^此外, Q增強型BPF 225亦包括與SCA 615並聯的兩個串聯連接 之壓控電容器VC 1及VC2。在某些例示性實施例中,壓控 電谷器VC1 A VC2為可變電抗器。安置於兩個壓控電容器 VC1與VC2之間者為—中心分接帛⑹,其將壓控電容器 VC1及VC2電耦接至數位/類比(d/A)轉換器650。D/A 轉換器650回應於自控制器235接收之信號變化壓控電容 Is VC1及VC2之電壓位準。控制器235可藉由啟動電容器 C40至C4n中之一或多者(經由開關M40至M4n及M50 23 201214999 至M5n)且藉由控制在中心分接頭655處之電壓位準及因 此壓控電容器VC1& VC2之電容來調整q增強型BpF225 之共振頻率。壓控電容器VC1及¥(:2使控制器235能夠精 細調諧Q增強型BPF 225之共振頻率。 例示性Q增強型BPF 225亦包括與SCA 615並聯的電 晶體開關M8及M9之交叉耦接對620。交叉耦接對62〇提 供負電阻以減小由電感器L3、SCA 615及壓控電容器VC1 及VC2形成的LC槽之電阻。 Q增強型BPF 225包括數目「n+1」個電流源M6〇至 M6n (例如,經二進制加權),每一者具有一電耦接在一起 且與參考電流(Ref_C )電麵接之閘極端子eQ增強型b,pf 225亦包括數目「n+i」個電流開關M70至M7n。藉由經由 啟動及撤銷啟動(例如,由控制器235 )對應的電流開關 M70至M7n選擇電流源M60至M6n中一或多者,可調整開 關M8及M9中之電流’其又調整LC槽610之電阻。因此, 可調整Q增強型BPF 225之Q因數。舉例而言,可將q增 強型BPF 225之Q因數調整至所要位準,使得在無q增強 型BPF 225振盪之情況下改良或最大化帶外信號之濾波。 Q增強型BPF 225亦包括一旁路開關670,其具有一電 輕接至兩個電晶體開關M80及M81且安置於兩個電晶體開 關M80與M81之間的電阻器R8。如參看圖n至15的更 詳細論述,可在輸入BPF 205及LNA-BPF 2 1 之校準期間 啟動或接通開關M80及M8 1,同時撤銷啟動電流源M60至 M6n。當開關M80及M81得以啟動時,電阻器Rg可對lc 24 201214999 .槽去咕。在*規操作期間,典型撤銷啟動開關M80及]Vi8 1。Therefore, the sensitivity of the victim receiver 135 is increased. For example, the elimination of improved phase noise or other undesirable spectral components by the HIPCF 22 201214999 canceller 130 results in better tracking of the deeper notch 5〇7 and thus the victim receiver 135. FIG. 6 is a block diagram of the 〇 enhancement type ρρρ 225 of FIG. 2, in accordance with some exemplary embodiments. Specifically, FIG. 6 is a transistor level diagram of the Q-enhanced BPF 225. The exemplary Q-enhanced type 225 includes - an inductor L3, a bypass switch (four), and a slot pair like 615. In certain exemplary embodiments, the electric salt is 1 k ^. Electrical J (device L3 is a low Q on-wafer spiral inductor. In some exemplary embodiments, Rayham Crush τ 1 λ an electric device L3 is a 鬲Q off-chip inductor. Similar to a bandpass filter, 205 and 215, the resonant frequency of the Q enhanced 225 can be set (eg, 'automatically by the controller 235') to the receiving frequency of the receiver 135 to transmit the in-band component and the chopping, blocking the transmission from the sampling. The base of the signal and the out-of-band blocking signal or the intensity reduction. The SCA 615 includes a number of "n+1" capacitors (10). In the illustrated embodiment, each capacitor C4A through C4n includes two corresponding transistor switches. (for example, M〇s transistor) for starting the capacitor. For example, capacitor C40 includes transistor switches M4 and M5 (in addition, Q-enhanced BPF 225 also includes two series connected in parallel with SCA 615 Voltage-controlled capacitors VC 1 and VC 2. In some exemplary embodiments, the voltage-controlled electric grids VC1 A VC2 are varactors. The two voltage-controlled capacitors VC1 and VC2 are disposed between the two.帛(6), which electrically couples voltage-controlled capacitors VC1 and VC2 to digital/analog (d/A) Converter 650. D/A converter 650 varies voltage levels of voltage-controlled capacitors Is VC1 and VC2 in response to signals received from controller 235. Controller 235 can be activated by one or more of capacitors C40 through C4n ( The resonant frequency of the q-enhanced BpF225 is adjusted by switching the switches M40 to M4n and M50 23 201214999 to M5n) and by controlling the voltage level at the center tap 655 and thus the capacitance of the voltage-controlled capacitor VC1 & VC2. Voltage-controlled capacitor VC1 And ¥(:2 enables the controller 235 to fine tune the resonant frequency of the Q-enhanced BPF 225. The exemplary Q-enhanced BPF 225 also includes a cross-coupled pair 620 of transistor switches M8 and M9 in parallel with the SCA 615. Cross-coupling A pair of negative resistors is provided to reduce the resistance of the LC slots formed by inductors L3, SCA 615 and voltage controlled capacitors VC1 and VC2. Q-enhanced BPF 225 includes a number of "n+1" current sources M6〇 to M6n (eg, binary weighted), each having a gate terminal eQ enhancement b that is electrically coupled together and electrically connected to a reference current (Ref_C), pf 225 also includes a number of "n+i" current switches M70 to M7n. Start by starting and undoing (eg The current switches M70 to M7n corresponding to the current switches M70 to M7n of the controller 235) select one or more of the current sources M60 to M6n, and the currents in the switches M8 and M9 can be adjusted to adjust the resistance of the LC tank 610. Therefore, the Q enhancement type can be adjusted. The Q factor of the BPF 225. For example, the Q factor of the q-enhanced BPF 225 can be adjusted to the desired level to improve or maximize the filtering of the out-of-band signal without the q-enhanced BPF 225 oscillating. The Q-enhanced BPF 225 also includes a bypass switch 670 having a resistor R8 that is electrically coupled to the two transistor switches M80 and M81 and disposed between the two transistor switches M80 and M81. As discussed in more detail with respect to Figures n through 15, switches M80 and M8 1 can be turned "on" or "on" during calibration of input BPF 205 and LNA-BPF 2 1 while the starting current sources M60 through M6n are deactivated. When the switches M80 and M81 are activated, the resistor Rg can be turned off for the lc 24 201214999 slot. The switch M80 and ]Vi8 1 are typically deactivated during the operation of the gauge.

圖7為根據某些例示性實施例的描繪HIpCF丨3〇之額 外組件的聰CF消除器13〇之另一方塊示意圖。如圖7中 所不例不性HIPCF 130亦包括旁路開關72〇及725以用 於在HIPCF 130之校準期間使用。特定言之,輸入 包括旁路開關720且LNA 215包括旁路開關725。旁路開 關720包括一電晶體開關M82及一電阻器。類似地,旁 路開關725包括一電晶體開關M83及一電阻器R3。在HIPcf 130之組態(例如,使用自動測試設備(ATE)、台上量測 或原地校準)期間,旁路開關72〇、725及Q增強型BpF 之旁路開關670中之每一者可經啟動及撤銷啟動以選擇性 調諧帶通濾波器205、215及225。 HIPCF消除器13〇亦包括一安置於VGA 22〇、Q增強 ;型BPF 225與I/Q調變器23〇之間的緩衝器77〇。輔助電路 240包括一電麵接至緩衝器77〇之輸出端的功率偵測器 745 ^功率偵測器745量測在緩衝器77〇之輸出端處的取樣 之傳輸信號之功率位準,且將量測結果之指示提供至a/d 轉換器750。A/D轉換器75〇將指示轉換成數位信號且將數 位信號提供至控制器23 5。 辅助電路240亦包括一溫度感測器755,其具有一電耦 接至控制器235之輸出端。溫度感測器755定位於晶片(積 體電路)(HIPCF消除器13〇裝設或製造於該晶片上)上 以量測晶片之溫度。控制器235可自溫度感測器755接收 溫度量測結果’且將此等量測結果用於監視、校準及用於 25 201214999 溫度補償。在某些例示性實施例中,溫度感測器755之輸 出端耦接至A/D轉換器(諸如,A/D轉換器750或第二A/d 轉換器)。在具有-用於功率制器745及溫度感測器川 之共用A/D轉換器750的例示性實施例中,控制器235可 將請求獲得兩個量測結果中之哪一者(功率或溫度)的— 信號提供至該A/D轉換器。 圖8描繪根據某些例示性實施例的一通信系統8⑻之 功能方塊圖。例示性通信系統8〇〇包括兩個通信裝置8〇5 及850’每一者分別具有傳輸器81〇及855且分別具有接收 器820及865。通信系統8〇〇包括一第一 HIpcF消除器88〇, 其用於補償自由傳輸$ 810 ,經由第一天線825傳輸之信號 強加至接收器865之輸入端上的雜訊及/或干擾。通信系統 ⑽〇亦包括一第二HIPCF消除器885,其用於補償自由傳輸 器855經由第二天線87〇傳輸之信號強加至接收器之 輸入端上的雜訊及/或干擾。因此,通信系統8〇()包括用於 保濩兩個通裝置8 〇 5及8 5 0之干擾補償電路。舉例而言, 通L裝置805可為蜂巢式無線電,且通信裝置85〇可為wiFi 無線電。在此實例中,將保護蜂巢式無線電免受由wiFi無 線電所傳輸之彳s號造成的強加於蜂巢式無線電接收器上之 干擾,且相反地,將保護WiFi無線電免受自由蜂巢式無線 電傳輸之信號強加於WiFi接收器上之干擾。 HIPCF请除器880經由電耦接至傳輸器之功率放大器 815之輸出端的取樣裝置89〇接收由傳輸器81〇傳輸的信號 之樣本,且處理此等樣本以產生干擾補償信號。HIp(:F消 26 201214999 除器880在消除點833處將產生之干擾補償信號施加至接 收器865之輸入端,且接著,干擾補償信號消除、抑制或 另外補償強加於接收器865上冬雜訊及/或干擾。HipcF消 除880可包括—類似於圖2之控制$ 235的控制器,其 執盯一或多個校準及—或多個調譜演算法以改良雜訊及/或 :擾補償。控制器可接收回饋(諸如,「接收信號品質指 不符」),且在演算法之執行期間使用該回饋改良雜訊及/ 或干擾補償。類似於消除點134,消除點833可實施為聚合 電導體、耗接器、求和節點、加法器或其他合適技術。 “類似地,HIPCF消除器885經由電耦接至傳輸器之功 ' 之輸出端的取樣裝置895接收由傳輸器855 傳輸的信號之樣本,且處理此等樣本以產生干擾補償信 號。。HIPCF消除器885在消除點834處將產生之干擾補償 W施加至接收器㈣之輸人端,且接著,干擾補償信號 消除、抑制或另外補償強加於接收器82〇上之雜訊及/或干 擾。聊CF消除器885可包括一類似於圖2之控制器⑶ 的控制益’其執行一或多個校準及一或多個調諧演算法以 良雜Dfl及/或干擾補償。控制器可接收回饋(諸如,「接 收佗號品質指示符」),且在演算法之執行期間使用該回 饋改良雜訊及/或干擾補償。類似於消除點134,消除點, 可實施為聚合電導體、輕接器、求和節點、加法器或其他 合適技術。 圖9描㈣據某些勤性實施例的—查找表觸。參看 圖2、圖7及圖9,查找表9〇〇可儲存於HipcF消除器13〇 27 201214999 之記憶體裝置760中》例示性查找表900包括用於輸入Bpf 205之中心頻率設定910、用於LNA-BPF 215之中心頻率設 定920及用於Q增強型BPF225之中心頻率設定930。在此 例示性實施例中’輸入BPF中心頻率設定91 〇包括三個頻 率值(Freql、Freq2及Freq3),已針對該等值特性化帶通 濾波器205、2 15及225 »舉例而言,在行動τν接收器135 實施例中’可在450 MHz、600 MHz及770 MHz下特性化 帶通濾波器205、215及225中之每一者。輸入BPF中心頻 率設定910亦包括分別針對三個頻率值(Freqi至Freq3 ) 中之每一者的開關電容器陣列設定(SCA_Input_BPFi至 SCA-Input_BPF3 )。開關電容器陣列設定(SCA Input_BpF1 至SC A-Input_BPF3 )控制針對頻率(Freqi至Freq3)中之 每一者及因此針對此等頻率的輸入BPF 205之共振頻率控 制SC A 3 05及SC A 3 10之方式。輸入BPF中心頻率設定910 亦包括分別針對每一頻率值(Freql至Freq3)之溫度係數 值(Tempcol 至 Tempco3) » 溫度係數值(Tempcol 至 Tempco3 )由控制器235用以基於溫度之改變調整SCA 305 及3 1 0之設定。 類似地’ LNA-BPF中心頻率設定920包括分別針對三 個頻率值(Freqi至Freq3 )中之每一者的開關電容器陣列 設定(SCA—LNA—BPF1 至 SCA-LNA—BPF3 )。開關電容器 陣列設定(SCA_LNA_BPF1 - SCA-LNA—BPF3 )控制針對頻 率(Freqi至Freq3)中之每一者及因此針對此等頻率的FIG. 7 is another block diagram of a Cong CF canceller 13A depicting additional components of HIpCF丨3〇, in accordance with certain exemplary embodiments. The HIPCF 130, as exemplified in Figure 7, also includes bypass switches 72A and 725 for use during calibration of the HIPCF 130. In particular, the input includes a bypass switch 720 and the LNA 215 includes a bypass switch 725. The bypass switch 720 includes a transistor switch M82 and a resistor. Similarly, the bypass switch 725 includes a transistor switch M83 and a resistor R3. Each of the bypass switches 72〇, 725 and the Q-enhanced BpF bypass switch 670 during configuration of the HIPcf 130 (eg, using an automatic test equipment (ATE), on-stage measurement, or in-situ calibration) The band pass filters 205, 215, and 225 can be selectively tuned by activation and deactivation. The HIPCF canceller 13A also includes a buffer 77〇 disposed between the VGA 22A, the Q-enhanced BPF 225 and the I/Q modulator 23A. The auxiliary circuit 240 includes a power detector 745 electrically connected to the output of the buffer 77. The power detector 745 measures the power level of the sampled transmission signal at the output of the buffer 77, and will An indication of the measurement result is provided to the a/d converter 750. The A/D converter 75 turns the indication into a digital signal and provides the digital signal to the controller 23 5 . The auxiliary circuit 240 also includes a temperature sensor 755 having an output electrically coupled to the controller 235. The temperature sensor 755 is positioned on a wafer (integrated circuit) (the HIPCF canceller 13 is mounted or fabricated on the wafer) to measure the temperature of the wafer. Controller 235 can receive temperature measurement results from temperature sensor 755 and use these measurements for monitoring, calibration, and for 25 201214999 temperature compensation. In some exemplary embodiments, the output of temperature sensor 755 is coupled to an A/D converter (such as A/D converter 750 or a second A/d converter). In an exemplary embodiment having a shared A/D converter 750 for the power controller 745 and the temperature sensor, the controller 235 can request which of the two measurements (power or The temperature - the signal is supplied to the A/D converter. FIG. 8 depicts a functional block diagram of a communication system 8 (8), in accordance with certain exemplary embodiments. The exemplary communication system 8A includes two communication devices 8〇5 and 850' each having transmitters 81A and 855 and having receivers 820 and 865, respectively. The communication system 8A includes a first HIpcF canceller 88A for compensating for free transmission $810, the signal transmitted via the first antenna 825 being imposed on the input and/or interference on the input of the receiver 865. The communication system (10) 〇 also includes a second HIPCF canceller 885 for compensating for the noise and/or interference imposed by the free transmitter 855 via the second antenna 87〇 on the input of the receiver. Therefore, the communication system 8() includes an interference compensation circuit for protecting the two communication devices 8 〇 5 and 850. For example, the pass device 805 can be a cellular radio and the communication device 85 can be a wiFi radio. In this example, the cellular radio is protected from interference imposed on the cellular radio receiver by the ss number transmitted by the wiFi radio, and conversely, the WiFi radio is protected from free cellular radio transmission. The interference imposed by the signal on the WiFi receiver. The HIPCF requester 880 receives samples of the signals transmitted by the transmitter 81A via a sampling device 89 that is electrically coupled to the output of the power amplifier 815 of the transmitter, and processes the samples to produce an interference compensation signal. HIp(:F消26 201214999 divider 880 applies an interference compensation signal generated at cancellation point 833 to the input of receiver 865, and then, the interference compensation signal is cancelled, suppressed, or otherwise compensated for imposed on receiver 865. The HipcF Elimination 880 may include a controller similar to that of Figure 2 that controls $235, which is directed to one or more calibrations and/or multiple spectral algorithms to improve noise and/or: Compensation. The controller may receive feedback (such as "received signal quality does not match") and use this feedback to improve noise and/or interference compensation during execution of the algorithm. Similar to cancellation point 134, cancellation point 833 may be implemented as A polymeric electrical conductor, a consumer, a summing node, an adder, or other suitable technique. "Similarly, the HIPCF canceller 885 receives the transmitted by the transmitter 855 via a sampling device 895 that is coupled to the output of the work of the transmitter." A sample of the signals, and processing the samples to generate an interference compensation signal. The HIPCF canceller 885 applies the interference compensation W generated at the cancellation point 834 to the input of the receiver (4), and then, the interference compensation The signal cancels, suppresses, or otherwise compensates for noise and/or interference imposed on the receiver 82. The chat CF canceller 885 can include a control similar to the controller (3) of FIG. 2, which performs one or more calibrations and One or more tuning algorithms compensate for good Dfl and/or interference. The controller can receive feedback (such as "receive nickname quality indicator") and use the feedback to improve the noise and/or during execution of the algorithm. Or interference compensation. Similar to the elimination point 134, the elimination point can be implemented as a polymeric electrical conductor, a lighter, a summing node, an adder, or other suitable technique. Figure 9 (iv) a lookup table according to certain operational embodiments Referring to Figures 2, 7, and 9, the lookup table 9 can be stored in the memory device 760 of the HipcF canceller 13〇27 201214999. The exemplary lookup table 900 includes a center frequency setting 910 for inputting the Bpf 205. The center frequency setting 920 for the LNA-BPF 215 and the center frequency setting 930 for the Q-enhanced BPF 225. In the exemplary embodiment, the 'input BPF center frequency setting 91 〇 includes three frequency values (Freql, Freq2, and Freq3), has been targeted Equivalently characterized bandpass filters 205, 2 15 and 225 » For example, in the embodiment of the mobile τ Δ receiver 135 'the bandpass filters 205, 215 can be characterized at 450 MHz, 600 MHz and 770 MHz and Each of the input BPF center frequency settings 910 also includes a switched capacitor array setting (SCA_Input_BPFi to SCA-Input_BPF3) for each of the three frequency values (Freqi to Freq3). The switched capacitor array settings (SCA Input_BpF1 to SC A-Input_BPF3) control the resonant frequency control SC A 3 05 and SC A 3 10 for each of the frequencies (Freqi to Freq3) and thus the input BPF 205 for these frequencies the way. The input BPF center frequency setting 910 also includes temperature coefficient values (Tempcol to Tempco3) for each frequency value (Freql to Freq3). » Temperature coefficient values (Tempcol to Tempco3) are used by the controller 235 to adjust the SCA 305 based on temperature changes. And 3 1 0 settings. Similarly, the 'LNA-BPF center frequency setting 920 includes switching capacitor array settings (SCA - LNA - BPF1 to SCA - LNA - BPF3) for each of the three frequency values (Freqi to Freq3). The switched capacitor array setting (SCA_LNA_BPF1 - SCA-LNA_BPF3) controls each of the frequencies (Freqi to Freq3) and therefore for these frequencies.

LNA-BPF 215之共振頻率控制SCA 315之方式》LNA-BPF 28 201214999 中心頻率設定920亦包括分別針對每一頻率值(Freql至 Freq3)之溫度係數值(Tempcol至Tempco3).。此等溫度 係數值(Tempcol至Tempco3 )由控制器235用以基於溫度 之改變調整SCA 3 15之設定。 Q增強型BPF中心頻率設定930包括分別針對三個頻 率值(Freql至Freq3)中之每一者的開關電容器陣列設定 (SCA_QE_BPF1至SCA-QE_BPF3)。開關電容器陣列設 定(SCA—QE一BPF1 至 SCA-QE—BPF3 )控制針對頻率(Freql 至Freq3 )中之每一者及因此針對此等頻率的輸入bpf 2〇5 之共振頻率控制SC A 615之方式。Q增強型BPF中心頻率 設定920亦包括分別針對每一頻率值(Freql至Freq3 )之 溫度係數值(Tempcol至Tempco3)。此等溫度係數值 (Tempcol至Tempco3 )由控制器235用以基於溫度之改變 s周整S C A 6 1 5之設定。Q增強型B p f中心頻率設定9 3 0亦 包括分別針對每一頻率(Freql至Freq3)的用於壓控電容 器VC 1及VC2之DAC設定(DAC1至DAC3 ) 。Q增強型 BPF中心頻率設定920亦包括分別針對每一頻率值(Freql 至 Freq3 )之溫度係數.值(CurrentTempcol至LNA-BPF 215 Resonant Frequency Control SCA 315 Mode" LNA-BPF 28 201214999 The center frequency setting 920 also includes temperature coefficient values (Tempcol to Tempco3) for each frequency value (Freql to Freq3). These temperature coefficient values (Tempcol to Tempco3) are used by the controller 235 to adjust the setting of the SCA 3 15 based on the change in temperature. The Q-enhanced BPF center frequency setting 930 includes switching capacitor array settings (SCA_QE_BPF1 to SCA-QE_BPF3) for each of the three frequency values (Freq1 to Freq3), respectively. The switched capacitor array setting (SCA-QE-BPF1 to SCA-QE-BPF3) controls the resonant frequency control SC A 615 for each of the frequencies (Freql to Freq3) and thus the input bpf 2〇5 for these frequencies the way. The Q-enhanced BPF center frequency setting 920 also includes temperature coefficient values (Tempcol to Tempco3) for each frequency value (Freql to Freq3). These temperature coefficient values (Tempcol to Tempco3) are used by the controller 235 to set the S C A 6 15 based on the temperature change s. The Q-enhanced B p f center frequency setting 9 3 0 also includes DAC settings (DAC1 to DAC3) for voltage-controlled capacitors VC 1 and VC2 for each frequency (Freql to Freq3). The Q-enhanced BPF center frequency setting 920 also includes temperature coefficient values for each frequency value (Freql to Freq3) (CurrentTempcol to

CurrentTempco3)。此等溫度係數值(currentTempcol 至CurrentTempco3). These temperature coefficient values (currentTempcol to

CurrentTempco3 )由控制器235用以基於溫度之改變調整電 流開關M70至M7n之設定及因此q增強型bpf 225中之偏 壓電流。 例示性查找表900亦包括用於j/Q調變器23〇之種子值 940。種子值940包括分別在每一頻率(Freqi至Freq3 )下 29 201214999 的用於Ι/Q調變器23〇之同相及正交(L Q)設定((I1,qi) 至(13,Q3))。查找表9〇〇亦包括雜項設定95〇。雜項設定 950包括執行HIPCF消除器13〇之校準的溫度、消 除器130之製造批次之製程參數、DAC 65〇之設定之溫度 係數、需要用於保持Q增強型BPF 225之電晶體開關M8 及M9接通的最小電流及用於晶片上功率偵測器745的偵測 振盪之臨限值。 查找表900儲存於記憶體裝置76〇上,且由控制器235 存取以在常規操作期間及在下文論述之校準及調諧程序期 間調整在HIPCF消除器130内的某些組件之設定。亦在此 等校準及調諧程序期間填入查找表9〇〇中的設定中之許多 者’如下文進一步詳細論述。 圓10為描繪根據某些例示性實施例的用於校準HIPCF 消除器130之某些組件的方法1〇〇〇之流程圖。在HlpcF消 除器130製造(例如)於一積體電路中後,在區塊1〇〇5令, 在ate或台上特性化程序期間填入圖9之查找表9〇〇中展 不之初始設定。在區塊1010中,在當對HIPCF消除器 通電時之施加階段中,將用於在查找表900令之設定的值 載入至控制器235之内部暫存器内。控制器可存取查 找表900且使用來自溫度感測器755之當前溫度量測結果 及接收器13 5調諸至之頻道頻率控制pjjpcF消除器13 〇之 組件。亦可在區塊1〇1〇中執行可選校準常式以校準帶通濾 波器205、215及225及/或I/Q調變器23〇。 在區塊1015中,若接收器135之頻道改變,則I/Q調 30 201214999 . 變器230由控制器23 5重新校準。此校準可基於接收器之 接收信號品質指示符及下文描述之消除演算法改良雜訊及/ 或干擾消除。在區塊1020中’控制器235回應於來自使用 者之命令或回應於溫度改變超過預設定臨限值(例如,攝 氏10度)而觸發帶通渡波器2〇5、215、225及I/Q調變器 230之校準。在方法1000之校準程序期間,更新查找表9〇〇 中之值。 圖11為描繪根據某些例示性實施例的用於針對所要中 心頻率(例如,對於行動TV實施例,450 MHz、600 MHz 或770 MHz)組態HIPCF消除器130之濾波器的方法11〇〇 之流程圖。在區塊1 105中,校準輸入BPF 205。藉由啟動 旁路開關725及670且撤銷啟動旁路開關72〇使lnA-BPF 215及Q增強型BPF 225旁通。將導頻調或調諧器信號施加 至HIPCF消除器130之輸入端,且在HIPCF消除器130之 輸出端處量測導頻調或調諧器信號之功率位準。基於量測 之功率位準調整SCA 305及SCA 310之設定,直至功率位 準達到可接受之位準為止。對應於可接受之功率位準的8匸八 3〇5及SCA 3 10之設定填入於查找表9〇〇中以用於稍後由控 制器235使用。下文參看圖12進一步詳細論述區塊11〇5。 在區塊1110中,校準LNA — BPF215。藉由啟動旁路開 關720及670且撤銷啟動旁路開關725使輸入bpF 205及Q 增強型BPF 225旁通。在仍將導頻調或調諧器信號施加至 HIPCF消除器130之輪入端之情況下,基於量測之功率位 準調整SCA 3 1 5之設定,直至量測之功率位準達到可接受 31 201214999 之位準為止。對應於可接受之功率位準的SC A 3 1 5之設定 填入於查找表900中以用於稍後由控制器235使用。下文 參看圖13進一步詳細論述區塊Π 10。在區塊1 1 1 5中,校 準Q增強型BPF 225。下文參看圖14進一步詳細論述區塊 1115。 在區塊112〇中,計算用於帶通濾波器205、215及225 之溫度係數。在某些例示性實施例中,ATE (或台上量測設 備)針對一個以上溫度校準用於帶通濾波器205、2 1 5及225 中之每一者的設定。舉例而言,可在室溫(例如,2 7 °C ) 下、在70 C下及在0°C下校準帶通濾波器。控制器235可 藉由採取在每一溫度下的用於每一帶通濾波器2〇5、21 5、 225之設定來校準溫度係數。可將溫度係數儲存於查找表 900中攔位910、920、930及950中之對應的攔位中。 在區塊1125中,校準用於i/q調變器23〇之I及q種 子值。在某些例示性實施例中,ATE (或台上量測設備)可 使用類似於圖1中描繪之電路1〇〇的設置。可啟動傳輸器 105,且可針對所要中心頻率執行下文論述的消除演算法中 之一或多者以識別較佳或可接受之消除點。對應於識別之 消除點的(I,Q)設定可儲存於查找表9〇〇之攔位94〇中。 在區塊1125後,方法1100結束。當然,亦可執行方 法1100 —次以上。舉例而言,可在ATE期間執行且接著在 將晶片或系統置於操作中後再次執行方法丨1〇〇 ^ 圖12為描繪根據某些例示性實施例的如在圖η中提 及之用於校準HIPCF消除器13〇之輸入BpF 2〇5的方法 32 201214999 1105之抓程圖。在區塊12〇5中.,啟動旁路開關$及 且撤銷啟動旁路開關720。此使LNA_BpF 215及q增強型 BPF 225旁通以用於輸人聊2()5之校準。在某些例示性實 施例中,控制器235回應於組態帶通濾波器2〇5、2丨5及225 之命令操作旁路開關670、720及725。 在區塊1210中,將具有所要中心頻率(例如,45〇 MHz、 600 MHU 770 MHz)之導頻調或調譜器信號(例如,行 動TV信號)施加至HIPCF消除H 130之輸入端。在某些 例示性實施例中,HIPCF ;肖除器13{)❹晶片上鎖相迴路 產生導頻調或調諧器狀信號。在某些例示性實施例中,藉 由重新使用接收器135之鎖相迴路(例如,經由接收器之 輸出接腳t之一者)產生導頻調或調譜器信號。 在區塊1215中,在mpCF消除器⑽之輸出端處量測 導頻調或㈣器信號之功率位準。在某些例示性實施例 中,使用ATE或台上特性化設備量測導頻 之'出功率料。舉例而言,ATE或台上特性化設備= 括:4分析益。在某些例示性實施例中,使用自接收器135 獲传之接收信號品f指示符量測導頻調或㈣ 準。在某些例示性實施例中,使用功率偵測器= 置測導頻調或調諧器信號之輸出功率位準。 之設= 二:中:控制器235進行對SCA3°5及…31。 、或夕個s周整,且量測自每一調整產生的道 =器信以輸出功率位準。控制,235可繼續進= 至導頻凋或調諧器信號之輸出功率位準達到或超過 33 201214999 了接又、較佳或最大位準為止。 ±(r a 卜或其他,控制器235 了進仃某數目個凋整且記錄導 ^ ,如 门及凋蟲器k號之輸出功 手位早(例如,在記憶體裝置 -^ # ^ . 申)’且識別具有最佳、 較佳或最尚功率位準的記錄之 W眘谂点丨Λ X. ;出力率位準。在某些例示 性實施例中,控制器235在單 平凋彡日加或減小程序中掃視用 於SCA 305及SCA 31〇之今定括β τ评祝用 疋值(例如,對於數位SCA, 一次一個最低有效位S(「LSB」)或多個lsb)。在某此 例示性實施例中,可使用二進制演算法(諸如,在圖2〇^ 說明且下文論述之演I1 ^ 臾异法)來發現用於SCA 305及SCA31〇 之較佳設定。 在區塊1225中,控制器235將所要中心頻率及對應於 可接受、較佳或最大位準的用於SC〜SCAJ:設 定儲存於記憶體裝£ 76〇中之查找纟9⑽中。舉例而言, 可將所要中〜頻率儲存於攔位「Freql」中,且可將用於sca 305及SCA310之設定储存於攔位「SCAj[nput_BpFi」中。 在區塊1225後,方法1 1 〇5繼續進行至如在圖1 1中提及之 區塊1 1 1 0。 圖1 3為描繪根據某些例示性實施例的如在圖丨丨之區 塊1110中提及之用於校準HIPCF消除器13〇之LNA-BPF 2 1 5的方法1110之流程圖。在區塊丨3〇5中,啟動旁路開關 720及670且撤銷啟動旁路開關725。此使輸入BpF 2〇5及 Q增強型BPF 225旁通以用於LNA_BPF 215之校準。 在區塊1310中’控制器235進行對SCA 315之設定的 一或多個調整’且量測自每一調整產生的導頻調或調諧器 34 201214999 輪出功率位準。控制器235可繼續進行調整,直至 '調或調5皆器信號之輸出工力率位I達到或超過可接受、 乂佳或最大位準為止。此外或其他,控制H 235可進行茸 °。整且記錄導頻調或調諧器信號之輸出功率位準 /例如’在記憶體裝f 760中),且識別具有最佳、較佳 或最高功率位準的記錄之輸出功率位準。在某些例示性實 施例中,控制器235在單調增加或減小程序中掃視用於SCA 315之設定值(例如,對於數位SCA,一次一個LSb或多 個LSB )。在某些例示性實施例令,可使用二進制演算法 (諸如,在圖20中說明且下文論述之演算法)來發現用於 SCA 3 1 5之較佳設定。 在區塊1315中,控制器235將對應於可接受、較佳或 最大位準的用於SCA 315之設定儲存於記憶體裝置76〇中 之查找表900中。舉例而言,用於sc A 315之設定可儲存 於攔位「SCA—LNA_BPF1」中。在區塊1315後,方法111〇 繼續進行至如在圖11中提及之區塊1115。 圖14A及圖14B (統稱為圖14 )描繪根據某些例示性 實施例的如在圖11之區塊111 5中提及之用於校準hipcf 消除器130之Q增強型BPF 225的方法1115之流程圖。在. 區塊1405中,啟動旁路開關720及725且撤銷啟動旁路開 關670。此使輸入BPF 205及LNA-BPF 215旁通以用於q 增強型BPF 225之校準。 在區塊1410中’為了保持交又耦接對620中之電晶體 開關M8及M9及電流源M60至M6n在工作中且接通而避 35 201214999 目的,將偏壓電流施加(例 M70至M7n。施加至電流 免Q增強型BPF 225之振i之 如’由控制器235 )至電流開關 開關M70至M7n的電流之量可對應於査找表_之「用於 QE之最小電流」欄位之值。 在區塊1415中,控制器235進行對sca 之設定的 或夕個調!’且里測自每一調整產生的導頻調或調諧器 信號之輸出功率位準。控制$ 235可繼續進行調整直至 導頻調或調譜器信號之輸出功率位準達到或超過可接受、 較佳或最大位準為止。此外或其他,控制_ 235可進行某 數目個調整且記錄導頻調或調諸器信號之輸出功率位準 (例在記憶體裝置760中),且識別具有最佳、較佳 或最高功率位準的記錄之輸出功率位準。纟某些例示性實 施例中’控制器235在單調增加或減小程序中掃視用於SCA 615之設定值(例如,對於數位SCA,一次—個或多 個LSB)。在某些例示性實施例中,可使用二進制演算^ (諸如’在® 20中說明且下文論述之演算法)來發現用於 SCA 615之較佳設定。 在區塊H20中,控制器235藉由增加電流開關购至 M7n之設定來增加施加至交又麵接之電晶體開%⑽、 的電流之量。在某些例示性實施例中’將電流量増加幾個 巧如,4個)LSB。在區塊142”,切斷導頻調或調諸 號。在區塊1430中,控制器235進行關於是否存在由 Q增強型BPF 225產生之任何振盡的詢問。在某些例示性實 施例中,此詢問包括將HIPCF消除器13〇的量測之輸出功 36 201214999 率位準與ATE處之預定臨限值或㈣於查找表·之雜項 值950中的臨限值「用於振盤的功率偵測器輸出臨限值」 比較。若量測之輸出功率位準低於臨限值,則控制器235 判定不存在振盪。若㈣^ 235判定不存在或存在足夠低 的振盪,則方法ιι15繼續進行至區塊1435,在區塊Μ” 處’控制H 235再次接通導頻調或調諧器信號且將導頻調 或調諧器信號施加至HIPCF消…3〇之輸入端。在區塊 則後,方法返回至區塊1415。若控制器加判定存在振 盥’則方法ill5繼續進行至區塊144〇。 在區塊1440中,控制器235將施加至電流開關M7〇至 M7n的電流之量減小至振盪前之位準。在區塊1445中,控 制益235將對應於振蘆前之電流位準的用於sca 之設 定儲存於記憶體裝i 76〇中之查找纟_巾。舉例而言, 用於SCA615之設定可儲存於攔位「sca_qe—Βρρι」^。 在區塊1450中’導頻調或調諧器信號得以重新啟動且 施加至HIPCF消除器130之輸入端。控制器235進行對用 於DAC 650之設定的—或多個調整,以用於對壓控電容器 VC1及VC2加偏壓,g香、,目丨ώ — 座且里測自母一調整產生的導頻調或調 諧器信號之輸出功率位準。對DAC 65〇之調整會調整在壓 控電容器VCM及VC2處之電壓位準。控制器235可繼續進 行调整i至導頻調或調譜器信號之輸出功率位準達到 超過可接受、較佳或最大位準為止。此外或其他,控制; 235可進行某數目個調整且記錄導頻調或調譜器信號之輪 出功率位準(例如,在記憶體裝i 760中),且識別具: 37 201214999 最佳、較佳或最高功率位準的記錄 _ <翰出功率位準。在箄 些例示性實施例中’控制器235在 ” 你早s周增加或減小程序中 掃視用於DAC 650之設定值(例如, —久一個LSB或多個 LSB )。.在某些例示性實施例中, 』使用二進制演算法(諸 如,在圖20中說明且下文論述之演CurrentTempco3) is used by the controller 235 to adjust the setting of the current switches M70 to M7n and thus the bias current in the q-enhanced bpf 225 based on the change in temperature. The exemplary lookup table 900 also includes a seed value 940 for the j/Q modulator 23A. The seed value 940 includes the in-phase and quadrature (LQ) settings for the Ι/Q modulator 23〇 at each frequency (Freqi to Freq3) 29 201214999 ((I1, qi) to (13, Q3)) . Lookup Table 9〇〇 also includes miscellaneous settings of 95〇. The miscellaneous setting 950 includes a temperature for performing calibration of the HIPCF canceller 13〇, a process parameter of a manufacturing lot of the canceller 130, a temperature coefficient set by the DAC 65〇, a transistor switch M8 required to hold the Q-enhanced BPF 225, and The minimum current that M9 turns on and the threshold for the detected oscillation of the power detector 745 on the chip. The lookup table 900 is stored on the memory device 76 and is accessed by the controller 235 to adjust the settings of certain components within the HIPCF canceller 130 during normal operation and during the calibration and tuning procedures discussed below. Many of the settings in lookup table 9〇〇 are also filled during such calibration and tuning procedures' as discussed in further detail below. Circle 10 is a flow diagram depicting a method for calibrating certain components of HIPCF canceller 130 in accordance with certain exemplary embodiments. After the HlpcF canceller 130 is fabricated, for example, in an integrated circuit, in block 1〇〇5, during the ate or on-stage characterization procedure, the initial lookup table in FIG. 9 is filled in. set up. In block 1010, the value set for the lookup table 900 is loaded into the internal register of controller 235 during the application phase when the HIPCF canceller is powered. The controller can access the lookup table 900 and use the current temperature measurement results from the temperature sensor 755 and the channel frequency control pjjpcF canceller 13 调 to which the receiver modulates. An optional calibration routine can also be performed in block 1〇1〇 to calibrate band pass filters 205, 215 and 225 and/or I/Q modulator 23A. In block 1015, if the channel of the receiver 135 changes, the I/Q tune 30 201214999. The transformer 230 is recalibrated by the controller 23 5 . This calibration can improve noise and/or interference cancellation based on the receiver's received signal quality indicator and the cancellation algorithm described below. In block 1020, the controller 235 triggers the bandpass ferrites 2〇5, 215, 225 and I/ in response to a command from the user or in response to a temperature change exceeding a predetermined threshold (eg, 10 degrees Celsius). Calibration of the Q modulator 230. During the calibration procedure of method 1000, the value in lookup table 9〇〇 is updated. 11 is a diagram depicting a method for configuring a filter of a HIPCF canceller 130 for a desired center frequency (eg, for a mobile TV embodiment, 450 MHz, 600 MHz, or 770 MHz), in accordance with certain exemplary embodiments. Flow chart. In block 1 105, the input BPF 205 is calibrated. The lnA-BPF 215 and the Q-enhanced BPF 225 are bypassed by activating the bypass switches 725 and 670 and deactivating the startup bypass switch 72. A pilot tone or tuner signal is applied to the input of the HIPCF canceller 130 and the power level of the pilot tone or tuner signal is measured at the output of the HIPCF canceller 130. The settings of SCA 305 and SCA 310 are adjusted based on the measured power level until the power level reaches an acceptable level. The settings of 8匸8 3〇5 and SCA 3 10 corresponding to acceptable power levels are entered in lookup table 9〇〇 for later use by controller 235. Block 11〇5 is discussed in further detail below with reference to FIG. In block 1110, the LNA - BPF 215 is calibrated. Input bpF 205 and Q enhanced BPF 225 are bypassed by activating bypass switches 720 and 670 and deactivating startup bypass switch 725. In the case where the pilot tone or tuner signal is still applied to the rounding end of the HIPCF canceller 130, the setting of the SCA 3 15 is adjusted based on the measured power level until the measured power level is acceptable 31 The 201214999 level is up to now. The settings of SC A 3 1 5 corresponding to acceptable power levels are populated in lookup table 900 for later use by controller 235. Block Π 10 is discussed in further detail below with reference to FIG. In block 1 1 1 5, the Q-enhanced BPF 225 is calibrated. Block 1115 is discussed in further detail below with reference to FIG. In block 112, the temperature coefficients for bandpass filters 205, 215, and 225 are calculated. In some exemplary embodiments, the ATE (or on-board measurement device) calibrates the settings for each of the band pass filters 205, 2 15 and 225 for more than one temperature. For example, the bandpass filter can be calibrated at room temperature (eg, 27 °C) at 70 C and at 0 °C. Controller 235 can calibrate the temperature coefficient by taking the settings for each bandpass filter 2〇5, 21 5, 225 at each temperature. The temperature coefficients can be stored in the corresponding blocks in the lookup table 900 in blocks 910, 920, 930, and 950. In block 1125, the I and q seed values for the i/q modulator 23 are calibrated. In some exemplary embodiments, the ATE (or on-stage measurement device) may use settings similar to the circuit 1 depicted in FIG. Transmitter 105 can be activated and one or more of the cancellation algorithms discussed below can be performed for the desired center frequency to identify better or acceptable cancellation points. The (I, Q) setting corresponding to the identified cancellation point can be stored in the block 94 of the lookup table 9〇〇. After block 1125, method 1100 ends. Of course, the method 1100 can be executed more than once. For example, the method can be performed during ATE and then performed again after the wafer or system is placed in operation. FIG. 12 is a depiction of the use as illustrated in FIG. η, in accordance with certain exemplary embodiments. A method for calibrating the input BpF 2 〇 5 of the HIPCF canceller 13 2012 32 201214999 1105. In block 12〇5, the bypass switch $ is activated and the bypass switch 720 is deactivated. This bypasses the LNA_BpF 215 and the q-enhanced BPF 225 for the calibration of the input 2()5. In some exemplary embodiments, controller 235 operates bypass switches 670, 720, and 725 in response to commands configured to bandpass filters 2〇5, 2丨5, and 225. In block 1210, a pilot tone or spectrum modulator signal (e.g., a traveling TV signal) having a desired center frequency (e.g., 45 〇 MHz, 600 MHU 770 MHz) is applied to the input of the HIPCF cancellation H 130. In some exemplary embodiments, the HIPCF; the multiplexer 13{) 锁 the phase locked loop on the wafer generates a pilot tone or tuner signal. In some exemplary embodiments, the pilot tone or the scheduler signal is generated by reusing the phase locked loop of the receiver 135 (e.g., via one of the output pins of the receiver). In block 1215, the power level of the pilot or quad signal is measured at the output of the mpCF canceller (10). In some exemplary embodiments, the 'output power' of the pilot is measured using an ATE or on-stage characterization device. For example, an ATE or on-stage characterization device = 4: 4 analysis benefits. In some exemplary embodiments, the received signal t-indicator transmitted from the receiver 135 is used to measure the pilot tone or (quad). In some exemplary embodiments, a power detector is used = the output power level of the pilot tone or tuner signal is set. Set = 2: Medium: Controller 235 performs on SCA 3 ° 5 and ... 31. Or, s s, and measure the output power level from the track generated by each adjustment. Control, 235 can continue to enter = to the pilot or the output power level of the tuner signal reaches or exceeds 33 201214999 until the next, better or maximum level. ±(ra 卜 or other, controller 235 has entered a certain number of tidy and recorded guides, such as the gate and the worm's output of the k-hand is early (for example, in the memory device -^ # ^ . 'and identify the record with the best, better or most power level. X. ; output rate level. In some exemplary embodiments, controller 235 is flat In the daily plus or minus program, the glance for the SCA 305 and SCA 31 is used to determine the value of the beta τ (for example, for digital SCA, one least significant bit S ("LSB") or multiple lsb) In some such exemplary embodiments, binary algorithms (such as those illustrated in Figure 2 and discussed below) can be used to find better settings for SCA 305 and SCA 31. In block 1225, the controller 235 stores the desired center frequency and the SC~SCAJ: setting for the acceptable, preferred or maximum level in the memory 装9(10) in the memory device. For example, , you can store the desired ~ frequency in the block "Freql", and store the settings for sca 305 and SCA310 in the block. In "SCAj[nput_BpFi". After block 1225, method 1 1 〇 5 proceeds to block 1 1 1 0 as mentioned in Figure 11. Figure 13 is a depiction in accordance with some exemplary embodiments. A flowchart of a method 1110 for calibrating the LNA-BPF 2 15 of the HIPCF canceller 13 as mentioned in block 1110 of the figure. In block 丨3〇5, the bypass switch 720 is activated. 670 and deactivates the bypass switch 725. This bypasses the input BpF 2〇5 and Q-enhanced BPF 225 for calibration of the LNA_BPF 215. In block 1310, the controller 235 performs the setting of the SCA 315. Multiple adjustments' and measurement of the pilot tone or tuner 34 201214999 round-out power level generated by each adjustment. The controller 235 can continue to adjust until the 'output or adjustment of the output signal rate of the 5 signal I meets or exceeds the acceptable, better or maximum level. In addition or other, the control H 235 can be used to control the output power level of the pilot tone or tuner signal / for example, 'in the memory device f 760) and identify the output power level of the record with the best, better or highest power level. In some exemplary embodiments, controller 235 scans the set values for SCA 315 in a monotonically increasing or decreasing routine (e.g., for a digital SCA, one LSb or more LSBs at a time). In some exemplary embodiments, a binary algorithm (such as the algorithm illustrated in Figure 20 and discussed below) may be used to find a preferred setting for SCA 315. In block 1315, controller 235 stores the settings for SCA 315 corresponding to the acceptable, preferred or maximum levels in lookup table 900 in memory device 76A. For example, the settings for sc A 315 can be stored in the block "SCA-LNA_BPF1". After block 1315, method 111 continues to block 1115 as mentioned in FIG. 14A and 14B (collectively referred to as FIG. 14) depict a method 1115 for calibrating the Q-enhanced BPF 225 of the hipcf canceller 130, as mentioned in block 111 5 of FIG. 11, in accordance with certain exemplary embodiments. flow chart. In block 1405, bypass switches 720 and 725 are activated and the bypass switch 670 is deactivated. This bypasses the input BPF 205 and the LNA-BPF 215 for calibration of the q-enhanced BPF 225. In block 1410, a bias current is applied (for example, M70 to M7n) in order to maintain the transistor switches M8 and M9 and the current sources M60 to M6n in the pair 620 in operation and in operation to avoid 35 201214999. The amount of current applied to the current-free Q-enhanced BPF 225, such as 'from controller 235' to the current-switching switches M70 to M7n, may correspond to the "minimum current for QE" field of the look-up table_ value. In block 1415, controller 235 performs a setting for sca or an evening adjustment! And measure the output power level of the pilot tone or tuner signal generated by each adjustment. Control $ 235 to continue adjusting until the output power level of the pilot or modulator signal reaches or exceeds the acceptable, preferred or maximum level. Additionally or alternatively, control _235 may perform a certain number of adjustments and record the output power level of the pilot or modulator signal (as in memory device 760) and identify the best, better or highest power level. The output power level of the quasi-recorded. In some exemplary embodiments, controller 235 scans for the set value for SCA 615 in a monotonically increasing or decreasing procedure (e.g., for a digital SCA, one or more LSBs). In some exemplary embodiments, a binary calculus (such as the algorithm described in "20 and discussed below) may be used to find a preferred setting for SCA 615. In block H20, the controller 235 increases the amount of current applied to the AC-on-cell transistor %(10) by increasing the current switch to M7n setting. In some exemplary embodiments, the amount of current is increased by a few, for example, four LSBs. At block 142", the pilot tone or number is cut. In block 1430, controller 235 makes an inquiry as to whether there is any jitter generated by Q-enhanced BPF 225. In certain illustrative embodiments The inquiry includes the output of the HIPCF canceller 13A, the 201214999 rate level and the predetermined threshold value at the ATE, or (4) the threshold value in the miscellaneous value 950 of the lookup table. The power detector output threshold is compared. If the measured output power level is below the threshold, the controller 235 determines that there is no oscillation. If the (4)^235 decision does not exist or there is a sufficiently low oscillation, then the method ιι 15 continues to block 1435 where the control H 235 is again turned on the pilot tone or tuner signal and the pilot is tuned or The tuner signal is applied to the input of HIPCF. After the block, the method returns to block 1415. If the controller adds a decision to vibrate, then method ill5 proceeds to block 144. In 1440, controller 235 reduces the amount of current applied to current switches M7 〇 to M7n to a level prior to oscillating. In block 1445, control benefit 235 will correspond to the current level before the horn. The setting of sca is stored in the memory device i 76〇. For example, the setting for SCA615 can be stored in the block "sca_qe-Βρρι"^. In block 1450 the 'pilot or tuner signal is restarted and applied to the input of HIPCF canceller 130. The controller 235 performs - or a plurality of adjustments to the settings of the DAC 650 for biasing the voltage controlled capacitors VC1 and VC2, and the target is measured from the mother-adjusted The output power level of the pilot or tuner signal. The adjustment of the DAC 65〇 adjusts the voltage level at the voltage controlled capacitors VCM and VC2. Controller 235 may continue to adjust i until the output power level of the pilot tone or spectrum modulator signal exceeds an acceptable, preferred or maximum level. Additionally or alternatively, control; 235 may perform a certain number of adjustments and record the pilot power level of the pilot tone or the spectrometer signal (eg, in memory pack i 760), and the identification: 37 201214999 Best, The best or highest power level record _ < Han out power level. In some exemplary embodiments, 'controller 235' scans the set value for DAC 650 in the early or weekly increase or decrease program (eg, - one LSB or multiple LSBs long). In an embodiment, "using a binary algorithm (such as illustrated in Figure 20 and discussed below)

戌舁法)來發現用於DAC 650之較佳設定。 在區塊⑷5中,切斷導頻調或調^信I在__ 中,量測HIPCF消除ϋ130之輸出功率位準。在區塊㈣ 中’類似於區塊1430’控制器235進行關於是否存在由q 增強型卿225產生之任何振盈的詢問。若控制器出判 定存在振盪,則方法1115繼續進行至區塊147〇。若控制器 235判定不存在振盪,則方法1Π5繼續進行至區塊1475。 在區塊1470中,控制器235藉由將電流開關Μ7〇至 Μ7η之設定減小(例如)幾個LSB來降低用於對交叉耦接 之電晶體M8、M9加偏壓之電流位準。在降低了電流位準 後’方法1115返回至區塊1450。 在區塊1475中,控制器235將用於dac 650及電流開 關M70至M7n之設定儲存於記憶體裝置76〇中之查找表 900中。舉例而言,用於電流開關M7〇至M7n之設定可儲 存於攔位「Currentl」中,且用於DAC 650之設定可儲存於 棚位「DAC1」中。在區塊1475後,方法丨j 15結束。當然, 可針對任何數目個頻率重複方法n〇〇任何次數。舉例而 ° 可針對二個頻率(Freq 1、Freq2及Freq3 )校準帶通濾、 波器 205 ' 215 及 225 。 38 201214999 圖1 5為&繪根據某些例示性實施例的用於校準圖7之 HIPCF消除器130之輪 铷入BPF 205的方法1500之流程圖。 此方法1500為圖12之方法11〇5的替代方法。在區塊测 T ’撤銷啟動旁路開_ 72〇、725及67〇。舉例而言,控制 器235可撤銷啟動旁路開關72〇、725及。 在區塊1510中,蔣:且亡· &面+ 將具有所要中心頻率之導頻調或調諧 器信號施加至HIPCF消除_⑽之輸人端。在區塊1515 十,在HIPCF消除器13〇之輸入端處進行反射之導頻調或 調諧器信號的量測(例如,反射係數或回程損耗)。舉例 而言,此量測可由功率偵測器或頻譜分析器進行。在區塊 1520中,控制器235進行對SCA 3〇5及SCA 31〇之設定的 一或多個調整,且f測反射之導頻調或㈣器信號。控制 器235可繼續進行調整,直至反射之導頻調或調㈣㈣ '達到或超過可接受、較佳或最小位準為止。此外或其他, $制器235可進行某數目個調整且記錄反射之導頻調或調 谐器信號(例如’在記憶體裝置76〇中),且識別具有最 佳、較佳或最低位準的記錄之反射之導頻調或調諧器信 號。在某些•例不性實施例巾,控制器235在單調増加或減 小程序中掃視用於似3〇5及似31〇之設定值(例如, 對於數位SCA,-次-個LSB或多個LSB)。在某些例示 性實施例中,可使用二進制演算法(諸如,在圓2〇中說明 且下文論述之演算法)來發現用於SCA 3〇5及Sca 之 較佳設定。 在區塊1525中,控制器235將所要中心頻率及對應於 39 201214999 可接受 較佳或最小位準的用於SCA 305及SC A 310之設 定儲存於記憶體裝置 760中之查找表9〇〇中。舉例而言, 可將所要中心頻率儲在於M # r c t . 只千砵仔於襴位「Freql」中,且可將用於 305及SCA 310之設定儲存於爛位「SCA_Input_BPFl」中。 圖16為描繪根據某些例示性實施例的用於針對一給定 頻率判m關設的方法! 6⑽之流程圖。舉例而言,可回 應於使用者將頻道改變應用於行動τν而執行方法16〇〇 在某些例示性實施财m _ &括用料一帶通濾 波器205、215及225之設定及用於接收器135可調諧至的 每一頻道之I及Q種子值。在某些例示性實施例中,查找 表900包括用於每一帶通濾波器2〇5、2丨5及225之設定及 用於預定數目個(例如,3個)頻道頻率之〖及Q種子值。 對於不包括針對每一頻道頻率的校準之設定之此等實施 例,方法1600提供用於計算在任一施加可選擇頻道頻率下 的用於每一帶通濾波器205、215及225之SCA開關設定之 一例示性程序。例示性方法16〇〇考量針對預定數目個頻道 頻率識別的查找表900中之校準值及由晶片上溫度感測器 (諸如’溫度感測器7 5 5 )量測之實際溫度。 在區塊1605中,控制器235進行判定是否開始判定用 於每一帶通濾波器205、2 1 5、225之開關設定之詢問。在 某些例示性實施例中,控制器2 3 5與接收器1 3 5通信以判 定用於接收器135之接收頻率是否已(例如)因用於接收 器1 3 5的頻道之改變而改變。若用於接收器之接收頻率已 改變,則控制器235判定開始判定用於每一帶通濾波器 40 201214999 ,205、215、225之開關設定,且繼續進行至區塊161(^否 則,方法16 0 0保持處於區塊j 6 〇 5中。 在某些例示性實施例中,控制器235判定HIpCF消除 器130駐留的晶片灰溫度是否已改變。控制器235監視接 收之溫度量測結果以判定溫度是否已改變達某一臨限值。 若控制器235判定溫度已改變達等於或超過臨限值之量, 則控制器235判定開始判定用於每一帶通濾波器2〇5、2丨5、 225之開關設定,且繼續進行至區塊i 6丨〇。否則,方法丨6〇〇 保持處於區塊1 6 0 5中。 在某些例示性實施例中,控制器235判定查找表90ό 是否已改變或是否已更新查找表9〇〇中之設定或值。若控 制器235判定查找表已改變,則控制器235判定開始判定 用於每一帶通濾波器205、215、225之開關設定,且繼續 進行至區塊1610。否則’方法1600保持處於區塊16〇5中。 在區塊1610申,控制器235接收用於接收器135之接 收頻率(「目標頻率」)、來自查找表9〇〇的用於帶通濾 波器205、215及225之當前校準值、來自溫度感測器755 的即時或近即時溫度量測結果及來自查找表900的校準期 間之溫度值。 在區塊1615中,控制器235進行判定目標頻率是否小 於頻率臨限值之詢問。舉例而言,在某些行動TV實施例 中’將此頻率臨限值設定在對應於某些行動τν調諧器之接 收頻帶中間的600 MHz。若目標頻率小於頻率臨限值,則 方法161 5繼續進行至區塊1 6 2 0。否則,方法繼續進行至區 41 201214999 塊 1625 。 在區塊1620令,控制器235計算變數「以_」,其 指示目標頻率與頻率臨限值之間的差。控制器235使用查 找表900中的校準值中之兩個或兩個以上者執行一内插程 序(例如,線性内插),以判定用於SCA 3〇5、31〇、315 及615之設定、用於壓控電容器VC1及VC2之dac設定 及用於電流開關M70至M7n之偏壓電流開關設定。舉例而 言,對於每一前述組件,控制器235在藉由1)化心進行之 線性内插計算t使用經儲存以用於第一頻率(諸如,Freqi ) 之設定及經儲存以用於第二頻率(諸如,Freq2)之設定, 以判定用於此組件之設定。 在區塊1625中,控制器計算指示目標頻率與第二頻率 值之間的差之變數DeltaF。在某些例示性實施例中,若頻 率臨限值為600 MHz,則第二頻率值為77〇 MHz〇此等頻 率值為例示性而非限制性,且在不脫離本發明之範疇及精 神之if况下可使用其他頻率值^類似於區塊1 62 〇,控制器 使用查找表900中的校準值中之兩個或兩個以上者執行一 内插程序,以判定用於SCA3〇5、31〇、315及615之設定、 用於壓控電容器VC1及VC2之DAC設定及用於電流開關 M70至M7n之偏壓電流開關設定。舉例而言,對於每一前 it、、且件控制器235在藉由DeltaF進行之線性内插計算中 使用經儲存以用於第一頻率(諸如,Freq2 )之設定及經儲 存以用於第二頻率(諸如,Freq3 )之設定,以判定用於此 組件之設定。 42 201214999 如在區塊1620及1625中所示,視目標頻率而定,方 法1 600使用兩組不同的校準之設定判定用於hij>cf消除器 130之組件的設定,此使控制器235能夠使用最在目標頻率 附近的校準之设定判定用於該等組件之適當設定。 在區塊1630中,控制器235藉由計算產生實際溫度與 執行最後校準之溫度(儲存於查找表9〇〇之襴位95〇中) 之間的差之變數「DeltaTemp」來判定溫度補償。控制器⑼ 亦針對用於每一組件之設定計算由溫度差造成之偏差值。 控制器235使用偏差值判定在目標頻率下的用於該等組件 之最終設定。控制H 235將最終設定儲存於内部暫存器中 以用於在操作該#組件的過程中使用^注意,用於Μ調變 器230之1及〇設定可並非為在方法_中補償之溫度, =係因為可使用下文參看圖17至圖Η論述之消除演算法 中的一者校準I&Q設定。 圖17描繪根據某些例示性實施例的雜訊及/或干擾消 Ϊ =法之實施層⑽。此等演算法可使用來自受害接收 益之回饋信號判定用於HIPCF消除器13〇之適當工 回饋信號包括用於通信系統-之品質指示符(例 产等)咖、咖、雜訊底限、賺、EVM及位置準確 算法執行層1740。在竿此例异法控制層1730及演 中之 在某』例不性貫施例中,層171〇至1740The method is to find a better setting for the DAC 650. In block (4) 5, the pilot tone adjustment or modulation I is cut off in __, and the output power level of the HIPCF cancellation ϋ 130 is measured. In block (4), the 'similar to block 1430' controller 235 makes an inquiry as to whether there is any vibration generated by the q enhanced type 225. If the controller determines that there is an oscillation, then method 1115 proceeds to block 147. If controller 235 determines that there is no oscillation, then method Π5 proceeds to block 1475. In block 1470, controller 235 reduces the current level used to bias the cross-coupled transistors M8, M9 by reducing, for example, a few LSBs by setting the current switches Μ7〇 to η7η. Method 1115 returns to block 1450 after the current level is lowered. In block 1475, controller 235 stores the settings for dac 650 and current switches M70 through M7n in lookup table 900 in memory device 76A. For example, the settings for current switches M7〇 to M7n can be stored in the track "Currentl", and the settings for the DAC 650 can be stored in the booth "DAC1". After block 1475, method 丨j 15 ends. Of course, the method can be repeated any number of times for any number of frequencies. For example, ° bandpass filter, wavers 205' 215 and 225 can be calibrated for two frequencies (Freq 1, Freq2 and Freq3). 38 201214999 FIG. 15 is a flow diagram of a method 1500 for calibrating the wheel of the HIPCF canceller 130 of FIG. 7 into the BPF 205, in accordance with certain exemplary embodiments. This method 1500 is an alternative to the method 11〇5 of FIG. In the block test T ’ revoke the start bypass _ 72 〇, 725 and 67 〇. For example, controller 235 can deactivate start bypass switches 72A, 725 and . In block 1510, Jiang: and Death & Face + applies a pilot tone or tuner signal having the desired center frequency to the input end of the HIPCF cancellation _(10). At block 1515, the pilot of the reflected or tuner signal (e.g., reflection coefficient or return loss) is reflected at the input of the HIPCF canceller 13A. For example, this measurement can be performed by a power detector or a spectrum analyzer. In block 1520, controller 235 performs one or more adjustments to the settings of SCA 3〇5 and SCA 31〇, and f measures the pilot or (4) signal of the reflection. The controller 235 can continue to adjust until the pilot of the reflection is adjusted or adjusted (4) (4) 'to reach or exceed the acceptable, preferred or minimum level. Additionally or alternatively, the controller 235 can perform a certain number of adjustments and record the reflected pilot tone or tuner signal (eg, 'in the memory device 76') and identify the best, preferred, or lowest level. Record the reflected pilot or tuner signal. In some exemplary embodiments, the controller 235 scans for settings such as 3〇5 and 31〇 in a monotonic addition or subtraction procedure (eg, for digital SCA, - times-LSB or more) LSB). In some exemplary embodiments, binary algorithms, such as those illustrated in circle 2 且 and discussed below, may be used to find preferred settings for SCA 3〇5 and Sca. In block 1525, controller 235 stores the desired center frequency and the settings for SCA 305 and SC A 310 that correspond to the preferred or minimum level of 39 201214999 in memory device 760. in. For example, the desired center frequency can be stored in M # r c t . Only in the "Freql" position, the settings for 305 and SCA 310 can be stored in the rotten position "SCA_Input_BPF1". 16 is a diagram depicting a method for judging a given frequency for a given frequency, in accordance with some demonstrative embodiments! Flow chart of 6(10). For example, the method 16 can be performed in response to the user applying the channel change to the action τν. In some exemplary implementations, the settings of the bandpass filters 205, 215, and 225 are used and used. The I and Q seed values for each channel that the receiver 135 can tune to. In some exemplary embodiments, lookup table 900 includes settings for each band pass filter 2〇5, 2丨5, and 225 and Q seeds for a predetermined number (eg, 3) of channel frequencies. value. For such embodiments that do not include settings for calibration of each channel frequency, method 1600 provides for calculating SCA switch settings for each of band pass filters 205, 215, and 225 at any of the applied selectable channel frequencies. An exemplary procedure. The exemplary method 16 considers the calibration values in the lookup table 900 for a predetermined number of channel frequency identifications and the actual temperatures measured by on-wafer temperature sensors such as the 'temperature sensor 75 5 . In block 1605, the controller 235 makes an inquiry as to whether or not to start determining the switch setting for each band pass filter 205, 2 1 5, 225. In some exemplary embodiments, controller 253 communicates with receiver 135 to determine if the receive frequency for receiver 135 has changed, for example, due to a change in channel for receiver 135. . If the reception frequency for the receiver has changed, the controller 235 determines to start determining the switch settings for each of the band pass filters 40 201214999, 205, 215, 225, and proceeds to block 161 (^ otherwise, method 16 0 0 remains in block j 6 〇 5. In some exemplary embodiments, controller 235 determines if the wafer ash temperature resident by HIpCF canceller 130 has changed. Controller 235 monitors the received temperature measurement to determine Whether the temperature has changed to a certain threshold. If the controller 235 determines that the temperature has changed by an amount equal to or exceeding the threshold value, the controller 235 determines to start determining for each band pass filter 2〇5, 2丨5. The switch of 225 is set and continues to block i 6 . Otherwise, method 丨 6 〇〇 remains in block 1 605. In some exemplary embodiments, controller 235 determines lookup table 90 ό Whether the setting or value in the lookup table 9 is changed or not has been updated. If the controller 235 determines that the lookup table has changed, the controller 235 determines to start determining the switch setting for each of the band pass filters 205, 215, 225. And continue to enter The process proceeds to block 1610. Otherwise, the method 1600 remains in block 16〇5. At block 1610, controller 235 receives the receive frequency ("target frequency") for receiver 135, from lookup table 9〇〇 Current calibration values for bandpass filters 205, 215, and 225, immediate or near instantaneous temperature measurements from temperature sensor 755, and temperature values during calibration from lookup table 900. In block 1615, The controller 235 makes an inquiry as to whether the target frequency is less than the frequency threshold. For example, in some mobile TV embodiments, 'this frequency threshold is set to be in the middle of the receive band corresponding to some of the action τν tuners. 600 MHz. If the target frequency is less than the frequency threshold, then method 161 5 proceeds to block 1 6 2 0. Otherwise, the method proceeds to block 41 201214999 block 1625. At block 1620, controller 235 calculates the variable " _", which indicates the difference between the target frequency and the frequency threshold. The controller 235 performs an interpolation procedure (eg, linear interpolation) using two or more of the calibration values in the lookup table 900. To judge For the setting of SCA 3〇5, 31〇, 315 and 615, the dac setting for voltage controlled capacitors VC1 and VC2 and the bias current switch setting for current switches M70 to M7n. For example, for each of the foregoing The component, controller 235, in linear interpolation calculation by 1) centroid, uses settings stored for a first frequency (such as Freqi) and stored for a second frequency (such as Freq2). Set to determine the settings for this component. In block 1625, the controller calculates a variable DeltaF indicating the difference between the target frequency and the second frequency value. In some exemplary embodiments, if the frequency threshold is 600 MHz, the second frequency value is 77 〇 MHz. These frequency values are exemplary and not limiting, and without departing from the scope and spirit of the present invention. Other frequency values can be used. Similar to block 1 62 〇, the controller performs an interpolation procedure using two or more of the calibration values in the lookup table 900 to determine for SCA3〇5. , 31〇, 315 and 615 settings, DAC settings for voltage controlled capacitors VC1 and VC2 and bias current switch settings for current switches M70 to M7n. For example, for each pre-it, the component controller 235 uses the settings stored for the first frequency (such as Freq2) and stored for use in the linear interpolation calculation by DeltaF. The setting of the two frequencies (such as Freq3) to determine the settings for this component. 42 201214999 As shown in blocks 1620 and 1625, depending on the target frequency, method 1 600 determines the settings for the components of hij>cf canceller 130 using two different sets of calibration settings, which enables controller 235 to The appropriate settings for these components are determined using the calibration settings most near the target frequency. In block 1630, controller 235 determines the temperature compensation by calculating a variable "DeltaTemp" that produces the difference between the actual temperature and the temperature at which the last calibration was performed (stored in position 95 of lookup table 9). The controller (9) also calculates the deviation value caused by the temperature difference for the setting for each component. Controller 235 uses the offset values to determine the final settings for the components at the target frequency. Control H 235 stores the final settings in the internal register for use in the operation of the # component. Note that the Μ modulator 230 and the 〇 setting may not be the temperature compensated in the method _ , = because the I&Q setting can be calibrated using one of the cancellation algorithms discussed below with reference to Figures 17 through 。. Figure 17 depicts an implementation layer (10) of a noise and/or interference cancellation method, in accordance with certain exemplary embodiments. These algorithms may use the feedback signal from the victim receiving benefit to determine the appropriate worker feedback signal for the HIPCF canceller 13 including the quality indicator (such as production, etc.) for the communication system - coffee, coffee, noise floor, Earning, EVM, and location-accurate algorithm execution layer 1740. In this example, the heterogeneous control layer 1730 and the performance in a certain example of the inconsistency, layer 171〇 to 1740

接收琴u二Γ下列三個組件中之任一者中:1)受害 〇之基頻積體電路,2)單機微控制器,或3)HIPCF 43 201214999 1 3 0之晶片上控制§§ 91 Γ ϊ» ^ 5(或另一控制裝置)。為了易於論 述,下文將按控制器235執行各別功能來論述層171〇至 1740 ° 在鏈路控制層1 7 1 G t,針對品質分析且測試回饋信號 以判定是否應啟動消除以改良受害接收器135之敏感性。 歸因於HIPCF消除器130提供的作用雜訊及/或干擾消除之 性質’ HIPCF消除肖13G亦可在於受害接收器135之輸入 端處消除由功率放大器11〇 (或另一組件)產生之雜訊及/ 或干擾的同時輸出其自身的雜訊底限。因而,由受害接收 器135看到的總雜訊底限為Hlp(:F消除器13〇、接收天線 120之輸出雜訊底限、由接收天線12〇接收的功率放大器雜 訊及/或干擾及功率放大mo的相位及增益調整之雜訊底 ^ (,左由HIPCF消除器13〇)之和,其又可影響受害接收 ° : 35之敏感性。因此,可基於由受害接收器135接收的 大器110之贯際雜訊及/或干擾決定關於是否啟動 HIPCF消除n 13G以改良受害接收器135之敏感性的判定。 圖1 8十田綠根據某些例示性實施例的針對具有8 MHz之 頻道頻寬及-CDMA8〇〇功率放大器的川廳下調諸之 仃動TV調諸器相對於耗接之功率放大器雜訊繪製的接收 益敏感性之圖_。參看圖18,圖18G()包括:―第—曲 :“805其描繪HIPCF消除器13〇不在作用中時的行動η 。白器敏感性’一第二曲線i 8 i 〇,其描繪贿Μ消除器1 % 少'、或抑制功率放大器雜訊時的行動τν調諧器敏感性。如 在例示性實施方案中所說明,不存在針對低於_i74dBm/Hz 201214999 . 之功率放大器雜訊啟動HIPCF消除器130之優勢,Receiving one of the following three components: 1) victim's fundamental frequency integrated circuit, 2) stand-alone microcontroller, or 3) HIPCF 43 201214999 1 3 0 on-chip control §§ 91 Γ ϊ» ^ 5 (or another control device). For ease of discussion, the respective functions will be performed by controller 235 to discuss layers 171 〇 to 1740 ° at the link control layer 1 7 1 G t, for quality analysis and testing the feedback signal to determine whether cancellation should be initiated to improve victim reception. The sensitivity of the device 135. Due to the nature of the action noise and/or interference cancellation provided by the HIPCF canceller 130, the HIPCF cancellation mode 13G can also eliminate the noise generated by the power amplifier 11 (or another component) at the input of the victim receiver 135. Simultaneously and/or interfere with the output of its own noise floor. Thus, the total noise floor seen by victim receiver 135 is Hlp (: F eliminator 13 〇, output noise floor of receive antenna 120, power amplifier noise and/or interference received by receive antenna 12 〇 And the sum of the phase of the power amplification mo and the gain adjustment of the noise floor (left, by the HIPCF canceller 13A), which in turn can affect the sensitivity of the victim reception °: 35. Therefore, it can be received based on the victim receiver 135 The inter-sequence noise and/or interference of the amplifier 110 determines the determination as to whether to initiate the HIPCF cancellation n 13G to improve the sensitivity of the victim receiver 135. Figure 1 8 Tat Green is directed to 8 according to certain exemplary embodiments. The channel bandwidth of MHz and the CDMA8〇〇 power amplifier's Chuan Hall down-regulates the sensitivity of the TV tuners to the received power amplifier noise. _ See Figure 18, Figure 18G ( ) includes: - the first song: "805 which depicts the action η when the HIPCF canceller 13 is not active. The white sensor sensitivity 'a second curve i 8 i 〇, which depicts the bribe eliminator less than 1%', Or suppress the action τν tuner sensitivity when power amplifier noise. Exemplary embodiment illustrated embodiment, the power amplifier is not present for less than _i74dBm / Hz 201214999. HIPCF advantage of noise canceller 130 starts, the

最大消除/敏感性改良(例如, 南於約-1 60 dBm/Hz之功率放大 130在作用中之情況下,將達成 ’在此例示性實施方案中,約 10 dB),此係因為接收之功率放大器雜訊典型地比HipcF 消除器130之輸出雜訊底限高得多。另外,鏈路控制層i7i〇 偵測在多頻道系統中過去是否已使一特定頻道最佳化且將 對應於先前最佳化之設定自記憶體傳遞至HIpCF i 3〇。該頻 道是否先前已最佳化之指示可由控制器235在最佳化結束 時或在最佳化期間儲存於記憶體中。 可關於自接收器接收之回饋(例如,BER、PER、RSSI、 雜訊底限、SNR、EVM及位置準確度等)來評價所要受害 接收信號品質以判定是否啟動HIPCF消除器130。舉例而 言’若回饋指示接收信號高於組合雜訊底限(亦即,HipcF 消除器130、接收天線120之輸出雜訊底限、由接收天線 120接收的功率放大器雜訊及/或干擾及功率放大器11〇的 相位及增益調整之雜訊底限(經由HIPCF消除器130 ).之 和),則啟動HIPCF 130。此特徵說明於圖19中,圖19描 繪根據某些例示性實施例的具有8 MHz之頻道頻寬的746 MHz下調諧之行動TV調諧器之輸出SNR相對於具有處於 受害接收器135之輸入端處的-161 dBm/Hz下之耦接之 CDMA800功率放大器相位雜訊的接收之行動TV信號強度 之圖1900。參看圖19,圖1900包括:一第一曲線1905, 45 201214999 其描繪HIPCF消除器130不在作用中時的行動TV調諧器 輸出SNR ; —第二曲線1910,其描繪HIpcF消除器13〇消 除或抑制功率放大器相位雜訊時的行動TV調諧器輸出Maximum cancellation/sensitivity improvement (for example, a power amplification 130 of about -1 60 dBm/Hz is active, in the case of 'in this exemplary embodiment, about 10 dB), because it is received Power amplifier noise is typically much higher than the output noise floor of the HipcF canceller 130. In addition, the link control layer i7i detects whether a particular channel has been optimized in the past in the multi-channel system and passes the settings corresponding to the previous optimization from the memory to the HIpCF i 3〇. An indication of whether the channel has been previously optimized may be stored by the controller 235 in the memory at the end of the optimization or during the optimization. The quality of the received signal to be victimized may be evaluated with respect to feedback received from the receiver (e.g., BER, PER, RSSI, noise floor, SNR, EVM, and location accuracy, etc.) to determine whether to activate the HIPCF canceller 130. For example, if the feedback indicates that the received signal is higher than the combined noise floor (ie, the HipcF canceller 130, the output noise floor of the receiving antenna 120, the power amplifier noise and/or interference received by the receiving antenna 120, and The HIPCF 130 is activated by the phase of the power amplifier 11 and the noise floor of the gain adjustment (via the HIPCF canceller 130). This feature is illustrated in FIG. 19, which depicts an output SNR of a mobile TV tuner tuned at 746 MHz with a channel bandwidth of 8 MHz relative to having an input at victim receiver 135, in accordance with certain exemplary embodiments. Figure 1900 of the received TV signal strength of the received CDMA800 power amplifier phase noise at -161 dBm/Hz. Referring to Figure 19, a diagram 1900 includes a first curve 1905, 45 201214999 which depicts the action TV tuner output SNR when the HIPCF canceller 130 is not active; a second curve 1910 depicting the HIpcF canceller 13 〇 elimination or suppression Action TV tuner output for power amplifier phase noise

SNR。第三1915描繪用於行動TV調諧器之所要最小SNR 輸出。如在例示性實施方案中所說明,可能不存在當接收 之行動TV信號低於_90 dBm時啟動HIPCF雜訊消除器130 之優勢。 例示性鏈路控制層1710包括若干操作模式。控制器235 了基於由接收器1 3 5接收的信號之信號品質判定哪一操作 模式在作用中β在某些例示性實施例中,鏈路控制層171〇 包括四個操作模式--最大消除模式、有限消除模式、等 待可接爻信號模式及無信號模式。在此例示性實施例中, 右接收之信號強度可接受(例如,高於可接受之臨限值(在 圖19中,為-81 dBm)位準),則控制器235開始最大消 =模式,藉此HIPCF消除器130之雜訊及/或干擾消除處於 鬲位準。若接收之信號強度低(例如,在可接受之位準臨 限值與非常低位準臨限值之間,在圖19中其在犯⑴ 與-9〇 dBm之間),則控制器235開始HIPCF消除器135 之有限消除模式,藉此雜訊及/或干擾消除位準受到雜訊底 、’’勺束若接收之#號比指示(例如)非常低信號之臨限 值(例如,在圖19中,約_9〇 dBm)低,則控制器235將 開始等待可接受信號模式,藉此控制器235延遲進入隨後 =1720至174〇,直至接收之信號符合或超過臨限值為止。 4在控制_ 235 4於等待可接受信號模式下之同_接收之 46 201214999 信號符合或超過臨限值,則控制器235可進入隨後層172〇 至1740。若不存在接收器135處所接收之信號,則控制器 235開始無信號模式,藉此HIPCF消除器13〇不在作用中。 鏈路控制層1 7 1 0亦可推論關於臨限值之時間相依傳遞 之資訊,例如,當在不足一秒内傳遞兩個臨限值位準時。 可忐將订動裝置運輸至隧道内或橋下,且可保持所有設定 恆定,直至可接受之位準臨限值之傳遞指示行動裝置已自 隧道或橋返回為止。鏈路控制層171〇之操作可接著使用保 持之設定恢復。 从信號處理層172G包括確保回饋信號之敎性及穩固性 之右干程序。第一程序包括在執行雜訊消除演算法前平均 化回饋信號之預定數目個回饋值。 第二程序包括在雜訊消_算法之執行期間校正回饋 二?中之錯誤。一例示性錯誤校正程序包括自接枚器135 二付兩個回饋值及計算兩個回饋值之間的差。若此差小於SNR. A third 1915 depicts the desired minimum SNR output for the mobile TV tuner. As illustrated in the illustrative embodiments, there may be no advantage of initiating the HIPCF noise canceller 130 when the received mobile TV signal is below _90 dBm. The illustrative link control layer 1710 includes several modes of operation. The controller 235 determines which mode of operation is active based on the signal quality of the signal received by the receiver 135. In some exemplary embodiments, the link control layer 171 includes four modes of operation - maximum cancellation Mode, limited cancellation mode, wait for signal mode, and no signal mode. In this exemplary embodiment, the signal strength received by the right is acceptable (e.g., above an acceptable threshold (-81 dBm in Figure 19)), then the controller 235 begins the maximum cancellation mode. Thereby, the noise and/or interference cancellation of the HIPCF canceller 130 is at the 鬲 level. If the received signal strength is low (eg, between an acceptable level threshold and a very low level threshold, between (1) and -9 dBm in Figure 19), controller 235 begins The limited cancellation mode of the HIPCF canceller 135, whereby the noise and/or interference cancellation level is subjected to a noise floor, and the ''spoon bundle'' receives a ## ratio indicating (for example) a very low signal threshold (eg, at In Figure 19, about _9 〇 dBm) is low, then controller 235 will begin to wait for an acceptable signal pattern, whereby controller 235 delays entry into subsequent = 720 to 174 〇 until the received signal meets or exceeds the threshold. 4 The controller 235 may enter the subsequent layers 172 至 to 1740 when the control _ 235 4 waits for the same signal mode in the standby signal mode. The 201214999 signal meets or exceeds the threshold. If there is no signal received at the receiver 135, the controller 235 begins a no signal mode whereby the HIPCF canceller 13 is not active. The link control layer 1 7 1 0 can also infer information about the time dependent transmission of the threshold, for example, when two threshold levels are passed in less than one second. The carrier can be transported into or under the bridge and all settings can be kept constant until the acceptable level of delivery indicates that the mobile device has returned from the tunnel or bridge. The operation of the link control layer 171 can then be resumed using the settings of the hold. The slave signal processing layer 172G includes a right-handed program that ensures the robustness and robustness of the feedback signal. The first procedure includes averaging a predetermined number of feedback values of the feedback signal prior to performing the noise cancellation algorithm. The second procedure includes correcting errors in the feedback during the execution of the noise cancellation algorithm. An exemplary error correction procedure includes the self-sequencer 135 paying two feedback values and calculating the difference between the two feedback values. If the difference is less than

饋::平均化!;個回饋值。否則’自接收器⑴獲得 且判疋第三回饋值與第三回饋值之間的差。 2此差切容許度,科料帛H ==饋值,對預定數目個反覆執行類似=。 爷,且可拗:J於令許度之差的兩個回饋值’則可指示錯 正程序包括對某數目一 第二例示性錯誤校 正在運作中的同车 a值排序,及在雜訊消除演算法 器235可對十;;選擇某數目個回饋值。舉例而言,控制 對十個回饋值排序,且選擇排在中間之五個回饋 47 201214999 值選疋回饋彳s號之平均值得以計算且用於雜訊消除演算 法中》 、 仏號處理層1720之第三程序包括SNR平均化。此SNr 平均化程序包括計算用於不同衛星(sv)(例如,Gps系 統、DARS (數位音訊廣播服務)或銀衛星)#讀之平均 值。可僅針對具有高於-高度臨限值之某—高度級別的衛 星執行SNR平均化,以避免在演算法執行層174〇中之不正 確決策。 在演算法控制層1730中,可實施若干使用者控制以控 制在演算法執行層中描述之演算法。-個此使用者控 制為用以比較兩個回饋值(例如,在消除器1之 1及/或Q設定之改變前及後)的邏輯之極性。極性可為正 。(例如,較高回饋值較好)或負(例如,較低回饋值較好)。 可使用正極性之—些例示性回㈣料隨、載波雜訊比 ⑺N)及中繼器放大器增益。可使用負極性之—些例示性 回饋信號為PER、臟、錯誤向量幅度、雜訊底限位準、鄰 近頻道功率比及鄰近頻道洩漏比。 肩算法執仃層1740包括若干雜訊消除演算法中之一者 的執行。此等演算法包括用以調整HIpcF消除器13〇之工 Q值及”平估自5周整產生之回饋信號以發現用於操作 消除n 13〇之可接受之工及q值。該等演算法包括 、固類型之二進制演算法(快速二進制演算法(FBA)及二 ▲制校正肩算法(BCA))、最小步長演算法(則八)、盲 U算法(BSA)、雙斜率演算法(Dsa)及跟縱且搜尋演 48 201214999 - 算法(TSA)。 圖2G為描繪根據某些例示性實施例㈣於消除雜訊及 ’或干擾之快速一進制演算法2〇〇〇之流程圖。在此例示性 職2_中,用於mpcF消除器13〇之值中的每一 位兀依序顛倒且針對如由在演算法控制層j 73〇中定義之極 性判定的較好回饋值測言式。FBA 2〇〇〇 T開始於一起始位 元,且依序前進遍歷Ϊ值及Q值的位元中之每一者,直至 到達預定義之停止位元為止。在某些例示性實施例十,起 始位元及停止位元可為使用者選擇的。 在區塊2005中,控制器235選擇第一1值及第一 q值 以用於操作HIPCF消除器13〇。此等第一值可為來自查找 表900之起始值、種子值或範圍中間值。在區塊2〇1〇中, HIPCF消除器130將第一 1值及第一 Q值施加至I/Q調變器 230 〇 在區塊2015中,接收器135將具有一回饋值之回饋信 號提供至控制器235。回饋值可為SNR、RSSI、载波雜訊比 (C/N) 、RSSI、中繼器放大器增益、pER、BER、錯誤向 量幅度、雜訊底限位準、鄰近頻道功率比或鄰近頻道洩漏 比。在自接收器135獲得了回饋值後,控制器235將回饋 值儲存於記憶體中。 在區塊2020中,控制器235反轉I值之位元,且將更 新之I值傳輸至HIPCF消除器130。作為回應,HIPCF消除 器130將更新之I值施加至I/Q調變器230。舉例而言,可 將I值2071之位元2〇75自值「1」反轉至值「〇」。在此區 49 201214999 塊2020之第一反覆中,控制器235可反轉j值之起始位元。 在每一隨後反覆中,可反轉下一個位元,直至完成停止位 元為止。 在區塊2025中,控制器235自接收器135獲得更新之 回饋值。在區塊2030中,控制器235將更新之回饋值與儲 存之回饋值比較以基於在演算法控制層i 73〇中定義之極性 判定兩個回饋值中之哪一者較好。舉例而言,若極性為正 且更新之回饋值大於儲存之回饋值,則控制器23 5將判定 更新之回饋值較好。同樣地,若極性為負且更新之回饋值 大於儲存之回饋值,則控制器235將判定儲存之回饋值較 好。控制器23 5儲存較好回饋值且將〗值設定至導致較好回 饋值之I值。控制器235亦將導致較好回饋值之丨值施加至 HIPCF消除器130。 在區塊2035中,控制器235反轉卩值之位元,且將更 新之Q值傳輸至HIPCF消除器13〇。作為回應,HIpcF消 除器1 30將更新之Q值施加至I/Q調變器23〇。舉例而言, 可將Q值2〇81之位元2085自值「丨」反轉至值「〇」。在 此區塊2035之第一反覆中,控制器235可反轉〇值之起始 位元。在每一隨後反覆中,可反轉下一個位元,直至完成 停止位元為止。 在區塊2040中,控制器235自接收器135獲得更新之 回饋值。在區塊2045中,控制器235將更新之回饋值與儲 存之回饋值比較以基於在演算法控制層丨73〇中定義之極性 判定兩個回饋值中之哪一者較好。控制器23 5儲存較好回 50 201214999 • 饋值且將Q值設定至導致較好回饋值之(^值。控制器235 亦將導致較好回饋值之Q值施加至HIPCF消除器i 3 〇。 在區塊2050中’控制器235進行判定在ί值及q值中 是否存在更多測試位元之詢問。舉例而言,控制器2 3 5可 判定區塊2020至2050之先前反覆是否評估停止位元。若 存在更多測試位元,則跟隨「是」分支返回至區塊2〇2〇, 在區塊2020,另一位元得以反轉且針對較好回饋評估。否 則,跟隨「否」分支至區塊2055。在區塊2〇55中,控制器 235使用最終儲存之j值及q值操作HIpcF消除器13〇。 在某些例示性實施例中,圖2〇中說明之FBA 2〇〇〇可 不涵蓋每一條件,且因此,可藉由指派用於Z值及Q值兩 .者之一或兩個位兀起始值(例如,最高有效位元(msb )) 來對其改良。對FBA 2000之另一改良包括在執行FBA 2〇〇〇 前執行下文描述之BSA以獲得用於工值及用於卩值之起始 值。 。 BCA為對在圖2〇中說明且上文描述的快速二進制演算 法之t改在BCA中,I及q值兩者中之每一位元依序類 倒(如在快速二進制演算法中),且若位元之原始值為「1」, 則牦加值1」(且因此,使將較有效位元進位至其緊鄰), 或若原始值為「〇 Β,ΙI ,·»·「, / 」’則減少值「1」(且因此,使自盆腎 鄰借較有效位亓) 1 70 )。在兩個情況下,控制器235將評估回 饋值以判定哪—佶r、a广a 值(視區塊而疋,I值或Q值)導致較好回 饋類似於FBA,導致較好回饋值的I值及Q值得以儲存 且在肩算法凡成時用以控制HIPCF消除器130。BCA可開 51 201214999 始於一起始位元,3仏、相、 一 仃進遍歷母一位元,直至完成停止位 元為止。I某一例示性實施例中,起始位元及停止位元可 為使:者選擇的。在某些例示性實施例中,若在二進制校 正演算法之執行前不執# BSA,則二進制校正演算法可開 始於順及開始.於僅針對1值及Q值之麵的位元颠倒, 此係因為不存在進位至MSB或自MSB借之較有效位元。在 已完成了 I值及Q值之MSB後,將評估之位元增加或減少 值「1」之特徵可開始於第二MSB。 可參看圖21論述用於實施bCA代替FBA 2000之動 機,圖21描繪使用二進制演算法調整的j及Q值之曲線圖 2100。參看圖21,點X1表示用於hipCF消除器ι3〇的初 始I值及Q值之曲線。作為二進制演算法之部分,反轉I 值之MSB以自點X1行進至點χ2。在此曲線圖中,判定在 點Χ2處之回饋值比在點χ丨處之回饋值好。因此,二進制 演算法將保持用於點Χ2之I值,且反轉q值之MSB以行 進至點X3。 在點X3處’假定判定回饋值在點χ3處比在點χ2處 好’則在FB A 2000中’將反轉I值之第二MSB。此位元反 轉將使演算法自點X3行進至點A,點A較遠離最佳點C, 且因此將具有.比點C之回饋值差的回饋值。在二進制校正 演算法令,將藉由將I值之第二MSB增加或減少值「1」且 因此影響MSB而在點A及B兩者處測試回饋值。因為點B 較靠近最佳點C,所以點B將導致比點A好的回饋值,且 BCA將自點B而非點X3繼續》因此,BCA可比快速二進 52 201214999 制次异法準確。然而,在竿此眘Feed:: average!! A feedback value. Otherwise, the difference between the third feedback value and the third feedback value is obtained from the receiver (1). 2 This tolerance is the tolerance, the material 帛 H == the value of the value, and the similar number is repeated for a predetermined number of =.爷, and can be: 两个 于 于 令 令 许 许 许 许 ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' The elimination algorithm 235 can be set to ten;; a certain number of feedback values are selected. For example, the control sorts the ten feedback values and selects the five feedbacks in the middle. The average value of the 2012 999 疋 疋 疋 得以 得以 得以 得以 得以 得以 得以 得以 得以 且 且 且 且 且 且 且 且 且 且 且 且 且 且 且 且 且 且 且 且 且 且The third program of 1720 includes SNR averaging. This SNr averaging procedure involves calculating the average of the #reads used for different satellites (sv) (eg, GPS, DASS (Digital Audio Broadcasting Service) or Silver Satellite). SNR averaging may be performed only for satellites having a certain altitude level above the -height threshold to avoid erroneous decisions in the algorithm execution layer 174A. In algorithm control layer 1730, several user controls can be implemented to control the algorithms described in the algorithmic execution layer. - This user is controlled to compare the polarity of the two feedback values (e.g., before and after the change of the 1 and/or Q settings of the canceller 1). The polarity can be positive. (eg, a higher feedback value is better) or negative (eg, a lower feedback value is better). Positive polarity - some exemplary (4) material, carrier noise ratio (7) N) and repeater amplifier gain can be used. Some of the exemplary feedback signals that can be used for negative polarity are PER, dirty, error vector magnitude, noise floor level, adjacent channel power ratio, and adjacent channel leakage ratio. The shoulder algorithm enforcement layer 1740 includes the execution of one of several noise cancellation algorithms. These algorithms include adjusting the Q value of the HIpcF canceller 13 and "resolving the feedback signal generated from the 5 weeks to find the acceptable work and q values for the operation to eliminate n 13". The method includes a solid type binary algorithm (Fast Binary Algorithm (FBA) and Two-Bar Correction Shoulder Algorithm (BCA)), a minimum step size algorithm (8), a blind U algorithm (BSA), and a double-slope algorithm. (Dsa) and the search and play 48 201214999 - Algorithm (TSA). Figure 2G is a flow diagram depicting a fast one-ary algorithm for eliminating noise and/or interference according to some exemplary embodiments. In this exemplary job 2_, each of the values for the mpcF canceller 13A is reversed in order and is better feedback for the polarity decision as defined in the algorithm control layer j 73〇. The value is measured. FBA 2〇〇〇T starts at a start bit and sequentially advances each of the Ϊ and Q values until it reaches a predefined stop bit. In some examples In the embodiment 10, the start bit and the stop bit are selectable by the user. In 5, controller 235 selects a first value and a first value for operating HIPCF canceller 13. The first value may be the starting value, seed value, or range intermediate value from lookup table 900. In block 2〇1, the HIPCF canceller 130 applies the first value and the first Q value to the I/Q modulator 230. In the block 2015, the receiver 135 provides a feedback signal with a feedback value. To controller 235. The feedback value can be SNR, RSSI, carrier-to-noise ratio (C/N), RSSI, repeater amplifier gain, pER, BER, error vector magnitude, noise floor level, adjacent channel power ratio Or adjacent channel leakage ratio. After obtaining the feedback value from the receiver 135, the controller 235 stores the feedback value in the memory. In the block 2020, the controller 235 inverts the bit of the I value and will update it. The I value is transmitted to the HIPCF canceller 130. In response, the HIPCF canceller 130 applies the updated I value to the I/Q modulator 230. For example, the bit 2 of the I value 2071 can be self-valued "1" Reverse to the value "〇". In the first iteration of block 49 201214999 block 2020, controller 235 may invert the start bit of the j value. In each subsequent iteration, the next bit can be inverted until the stop bit is completed. In block 2025, controller 235 obtains an updated feedback value from receiver 135. In block 2030, controller 235 compares the updated feedback value to the stored feedback value to determine which of the two feedback values is better based on the polarity defined in algorithm control layer i 73〇. For example, if the polarity is positive and the updated feedback value is greater than the stored feedback value, the controller 23 5 will determine that the updated feedback value is better. Similarly, if the polarity is negative and the updated feedback value is greater than the stored feedback value, the controller 235 will determine that the stored feedback value is better. Controller 23 5 stores the better feedback value and sets the value to the I value that results in a better feedback value. Controller 235 also applies a threshold value that results in a better feedback value to HIPCF canceller 130. In block 2035, controller 235 inverts the threshold bit and transmits the updated Q value to HIPCF canceller 13A. In response, HIpcF eliminator 130 applies the updated Q value to I/Q modulator 23A. For example, the bit 2085 with a Q value of 2〇81 can be inverted from the value “丨” to the value “〇”. In the first iteration of block 2035, controller 235 can reverse the start bit of the threshold. In each subsequent iteration, the next bit can be inverted until the stop bit is completed. In block 2040, controller 235 obtains an updated feedback value from receiver 135. In block 2045, controller 235 compares the updated feedback value to the stored feedback value to determine which of the two feedback values is better based on the polarity defined in algorithm control layer 丨73〇. The controller 23 5 stores a better back 50 201214999 • The value is fed and the Q value is set to a value that results in a better feedback value. The controller 235 also applies a Q value that results in a better feedback value to the HIPCF canceller i 3 〇 In block 2050, controller 235 makes an inquiry as to whether there are more test bits in the ί and q values. For example, controller 253 may determine whether the previous multiplex of blocks 2020 to 2050 is evaluated. Stop bit. If there are more test bits, follow the "yes" branch and return to block 2〇2〇. At block 2020, another bit is inverted and evaluated for better feedback. Otherwise, follow " No" branches to block 2055. In block 2, 55, controller 235 operates the HIpcF canceller 13 using the final stored j and q values. In some exemplary embodiments, illustrated in Figure 2 FBA 2〇〇〇 may not cover each condition, and therefore, by assigning one or both of the Z value and the Q value to the start value (eg, the most significant bit (msb)) Improvements. Another improvement to FBA 2000 involves performing the BSA described below before performing FBA 2〇〇〇 Obtain a starting value for the work value and for the devaluation value. BCA is the change to the fast binary algorithm described in Figure 2〇 and described above. In the BCA, each of the I and q values One element is sorted backwards (as in the fast binary algorithm), and if the original value of the bit is "1", then the value is added to 1" (and therefore, the more significant bit is rounded to its immediate vicinity) , or if the original value is "〇Β, ΙI, ·»·", / "', the value is reduced by "1" (and therefore, the more effective position is caused by the pelvic kidney) 1 70 ). In both cases, the controller 235 will evaluate the feedback value to determine which - 佶r, a wide a value (depending on the block, I, I value or Q value) results in better feedback similar to FBA, resulting in better feedback values The I value and Q are worth storing and used to control the HIPCF canceller 130 when the shoulder algorithm is implemented. BCA can be opened 51 201214999 Starts with a starting bit, 3仏, phase, and traverses the parent bit until the stop bit is completed. In an exemplary embodiment, the start bit and stop bit may be selected by the . In some exemplary embodiments, if #BSA is not implemented before execution of the binary correction algorithm, the binary correction algorithm may begin at the beginning of the traversal. The bits that are only for the faces of the 1 and Q values are reversed, This is because there is no more significant bit borrowed into or from the MSB. After the MSB of the I value and the Q value has been completed, the feature of increasing or decreasing the value of the evaluated bit "1" may start at the second MSB. An engine for implementing bCA instead of FBA 2000 can be discussed with reference to Figure 21, which depicts a graph 2100 of j and Q values adjusted using a binary algorithm. Referring to Fig. 21, a point X1 indicates a curve of an initial I value and a Q value for the hipCF canceller ι3 。. As part of the binary algorithm, the MSB of the inverted I value travels from point X1 to point χ2. In this graph, it is determined that the feedback value at point Χ 2 is better than the feedback value at point χ丨. Therefore, the binary algorithm will hold the I value for point 2 and reverse the MS of the q value to proceed to point X3. At point X3, it is assumed that the decision feedback value is better at point χ3 than at point ’2, then the second MSB of the I value will be inverted in FB A 2000. This bit reversal will cause the algorithm to travel from point X3 to point A, which is farther away from the optimal point C, and will therefore have a feedback value that is worse than the feedback value of point C. In the binary correction algorithm, the feedback value will be tested at both points A and B by increasing or decreasing the value of the second MSB of the I value by "1" and thus affecting the MSB. Since point B is closer to the optimal point C, point B will result in a better feedback value than point A, and BCA will continue from point B instead of point X3. Therefore, BCA can be more accurate than fast binary 52 201214999. However, in this case

仕呆二實施方案中,BCA 多反覆及較多硬體。 』需要較 圖22為根據某些例示性會^; , ^ …生實施例的描繪用於消除雜訊及 =擾之最小步長演算法22⑽之流终例示性MM謂 IS訊消除提供精細調譜,例如,在已執行了二進制演 异法中之-者後。MSA 2200可遵循干擾器/雜訊源(例如, 功率放大器110)與受害接收哭 m m ”又。接收器135之間的耦接頻道之改 艾。對於—給定步長(例如,1 LSB至7LSB解析度),可 藉由依序將!值及Q值增量(加步長)或減量(減步長) 來達成雜訊及/或干擾消除。在某些例示性實施例中,辦量 或減量停止於用於適當J值或^ (例如,範圍準則)曰之 最大或最小值處。在某些例示性實施例中,msa22〇〇運作 歷經給定數目個反覆或一時段且可由使用者中斷。I值及卩 、值各圍繞一理想值振盪或遵循耦接頻道之改變。 參看圖1、圖2及圖22,在區塊22〇5中,控制器235 選擇第一 I值及第一 Q值以用於操作HlpCF消除器13〇。 在區塊2210中,HIPCF消除器130將第一 I值及第_ q值 施加至I/Q調變器230。 在區塊2215中’接收器135將具有一回饋值之回饋信 號提供至控制器235。回饋值可為SNR、RSSI、載波雜訊比 (C/N )、中繼器放大器增益、PER、ber、錯誤向量幅度、 雜訊底限位準、鄰近頻道功率比或鄰近頻道茂漏比等。在 自接收器135獲得了回饋值後,控制器235將回饋值儲存 於記憶體中。 53 201214999 在區塊2220中,控制器235將j值增量一給定步長(例 如,1 LSB)且將更新之I值傳輸至HIpCF消除器13〇。作 為回應,HIPCF消除器130將更新之j值施加至"Q調變器 230。控制器235亦自接收器135獲得更新之回饋值。 在區塊2225中,控制器235將更新之回饋值與儲存之 回镄值比較以基於在演算法控制層173〇中定義之極性判定 兩個回饋值中之哪一者較好。控制器235儲存較好回饋值 且將I值設定至導致較好回饋值之!值。控制器235亦將導 致較好回饋值之I值施加至HIPCF消除器13〇。 在區塊2230中,控制器235將Q值增量一給定步長(例 如,一個LSB)且將更新之Q值傳輸至mpCF消除器13〇。 作為回應,HIPCF消除器130將更新之Q值施加至i/q調 變益230 ο控制器235亦自接收器135獲得更新之回饋值。 在區塊2235中,控制器235將更新之回饋值與儲存之 回饋值比較以基於在演算法控制層173〇中定義之極性判定 兩個回饋值中之哪-者較好。控制器235儲存較好回饋值 且將Q值設定至導致較好回饋值之〇值。控制器235亦將 導致較好回饋值之Q值施加至HIPCF消除器13〇。 在區塊2240中,控制器235將!值減量一給定步長(例 如,一個LSB)且將更新之ϊ值傳輸至HIpCF消除器13〇。 作為回應,HIPCF消除器130將更新之1值施加至"q調變 器230。控制器235亦自接收器135獲得更新之回饋值。 在區塊2245中,控制器235將更新之回饋值與儲存之 回饋值比較以基於在演算法控制層173〇中定義之極性判定 54 201214999 .兩個回饋值中之哪-者較好。控制器235儲存較好回饋值 且將I值設定至導致較好回饋值之工值。控制器加亦將導 致較好回饋值之I值施加至HIpCF消除器i 3 〇。 在區塊2250中,控制器235將Q值減量一給定步長(例 如,一個LSB)且將更新之Q值傳輸至mpCF消除器13〇。 作為回應,HIPCF消除器13〇將更新之(5值施加至i/q調 變器230。控制器235亦自接收器135獲得更新之回饋值。 在區塊2255中,控制器235將更新之回饋值與儲存之 回饋值比較以基於在演算法控制層丨<730中定義之極性判定 兩個回饋值中之哪一者較好。控制器235儲存較好回饋值 且將Q值設定至導致較好回饋值之Q值。控制器235亦將 導致較好回饋值之Q值施加至HIPCF消除器丨3 0。 在區塊2260中,控制器235進行判定是否繼續重複區 塊2220至2255之詢問。在某些例示性實施例中,判定係 基於一時段。若該時段已期滿,則控制器235判定不繼續。 在某些例示性實施例中,判定係基於接收器135之敏感性 或基於在區塊2255 t獲得之回饋值。在某些例示性實施例 中’判定係基於執行的反覆之數目。若控制器2 3 5判定繼 續重複區塊2220至2255 ’則遵循「是」分支返回至區塊 2之20。否則,遵循「否」分支至區塊226s。在區塊2265中, 控制器235使用最終選定I值及Q值來操作hipcF消除器 130 ° 在某些例示性實施例中’自I值或Q值之增量改變至 減量的決策係基於先前反覆是否拒絕了新回饋值,亦即, 55 201214999 新回饋值不比先前回饋值較佳。 雖然上文已按IQIQIQ之改變序列論述了 FBA 2000、 BCA 2100及MSA 2200,但亦可使用其他序列(例如,包 括 IIQQIIQQ 及 IIIQQQIIIQqq)來實施 FBA 2〇〇〇、bca 21〇〇 及 MSA 2200。In the implementation of the Shiyi II, the BCA is more repetitive and more hardware. It is necessary to provide fine tuning according to some exemplary embodiments, according to some exemplary embodiments, and the minimum step size algorithm 22 (10) for eliminating noise and interference is provided. The spectrum, for example, after the binary algorithm has been executed. The MSA 2200 can follow the interference channel between the jammer/noise source (eg, power amplifier 110) and the victim receiving crying mm ". Receiver 135. For a given step size (eg, 1 LSB to 7LSB resolution), noise and/or interference cancellation can be achieved by sequentially incrementing the value and Q value (plus step) or decrement (reducing step size). In some exemplary embodiments, Or the decrement ceases at the maximum or minimum value for an appropriate J value or ^ (eg, range criterion). In some exemplary embodiments, the msa22 operation operates over a given number of repetitions or a period of time and may be used The I value and the 卩, value each oscillate around an ideal value or follow the change of the coupled channel. Referring to Figures 1, 2 and 22, in block 22〇5, the controller 235 selects the first I value and The first Q value is used to operate the HlpCF canceller 13. In block 2210, the HIPCF canceller 130 applies the first I value and the _q value to the I/Q modulator 230. In block 2215 The receiver 135 provides a feedback signal having a feedback value to the controller 235. The feedback value may be SNR, RSSI, carrier miscellaneous Signal ratio (C/N), repeater amplifier gain, PER, ber, error vector magnitude, noise floor level, adjacent channel power ratio or adjacent channel leakage ratio, etc. The feedback value is obtained from the receiver 135. Thereafter, the controller 235 stores the feedback value in the memory. 53 201214999 In block 2220, the controller 235 increments the j value by a given step size (eg, 1 LSB) and transmits the updated I value to the HIpCF. The canceller 13 is in response. The HIPCF canceller 130 applies the updated value of j to the "Q modulator 230. The controller 235 also obtains the updated feedback value from the receiver 135. In block 2225, the controller 235 The updated feedback value is compared to the stored feedback value to determine which of the two feedback values is better based on the polarity defined in the algorithm control layer 173. The controller 235 stores the better feedback value and the I value. The controller 235 also applies an I value that results in a better feedback value to the HIPCF canceller 13A. In block 2230, the controller 235 increments the Q value by a given step. Long (eg, an LSB) and the updated Q value is transmitted to the mpCF canceller 13A. In response, HIPCF canceller 130 applies the updated Q value to i/q modulation benefit 230. Controller 235 also obtains the updated feedback value from receiver 135. In block 2235, controller 235 will update the feedback value. Comparing with the stored feedback value to determine which of the two feedback values is better based on the polarity defined in the algorithm control layer 173A. The controller 235 stores the better feedback value and sets the Q value to result in better feedback. The value of the value. The controller 235 also applies a Q value that results in a better feedback value to the HIPCF canceller 13A. In block 2240, controller 235 will! The value is decremented by a given step size (e.g., an LSB) and the updated threshold is transmitted to the HIpCF canceller 13A. In response, HIPCF canceller 130 applies the updated value of 1 to "q modulator 230. Controller 235 also obtains an updated feedback value from receiver 135. In block 2245, controller 235 compares the updated feedback value to the stored feedback value to determine which of the two feedback values is better based on the polarity determination 54 201214999 defined in algorithm control layer 173A. Controller 235 stores the better feedback value and sets the value of I to the value of the value that results in a better feedback value. The controller plus also applies an I value that results in a better feedback value to the HIpCF canceller i 3 〇. In block 2250, controller 235 decrements the Q value by a given step size (e.g., an LSB) and transmits the updated Q value to mpCF canceller 13A. In response, the HIPCF canceller 13 will update (5 values are applied to the i/q modulator 230. The controller 235 also obtains the updated feedback value from the receiver 135. In block 2255, the controller 235 will update The feedback value is compared with the stored feedback value to determine which of the two feedback values is better based on the polarity defined in the algorithm control layer 丨 < 730. The controller 235 stores the better feedback value and sets the Q value to The Q value that results in a better feedback value. The controller 235 also applies a Q value that results in a better feedback value to the HIPCF canceller 丨 300. In block 2260, the controller 235 determines whether to continue repeating blocks 2220 through 2255. In some exemplary embodiments, the decision is based on a time period. If the time period has expired, the controller 235 determines not to continue. In some exemplary embodiments, the determination is based on the sensitivity of the receiver 135. Sex or based on the feedback value obtained at block 2255. In some exemplary embodiments, the 'determination is based on the number of repetitions performed. If the controller 253 decides to continue repeating the blocks 2220 to 2255' then follow The branch returns to block 2 of 20. No Then, a "no" branch is followed to block 226s. In block 2265, controller 235 operates the hipcF canceller 130° using the final selected I value and Q value. In some exemplary embodiments, 'self I value or Q The decision to change the value to the decrement is based on whether the previous feedback has rejected the new feedback value, ie, the new feedback value of 2012 201299 is not better than the previous feedback value. Although FBA 2000, BCA has been discussed above in the sequence of IQIQIQ change. 2100 and MSA 2200, but other sequences (eg, including IIQQIIQQ and IIIQQQIIIQqq) can also be used to implement FBA 2〇〇〇, bca 21〇〇, and MSA 2200.

當信號條件不良(例如,可接受之起始Z及Q值不可 利用)或受害接收器基頻ic具有作為回饋值的BER或SNR 之有限準確度時,可執# BSA。在此實施方案中,可執行 BSA以判定用於上文論述之演算法(FBA2〇〇〇 ' 或MSA 2200)的起始!值及起始卩值。圖23描繪具有μ 個子區域(具有偽隨機之回饋值)之I Q平面2綱。腦 可評估針對多個不同!及q預綠本(例如,來自查找表) 之回饋’且選擇具有最佳回饋值之預先樣本。在判定了最 佳預先樣本後,BSA可轉變至舰2_、心2⑽或碰 2200,且使用用於該預先樣 起始點。 值及Q值作為演算法之 存在用於實施BSA之若干方法。在一方法十,盥最佳 回饋值相關聯之IA q值係選自具有預設定 $樣本(例如,4個或16個)。在位元UQ值之情況 ,可自UQ平面中之下列位置選取回饋值之四個樣本·· I = (OxFF, 0x2FF, OxFF, 0x2FF) Q (0x2FF, 0x2FF, OxFF, OxFF) 56 201214999 . 在10位元I及Q值之情況下,可自I及Q平面中之下 列位置選取回饋值之十六個樣本: I=(0x80,0x80,0x80,0x80, 0x180, 0x180, 0x180, 0x180, 0x280, 0x280, 0x280, 0x280, 0x380, 0x380, 0x380, 0x380) Q=0x80, 0x180, 0x280, 0x380, 0x80, 0x180, 0x280, 0x380, 0x80, 0x180, 0x280, 0x380, 0x80, 0x180, 0x280, 0x380) 上述位置係例示性而非 之範疇及精神之情況下,許多其他位置係可行的。 用於貫施BSA之第二方法包括獲得在四個(或其他數 目個)預設定I及Q點中之每一者處的回饋值。可識別獲 得的回饋值中之最大及最小回饋值。藉由a)平均化最小與 最大回饋值,或b)將使用者選擇之偏差值與最小回饋值相 加,判定回饋臨限值《在判定了回饋臨限值後,bsa可評 估最接近在四個I及Q點外之最佳欄位的丨及Q點之回饋 值。舉例而言,BSA可使用一使用者指定步長以探測最接 近四個!及Q點中之最佳者之…點。當一樣本回饋符 合或超過回饋臨限值時,BSA可終止可接著轉變至 MSA 2200 〇 DSA將具有兩個相以相反斜率之等腰三角形近似法 用於估計雜訊漏斗曲線。圖24為描繪根據某㈣示性實施 例的相對於自DSA之實施產生的〗或 4 V值繪製的接收信號 57 201214999 口口質私不符2405之曲線圖24〇〇。DSA可選擇沿著由接收信 質心示符2405形成之雜訊漏斗曲線的四個點 (XI X4 )’且計算靠近消除點c之頂點。可使用線性方程 式之點斜式汁算頂點。—旦發現頂點則Μ A可將頂點用 作起始I及Q值而轉變至MSA 22〇〇。 圖2 5為描繪根據某些例示性實施例的用於消除雜訊及 /或干擾之DSA 2500之流程圖。圖“為描繪根據某些例示 性實施例的自25之DSA25〇〇之實施產生的相對於 軸(與按三維繪製圖26之情形下的U Q軸相對照)之曲 線2’㈣的接收信號品質指示符之曲線圖26〇〇。例示性 DSA 25GG將具有兩個相等絲反斜率之等腰三角形近似法 用於由接㈣號品質指示符細形成之雜訊料曲線。參 看圖25及圖26 ’在區塊25〇5中,控制器235選擇沿著【 或Q軸的I值及/或q值之許多樣本。舉例而言,控制器235 可選擇四個樣本。在某些例示性實施例中,控制器2乃使 用BSA來選擇用於〖值及/或Q值之樣本的位置。 在區塊2510中,控制器235將樣本傳達至i/q調變器 230,且該I/Q調變器一次一個地應用該等樣本中之每一 者》在區塊2520中,控制器235獲得應用樣本中之每一者 的回饋值(諸如,「接收信號品質指示符」),且將每一 回饋值及對應的樣本I及Q值儲存於記憶體裝置760中。 在某些例示性實施例中,控制器235自接收器135接收每 一樣本之「接收信號品質指示符」。 在區塊2520中,控制器235比較儲存之回饋值,且識 58 201214999 •別較好回饋值。舉例而言,在圖26中,控制器235將點χι 識別為導致較好回饋值。令點X1具有〗及Q值(Hi) 及回饋值1。 ’ 1 在區塊2525中,藉由預設定步長「STEP」(例如,STEP —I值或Q值之最高有效位元(MSB)或MSB/2或MSB/4), 控制器235藉由變化j值來選擇在點χι周圍之另兩個點。 舉例而言,控制器235可選擇點χ2(例如,Ii + STEp,Qi) 及X3 (例如,l _ STEp,Qi)。控制器235將樣本χ2及 Χ3傳達至Ι/Q調變器23〇,且I/Q調變器23〇 一次一個地應 用用於樣本X2及X3之設定。對於每一樣本,控制器 接收一回饋值,例如,自接收器135接收。令χ2之回饋值 為Υ+且Χ3之回饋值為γ。 在區塊2530中,控制器235基於雙斜率計算另一樣本 點。在某些例示性實施例中,控制器235使用SL〇PE = (γ+ -/ STEP計算另一樣本。此方程式表示連接點χ2與幻 的直線2610之斜率。自點X3延伸且具有與線261〇相反之 斜率的另一直線2615說明於圖26中。線261〇與2615在 點2620處相交。 在區塊2530中,控制器使用下式計算點262〇之下一 個I值: I2 = I, - STEP * (Y+ - Y ) / (γ+ _ Υι)。在區塊 2535 中, 控制器將(I2,Qi )之I及Q值傳達至ϊ/q調變器230,且 I/Q調變器230應用I及(^值。在區塊2540中,控制器235 接收(〗2, Q!)之回饋值,且將該回饋值儲存於記憶體裝置 59 201214999 760中。令(I2, Q,)之回饋值為γ2。 在區塊2545中’藉由預設定步長「STEp」,控制器 235藉由變化來自點(I Ql )之q值來選擇在點幻周圍之 另兩個點。舉例而言’控制器235可選擇點(I仏+ ste?) 及(I2,Qr STEP)。控制器235將樣本傳達至I/Q調變器 230,且I/Q調變器230 —次一個地應用用於樣本之設定。 對於每一樣本,控制器235接收一回饋值 之回饋值為Y+且(I2,Q丨_ STEP )之回饋值為γ。 , 在區塊255〇中’控制器235計算: Q2 = Ql - STEP * (Υ+ _ Υ〇 / (γ+ · γ2)。在區塊 255 5 中, 控制器235將(Η,Q2)之I及q值傳達至I/Q調變器23〇, 且I/Q調變器230應用I及卩值。在區塊256〇中,控制器 235接收(I2,Q2)之回饋值,且將該回饋值儲存於記憶體 裝置760中。令(12, q2 )之回饋值為γ3。 在區塊2565中,控制器235減小sTEP之大小。在此 例示性實施例中,將STEP之大小減半。然而,其他(例如, 較不保守)減小大小亦可行。在區塊257〇中,控制器235 進行判定STEP之大小是否小於臨限值「STEPend」之詢問。 若STEP之大小小於STEPEND,則DSA 25 00繼續進行至區 塊2580,在區塊258〇處,控制器235使用(l2,q2)作為 起始點來起始MSA (例如,MS A 2200 )»若STEP之大小 不小於stepend ’則方法250〇繼續進行至區塊2575。在區 塊2575中’控制器將I2、q2及γ2分別指派至^及 Y1。在區塊2575後,DSA 2500返回至區塊2525。 60 201214999 t存在具有一全域較佳消除點之區域較佳消, 例示性可尤其有用。區域較佳消除點指回饋值「區 域地」較佳之UQ值。舉例而言,觀(諸如,MSA·: 不會跳出最接近區域較佳消除赴夕p 坰除點之區外。針對上部位元實 施DSA 2500,控制器235可避免固守於此等區域較佳消除 點,而MSA 2200可精細調諧以發現全域較佳消除點。 圖27為描繪根據某些例示性實施例的用於消除雜訊及 /或干擾t TSA 2700之流程圖。_ 28為描緣根制些例示 性實施例的在圖27之TSA之實施中評估的沿¥ Μ平面 28(H之消除點之曲線圖2刚。參看圖27及圖28,在區塊 2705中,控制器235選擇ϊ-q平面28〇1中之許多(例如, 4個)樣本。在某些例示性實施例中,控制器235使用說 選擇I-Q平面2801中之位置以用於樣本。 在區塊271〇中,控制器235將用於選定樣本之設定傳 達至f/Q調變器230,且該I/Q調變器23〇 一次一個地應用 用於每一樣本之設定。在區塊2715中,控制器235針對每 一樣本接收一回饋值(例如,自接收器135 ),且將該回饋 值及其對應的設定儲存於記憶體裝置76〇中。在區塊272〇 中,控制器235比較回饋值且識別較好或較佳回饋值❶令 圖28中之XI為導致較佳回饋值之樣本。 在區塊27U中,藉由預定步長「STEp」(例如,STEp = MSB/2或MSB/4),控制器235選擇最接近χι之另四個 樣本。舉例而言,控制器235可選擇(h + STEp,Qi )、( L -STEP’Q,) 、(Il,Qi + STEp)及(Ii Qi_sTEp)。控制 61 201214999 器235將四個設定像達至j/q調變器23〇,且j/q調變器230 一次一個地應用用於每一樣本之設定。控制器2 3 5接收用 於每一樣本之回饋偉,且將用於每一樣本之回饋值及用於 母一樣本之設定儲存於記憶體裝置7 6 0中。控制器2 3 5比 較用於四個樣本之回饋值且識別較佳回饋值。令圖2 8中之 X2為導致較佳回饋值之樣本。 在區塊2730中,控制器235減小STEP之大小。在此 例示性實施例中,將STEP之大小減半。其他大小減小亦為 可行的。在區塊2735中,控制器235進行判定STEP之大 小是否小於臨限值「STEPend」之詢問。若STEP之大小小 於STEPend ’則TSA 2700繼續進行至區塊2755,在區塊 2755處,控制器235使用設定(in + 1,Qn + i )控制I/Q調變 器230。若執行TSA之僅一個反覆,則控制器235使用用 於對應於區塊2725中之較佳回饋值的樣本之設定以控制 I/Q調變器230。若STEP之大小不小於STEp_,則TSA 2?00繼續進行至區塊2740。 在區塊2740中,控制器235選擇最接近具有最佳儲存 之回饋值之樣本的另四個樣本。若其為第一反覆,則樣本 為具有(h, Q2)之X2。將此樣本表示為χη,此係因為可 多次執行區塊2740 »舉例而言,控制器235選擇樣本(^ + STEP,Qn)、(In_STEP,Qn)、(InQn + STEp)、(n STEP )。控制器235將四個設定傳達至pQ調變器23〇, 且I/Q調變器230 —次一個地應用用於每一樣本之設定。控 制器235接收用於每一樣本之回饋值,且將用於每一樣本 62 201214999 之回饋值及用於每一樣本之設定儲存於記憶體裝置760 中。在區塊2745中,控制器235比較用於四個樣本之回饋 值且識別較佳回饋值。在區塊2750中,控制器235減小STEP 之大小’且TSA返回至區塊2735。圖μ說明TSA 2700使 用四個反覆(由點XI至X4表示)’其識別i_q平面2801 中之一較佳消除點2 8 1 5。 當基於先前較佳消除點搜尋改良之消除點及對應的 ι/Q設定(例如,回應於溫度之改變)時,例示性TSA 27〇〇 可尤其有用。在此等情形下,區塊27〇5可調適成使用先前 較佳Ι/Q設定而非選擇四個樣本。TSA 27〇〇可使搜尋之範 圍變乍至I-Q平面280 1中在先前較佳消除點附近之區。 上文論述之個別演算法(例如,BSA、FBA、BCA、MSA、 DSA及TS A )可實施為單獨演算法以決定可接受j及卩值。 或者,可將該等演算法中之多者一起使用以增加評估之速 度且獲得所要準確度。舉例而言,可執行BSA以判定^及 Q值兩者之第一 MSB或第一 MSB及第二msb。在bsa後, 可執行FBA或BCA以判定I及Q值兩者之中間極少位元。 最後,可執行MSA以精細調諧I及Q值兩者以達成較好回 饋值及因此較好雜訊或干擾消除。 可執仃該等演算法之多個反覆及/或可執行該等演算法 土夺較長時段以達成較好結果。在某些例示性實施例中, 接通」模式下使用用於精細調諧之演算法(例如, 5及TSA),在該情況下,在雜訊消除器處於常規操作 時’控制器15〇繼續執行該等演算法。此使控制器15〇 63 201214999 能夠調整雜訊消除器之設定以考量環境改變,諸如,溫度 或操作條件之改變。此外,並行操作之雜訊消除器可各自 同時或依序執行該等演算法中之一或多者。 圖29為描繪根據某些例示性實施例的用於發現用於安 置於-通信系統(諸如’通信系統1〇〇)十之兩個雜訊消除 器之一較佳雜訊消除點的方法29〇〇之流程圖。舉例而言, 在替代實施例卜通信系統1〇〇可包括並聯之兩個HipCF 消除器1 3 0。 隹险塊2905中,一控制裝置(諸如,兩個 器130中之—者之控制胃235 )按一序列配置用於兩個消β 器之(I,Q )設定。舉例而言’可將此序列配置為 (IninQnqn...I0i0Q0q0),其巾 no 及 Qn...Q〇 表示用方 第一消除器之(I,Q)設定,及丨… 1ϋ及qn...q〇表示用次 ::消除器之1Q設定。控制裝置可接著將兩個消除器作, 具有配置之序列之單—消除器來處理。 消除:=:91°一中控制裝置使用該序列執行上文論述的 二 之一或多者(例如,BSA、FBA、BCa、MSa , 2915 ^ ^以判定用於消除器之較佳消除設定。在區掏 ’控制裝置將較佳消除設定儲存於記憶體中。 置於圖ΓΛ描繪根據某些例示性實施例的用於發現用於安 ㈣代方法_之流程圖。在區塊侧中,— (諸如,兩個雜訊消除器中之去…, 控制袈置 兩個雜訊消除器中之去 者之控制器235 )發現用於 ^ 者的較佳消除點,同時用於兩個雜 64 201214999 §孔消除器中之第二者之設定保持不變.。可使用上文論述的When the signal condition is poor (for example, the acceptable initial Z and Q values are not available) or the victim receiver base frequency ic has a limited accuracy of BER or SNR as the feedback value, #BSA can be implemented. In this embodiment, the BSA can be executed to determine the start of the algorithm (FBA2〇〇〇' or MSA 2200) used in the discussion above! Value and starting threshold. Figure 23 depicts an I Q plane 2 class with μ sub-regions (with pseudo-random feedback values). The brain can be evaluated for multiple differences! And q pre-greening (e.g., from the lookup table) and selecting the pre-sample with the best feedback value. After determining the best pre-sample, the BSA can be transitioned to ship 2_, heart 2 (10) or touch 2200 and used for the pre-sample start point. Values and Q values are used as algorithms to implement several methods of BSA. In a method ten, the IA q value associated with the optimal feedback value is selected from a sample with a preset $ (for example, 4 or 16). In the case of a bit UQ value, four samples of the feedback value can be selected from the following positions in the UQ plane: I = (OxFF, 0x2FF, OxFF, 0x2FF) Q (0x2FF, 0x2FF, OxFF, OxFF) 56 201214999 . In the case of 10-bit I and Q values, sixteen samples of the feedback value can be selected from the following positions in the I and Q planes: I=(0x80, 0x80, 0x80, 0x80, 0x180, 0x180, 0x180, 0x180, 0x280 , 0x280, 0x280, 0x280, 0x380, 0x380, 0x380, 0x380) Q=0x80, 0x180, 0x280, 0x380, 0x80, 0x180, 0x280, 0x380, 0x80, 0x180, 0x280, 0x380, 0x80, 0x180, 0x280, 0x380) Many other locations are feasible where the location is exemplary rather than the scope and spirit. A second method for performing BSA includes obtaining a feedback value at each of four (or other number of) pre-set I and Q points. The maximum and minimum feedback values of the obtained feedback values can be identified. By a) averaging the minimum and maximum feedback values, or b) adding the user-selected deviation value to the minimum feedback value, determining the feedback threshold. After determining the feedback threshold, bsa can evaluate the closest The feedback values of the 丨 and Q points of the best fields outside the four I and Q points. For example, the BSA can use a user-specified step size to detect the nearest four! And the best of the Q points... point. When the same feedback matches or exceeds the feedback threshold, the BSA can be terminated and then transitioned to MSA 2200. The DSA will use an isosceles triangle approximation with two phases with opposite slopes to estimate the noise funnel curve. Figure 24 is a graph depicting a received signal 57 201214999 oral mismatch 2405 plotted against a 4 or 4 V value generated from the implementation of the DSA according to some (four) illustrative embodiments. The DSA may select four points (XI X4 )' along the noise funnel curve formed by the received signal centroid indicator 2405 and calculate the apex near the cancellation point c. The vertices can be calculated using the point-oblique gradient of the linear equation. Once the vertex is found, Μ A can be used to convert the vertices to the initial I and Q values to MSA 22〇〇. FIG. 25 is a flow diagram depicting a DSA 2500 for eliminating noise and/or interference, in accordance with certain exemplary embodiments. The figure "represents the received signal quality of curve 2' (d) relative to the axis (as opposed to the UQ axis in the case of Figure 3 in three dimensions) resulting from the implementation of the DSA 25A from 25 in accordance with certain exemplary embodiments. The graph of the indicator is shown in Fig. 26. The exemplary DSA 25GG uses an isosceles triangle approximation with two equal silk anti-slopes for the noise curve formed by the quality indicator (4). See Figure 25 and Figure 26. 'In block 25〇5, controller 235 selects a number of samples along the I or Q axis for the I and/or q values. For example, controller 235 may select four samples. In some exemplary implementations In the example, the controller 2 uses the BSA to select the location of the sample for the value and/or Q value. In block 2510, the controller 235 communicates the sample to the i/q modulator 230, and the I/ The Q modulator applies each of the samples one at a time." In block 2520, the controller 235 obtains a feedback value (such as a "received signal quality indicator") for each of the application samples, and Each feedback value and corresponding sample I and Q values are stored in the memory device 760. In some exemplary embodiments, controller 235 receives a "received signal quality indicator" for each sample from receiver 135. In block 2520, controller 235 compares the stored feedback values and identifies 58 201214999 • Do not better reward values. For example, in Figure 26, controller 235 identifies the point χι as resulting in a better feedback value. Let point X1 have 〗 and Q value (Hi) and feedback value 1. ' 1 In block 2525, by pre-setting the step size "STEP" (for example, the STEP -I value or the most significant bit (MSB) of the Q value or MSB/2 or MSB/4), the controller 235 Change the value of j to choose the other two points around the point χι. For example, controller 235 can select point ( 2 (eg, Ii + STEp, Qi) and X3 (eg, l _ STEp, Qi). The controller 235 communicates the samples χ2 and Χ3 to the Ι/Q modulator 23〇, and the I/Q modulator 23 应 is applied one at a time for the settings of the samples X2 and X3. For each sample, the controller receives a feedback value, for example, received from receiver 135. Let 回2 have a feedback value of Υ+ and Χ3 has a feedback value of γ. In block 2530, controller 235 calculates another sample point based on the double slope. In some exemplary embodiments, controller 235 calculates another sample using SL〇PE = (γ+ -/STEP. This equation represents the slope of connection point χ2 and the imaginary line 2610. It extends from point X3 and has a line Another straight line 2615 of 261 〇 opposite slope is illustrated in Figure 26. Lines 261 〇 intersect 2615 at point 2620. In block 2530, the controller calculates an I value below point 262 使用 using the following equation: I2 = I , - STEP * (Y+ - Y ) / (γ+ _ Υι). In block 2535, the controller communicates the I and Q values of (I2, Qi) to the ϊ/q modulator 230, and I/Q The modulator 230 applies I and (^ value. In block 2540, the controller 235 receives the feedback value of (?2, Q!) and stores the feedback value in the memory device 59 201214999 760. The feedback value of Q,) is γ 2. In block 2545, by the preset step size "STEp", the controller 235 selects the other two around the point illusion by varying the q value from the point (I Ql ). For example, the controller 235 can select points (I仏+ste?) and (I2, Qr STEP). The controller 235 communicates the samples to the I/Q modulator 230, and the I/Q modulator 230 - one place For each sample, the controller 235 receives a feedback value of the feedback value Y+ and (I2, Q丨_STEP) the feedback value is γ. In block 255〇, the controller 235 Calculation: Q2 = Ql - STEP * (Υ+ _ Υ〇 / (γ+ · γ2). In block 255 5, controller 235 communicates the I and q values of (Η, Q2) to I/Q modulation The I/Q modulator 230 applies I and the threshold. In block 256, the controller 235 receives the feedback value of (I2, Q2) and stores the feedback value in the memory device 760. The feedback value of (12, q2) is γ3. In block 2565, controller 235 reduces the size of sTEP. In this exemplary embodiment, the size of STEP is halved. However, other (eg, It is also possible to reduce the size. In block 257, the controller 235 makes an inquiry as to whether the size of the STEP is smaller than the threshold "STEPend". If the size of the STEP is smaller than the STEPEND, the DSA 25 00 continues to the area. Block 2580, at block 258, the controller 235 uses (l2, q2) as a starting point to start the MSA (eg, MS A 2200) » if the size of the STEP is not less than st Epend' then method 250 continues to block 2575. In block 2575 the controller assigns I2, q2, and γ2 to ^ and Y1, respectively. After block 2575, DSA 2500 returns to block 2525. 60 201214999 t There is an area where there is a better elimination point for the whole domain, and exemplary can be particularly useful. Preferably, the region eliminates the preferred UQ value of the feedback value "regional". For example, the view (such as MSA·: does not jump out of the closest area is better to eliminate the area of the point of removal. In order to implement the DSA 2500 for the upper part, the controller 235 can avoid sticking to the area better. The points are eliminated, while the MSA 2200 can be fine tuned to find global better cancellation points. Figure 27 is a flow diagram depicting noise cancellation and/or interference t TSA 2700, in accordance with certain exemplary embodiments. The graph along the ¥ Μ plane 28 (the elimination point of H is evaluated in Figure 2 and FIG. 28, in block 2705, controller 235), which is evaluated in the implementation of the TSA of FIG. 27 of some exemplary embodiments. A plurality of (e.g., four) samples of the ϊ-q plane 28〇1 are selected. In some exemplary embodiments, the controller 235 uses the location in the IQ plane 2801 to select samples for use in the block. The controller 235 communicates the settings for the selected samples to the f/Q modulator 230, and the I/Q modulator 23 applies the settings for each sample one at a time. In block 2715 The controller 235 receives a feedback value (for example, from the receiver 135) for each sample, and the feedback value and The corresponding settings are stored in the memory device 76. In block 272, the controller 235 compares the feedback value and identifies a better or better feedback value. XI in Figure 28 is a sample that results in a better feedback value. In block 27U, controller 235 selects the other four samples closest to χι by a predetermined step size "STEp" (eg, STEp = MSB/2 or MSB/4). For example, controller 235 may Select (h + STEp, Qi ), ( L -STEP'Q,), (Il, Qi + STEp) and (Ii Qi_sTEp). Control 61 201214999 235 will set the four settings to j/q modulator 23 〇, and the j/q modulator 230 applies the settings for each sample one at a time. The controller 253 receives the feedback for each sample and uses the feedback value for each sample and The settings of the mother are stored in the memory device 76. The controller 2 3 5 compares the feedback values for the four samples and identifies the preferred feedback value. Let X2 in Figure 28 be the preferred feedback value. In block 2730, controller 235 reduces the size of STEP. In this exemplary embodiment, the size of STEP is halved. Other sizes are also reduced. In block 2735, controller 235 makes an inquiry as to whether the size of STEP is less than the threshold "STEPend". If the size of STEP is less than STEPend' then TSA 2700 proceeds to block 2755, at block 2755. At this point, the controller 235 controls the I/Q modulator 230 using the settings (in + 1, Qn + i ). If only one repetition of the TSA is performed, the controller 235 uses the settings for the samples corresponding to the preferred feedback values in the block 2725 to control the I/Q modulator 230. If the size of STEP is not less than STEp_, then TSA 2?00 proceeds to block 2740. In block 2740, controller 235 selects the other four samples that are closest to the sample with the best stored feedback value. If it is the first iteration, the sample is X2 with (h, Q2). This sample is represented as χη because the block 2740 can be executed multiple times. For example, the controller 235 selects samples (^ + STEP, Qn), (In_STEP, Qn), (InQn + STEp), (n STEP ). The controller 235 communicates the four settings to the pQ modulator 23A, and the I/Q modulator 230 applies the settings for each sample one by one. The controller 235 receives the feedback value for each sample and stores the feedback value for each sample 62 201214999 and the settings for each sample in the memory device 760. In block 2745, controller 235 compares the feedback values for the four samples and identifies the preferred feedback value. In block 2750, controller 235 reduces the size of STEP' and the TSA returns to block 2735. Figure μ illustrates that the TSA 2700 uses four iterations (represented by points XI through X4) which identify one of the i_q planes 2801 that preferably eliminates the point 2 8 1 5 . The exemplary TSA 27A may be particularly useful when based on a previously preferred elimination point search for improved cancellation points and corresponding ι/Q settings (e.g., in response to changes in temperature). In such cases, block 27〇5 can be adapted to use the previous preferred Ι/Q setting instead of selecting four samples. The TSA 27〇〇 can cause the range of the search to be changed to the area in the I-Q plane 280 1 near the previously preferred cancellation point. The individual algorithms discussed above (eg, BSA, FBA, BCA, MSA, DSA, and TS A ) can be implemented as separate algorithms to determine acceptable j and threshold values. Alternatively, more of these algorithms can be used together to increase the speed of the assessment and achieve the desired accuracy. For example, the BSA can be executed to determine the first MSB or the first MSB and the second msb of both the ^ and Q values. After bsa, FBA or BCA can be performed to determine the very few bits between the I and Q values. Finally, the MSA can be implemented to fine tune both the I and Q values to achieve better feedback values and therefore better noise or interference cancellation. Multiple iterations of the algorithms may be enforced and/or the algorithms may be executed for a longer period of time to achieve better results. In some exemplary embodiments, algorithms for fine tuning (eg, 5 and TSA) are used in the "on" mode, in which case the controller 15 continues when the noise canceller is in normal operation. Perform these algorithms. This allows the controller 15 2012 63 201214999 to adjust the settings of the noise canceller to account for environmental changes, such as changes in temperature or operating conditions. In addition, the noise cancellers operating in parallel may each perform one or more of the algorithms simultaneously or sequentially. 29 is a diagram depicting a method 29 for discovering a preferred noise cancellation point for one of two noise cancellers disposed in a communication system (such as 'communication system 1'), in accordance with certain exemplary embodiments. The flow chart of 〇〇. For example, in an alternate embodiment communication system 1A may include two HipCF cancellers 130 in parallel. In the risk block 2905, a control device (such as the control stomach 235 of the two devices 130) is configured in a sequence for the (I, Q) setting of the two beta devices. For example, 'this sequence can be configured as (IninQnqn...I0i0Q0q0), the towel no and Qn...Q〇 represent the (I,Q) setting of the first-party canceller, and 丨...1ϋ and qn. ..q〇 indicates the usage:: 1Q setting of the canceller. The control device can then process the two cancellers with a single-eliminator of the configured sequence. Elimination: =: 91° The medium control device uses the sequence to perform one or more of the two discussed above (eg, BSA, FBA, BCa, MSa, 2915^^ to determine the preferred cancellation settings for the canceller). The control device stores the preferred cancellation settings in the memory. The mapping is depicted in the flowchart for the discovery of the method for the generation of the fourth generation method in the block side. — (such as the two noise cancellers... control the controller 235 that sets the two noise cancellers out) to find the better elimination point for the two, and for both 64 201214999 § The setting of the second of the hole eliminators remains unchanged. The above discussed

消除演算法中之一者(例如’ BSA、FBA、BCA、MSA、DSA 或TS A )發現用於第一雜訊消除器之較佳雜訊消除點。 在區塊3010中,控制裝置使用消除演算法中之一或多 者(例如,BSA、FBA、BCA、MSA、DSA 或 TSA)發現用 於第二雜訊消除器之較佳的消除點,同時用於第一雜訊消 除器之設定在於區塊3005之執行期間發現之較佳消除點處 保持不變。在區塊3015中,在兩個消除器使用其各別較佳 消除點操作之情況下,控制裝置獲得自兩個雜訊消除器產 生之回饋值。在區塊3020中,控制裝置將獲得之回饋值與 預設定臨限值比較。若回饋值比臨限值好或方法3_已運 作了多於預設定數目個反覆,則方法3〇〇〇繼續進行至區塊 逝5。否則,方法返回至區塊3〇〇5,其中用於兩個消除器 ί之當前(I’Q)設定作為用於演算法之起始值。在區塊簡 中,控制裝置儲存用於兩個雜訊消除器之設定,且使用該 等設定控制雜訊消除器。 圖3 1為描繪根據某些例示性實施例的用於發現用於安 置於一通信系統中之兩個 雜汛馮除器之一較佳雜訊消除點 的替代方法3100之流鞀s L, . L程圖。此方法3100解決使用兩個雜 讯消除器增大消除頻寬 ’ 只見气植入(implantation ) 0 在區塊3105中,—控制梦 中之一者之控制 裝置(诸如’兩個雜訊消除器 _ )基於用於頻寬之下部分的回饋值發One of the elimination algorithms (e.g., 'BSA, FBA, BCA, MSA, DSA, or TS A) finds a better noise cancellation point for the first noise canceller. In block 3010, the control device uses one or more of the cancellation algorithms (eg, BSA, FBA, BCA, MSA, DSA, or TSA) to find a better cancellation point for the second noise canceller, while The settings for the first noise canceller remain unchanged at the preferred cancellation points found during execution of block 3005. In block 3015, the control device obtains the feedback values generated by the two noise cancellers in the event that the two cancellers use their respective preferred cancel point operations. In block 3020, the control device compares the obtained feedback value to a preset threshold. If the feedback value is better than the threshold or if the method 3_ has been sent more than a predetermined number of repetitions, then the method 3 continues to block 5 . Otherwise, the method returns to block 3〇〇5 where the current (I’Q) settings for the two cancellers are used as the starting values for the algorithm. In block simplification, the control device stores the settings for the two noise cancellers and uses these settings to control the noise canceller. FIG. 31 is a flow diagram s L depicting an alternative method 3100 for discovering one of the two noise annihilators for placement in a communication system, in accordance with certain exemplary embodiments, . L program map. This method 3100 solves the problem of using two noise cancellers to increase the cancellation bandwidth. See only gas implantation (in block 3105), controlling one of the dreams (such as 'two noise cancellers' _ ) based on the feedback value for the part below the bandwidth

現用於兩個雜訊消除器 ^ X 如,(!,Q)設定),同時:二 消除設定(例 门時切斷第二雜訊消除器。在區塊3ιι〇 65 201214999 中’控制裝置儲存用於第—雜訊消除 雜Λ冷除盗之較佳雜訊消除設 定。 在區塊3U5中’控制裝置基於用於頻寬之上部分的回 饋值發現用於該等雜訊消除器中之第二者的較佳消除設定 (例如,U’Q)設定)’同時切斷第—雜訊消除器。在區 消除設定。 ^第-㈣核器之較佳雜訊 /區塊3125中’控制裝置接通兩個雜訊消除器且將各 別較佳消除設定施加至兩個雜訊消除器中之每一者在區 塊3130中’控制裝置針對頻寬之下部分在第-雜訊消除: 上執行針對一步長之繼。在區塊η”中控制裝置針對 頻寬之上部分在第二雜訊消除器上執行針對一步 MSA。 在區塊3140中,控制裝置獲得用於雜訊消除器之回饋 值,且將該回饋值與一預設定值比較。若回馈值比預設定 值大或若區塊313〇及3135已被執行多於預設定數目個反 覆,則方法3100繼續進行至區塊3145。否則,方法3ι〇〇 返回至區塊3^0。在區塊3145中,控制裝置將最終設定儲 存於記憶體中,且使用最終設定控制雜訊消除器。雖然按 判定用於兩個雜訊消除器之較佳消除點描繪及描述了方法 2900、3000、3100,但每一方法 29〇〇、3〇〇〇、31〇〇 亦可用 以判定用於任何數目個雜訊消除器之較佳消除點。舉例而 言,方法2900、3000、3100可用以發現用於並聯配置之三 個或三個以上雜訊消除器之較佳消除點。雖然描繪方= 66 201214999 2 9 0 0 3 0 〇 〇及3 1 〇 〇發現用於兩個雜訊消除器之較佳或改良 之消除點’但每—方法2900、3000、3 100亦可用以發現用 於兩個以上雜訊消除器(例如,三個或三個以上雜訊消除 器)之較佳或改良之消除點。 總之’根據本發明之某些例示性實施例的通信系統可 包含.一傳輸器,其在第一頻率下傳資訊;一接收器,其 在可與第一頻率相同或在第一頻率附近之第二頻率下接收 通信信號;及-干擾抑制裝置,其消除、校正、定址或補 4員由由傳輸器傳輸之信號強加於接收器上的干擾、ΕΜΙ、雜 訊、雜波或其他不良頻譜分量。干擾抑制裝置可耦接至傳 輸盗之傳輸路徑(例如,在傳輸器之功率放大器之輸出端 處)以獲得傳輸之信號之樣本。干擾補償電路可包括複數 個滤波器(諸4"帶通據波器),其阻斷或抑制接收器之 瀕帶外的信號,同時傳遞處於接收器之頻帶内的雜訊或其 他干擾信號。干擾補償電路亦可包括一 調變器,其使用 由濾波器輸出之信號產生一干擾補償信號。此干擾補償信 號可具有與雜訊之振幅相同或靠近雜訊之振幅的振幅及相 對於干擾之刚度相移。在使用來自受害接收器之「接收 信號品質指示符」回饋的過程中調諧此等參數。將由⑻調 變器產生之干擾補償信號施加至接收器之接收路徑以消除 或抑制由傳輸之信號強加於接收器上的干擾。 本文中描述之通信系統可體現於各種通信裝置中,包 括蜂巢式電話、行動電腦、PDA、個人導航裝1 (例如^ GPS裝置)或包含兩個或兩個以上通信元 ' 丹他通 67 201214999 信裝置。舉例而言,通信系統可體現於具有一 LTE/CDMA/ GSM收發器及一行動τν調諧器之智慧電話中。另一實例 為具有一 GSM/PCS/DCS/W-CDMA收發器及一 GPS接收器 之智慧電話。又一實例包括具有一 WLAN收發器及一 WiMAX或藍芽收發器之筆記型電腦。 在行動裝置實施例中’兩個或兩個以上通信元件可 經由具有極小空間分隔之兩個或兩個以上天線通信。因 此,由兩個或兩個以上通信元件傳輸之信號可相互強加干 擾。為了抑制或消除此干擾,可在每一通信方向上使用如 上所述之HIPCF消除器。φ即,第- HIPCF消除器可消除 或抑制由兩個或兩個以上通信元件中之第二者強加於兩個 或兩個以上通抬元件中之第一者上的干擾,而第二hIPCF 消除器消除或抑制由兩個或兩個以上通信元件中之第一者 強加於兩㈣兩個以上通信λ件中t第二者上的干擾。可 將兩個HIPCF消除器之某些組件製造於單一積體電路上或 多個積體電路(諸如,-或多個CMOS電路)上。 本發明之實施例可供執行以上描述之方法及處理功能 =硬體及軟體使用。如熟習此項技術者應瞭解,本文 描述之系統、方法及程序可體現於可程式化電腦電腦 可執仃軟體或數位電路中。可將軟罈儲存於電腦可讀媒體 +例而。,電腦可讀媒體可包括軟碟、RAM、ROM、 硬碟抽取式媒體 '快閃記憶體、記憶棒、光學媒體、磁 光媒體、CD-ROM等。數位電路可包括積體電路、閘陣列、 構築嵌段邏輯、場可程式化閘陣列(「FpGA」)等。 68 201214999 雖然上文已詳細描述本發明之特定實施例,但該描述 僅用於說明之目的。因此,應瞭解,本發明之許多態樣以 上僅以實例來描述,且並不意欲作為本發明之必需或必要 元素,除非另有明確敍述。除了以上描述之態樣之外,在 不脫離在下文申請專利範圍中定義的本發明之精神及範圍 之情況下,對例示性實施例之揭示之態樣的各種修改及對 應於例示性實施例之揭示之態樣的等效動作亦可由受益於 本發明之一般熟習此項技術者進行,申請專利範圍之範脅 應符合最寬泛的解釋以便涵蓋此等修改及等效結構。 【圖式簡單說明】 圖1為根據某些例示性實施例的一通信系統之功能方 塊圖。 圖2為根據某些例示性實施例的一高輸入功率串接遽 波器(HIPCF)消除器之方塊示意圖。 圖3為根據某些例示性實施例的圖2之HIPCF消除器 之某些組件之方塊示意圖。 圖4描繪根據某些例示性實施例的一受害接收器天線 處接收之信號之頻譜圖。 圖5描繪根據某些例示性實施例的由HIpCF消除器進 仃了帶内不良頻譜分量之消除後在受害接收器之輸入端處 接收的信號之頻譜圖。 圖6為根據某些例示性實施例的Q增強型帶通濾波器 (Q增強型BPF)之方塊示意圖 ° 69 201214999 圖7為說明根據某些例示性實施例的圖2之HIpCF消 除器之額外組件之方塊示意圖。 圖8描繪根據某些例示性實施例的一通信系統之功能 方塊圖。 圖9描繪根據某些例示性實施例的一查找表。 圖1 0為描繪根據某些例示性實施例的用於校準圖2之 HIPCF 4除$之某些組件的方法之流程圖。 圖11為描繪根據某些例示性實施例的用於針對一所要 l g 圖2之HIPCF消除器之濾波器的方法之流程 圖。 圖12為描繪根據某些例示性實施例的用於校準圖2之 HIPCF /肖㈣之輸入帶通瀘波胃(輸入BpF) &方法之流 程圖。 圖13為描繪根據某些例示性實施例的用於校準圖2之 HIPCF消除器之低雜訊放大器帶通濾波器(LNA_BpF)的 方法之流程圖。 圖14A及圖14B (統稱為圖14 )描繪根據某些例示性 實施例的用於校準圖2之HIPCF消除器之Q增強型BPF的 方法之流程圖。 圖1 5為描繪根據某些例示性實施例的用於校準圖2之 HIPCF消除器之輸入bpf的方法之流程圖。 圖16為描繪根據某些例示性實施例的用於針對一給定 頻率判定開關設定的方法之流程圖。 圖17描繪根據某些例示性實施例的雜訊及/或干擾消 70 201214999 „ 除演算法之實施層。 圖1 8為描繪根據某些例示性實施例的相對於輕接之功 率放大器相位雜訊繪製的接收器敏感性之圖。 圖19為描繪根據某.些例示性實施例的相對於接收之行 動TV調諧器信號強度繪製的行動τν調諧器之輸出信雜比 (SNR)之圖。 圖20為描繪根據某些例示性實施例的用於消除雜訊或 干擾之快速二進制演算法之流程圖。 圖2 1描繪根據某些例示性實施例的使用二進制演算法 調整之同相(I)及正交(Q)值之曲線圖。 圖22為描繪根據某些例示性實施例的用於消除雜訊及 /或干擾之最小步長演算法之流程圖。 圖23描繪根據某些例示性實施例的具有偽隨機回饋值 之I-Q平面。 圖24為描繪根據某些例示性實施例的相對於自雙斜率 演算法(DSA )之實施產生的j或Q值繪製的接收品質指示 符之曲線圖。 圖25為描繪根據某些例示性實施例的用於消除雜訊及 /或干擾之DSA之流程圖。 圖26為描繪根據某些例示性實施例的相對於自圖24 之雙斜率演算法之實施產生的I或Q值緣製的接從品質指 不符之曲線圖。 圖27為描繪根據某些例示性實施例的用於消除雜訊及 /或干擾之跟蹤且搜尋演算法(TSA)之流程圖。° 71 201214999 圖28為描繪根據某些例示性實施例的在圊27之TSA 之實施中評估的沿著I-Q平面之消除點之曲線圖。 圖29為描繪根據某些例示性實施例的用於發現用於安 置於一通信系統中之兩個雜訊消除器之一較佳雜訊消除點 的方法之流程圖。 圖30為描繪根據某些例示性實施例的用於發現用於安 置於一通信系統中之兩個雜訊消除器之一較佳雜訊消除點 的方法之流程圖。 圖3 1為描繪根據某些例示性實施例的用於發現用於安 置於一通信系統中之兩個雜訊消除器之一較佳雜訊消除點 的方法之流程圖。 參看以上圖式可較好地理解本發明之許多態樣。該等 圖式僅說明本發明之例示性實施例,且因此不應被視為限 制其範疇,此係因為本發明可承認其他同等有效實施例。 在圖式中展示之元件及特徵未必按比例繪製,實情為,著 重於清晰說明本發明之例示性實施例之原理。另外,可能 誇示某些尺寸以幫助視覺傳達此等原理。在圖式中,參考 數字表示同樣或對應的(但未必相同的丨元件。 【主要元件符號說明】 100 :通信系統 105 :(侵犯者)傳輸器 107 :傳輸路徑 110 :功率放大器 72 201214999 11 5 :傳輸天線 120 :接收天線 125 :取樣裝置 127 :電導體 130 :高輸入功率串接濾波器(HIPCF )消除器 133 :接收路徑 134 :消除點 1 3 5 :接收器 140 :可選接收(RX)濾波器 1 8 0 :回饋路控 205 :帶通濾波器(輸入BPF) 210 :低雜訊放大器(LNA) 2 1 5 :低雜訊放大器帶通濾波器(LNA-BPF ) ,220 :可變增益放大器(VGA ) 225 : Q增強型帶通濾波器(Q-Enhanced-BPF ) 23 0 : I/Q調變器 235 :控制器 240 :輔助電路 250 :晶片邊界 290、291、292 : Q 增強電路 3 00 : HIPCF消除器的某些組件之方塊示意圖 3 05 :第一開關電容器陣列(SCA)Now used for two noise cancellers ^ X such as (!, Q) setting), at the same time: two elimination settings (cut the second noise canceller when the door is closed. In the block 3 ιι〇 65 201214999 'control device storage A preferred noise cancellation setting for the first-noise cancellation chirp cold removal. In block 3U5, the control device is found in the noise canceller based on the feedback value for the upper portion of the bandwidth. The second one's preferred cancellation setting (eg, U'Q) setting) 'cuts off the first-noise canceller at the same time. Eliminate the settings in the zone. ^ The first (4) core better noise/block 3125 'control device turns on two noise cancellers and applies respective better cancellation settings to each of the two noise cancellers. In block 3130, the control unit performs a step-by-step process on the first-to-noise cancellation for the portion below the bandwidth. In block η", the control device performs a one-step MSA on the second noise canceller for the upper portion of the bandwidth. In block 3140, the control device obtains a feedback value for the noise canceller and applies the feedback. The value is compared to a pre-set value. If the feedback value is greater than the pre-set value or if blocks 313 and 3135 have been executed more than a predetermined number of iterations, then method 3100 proceeds to block 3145. Otherwise, the method 3ι〇〇 returns to block 3^0. In block 3145, the control device stores the final settings in the memory and controls the noise canceller using the final settings, although the decision is made for two noise cancellers. Preferably, the methods 2900, 3000, and 3100 are depicted and described, but each of the methods 29, 3, 31 can also be used to determine a preferred cancellation point for any number of noise cancellers. For example, methods 2900, 3000, 3100 can be used to find a preferred cancellation point for three or more noise cancellers in a parallel configuration. Although depicted = 66 201214999 2 9 0 0 3 0 〇〇 and 3 1 〇〇 found for comparison of two noise cancellers Or improved elimination point' but each method 2900, 3000, 3 100 can also be used to find better or improved elimination for more than two noise cancellers (eg, three or more noise cancellers) In summary, a communication system in accordance with some exemplary embodiments of the present invention may include a transmitter that transmits information at a first frequency, and a receiver that is the same as the first frequency or at a first frequency Receiving a communication signal at a nearby second frequency; and - an interference suppression device that cancels, corrects, addresses, or compensates for interference, noise, noise, clutter, or other imposed on the receiver by a signal transmitted by the transmitter. a poor spectral component. The interference suppression device can be coupled to the transmission path of the transmission thief (eg, at the output of the power amplifier of the transmitter) to obtain a sample of the transmitted signal. The interference compensation circuit can include a plurality of filters (4 &quot ; bandpass data), which blocks or suppresses the out-of-band signal of the receiver while transmitting noise or other interfering signals in the frequency band of the receiver. The interference compensation circuit can also A modulator that generates an interference compensation signal using a signal output by the filter. The interference compensation signal may have an amplitude that is the same as or close to the amplitude of the noise and a phase shift relative to the stiffness of the interference. These parameters are tuned during the feedback from the victim receiver's Received Signal Quality Indicator. The interference compensation signal generated by the (8) modulator is applied to the receiver's receive path to cancel or suppress interference imposed by the transmitted signal on the receiver. The communication system described herein can be embodied in a variety of communication devices, including cellular phones, mobile computers, PDAs, personal navigation devices 1 (eg, GPS devices), or containing two or more communication elements' Dantratong 67 201214999 Letter device. For example, the communication system can be embodied in a smart phone having an LTE/CDMA/GSM transceiver and a mobile τν tuner. Another example is a smart phone with a GSM/PCS/DCS/W-CDMA transceiver and a GPS receiver. Yet another example includes a notebook computer having a WLAN transceiver and a WiMAX or Bluetooth transceiver. In a mobile device embodiment, two or more communication elements can communicate via two or more antennas with minimal spatial separation. Therefore, signals transmitted by two or more communication elements can impose interference on each other. In order to suppress or eliminate this interference, the HIPCF canceller as described above can be used in each communication direction. φ, ie, the first-HIPCF canceller can eliminate or suppress interference imposed by a second one of two or more communication elements on the first of the two or more pass elements, and the second hIPCF The canceller eliminates or suppresses interference imposed by a first one of the two or more communication elements on the second of the two (four) two or more communication λ pieces. Some of the components of the two HIPCF cancellers can be fabricated on a single integrated circuit or on multiple integrated circuits (such as - or multiple CMOS circuits). Embodiments of the present invention are available to perform the methods and processing functions described above = hardware and software use. As will be appreciated by those skilled in the art, the systems, methods, and programs described herein can be embodied in a programmable computer computer software or digital circuit. The soft altar can be stored on a computer readable medium + example. The computer readable medium can include floppy disk, RAM, ROM, hard disk removable media 'flash memory, memory stick, optical media, magneto-optical media, CD-ROM, and the like. Digital circuits can include integrated circuits, gate arrays, block block logic, field programmable gate arrays ("FpGA"), and the like. 68 201214999 Although specific embodiments of the invention have been described in detail above, this description is for illustrative purposes only. Therefore, it is to be understood that the invention is not intended to be limited Various modifications of the illustrative aspects of the illustrative embodiments and corresponding to the exemplary embodiments, without departing from the spirit and scope of the invention as defined in the appended claims. The equivalents of the disclosed aspects can also be made by those skilled in the art having the benefit of the invention, and the scope of the claims should be construed in the broadest scope of the invention. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a functional block diagram of a communication system in accordance with some exemplary embodiments. 2 is a block diagram of a high input power series chopper (HIPCF) canceller, in accordance with some demonstrative embodiments. 3 is a block diagram of certain components of the HIPCF canceller of FIG. 2, in accordance with some demonstrative embodiments. 4 depicts a frequency spectrum of a signal received at a victim receiver antenna, in accordance with certain exemplary embodiments. 5 depicts a frequency spectrum of a signal received at the input of a victim receiver after the cancellation of the in-band bad spectral component by the HIpCF canceller, in accordance with certain exemplary embodiments. 6 is a block diagram of a Q enhanced bandpass filter (Q enhanced BPF) in accordance with certain exemplary embodiments. A block diagram of the components. FIG. 8 depicts a functional block diagram of a communication system in accordance with some demonstrative embodiments. FIG. 9 depicts a lookup table in accordance with some demonstrative embodiments. 10 is a flow chart depicting a method for calibrating certain components of HIPCF 4 of FIG. 2 in addition to $, in accordance with certain exemplary embodiments. 11 is a flow diagram depicting a method for a filter for a HIPCF canceller of FIG. 2, in accordance with certain exemplary embodiments. 12 is a flow diagram depicting an input bandpass sputum (input BpF) & method for calibrating the HIPCF / XI (4) of FIG. 2, in accordance with certain exemplary embodiments. 13 is a flow chart depicting a method for calibrating a low noise amplifier bandpass filter (LNA_BpF) of the HIPCF canceller of FIG. 2, in accordance with some demonstrative embodiments. 14A and 14B (collectively Fig. 14) depict a flow chart of a method for calibrating a Q enhanced BPF of the HIPCF canceller of Fig. 2, in accordance with certain exemplary embodiments. FIG. 15 is a flow chart depicting a method for calibrating the input bpf of the HIPCF canceller of FIG. 2, in accordance with certain exemplary embodiments. 16 is a flow chart depicting a method for determining switch settings for a given frequency, in accordance with some demonstrative embodiments. 17 depicts noise and/or interference cancellations in accordance with certain exemplary embodiments. 201214999 „ Except for the implementation layer of the algorithm. FIG. 18 is a diagram depicting phase mismatch with respect to a power amplifier in accordance with certain exemplary embodiments. A plot of receiver sensitivity plotted. Figure 19 is a graph depicting the output signal to noise ratio (SNR) of a motion τν tuner plotted against the received mobile TV tuner signal strength, in accordance with certain exemplary embodiments. 20 is a flow diagram depicting a fast binary algorithm for eliminating noise or interference, in accordance with some demonstrative embodiments. Figure 21 depicts in-phase (I) adjustment using a binary algorithm, in accordance with certain exemplary embodiments. And a graph of orthogonal (Q) values. Figure 22 is a flow diagram depicting a minimum step size algorithm for eliminating noise and/or interference, in accordance with some demonstrative embodiments. Figure 23 depicts some exemplary An IQ plane with pseudo-random feedback values for an embodiment. Figure 24 is a graph depicting a reception quality indicator plotted against j or Q values generated from implementation of a dual slope algorithm (DSA), in accordance with certain exemplary embodiments. Figure 25 is a flow diagram depicting DSA for noise cancellation and/or interference, in accordance with some demonstrative embodiments. Figure 26 is a diagram depicting a dual slope algorithm relative to self Figure 24, in accordance with some demonstrative embodiments. The resulting I or Q value yields a graph of the quality of the inconsistency. Figure 27 depicts a tracking and search algorithm (TSA) for eliminating noise and/or interference, in accordance with certain exemplary embodiments. Flowchart. Figure 71 201214999 Figure 28 is a graph depicting the elimination points along the IQ plane evaluated in the implementation of the TSA of 圊27, in accordance with certain exemplary embodiments. Figure 29 is a depiction depiction in accordance with certain exemplary implementations. A flowchart of a method for discovering a preferred noise cancellation point for one of two noise cancellers disposed in a communication system. FIG. 30 depicts a depiction for discovery, in accordance with certain exemplary embodiments. A flowchart of a method for better noise cancellation points in one of two noise cancellers disposed in a communication system. FIG. 31 is a diagram for discovering for placement in a communication, in accordance with certain exemplary embodiments. One of the two noise cancellers in the system A flow chart of a method for eliminating noise points. A number of aspects of the present invention can be better understood with reference to the above drawings. These drawings illustrate only exemplary embodiments of the present invention and therefore should not be construed as limiting The scope of the present invention is to be understood as being limited by the description of the exemplary embodiments of the present invention. Some dimensions are used to help visually convey such principles. In the drawings, reference numerals indicate identical or corresponding (but not necessarily identical) elements. [Main element notation] 100: communication system 105: (violators) transmitter 107 : Transmission path 110 : Power amplifier 72 201214999 11 5 : Transmission antenna 120 : Receiving antenna 125 : Sampling device 127 : Electrical conductor 130 : High input power series filter (HIPCF ) canceller 133 : Receiving path 134 : Elimination point 1 3 5: Receiver 140: Optional Receive (RX) Filter 1 8 0: Feedback Routine 205: Bandpass Filter (Input BPF) 210: Low Noise Amplifier (LNA) 2 1 5: Low Noise Large Bandpass Filter (LNA-BPF), 220: Variable Gain Amplifier (VGA) 225: Q Enhanced Bandpass Filter (Q-Enhanced-BPF) 23 0 : I/Q Modulator 235: Controller 240: Auxiliary circuit 250: wafer boundary 290, 291, 292: Q enhancement circuit 3 00: block diagram of some components of the HIPCF canceller 3 05: first switched capacitor array (SCA)

310 :第二 SCA 315 : SCA 73 201214999 400 :頻譜圖 402 :信號頻率 403 :振幅 404 :第一峰值 405 :第二峰值 406 :雜訊旁頻帶 5 0 0 :頻譜圖 506 :雜訊旁頻帶 507 :陷波 610 : LC 槽310: Second SCA 315: SCA 73 201214999 400: Spectrogram 402: Signal Frequency 403: Amplitude 404: First Peak 405: Second Peak 406: Noise Side Band 5 0 0: Spectrogram 506: Noise Sideband 507 : Notch 610 : LC Slot

615 :開關電容器陣列/SCA 620 :交叉耦接對 650 :數位/類比(D/A)轉換器 655 :中心分接頭 670、720、725 :旁路開關 745 :功率偵測器 750 :類比/數位(A/D)轉換器 755 :溫度感測器 760 :記憶體(儲存)裝置 770 :緩衝器 800 :通信系統 805 :通信裝置 8 10 :傳輸器 8 1 5 :功率放大器 74 201214999 820 :接收器 825 :第一天線 833、834 :消除點 850 :通信裝置 855 :傳輸器 860 :功率放大器 865 :接收器 870 :第二天線 880 :第一 HIPCF消除器 885 :第二HIPCF消除器 890、895 :取樣裝置 900 :查找表 910、92 0、93 0 :中心頻率設定 940 :種子值 950 :雜項設定 1700 :實施層 1 7 10 :鏈路控制層 1720 :信號處理層 1730 :演算法控制層 1740 :演算法執行層 1800 :圖 1 805 :第一曲線 1 8 1 0 ··第二曲線 1900 :圖 75 201214999 1905 : 第一曲線 1910 : 第二曲線 1915 : 第三曲線 2000 : 第一二進制演算法(FB A ) 2075 ' 2085 :位元 2100 : 二進制校正演算法(BCA) 2200 : 最小步長演算法(MS A ) 2300 : I-Q平面 2400 : 曲線圖 2405 : 接收信號品質指示符 2500 : 雙斜率演算法(DSA) 2600 : 曲線圖 2605 : (曲線)接收信號品質指示符 2610 : 直線 2615 : 直線 2620 : 點 2700 : 跟蹤且搜尋演算法(TSA) 2701a 、2701b : I 值 2800 : 曲線圖 2801 : I-Q平面 2801a 、2801b : Q 值 2805 : 消除點 C1-C4 :可切換電容器 FR :頻道頻率 76 201214999 _ FT :載波頻率615: Switched Capacitor Array/SCA 620: Cross-Coupling Pair 650: Digital/Analog (D/A) Converter 655: Center Taps 670, 720, 725: Bypass Switch 745: Power Detector 750: Analog/Digital (A/D) converter 755: temperature sensor 760: memory (storage) device 770: buffer 800: communication system 805: communication device 8 10: transmitter 8 1 5: power amplifier 74 201214999 820: receiver 825: first antenna 833, 834: elimination point 850: communication device 855: transmitter 860: power amplifier 865: receiver 870: second antenna 880: first HIPCF canceller 885: second HIPCF canceller 890, 895: Sampling device 900: lookup table 910, 92 0, 93 0: center frequency setting 940: seed value 950: miscellaneous setting 1700: implementation layer 1 7 10: link control layer 1720: signal processing layer 1730: algorithm control layer 1740: Algorithm execution layer 1800: Fig. 1 805: first curve 1 8 1 0 · · second curve 1900: Fig. 75 201214999 1905: first curve 1910: second curve 1915: third curve 2000: first two Algorithm (FB A ) 2075 ' 2085 : Bit 2100 : Binary school Algorithm (BCA) 2200 : Minimum Step Size Algorithm (MS A ) 2300 : IQ Plane 2400 : Graph 2405 : Received Signal Quality Indicator 2500 : Double Slope Algorithm (DSA) 2600 : Graph 2605 : (Curve) Receive Signal Quality Indicator 2610: Straight Line 2615: Straight Line 2620: Point 2700: Tracking and Search Algorithm (TSA) 2701a, 2701b: I Value 2800: Graph 2801: IQ Plane 2801a, 2801b: Q Value 2805: Elimination Point C1-C4 : Switchable capacitor FR : Channel frequency 76 201214999 _ FT : Carrier frequency

Ref_C :參考電流 VC1-VC2 :壓控電容器 77Ref_C : Reference current VC1-VC2 : Voltage controlled capacitor 77

Claims (1)

201214999 七、申請專利範圍: 1 _ 一種用於判定一雜訊消除之控制設定以供產生—干 擾補償信號的方法,該方法係包含: (a )至少基於該控制設定來產生該干擾補償信號; (b )將該干擾補償信號施加至一接收器之一輸入信號 路徑; (c)接收包括一回饋值之一回饋信號,該回饋值係指 示干擾強加在該輸入信號路徑上的一位準; (d )健存該回饋值和該控制設定; (e )藉由該控制器來調整該控制設定; (f) 將(a)到(e)重複有複數個反覆,藉此儲存複 數個回饋值和複數個控制設定;及 (g) 判定該複數個回饋值中哪一個回饋值為較佳。 2.如申請專利範圍第.i項之方法,《中產生該干擾補償 信號係包括基於該控制設定以對將干擾強加在該輸入信號 路徑上之一信號的一樣本之相位、振幅、和延遲中至少— 者進行調整。 如申請專利範圍第!項之方法,其中該回饋信號係接 枚自該接收器,且其中該回饋值係包括一接收信號強度指 不符、-位元錯誤率、一封包錯誤率、一雜訊底限、一信 UlMfLU誤向量幅度' _位置準確度…鄰近頻 道洩漏比、和一放大器增益的其中一者。 4.如申請專利範圍第1項之t i ^ , 牙$疋方法’其中該控制設定係包 括一同相設定和一正交設定。 78 201214999 • 5.如申請專利範圍第4項之方法,其中該同相設定係包 括對應一同相值之一第一二進制位元集合,而該正交設定 則包括對應一正交值之一第二二進制位元集合,且其中調 整該控制設定係包括使該同相設定和該正交設定中至少一 者的一二進制位元反轉。 6. 如申明專利範圍第4項之方法,其中調整該控制設定 係包括對數個反覆中各個反覆在調整該同相設定和調整該 正交設定之間交替進行,。 7. 如申味專利範圍第1項之方法,其中該控制設定係基 於一先前接收的回饋值進行調整。 8. —種用於判定一雜訊消除之控制設定以用於一雜訊 消除裝置的方法,該雜訊消除裝置係可操作以基於該控制 設定來產生一干擾補償信號’該控制設定係包括一同相參 數和一丨正交參數,該方法係包含: 響應於將該干擾補償信號施加至一電氣裝置之一輸入 L號路徑,接收指示一第一干擾位準之一第一回饋值; 藉由以一交替方式而一次一個地循序調整該控制設定 之同相參數和正交參數來搜尋一改善的控制設定,直到符 合—停止條件為止; 至於每次對該同相參數之調整和每次對該正交參數之 調整: 基於調整的控制設定來產生一更新的干擾補償信 號,且響應於將該更新的干擾補償信號施加至該輸入 信號路徑以接收一更新的回饋值; 79 201214999 判疋該更新的回饋值是否優於一先前回饋值;和 響應於該更新的回饋值優於該先前回饋值之一判 定,在一後續調整中使用該調整的控制設定;及 響應於該停止條件之符合,使用該調整的控制設定來 操作該雜訊消除裝置。 9. 如申請專利範圍第8項之方法,其中產生該更新的干 擾補償彳§號係包括基於該調整的控制設定,以對將干擾強 加在該電氣裝置上之一信號的一樣本之相位、振幅、和延 遲中至少一者進行調整。 10. 如申請專利範圍第8項之方法,其中該電氣裝置係 包括一接收器,且其中該回饋值係接收自該接收器,且其 中該回饋值係包括一接收信號強度指示符、一位元錯誤 率、一封包錯誤率、一雜訊底限、一信號對雜訊比、一錯 •吳向里幅度、一位置準確度、一鄰近頻道洩漏比、和一放 大器增益的其中一者。 11. 如申請專利範圍第8項之方法,其中該停止條件係 包括多個反覆。 12. 如申請專利範圍第8項之方法,進一步包括: 將每一次更新的回饋值和一臨限回饋值作比較;及 響應於該更新的回饋值符合該臨限回饋值或該更新的 回饋值超過該臨限回饋值的其中—者,來判定業已達到該 停止條件。 13. 如申請專利範圍帛8項之方法,立中係藉由下述而 以-交替方式來循序調整該同相參數和正交參數: 80 201214999 使該同相參數之一個或更多位.元反轉;及 使該正交參數之一個或更多位元反轉。 M.如申請專利_ 13$之方法,其中在每次調整之 後’從該同相參數之一個或更多位元前進至該同相參數之 最低有效的-個或更多位元,且從該正交參數之—個或更 多位元前進至該正交參數之最低有效的一個或更多位元。 15. 如申凊專利範圍第8項之方法,其中係藉由下述而 以一交替方式來循序調整該同相參數和正交參數: 將該同相參數增量; 判定增量的同相參數是否造成一改善的回饋值; 響應於該增量的同相參數並未造成一改善的回饋值之 一判定,將該同相參數減量; 邦定減量的同相參數是否造成一改善的回饋值; 將:該正交參數增量; 判定增量的正交參數是否造成-改善的回饋值; 響應於該增量的〖交參數並未造《一改善的回鑛值之 一判定’將該正交參數減量;及 判定減量的正交參數是否造成-改善的回饋值。 16. 如申請專利範圍第8項之方法,其中係藉由下述而 以一交替方式來循序調整該同相參數和正交參數: 將該同相參數減量; 判定減量的同相參數是否造成一改善的回饋值; 響應於該減量的同相參數並未造成-改善的回擴值之 一判定,將該同相參數增量丨 81 201214999 判定增量的同相參數是否造成一改善的回饋值; 將該正交參數減量; 判定減量的正交參數是否造成一改善的回饋值; 響應於該減量的正交參數並未造成一改善的回饋值之 一判定,將該正交參數增量;及 判定增量的正交參數是否造成一改善的回饋值。 1 7. —種用於判定一控制設定以用於一雜訊消除裝置的 方法’ s玄雜訊消除裝置操作上係基於該控制設定來產生一 干擾補償信號’該干擾補償信號響應於正被施加至一接收 器之一輸入信號路徑的該干擾補償信號而操作上將強加在 該接收器上的干擾予以抑制,該控制設定係包括一同相參 數和一正交參數,該方法係包含: 響應於將該干擾補償信號施加至該輸入信號路徑,接 收指不一第一干擾位準之一第一回饋值; 藉由以一交替方式而一次一個地循序調整該同相參數 和該正交參數來搜尋一改善的控制設定,直到符合一停止 條件為止’每次調整係包括: 將該同相參數和該正交參數中一者增量以產生一 第一調整的控制設定,基於該第一調整的控制設定來 產生一第一更新的干擾補償信號,且響應於將該第一 更新的干擾補償信號施加至該輸入信號路徑以接收一 第一更新的回饋值; 將該同相參數和該正交參數中一者增量以產生一 第二調整的控制設定,基於該第二調整的控制設定來 82 201214999 ‘ 產纟一帛二更新的干擾補償信號,且響應於將該第二 更新的干擾補償信號施加至該輸入信號路徑以接收一 第二更新的回饋值; 判定該第一更新的回饋值、該第二更新的回饋 值、和一先前回饋值中哪一者為較佳;及 對一後續調整使用會造成一個較佳回饋值之控制設 定。 18 _如申請專利範圍第17項之方法,其中產生每個干擾 補4員k號係包括基於該控制設定,以對引起干擾強加在該 接收器上之一信號的一樣本之相位、振幅、和延遲中至少 一者進行調整。 19. 如申請專利範圍第17項之方法,其中該回饋值係接 收自該接收器,且其中該回饋值係包括一接收信號強度指 . 示付、一位元錯誤率、一封包錯誤率一雜訊底限、一信 號對雜訊比、一錯誤向量幅度、一位置準確度、一鄰近頻 道洩漏比、和一放大器增益的其中—者。 20. 如申請專利範圍第丨7項之方法,其中將該同相參數 和該正交參數中一者增量係包括將一個同相參數或一個正 交參數增量一預設定的步長。 21·如申請專利範圍第17項之方法,其十將該同相參數 和邊正交參數中一者減量係包括將_個同相參數或—個正 交參數減量一預設定的步長。 22·如申請專利範圍第1 7項之方法,其中該停止條件係 包括多個反覆。 83 201214999 23·如申請專利範圍第17項之方法,其係進一步包含: 將每個回饋值和一臨限回饋值作比較;及 響應於該回饋值符合該臨限回饋值或該回饋值超過該 臨限回饋值中的一者,來判定業已達到該停止條件。 24. —種用於判定一雜訊消除之控制設定以供對一蜂巢 式電話應用產生一干擾補償信號的方法,該方法包含: (a )選擇複數個初始控制設定; (b )從該複數個初始控制設定中識別對干擾抑制較佳 之一初始控制設定; (c )基於識別的控制設定之效能來挑選多個後續控制 設定; (d )從該等後續控制設定中識別對干擾抑制較佳之一 後續控制設定;及 (e )重複(c )到(d )直到符合一停止條件為止。 25. 如申請專利範圍第24項之方法,其中從該等初始控 制設定中識別對干擾抑制較佳之一初始控制設定係包括: 對於每個初始控制設定來產生一初始干擾補償信號; 將每個初始干擾補償信號施加至一接收器之一輸入信 號路徑; ° 十於所施加至s亥輪入信號路徑之每個初始干擾補償信 號接收才曰#來自5亥初始干擾補償信號之干擾抑制位準的 一初始回饋值;及 判疋那個初始回饋信號造成較佳干擾補償。 申μ專利範圍第24項之方法,其中從該等後續控 84 201214999 制設定中識別對干擾抑制較佳之一後續控制設定係包括: 對於每個後續控制設定來產生—後續干擾補償信號; 將每個後續干擾補償信號施加至一接收器之一輸入信 號路徑; 對於所施加至該輸入信號路徑之每個後續干擾補償信 號,接收指示來自該後續干擾補償信號之干擾抑制位準的 一後續回饋值;及 判定哪個後續回饋信號造成較佳干擾補償。 27.如申請專利範圍第24項之方法,其中每個控制設定 均係包括一同相參數和一正交參數,且其中挑選後續控制 設定係包括: 產生一第一後續控制設定和一增量的同相值,該第一 後續控制設定係包括識別的控制設定之正交參數,而該增 量的同.相值則包括該識別的控制設定之同相值增量一步 長; 產生一第一後績控制設定和一減量的同相值,該第二 後續控制設定係包括該識別的控制設定之正交參數,而該 減量的同相值則包括該識別的控制設定之同相值減量該步 長; 產生一第三後續控制設定和一增量的正交值,該第三 後續控制設定係包括該識別的控制設定之同相參數,而該 增量的正交值則包括該識別的控制設定之正交值增量該步 長; 產生一第四後續控制設定和一減量的正交值,該第四 85 201214999 後續控制設定係包括該識別的控制設定之同相參數,而該 減量的正交值則包括該識別的控制設定之正交值減量該步 長;及 在每個控制設定之方塊(block)後降低該步長。 28.種用於判定一雜訊消除之控制設定以供產生一干 擾補償信號的方法,該方法係包含: (a)從複數個控制設定中識別對干擾抑制較佳之一控 制设疋,每個控制設定係包括一同相參數和一正交參數; (b )儲存識別的控制設定; (c)產生一第一更新的控制設定和一第二更新的控制 設定,該第一更新的控制設定係包括儲存的控制設定之正 交參數和-增量的同相值’纟中該增量的同相值係包括該 儲存的控制設定之同相值增量一步長,該第二更新的控制 設定係包括該儲存的控制設定之正交參數和一減量的同相 值’其中該減量的同相值係包括該儲存的控制設定之同相 值減量該步長; (d )接收對應該第一更新的控制設定之一第一回饋值 和對應碎第二更新的控制設定之一第二回饋值; (e )基於該第-更新的控制設定、該第二更新的控制 設定、該第一回饋值、和該第二回饋值使用雙斜率方程式 以產生一更新的同相值; (f)產生一第三更新的控制設定和—第 乐四更新的控制 設定’該第三更新的控制設定係包括該更新的同相參數和 -增量的正交值,其中該增量的正交值係包括該儲存的控 86 201214999 制設定之正交值增量一步長,該箆m审如 曰里〆长a弟四更新的控制設定係包 括該儲存的控制設定之更新的同相參數和—減量的正交 值,其中該減量的正交值係包括該儲存的控制設定之正= 值減量該步長; & (g) 接收對應該第三更新的控制設定之—第三回饋值 和對應該第四更新的控制設定之一第四回饋值; (h) 基於該第三更新的控制設定、該第四更新的控制 設定、該第三回饋值、和該第四回饋值使用雙斜率方程式 以產生一更新的正交值; (i) 降低該步長之數值;及 (j) 重複(b)到(i)直到符合一停止條件為止。 29·—種用於對複數個雜訊消除裝置中之每個雜訊消除 裝置判定-控制設^的方法,該複數個雜訊消除裝置係經 組態砹基於該控制設定來產生一干擾補償信號,該干擾補 償信號係響應於正被施加至—接收器之—輸人信號路徑的 該干擾補償信號而操作上係將強加在該接收器上的干擾予 以抑制,每個控制設定均係包括一同相值和—正交值,該 方法係包含: 產生對該等雜訊消除裝置建構包括一組合的同相值和 -組合的正交值之一組合的控制設定,該組合的同相值係 :括按-序列配置之每個控制設定的同㈣,該組合的正 交值係包括按一序列配置之每個控制設定的正交值丨及 藉由依據至少一個電腦程式來修改該組合的控制設定 以搜尋-較佳組合的控制設定,直到符合一停止條件為止; 87 201214999 對於該組合的控制設定之每次修改: 將對應於每個雜訊消除裝置的修改後組合的控制 6又疋的§亥同相值和正交值施加至該雜訊消除裝置; 藉由該等雜訊消除裝置以產生一干擾補償信號; 響應於將該干擾補償信號施加至該輸入信號路 徑’接收指示一干擾位準之一回鎮值;且 儲存該回饋值;及 警應該—止條件之符合,從儲存的回饋值+識別那 個回饋值對強加在該接收器上之干擾會造成較佳的抑制 30.-種用於對複數個雜訊消除裝置中之 =判定-控制設定的方法,該複數個雜訊消除= 組態以基於相應的控制設定來產生-干擾補償信;: 擾補償信號係響應於正被施加至一接收器之—: 徑的該干擾補償作號 口说, 儍補μ娩而操作上將強加在 予以抑制,該方法係包含: 器上的干; 置中二)::相應的控制設定施加至該複數個雜訊消除; 置中之母個雜訊消除裝置丨 月1, (b )藉由執行在該複數個雜訊 消除裝置上的-電腦程式以識別對於該一 之一改善的抑制μ〜 固雜矾消除裝j ’同時保持對於其它雜 者恆疋的控制設定; 為除裝置名 (c )使用針對該一個雜訊消除裝置之 來操作該-個雜訊消除裝置;及 。的控制ti ⑷對該複數個雜訊消除裝置中之每個雜訊消除裝 88 201214999 重複(b )到(c )。 3 1.如申請專利範圍第30項之方法,其争識別一改善的 工制又定係包括針對該一個雜訊消除裝置而從複數個控制 设定中判定ρ抓_ P —個控制設定會對強加在該接收器上的干擾 造成較佳抑制。 2·^申請專利範圍第3〇項之方法,其中識別一改善的 "X疋係包括針對該一個雜訊消除裝置而從複數個控制 :::判疋哪一個控制設定會對該接收器造成一較 收信號品質指示符。 ㈣種用於對複數個雜訊消除裝置中之每個雜訊消除 ",制设定進行調諧之方法,該複數個雜訊消除裝 :::係將跨於-給定的頻寬上之雜訊予以抑制::: 籍:由對該頻寬之一第一八 > 以嘈別钻m咕 第op刀執仃至> —個電腦程式, °針對-第-雜訊消除裝置的一第一控制設定. 藉由對該頻寬之一第二部分執行至 r 以識別針對一筮_ M m 1LJ 1:腩%式, 第一雜汛消除裝置的一第二控制設定; 儲存該第—控制設定和該第二控制設定;及, 依據該第-控制設定來操作該第一 依據該第二控制設定來操作該第二雜訊消心裝置,且 34. 如申請專利範圍第33項之方法,苴中 包括該頻寬中之較高㈣H “ ,、中該第-部分係 寬中之較低頻率^ w部― 35. 如申請專利範圍第則之方法,其係進一步包含: 89 201214999 (a )在至少一個反覆中’藉由在該第一控制設定上執 行一演算法以改善該第一控制設定; (b)在至少一個反覆中’藉由在該第二控制設定上執 行一演算法以改善該第二控制設定; (c )重複(a )到(b )直到達成一停止擦件為止。 36.—種蜂巢式電話系統,其係包含: 一干擾補償電路,其用於以一雜訊消除之控制設定為 基礎來產生一干擾補償信號’該干擾補償電路係經組雄以· • ( a )選擇複數個初始控制設定; (b )從該複數個初始控制設定中識別對干擾抑制 較佳之一初始控制設定; (c )基於識別的控制設定之效能來挑選多個後續 控制設定’; (d)從該等後續控制設定中識別對干擾抑制較佳 之一後續控制設定;及 (e )重複(c )到(d)直到符合一停止條件為止。 八、圖式: (如次頁) 90201214999 VII. Patent application scope: 1 _ A method for determining a noise cancellation control setting for generating an interference compensation signal, the method comprising: (a) generating the interference compensation signal based on at least the control setting; (b) applying the interference compensation signal to an input signal path of a receiver; (c) receiving a feedback signal including a feedback value indicating a level of interference imposed on the input signal path; (d) storing the feedback value and the control setting; (e) adjusting the control setting by the controller; (f) repeating a plurality of repetitions from (a) to (e), thereby storing a plurality of feedbacks And a plurality of control settings; and (g) determining which of the plurality of feedback values is preferred. 2. The method of claim 2, wherein the generating the interference compensation signal comprises a phase, an amplitude, and a delay based on the control setting to impose a signal on one of the input signal paths. At least - adjust. Such as the scope of patent application! The method of claim, wherein the feedback signal is connected to the receiver, and wherein the feedback value includes a received signal strength mismatch, a bit error rate, a packet error rate, a noise floor, and a letter UlMfLU Error vector magnitude ' _ position accuracy... one of the adjacent channel leakage ratio, and an amplifier gain. 4. The method of claim 1 wherein the control setting includes an in-phase setting and an orthogonal setting. 78 201214999 • 5. The method of claim 4, wherein the in-phase setting comprises a first set of binary bits corresponding to one of the in-phase values, and the orthogonal setting comprises one of the corresponding orthogonal values a second set of binary bits, and wherein adjusting the control setting comprises inverting a binary bit of at least one of the in-phase setting and the orthogonal setting. 6. The method of claim 4, wherein the adjusting the control setting comprises alternately alternating between adjusting the in-phase setting and adjusting the orthogonal setting. 7. The method of claim 1, wherein the control setting is adjusted based on a previously received feedback value. 8. A method for determining a noise cancellation control setting for use in a noise cancellation device, the noise cancellation device being operative to generate an interference compensation signal based on the control setting. An in-phase parameter and a quadrature parameter, the method comprising: receiving a first compensation value indicating a first interference level in response to applying the interference compensation signal to an input L-number path of an electrical device; The improved control settings are searched for by adjusting the in-phase parameters and the orthogonal parameters of the control settings one by one in an alternating manner until the coincidence-stop condition; and each time the in-phase parameter is adjusted and each time Adjustment of orthogonal parameters: generating an updated interference compensation signal based on the adjusted control settings, and responsive to applying the updated interference compensation signal to the input signal path to receive an updated feedback value; 79 201214999 determining the update Whether the feedback value is better than a previous feedback value; and the feedback value in response to the update is better than one of the previous feedback values In a subsequent adjustment of the control setting adjustment; and in response to the stop line with the conditions, using the adjusted control setting of the noise eliminating device is operated. 9. The method of claim 8, wherein the generation of the interference compensation 彳 § includes a control setting based on the adjustment to impose an interference on the same phase of the signal imposed on the electrical device, At least one of amplitude, and delay is adjusted. 10. The method of claim 8, wherein the electrical device comprises a receiver, and wherein the feedback value is received from the receiver, and wherein the feedback value comprises a received signal strength indicator, one bit The elementary error rate, a packet error rate, a noise floor, a signal to noise ratio, a wrong • Wu Xiangli amplitude, a position accuracy, an adjacent channel leakage ratio, and an amplifier gain. 11. The method of claim 8, wherein the stopping condition comprises a plurality of repetitions. 12. The method of claim 8, further comprising: comparing each updated feedback value with a threshold feedback value; and responding to the updated feedback value in accordance with the threshold feedback value or the updated feedback The value exceeds the value of the threshold feedback value to determine that the stop condition has been reached. 13. If the method of applying for patent scope 帛8 is applied, the in-phase parameter and the orthogonal parameter are sequentially adjusted in an alternating manner by the following: 80 201214999 One or more bits of the in-phase parameter are inversed. Turning; and inverting one or more bits of the orthogonal parameter. M. The method of claim _ 13$, wherein after each adjustment, 'from one or more bits of the in-phase parameter to the least significant one or more bits of the in-phase parameter, and from the positive One or more bits of the intersection parameter are advanced to the least significant one or more bits of the orthogonal parameter. 15. The method of claim 8, wherein the in-phase parameter and the quadrature parameter are sequentially adjusted in an alternating manner by: incrementing the in-phase parameter; determining whether an in-phase parameter of the increment causes An improved feedback value; the in-phase parameter responsive to the increment does not cause one of the improved feedback values to be determined, the in-phase parameter is decremented; whether the in-phase parameter of the bonding decrement causes an improved feedback value; The parameter increment is determined; determining whether the orthogonal parameter of the increment causes an improved feedback value; and the orthogonal parameter is decremented in response to the increment of the intersection parameter that does not make an "one of the improved return value determinations"; And determine whether the orthogonal parameter of the decrement causes an improved feedback value. 16. The method of claim 8, wherein the in-phase parameter and the quadrature parameter are sequentially adjusted in an alternating manner by: decrementing the in-phase parameter; determining whether the in-phase parameter of the decrement causes an improvement The feedback value; the in-phase parameter responsive to the decrement does not cause one of the improved back-spread values, and the in-phase parameter increment 丨81 201214999 determines whether the in-phase parameter of the increment causes an improved feedback value; Parameter decrement; determining whether the orthogonal parameter of the decrement causes an improved feedback value; the orthogonal parameter responsive to the decrement does not cause one of the improved feedback values to be determined, the orthogonal parameter is incremented; and the incremental Whether the orthogonal parameter results in an improved feedback value. 1 7. A method for determining a control setting for use in a noise canceling device s. The noise canceling device is operative to generate an interference compensation signal based on the control setting. The interference compensation signal is responsive to being The interference compensation signal applied to an input signal path of one of the receivers operatively suppresses interference imposed on the receiver, the control setting including an in-phase parameter and an orthogonal parameter, the method comprising: Applying the interference compensation signal to the input signal path, receiving a first feedback value of one of the first interference levels; adjusting the in-phase parameter and the orthogonal parameter one by one in an alternating manner Searching for an improved control setting until a stop condition is met. 'Each adjustment includes: incrementing one of the in-phase parameter and the orthogonal parameter to generate a first adjusted control setting based on the first adjustment Controlling a setting to generate a first updated interference compensation signal and responsive to applying the first updated interference compensation signal to the input signal path Receiving a first updated feedback value; incrementing one of the in-phase parameter and the orthogonal parameter to generate a second adjusted control setting, based on the second adjusted control setting, 82 201214999 ' And a second updated interference compensation signal, and responsive to applying the second updated interference compensation signal to the input signal path to receive a second updated feedback value; determining the first updated feedback value, the second updated feedback Which of the value and a previous feedback value is preferred; and the use of a subsequent adjustment will result in a better feedback control setting. 18 _ The method of claim 17, wherein generating each of the interference supplements includes a phase based on the control setting to impose a phase, amplitude, or amplitude on a signal that causes interference on the receiver. Adjust with at least one of the delays. 19. The method of claim 17, wherein the feedback value is received from the receiver, and wherein the feedback value comprises a received signal strength indicator, a payout, a one-bit error rate, and a packet error rate. The noise floor, a signal-to-noise ratio, an error vector magnitude, a positional accuracy, an adjacent channel leakage ratio, and an amplifier gain. 20. The method of claim 7, wherein the one of the in-phase parameter and the orthogonal parameter comprises incrementing an in-phase parameter or a quadrature parameter by a predetermined step size. 21. The method of claim 17, wherein the deducting one of the in-phase parameter and the edge-orthogonal parameter comprises decrementing the _ in-phase parameter or the ---------- 22. The method of claim 17, wherein the cessation condition comprises a plurality of replies. 83 201214999 23. The method of claim 17, further comprising: comparing each feedback value with a threshold feedback value; and responsive to the feedback value meeting the threshold feedback value or the feedback value exceeding One of the threshold feedback values to determine that the stop condition has been reached. 24. A method for determining a noise cancellation control setting for generating an interference compensation signal for a cellular telephone application, the method comprising: (a) selecting a plurality of initial control settings; (b) from the plurality Identifying one of the initial control settings for interference suppression in the initial control settings; (c) selecting a plurality of subsequent control settings based on the performance of the identified control settings; (d) identifying the interference suppression from the subsequent control settings a subsequent control setting; and (e) repeating (c) through (d) until a stop condition is met. 25. The method of claim 24, wherein identifying from the initial control settings one of the initial control settings for interference suppression comprises: generating an initial interference compensation signal for each initial control setting; The initial interference compensation signal is applied to one of the input signal paths of the receiver; ° each of the initial interference compensation signals received from the signal path applied to the s-round is received. ################# An initial feedback value; and determining the initial feedback signal results in better interference compensation. The method of claim 24, wherein identifying one of the subsequent control settings that is better for interference suppression from the subsequent control 84 201214999 system includes: generating a subsequent interference compensation signal for each subsequent control setting; a subsequent interference compensation signal is applied to an input signal path of a receiver; for each subsequent interference compensation signal applied to the input signal path, receiving a subsequent feedback value indicating an interference suppression level from the subsequent interference compensation signal And determine which subsequent feedback signal causes better interference compensation. 27. The method of claim 24, wherein each control setting comprises an in-phase parameter and an orthogonal parameter, and wherein selecting a subsequent control setting comprises: generating a first subsequent control setting and an increment The in-phase value, the first subsequent control setting includes an orthogonal parameter of the identified control setting, and the same phase value of the increment includes the in-phase value increment of the identified control setting is one step long; generating a first performance Controlling a set and an in-phase value of the decrement, the second subsequent control setting includes an orthogonal parameter of the identified control setting, and the in-phase value of the decrement includes the step of reducing the in-phase value of the identified control setting; generating one a third subsequent control setting and an incremental orthogonal value, the third subsequent control setting includes an in-phase parameter of the identified control setting, and the incremental orthogonal value includes an orthogonal value of the identified control setting Incrementing the step size; generating a fourth subsequent control setting and an offsetting orthogonal value, the fourth 85 201214999 subsequent control setting including the identified control setting The phase parameter, and the orthogonal value of the decrement includes the step of subtracting the orthogonal value of the identified control setting; and decreasing the step size after each control setting block. 28. A method for determining a noise cancellation control setting for generating an interference compensation signal, the method comprising: (a) identifying, from a plurality of control settings, one of control settings for interference suppression, each The control setting includes an in-phase parameter and an orthogonal parameter; (b) storing the identified control setting; (c) generating a first updated control setting and a second updated control setting, the first updated control setting The in-phase value including the stored control set orthogonal parameter and the -incremental in-phase value 纟 includes an in-phase value increment of the stored control setting, and the second updated control setting includes the Orthogonal parameter of the stored control setting and an in-phase value of a decrement 'where the in-phase value of the decrement includes the step of decrementing the in-phase value of the stored control setting; (d) receiving one of the control settings corresponding to the first update a first feedback value and a second feedback value corresponding to the control setting of the second update; (e) a control setting based on the first update, a control setting of the second update, the first feedback value, and The second feedback value uses a double slope equation to generate an updated in-phase value; (f) generates a third updated control setting and - a fourth update control setting. The third updated control setting includes the updated in-phase The orthogonal value of the parameter and the increment, wherein the orthogonal value of the increment includes the stored control 86 201214999 system set the orthogonal value increment one step long, the 箆m trial is as long as the a younger four update The control setting includes an updated in-phase parameter of the stored control setting and an orthogonal value of the decrement, wherein the orthogonal value of the decrement includes a positive = value decrement of the stored control setting; & (g Receiving a third feedback value corresponding to the control setting of the third update and a fourth feedback value corresponding to the control setting of the fourth update; (h) control setting based on the third update, control of the fourth update Setting, the third feedback value, and the fourth feedback value use a double slope equation to generate an updated orthogonal value; (i) reducing the value of the step; and (j) repeating (b) to (i) until Meet a stop condition . 29. A method for determining-controlling each of a plurality of noise canceling devices, the plurality of noise canceling devices being configured to generate an interference compensation based on the control settings a signal that is operatively inhibited from being applied to the receiver in response to the interference compensation signal being applied to the input signal path of the receiver, each control setting being included An in-phase value and an orthogonal value, the method comprising: generating a control setting for the combination of one of the in-phase value and the combined orthogonal value of the noise cancellation device construction, the in-phase value of the combination being: The same as (4) for each control setting of the per-sequence configuration, the orthogonal value of the combination includes an orthogonal value of each control setting configured in a sequence, and a control for modifying the combination according to at least one computer program Set the control settings for the search-better combination until a stop condition is met; 87 201214999 Each modification of the control settings for this combination: will correspond to each noise cancellation The modified combination of the device 6 and the quadrature value and the quadrature value are applied to the noise canceling device; the noise canceling device is used to generate an interference compensation signal; and the interference compensation signal is applied in response to the interference compensation signal Up to the input signal path 'receiving one of the interference levels back to the town value; and storing the feedback value; and the alarm-stop conditional match, from the stored feedback value + identifying the feedback value pair imposed on the receiver The interference will result in better suppression. 30. A method for setting the = decision-control in a plurality of noise canceling devices, the plurality of noise canceling = configuration to generate - interference based on the corresponding control settings The compensation signal; the disturbance compensation signal is responsive to the interference compensation being applied to a receiver: the diameter of the interference compensation is said to be, and the operation is imposed on the silly supplement, and the method includes: (2):: The corresponding control setting is applied to the plurality of noise cancellations; the mother noise cancellation device is placed in the first month, (b) by performing on the plurality of noise cancellation devices - computer program To identify the improvement of the one-to-one improvement μ~ the solid-state elimination device j' while maintaining the control settings for other miscellaneous constants; for the device name (c) to operate for the one noise cancellation device The noise cancellation device; and. The control ti (4) repeats (b) to (c) for each of the plurality of noise canceling devices 88 201214999. 3 1. As claimed in claim 30, the method for identifying an improved system includes determining, for a noise cancellation device, a plurality of control settings from a plurality of control settings. Better suppression of interference imposed on the receiver. 2·^ The method of claim 3, wherein identifying an improved "X疋 system comprises from a plurality of controls for the one noise cancellation device::: determining which control setting will be for the receiver Causes a better signal quality indicator. (d) a method for tuning each noise cancellation " setting in a plurality of noise canceling devices, the plurality of noise canceling devices::: will be across a given bandwidth The noise is suppressed::: 籍: by the first eight of the bandwidth > to 嘈 钻 钻 咕 咕 op op op & & & & & & & & & & & & & 电脑 电脑 电脑 电脑 电脑 电脑 电脑 电脑 电脑 电脑 电脑 ° a first control setting. By performing a second portion of the bandwidth to r to identify a second control setting for the first 汛 汛 elimination device for the 筮 M M 1 LJ 1: 腩 %; The first control setting and the second control setting; and, operating the first control setting according to the first control setting to operate the second noise cancellation device, and 34. In the method of item 33, the method includes a higher (four) H" of the bandwidth, and a lower frequency portion of the first portion of the system width - 35. The method of claiming the patent scope further includes : 89 201214999 (a) in at least one repetition 'by performing a calculation on the first control setting To improve the first control setting; (b) in at least one of the repetitions 'by performing an algorithm on the second control setting to improve the second control setting; (c) repeating (a) to (b) until 36. A honeycomb telephone system comprising: an interference compensation circuit for generating an interference compensation signal based on a noise cancellation control setting. By selecting a plurality of initial control settings; (b) identifying one of the initial control settings for the interference suppression from the plurality of initial control settings; (c) selecting based on the effectiveness of the identified control settings a plurality of subsequent control settings'; (d) identifying, from the subsequent control settings, a subsequent control setting that is better for interference suppression; and (e) repeating (c) through (d) until a stop condition is met. Type: (such as the next page) 90
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