TW201210165A - Electrostatic discharge protection device and method thereof - Google Patents

Abstract

An electrostatic discharge protection device for protecting an inner circuit, which is operated in a source voltage, is provided and includes a protection unit and a control unit. The protection unit provides a discharge path for transmitting an electrostatic signal from a pad to a ground line. The protection unit adjusts a holding voltage and a triggering voltage, for determining whether to conduct the discharge path, according to a voltage level of a control end thereof. When the source voltage is supplied, the control unit transmits an input voltage to the control end of the protection unit, so that the protection unit raises the holding voltage and the triggering voltage of the discharge path. When the source voltage is not supplied, the control unit switches the control end of the protection unit to a floating condition by the electrostatic signal, so that the protection unit lowers the holding voltage and the triggering voltage of the discharge path.

Description

201210165

P980189 33669tw£doc/I VI. Description of the Invention: [Technical Field] The present invention relates to an electrostatic discharge protection device and method, and more particularly to an adjustable voltage and a trigger voltage associated with a discharge path Electrostatic discharge protection device and method. μ [Prior Art] Electrostatic discharge (ESD) is a phenomenon of electrostatic movement from a non-conductive surface, which causes damage to the semiconductor and its circuit components in the integrated circuit. For example, when a human body walking on a carpet, a machine that packages an integrated circuit, or a device that tests an integrated circuit, or the like, a conventional charged body that is in contact with the wafer, will discharge to the wafer, and the instantaneous power of the electrostatic discharge may cause The integrated circuit in the wafer is damaged or fails. In order to prevent damage to the integrated circuit due to electrostatic discharge, the design of the electrostatic discharge protection device is added to the integrated circuit. In general, there are many ways to design static electricity and electrical protection devices. One common way is to use a two-stage N-type transistor connected in series to achieve electrostatic discharge protection. Two-stage N-type transistors are connected in series. The gate terminals are all biased at a fixed voltage. However, the holding voltage of the discharge path provided by such an architecture is often less than 1 〇 5 volts. Therefore, when internal circuits are operated, electrical 〇verstress (E〇s) events tend to occur continuously due to low holding voltage, which in turn affects the operation of internal circuits. ', therefore, how to design and manufacture appropriate electrostatic discharge protection devices,

201210165 P980189 33669twf.doc/I and must not affect the positive (four) work of the internal circuit, M is one of the important topics in the industry. SUMMARY OF THE INVENTION The present invention provides an electrostatic discharge protection device for preventing internal circuits from being stunned by static signals and maintaining normal operation of internal circuits. The first embodiment of the present invention provides a static and electrical protection method for preventing internal circuits from being affected by electrostatic signals. The consistent embodiment of the present invention provides an electrostatic discharge protection device for protecting an internal circuit 'where the internal circuit operates under the power supply voltage, and the welding device receives the input and the turn, and the electrostatic discharge protection device includes a protection unit" control unit 7G The protection unit (4) provides a discharge path for future static electricity, and the number is turned on to the ground I. In addition, the _ unit has a control end, and the protection unit 70 records the (four) end (four) pressure and the holding voltage and the trigger voltage. On the other hand, when the supply is broken, the '(4) unit will pass the input power to the control end of the protection unit' so that (4) the protection unit raises the discharge circuit (4) ^. In addition, when the electric pressure is not scaled, (4) the single signal will be prevented. The (four) end of the material element is in a floating state or a state of 'therefore, so that the protection unit lowers the voltage and the trigger voltage of the discharge circuit (4). In the embodiment, the control unit includes the first-electric two-crystal, the first- An inverter, and a first-isolated circuit, wherein the first end of the n valley is electrically connected to the 烊塾. -N_a 201210165

P980189 33669tw£doc/I

The body of the body is electrically connected to the second end of the first capacitor, the source terminal of N is electrically connected to the ground line, and the idle terminal of the first N-type transistor is used to receive the power supply. The first inverter is disposed between the soldering wire and the ground line, and the input end of the first inverter is electrically connected to the second end of the first capacitor. Furthermore, the first end of the first isolation circuit is electrically connected to the output end of the first inverter, and the second end of the first isolation circuit is electrically connected to the control end of the protection unit, and the electric power of the first end of the circuit The first end and the second end are turned on when the voltage level is greater than the second end. In the embodiment of the p-type electric m, the control shirt further includes a source electrode electrical connection pad of the first p-type transistor and the first P-type transistor, and the first p-type transistor has no extreme electrical connection. A second end of a capacitor, the gate of the first transistor is electrically connected to the output of the first inverter. Second, in the present invention, the protection unit comprises a third medium, a fourth semiconductor, and a fifth transistor. The anode end of the N-type body is electrically connected to the pad and the internal circuit. The fourth fourth N-type solar power is connected to the cathode end of the third diode and, in addition, serves as the control end of the protection unit. This 诉 extreme/electrical 汲 extremely electrically connected to the fourth N-type transistor = type electric == source is electrically connected to the ground line, and the gate of the electric day group is coupled to the ground line. In view of the electric protection concept, the embodiment of the present invention proposes an electrostatic discharge device, an internal circuit, an internal circuit, an internal circuit, an input voltage, and an electrostatic discharge protection. The method includes the following steps: providing a lead from a soldering pad through a protective unit 201210165

P980189 33669twf.doc/I A discharge path of the grounding wire 'and adjust the conduction voltage to determine whether the discharge path is conducting or not with reference to the control unit 2 = control pin 2; when the supply voltage is supplied, the input voltage is applied The (four) end of the conduction element is called the trigger voltage of the circuit; and, when the power is not supplied, the control unit of the control unit is switched off-to-off; to reduce the holding surface of the discharge hetero-conduction to trigger the electric S. The above-mentioned invention: the invention is a control circuit for the secret control of the fresh element miscellaneous protection unit. (4) The holding voltage and the trigger voltage are large, and among them, the power supply, the t-supply, the internal circuit resident operation, the domain system The unit will cause the guard unit to increase the holding voltage and trigger voltage of the discharge ride. By ^, although the internal circuit is connected to (4) the high voltage from the pad, the solution of the over-current stress event will be transferred to the electric power (4) and the voltage will be lowered. When the power supply voltage is not supplied, (4) the circuit will stop operating. The '(4) unit will cause the holding voltage and trigger voltage of the protection single-turn to power-down path. The ability of the domain-to-protection unit (4) to be electrostatically transmitted will also be boosted by the lowering of the trigger voltage of the county. In order to make the above features and advantages of the present invention more precise, the following embodiments are described in detail with reference to the accompanying drawings. [Embodiment] In the following description, in order to present the consistency of the description of the present invention, in the different embodiments, the same component symbols and names will be used for the same or similar components. 201210165

P980189 33669twfdoc/I

[First Embodiment] Fig. 1 is a schematic structural view of an electrostatic discharge protection according to a first embodiment of the present invention, wherein Fig. 1 further shows an internal circuit 10 and a 烊5塾2, please refer to Fig. 1, an internal circuit 1〇 The operation is performed to receive an input voltage through the bonding pad 20 under a power supply voltage %. In addition, the electrostatic discharge protection device 100 is used to protect the internal circuit 10 from damage caused by an electrostatic signal. q Electro-Electrostatic ESD protection device 100 includes a guard unit 11 and a control 120. Further, the protection unit 11A includes a diode D2, an n-type transistor N3, and an N-type transistor N4. The anode end of the diode D2 is electrically connected to the bonding pad 20 and the internal circuit 1〇. The type of transistor milk is not extremely sturdy connected to the cathode end of the diode D2 and its end is used as the control terminal of the protection unit ΤΜ1 β N type transistor: ^4 汲 extreme electrical connection type N The source terminal of the transistor N3 has its source terminal electrically connected to the ground line 101' and its gate terminal lightly coupled to the ground line 101. In practical applications, when the power supply voltage VDD is supplied, the internal circuit 10 will operate normally. In addition, the N-type transistor N4 with the gate terminal coupled to the ground line 101 will conduct the barrier pad 2 〇 to the ground line 1〇1, thereby preventing the electrostatic protection circuit from contributing leakage current β. In addition, in terms of layout structure, two series connection The Ν-type transistors \3 and Ν4 have parasitic lateral ΝΡΝ bipolar transistors. Therefore, when the power supply voltage VDD is not supplied, the internal circuit 10 will stop operating. In addition, the electrostatic signal from the pad 2 will be conducted to the ground line 101 through a discharge path formed by the parasitic bipolar transistor. Thereby, it is possible to avoid damage caused by the electrostatic signal to the internal circuit 1 201210165 P980189 33669twf.doc/I. It is worth noting that the conduction of the discharge path formed by the parasitic NPN bipolar transistor depends on the holding voltage and the triggering voltage. In addition, in this embodiment, the protection unit 110 can adjust the holding voltage and the trigger voltage of the discharge path with reference to the voltage level of the control terminal. The voltage level change of the control terminal TM1 of the protection unit 11 is controlled by the control unit 12, so the operation of the control unit 120 will be further described below, and thereby the protection unit 110 is controlled under the control unit 12〇. How to adjust the holding voltage and trigger voltage of the discharge path correspondingly. Referring to Figure 1, the control unit 12A includes a capacitor 01, an N-type transistor N1, an inverter ima, a P-type transistor P1, and an isolation circuit (2). The first end of the capacitor C1 is electrically connected to the solder bump 2〇. The 汲 terminal of the N-type transistor N1 is electrically connected to the second end of the capacitor C1, and the source terminal is electrically connected to the ground line 10 and its secret terminal is used to connect the power supply voltage VDD of the (4) part circuit 1 VDD 'inverter iNVi configuration Between the pad 2 〇 and the ground line (9), and the input end of the inverted If INV1 is electrically connected to the second end of the capacitor Cl #. The miscellaneous end of the P-type transistor P1 is electrically connected to the pad 2G, and the 汲 terminal is electrically connected to the second end of the capacitor C1, and its _ terminal is electrically connected to the inverter guess! The output. The first terminal of the isolation circuit 121 is electrically connected to the output terminal of the inverter i and the second terminal of the isolation circuit 121 is electrically connected to the control terminal TM1. In the actual operation, when the voltage VDD is supplied,

The circuit 1 will operate normally, and the power supply voltage VDD will be correspondingly transmitted to N 201210165

P980189 33669twfd〇c/I type transistor N1 gate terminal. At this time, the 汲 extremes and the source extremes of the N-type electro-crystal Zhao will be mutually conductive, which in turn causes the county level at the node A to be pulled to a ground voltage. On the other hand, the internal circuit 10 is operatively receiving an input voltage through a pad. Thereby, through the operation of the inverter mvi, the voltage level at the node B is pulled to the input voltage, thereby causing the isolation circuit 121 to receive the input voltage. For example, in the present embodiment, the inverter iNVi includes a P-type body P2 and an N-type transistor. Wherein, the source terminal of the p-type transistor is electrically connected to the pad 20, the drain terminal thereof is used as the output terminal ' of the inverter INV1 and the gate terminal thereof is used as the input terminal of the inverter INV1. In addition, the N-type transistor N2 is not extremely electrically connected to the 汲 terminal of the p-type transistor p2, the source terminal is electrically connected to the ground line 1〇1, and the gate terminal thereof is electrically connected to the gate terminal of the P-type transistor P2. . In actual operation, when the voltage level of node a is pulled to the ground voltage, the 'P-type transistor? 2 will turn on its source and 汲 extremes, causing the voltage level at node 3 to be pulled to the input voltage. On the other hand, in the case of the isolation circuit 121, the isolation circuit turns on the first end and the second end when the voltage level at the first end thereof is greater than the voltage level at the second end thereof. For example, in this embodiment, The isolation circuit 121 can be formed by a diode D1, wherein the anode end of the diode D1 is used as the first end of the isolation circuit 121, and the cathode end of the diode D1 is used as the second end of the isolation circuit 121. In this way, when the isolation circuit 121 receives the inrush voltage, the isolation circuit 121 will conduct its first end and the second end, and the voltage level of the control terminal TM1 of the protection unit 110 is raised to approximately rounded. Voltage. In contrast, with the increase in the voltage level of the control terminal TM1, 201210165

P980189 33669twldoc/I Single TO 110 will correspondingly increase the holding voltage and trigger voltage of the discharge path. In other words, when the power supply voltage VDD is supplied, the discharge path and the trigger voltage will be correspondingly boosted. Thereby, although the internal circuit 5 receives the high voltage from the pad 20, the frequency at which the excessive electrical stress event occurs will be lowered by the increase in the holding voltage and the trigger voltage, thereby ensuring the normal operation of the internal circuit 10. ^ Again, when the power supply voltage VDD is not supplied, the internal circuit 1〇 will stop operation and will not receive the input voltage from the pad 2〇. Instead, the internal circuit 10 at this time may be affected by the static signal from the pad 2 . It is worth noting that when the power supply voltage VDD is not supplied and the electrostatic discharge occurs, the self-welding solder 2 (4) electrostatic signal is coupled to the 汲 terminal of the N-type transistor N1 through the capacitor C1. In addition, since the power supply voltage VDD is not transmitted to the idle terminal of the N-type transistor N1, the 汲 terminal and the source terminal of the N-type transistor are not electrically connected to each other. In the case of Lu, the electrostatic signal at this time is coupled to the node Α β through the capacitor C1. The voltage level of the node A will be pulled up to a high voltage, and the voltage of the node B through the inverter INV1 'level will be lowered to the ground. Voltage. In addition, the P-type transistor P1 at this time will be turned on to form a feedback mechanism, and the voltage of the node A and the node B will be further flashed through the feedback mechanism. It is worth mentioning that the P-type transistor ρι is mainly used to enhance the operational performance of the control unit 120. Therefore, those skilled in the art can decide whether to remove the P-type transistor P1 according to the design requirements. As the voltage level of the node B is lowered to the ground voltage, the isolation circuit 121 will not conduct its first end and the second end, thereby causing the protection unit 11〇 201210165

The control terminal TM1 of P980189 33669tw£doc/I is maintained in a floating state. Relatively, with the floating of the control terminal ΤΜ1, the protection unit u〇 will correspondingly reduce the holding voltage and the trigger voltage of the discharge path. In other words, when the power supply voltage VDD is not supplied 'and the electrostatic discharge occurs, the holding voltage of the discharge path and the trigger voltage are correspondingly lowered." Thereby, the ability of the protection unit 11 () to eliminate the electrostatic signal will also be held by the voltage. It is boosted by a decrease in the trigger voltage, thereby ensuring that the internal circuit 10 is not affected by the electrostatic signal. For example, FIG. 2 is a voltage versus current graph of the guard unit, wherein the curve 210 is a change in the voltage and current of the guard unit ι1 当 when the power source voltage vdd is not supplied, and the curve 220 is when the power source voltage VDD is supplied. The protection unit 110 changes in voltage and current. As shown in Fig. 2, when the control terminal TM1 of the protection unit 110 is switched to the floating state, the holding voltage and the trigger voltage for defining whether the discharge path is turned on or not will be correspondingly lowered. For example, as indicated by reference numerals P21 and P22, the holding voltage and trigger voltage of the discharge path defined by curve 210 are approximately 8.6 volts and 11.3 volts, respectively. On the other hand, when the control terminal of the protection unit 11 is switched from the clamp to the input voltage (for example, 1 〇 5 volts), the holding voltage and the trigger voltage for defining whether the discharge path is turned on or not will be correspondingly Upgrade. For example, as indicated by reference numerals 23 and 24, the holding voltage and trigger voltage of the discharge path defined by curve 220 are approximately 12.2 volts and 14 volts, respectively. It is worth mentioning that in the embodiment, the electrostatic discharge protection device 1 further includes a diode D3. The cathode end of the diode D3 is electrically connected to the pad 20, and the anode end of the diode D3 is electrically connected to the ground line 1〇1. Therefore, the diode d3 connected between the pad 20 and the ground line 1〇1 will have 201210165

Ry»ui89 33669twf.doc/I helps to improve the internal circuit's ability to resist static signals. However, the arrangement of the diode D3 is not intended to limit the present invention. Those skilled in the art can determine whether or not to remove the diode D3 as desired by the design. [Second Embodiment] Fig. 3 is a view showing the structure of an electrostatic discharge protection cold set according to a first embodiment of the present invention. Referring to FIG. 3, the present embodiment is substantially the same as the first embodiment, and the same or similar components in FIG. 3 denote the same or similar components, and will not be described again in this embodiment.

The main difference between this embodiment and the first embodiment is that in the electrostatic discharge protection device 300 of the present embodiment, the isolation circuit 121 is composed of a plurality of diodes D31 to D33. The diodes D31 to D33 are connected in series to form a diode series. In addition, the anode end of the diode series, that is, the anode end of the diode D31, serves as the first end of the isolation circuit 121, and the cathode end of the diode series, that is, the diode D33 The cathode end ' serves as the second end of the hidden circuit 121'. Thereby, the (four) level of the first end of (2)' is larger than the electromagnet of the second end, thereby causing both ends of the isolation circuit 121 to be electrically connected to each other. The electrostatic discharge protection device according to the example of the present invention is the same as that of FIG. 4', and the same or similar component code is used for the same as in the case of FIG. This description will not be repeated. The electrostatic discharge protection described in the first embodiment and the first embodiment is in the present embodiment, the isolation circuit 121" is composed of 13 201210165 P980189 33669tw£doc/I - N A type of transistor is formed, wherein the N-type transistor milk end is connected to the first end N-type electric crystal S N5 force source terminal with the non-extremely electrically connected circuit 121, and is used as the isolation circuit (2) end. Therefore, when the first-voltage level of the isolation circuit 121 is greater than the voltage level of the two ends of the basin, the N-type transistor N5 will be turned on; the two ends of the circuit 121' are electrically connected to each other. Four embodiments]

Fig. 5 is a schematic view showing the structure of an electrostatic discharge protection device according to a fourth embodiment of the invention of the invention. Referring to FIG. 5, the embodiment is substantially the same as the first embodiment, and the same or similar component numbers in FIG. 5 represent the same or similar components. In this embodiment, the P and the first embodiment will not be described again. The main difference is that the electrostatic discharge protection device 500 of the embodiment further includes N inverters INV51 INV INV53, and N is an even number greater than 1. The inverters INV51 INV INV53 are disposed between the pad 20 and the ground line 1 (^, and the reverse phase benefits INV51 INV INV53 are connected in series between the output end of the inverter and the first end of the isolation circuit 121). Since the output of the inverter INV1 is connected in series with an even number of inverters INV51 to INV53', the signals output by both the inverter INV53 and the inverter invi will be the same. Thus, the pair is connected to the inverter. In the subsequent isolation circuit 121, it is still turned on at both ends of the internal circuit 1 ' to pull the voltage level of the control terminal TM1 of the protection unit 110 to the input voltage, and the isolation circuit 121 is still in the When the internal circuit 1 is not operating, 'the two ends are not turned on' to control the control unit 110 201210165

P980189 33669twf.doc/I Switches to the floating state. [Fifth Embodiment] Fig. 6 is a schematic structural view of an electrostatic discharge protection apparatus according to a fifth embodiment of the present invention. Referring to Fig. 6, this embodiment is substantially the same as the first embodiment' and is the same or similar in Fig. 6. The component numbers refer to the same or similar components, which are not described in this embodiment. The main difference between this embodiment and the first embodiment is that the electrostatic discharge protection device 600 of the present embodiment further includes a plurality of inverters 61 to INV63, and Μ is an even number greater than 1. The inverters INV61 to INV63 are disposed between the pad 20 and the ground line 1〇1, and the inverters INV61 to INV63 are connected in series between the second end of the capacitor C1 and the input terminal of the inverter INV1. The output signals of the even-numbered inverters INV61 to INV63 connected in series are the same as the input signals thereof, that is, the signals received by the inverter INV61 are the same as those outputted by the inverter INV63. Therefore, for the inverter connected after the inverter INV63, it is still connected to a ground voltage when the # internal circuit 10 is operated, and the inverter INV1 is still in the internal circuit 10 During operation, a high voltage is received in response to the generation of an electrostatic signal. [Sixth embodiment] Fig. 7 is a view showing the configuration of an electrostatic discharge protection apparatus according to a sixth embodiment of the present invention. The present embodiment is substantially the same as the first embodiment, and the same or similar elements in FIG. 7 denote the same or similar elements, and will not be described again in this embodiment. 15 201210165

P980189 33669twfdoc./I The main difference between this embodiment and the first embodiment is that the electrostatic discharge protection device 7 described in this embodiment removes the isolation circuit 121, so the output of the inverter INV1 will In the present embodiment, when the internal circuit is operated, the voltage level of the node 会 is pulled to the ground voltage, and the operation through the inverter is at the node B. The voltage level is pulled to the input voltage. Thereby, as the voltage level of the control terminal TM1 is increased, the guard unit n〇 will correspondingly increase the holding voltage of the discharge path and trigger the ink. On the other hand, when the internal circuit does not operate and the electrostatic discharge occurs, the electrostatic signal is transferred to the node A through the capacitor C1, causing the voltage level of the node A to be pulled up to a high voltage. In addition, the voltage level of node B will be reduced to the ground voltage through the operation of the inverter. Thereby, the voltage level of the control terminal TM1 of the protection unit 110 is switched to the ground state, thereby causing the protection unit 110 to relatively lower the holding voltage and the trigger voltage of the discharge path. [Seventh Embodiment] Fig. 8 is a view showing the configuration of an electrostatic discharge protection apparatus according to a seventh embodiment of the present invention. The present embodiment is substantially the same as the first embodiment, and the same or similar elements in FIG. 8 denote the same or similar elements, and will not be described again in this embodiment. The main difference between this embodiment and the first embodiment is that the electrostatic discharge protection device 800 of the present embodiment uses the parasitic capacitance CP1 of the p-type transistor p2 instead of the capacitor ci^ of FIG. When the circuit 10 is not operated, and the electrostatic discharge occurs, the electrostatic signal is coupled to the node A through the parasitic electric current 201210165 P980189 33669twf.d〇c/l, thereby causing the voltage level of the node A to be pulled up to a high voltage. At this time, the voltage level of the node B is lowered to the ground voltage by the operation of the inverter ΓΝΥ1. In contrast, the isolation circuit 121 will not conduct its first and second ends, thereby causing the control terminal TM1 of the guard unit 110 to remain in the floating state. As a result, the holding voltage of the discharge path of the discharge path will be correspondingly reduced. [Eighth Embodiment] Fig. f is a structural diagram of an electrostatic discharge protection device according to an eighth embodiment of the present invention. Please refer to Fig. 8, which is the same as the embodiment, and the same or similar elements in Fig. 8 denote the same or corresponding elements, and will not be described again in this embodiment. The main difference between this embodiment and the first embodiment is that the electrostatic discharge protection device described in this embodiment removes the isolation circuit (2) and utilizes a P-type transistor! The parasitic capacitance CP1 of >2 is substituted for the capacitance C in Fig. i. In other words, the present embodiment is a combination of the sixth embodiment and the seventh embodiment, and therefore will not be described again. Ninth Embodiment FIG. 10 is a diagram showing a method of reducing the static electricity protection method of the present invention, wherein the electrostatic discharge protection method is for protecting an internal circuit and the internal circuit is operated at a surface voltage. Voltage. Referring to FIG. H), the electrostatic discharge protection method is as follows: S1=providing a discharge path from the soldering wire to the grounding wire through the shielding unit and adjusting the voltage level of the control terminal of the protection unit for use,疋Discharge hybrid guide it has a special voltage langfa voltage 丨, again on 17 201210165

P980189 33669tw£doc/I Step S120 'When the power supply voltage is supplied, the input voltage is turned on to the control terminal of the control unit to increase the holding voltage and the trigger voltage of the discharge path conduction; and, in step S130, when the power supply voltage is When not being supplied, the control terminal of the control unit is switched to the floating state or the grounded state by an electrostatic signal to reduce the holding voltage and the trigger voltage of the discharge path. In summary, the present invention utilizes a control unit to control the holding voltage and the trigger voltage of the discharge path provided by the guard unit. Wherein, when the power supply voltage is supplied, the voltage level of the control terminal of the protection unit is switched to the input voltage by the control unit, thereby causing the protection unit to increase the holding voltage of the discharge path and the triggering power. In contrast, when the power supply voltage is not supplied, the control unit of the protection unit will be switched to the floating state or the grounded state by the control unit, thereby causing the protection unit to lower the holding voltage and the trigger voltage of the discharge path. In this way, the electrostatic discharge protection device of the present invention can not only avoid the internal circuit from being affected by the electrostatic signal, but also prevent the internal circuit from being interfered with by an excessive electrical stress event. The present invention has been disclosed in the above embodiments, and it is not intended to limit the invention to those skilled in the art, and it is possible to make some modifications and refinements without departing from the spirit and scope of the invention. The scope of the invention is defined by the scope of the appended claims. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic view showing the structure of an electrostatic protection device according to a first embodiment of the present invention. Figure 2 is a plot of voltage versus current for the guard unit.

201210165 pys〇l89 33669twf.doc/I Fig. 3 is a schematic view showing the structure of an electrostatic discharge protection apparatus according to a second embodiment of the present invention. Fig. 4 is a view showing the configuration of an electrostatic discharge protection device according to a third embodiment of the present invention. Fig. 5 is a schematic view showing the structure of an electrostatic discharge protection device according to a fourth embodiment of the present invention. Fig. 6 is a view showing the configuration of an electrostatic discharge protection device according to a fifth embodiment of the present invention. Fig. 7 is a schematic view showing the configuration of an electrostatic discharge protection device according to a sixth embodiment of the present invention. Fig. 8 is a schematic view showing the configuration of an electrostatic discharge protection apparatus according to a seventh embodiment of the present invention. Fig. 9 is a view showing the configuration of an electrostatic discharge protection device according to an eighth embodiment of the present invention. Figure 10 is a flow chart of an electrostatic discharge protection method in accordance with an embodiment of the present invention. [Description of main component symbols] 100, 300, 400, 500, 600, 700, 800, 900 · Electrostatic discharge protection device 110: Protection unit 120 · Control unit 121, 12Γ, 121": isolation circuit 101: ground line 19 201210165

P980189 33669tw£doc/I 10 : Internal circuit 20 : Solder pad TM1 : Control unit of the protection unit INV1, INV51 to INV53, INV61 to INV63: Inverter C1: Capacitors D1 to D3, D31 to D33 · Dipole N1 ~N5 : N type transistor P1 to P2 : P type transistor A, B : node VDD : power supply voltage 210 , 220 : curve P21 , P22 , P23 , P24 : used to explain the curve of the curve of Figure 2 CP1 : parasitic capacitance S110~S130: used to explain the steps 20 of each step of FIG.

Claims (1)

201210165 P980189 33669twf.doc/I VII. Patent application: 1. An electrostatic discharge protection device for protecting an internal circuit, wherein the internal circuit operates at a power supply voltage and receives an input voltage through a pad. And the electrostatic discharge protection device comprises: a protection unit 'providing a discharge path to conduct an electrostatic signal from the pad to a ground line, and the protection unit has a control end, and according to the voltage level of the control end And adjusting a holding voltage and a trigger voltage for determining whether the discharging path is turned on or not; and a control unit, when the power voltage is supplied, conducting the input voltage to the control terminal, so that the protection unit is improved The holding voltage and the trigger voltage, the control unit further switches the control end to a floating state or a ground state by using the static signal when the power supply voltage is not supplied, so that the protection unit lowers the holding There is a voltage with the trigger voltage. 2. The electrostatic discharge protection device of claim 1, wherein the control unit comprises: a first capacitor electrically connected to the pad at a first end; and a first N-type transistor Extremely electrically connected to the second end of the first capacitor, the source terminal of the first N-type transistor is electrically connected to the ground line, and the gate terminal of the first N-type transistor is used to receive the power supply voltage; An inverter is disposed between the soldering wire and the grounding wire, and the input end of the first reverse phase is electrically connected to the second end of the first capacitor and the first-end isolation circuit The first end of the first-inverting circuit is electrically connected to the control terminal' and the voltage level of the first-side circuit at the first end thereof is greater than 21 201210165 P980189 33669twf.doc /I The voltage level of the second end is turned on to the first end of the _protective-first-type transistor, the source of which is electrically connected to the solder bump, and the - 电-type transistor avoids the electrical connection of the first capacitor The second end, X: the gate of the Ρ-type electro-crystal Zhao is electrically connected to the first-inverter ^ Round ends. 4. If applying for the electrostatic discharge device described in item 2 of the full-time, wherein the first inverter comprises: a second 1> type transistor having a miscellaneous end electrically connected to the solder bump, a secret end of the diode transistor being used as the input of the first inverter, and the gate of the second germanium transistor Extremely used as the first-inverting input; and a copper-second 电 type transistor, the secret end of which is electrically connected to the 汲 terminal of the second Ρ type transistor, and the source terminal of the second 电 type transistor The grounding wire is connected to the ground, and the gate terminal of the first die-type electric crystal is electrically connected to the gate terminal of the second p-type transistor. 5. The electrostatic discharge protection device of claim 2, wherein the first off circuit is constituted by a -second-two, and the anode end of the first and second diodes is used as the first The first end of the isolation circuit, the cathode end of the first pole body is used as the second end of the first isolation circuit. The electrostatic discharge protection device according to claim 2, wherein the first The isolation circuit is composed of a plurality of second diodes, and the second diodes are connected in series to form a diode series, and the diodes 22 201210165 P980189 33669tw£doc/I The tandem anode faces the first end of the first isolation circuit, and the cathode end of the diode series serves as the second end of the first isolation circuit. 7. The electrostatic discharge protection device of claim 2, wherein the first isolation circuit is formed by a third (four) transistor, and the gate terminal of the second N-type transistor is not electrically connected To form a first end of the first isolation circuit, a source terminal of the third N-type transistor is used as a second end of the first isolation circuit. The electrostatic discharge protection device of claim 2, further comprising: a second inverter, wherein the second inverters are disposed between the and the The two inverters are connected in series between the first inverter and the first end of the first isolation circuit, wherein ν is greater than ^ as described in the second item of the fourth item of the patent (4), and further includes: a third inverter, the third inverter is disposed between the soldering pad and the D-inverter and the three inverters are connected in series between the = terminal of the first capacitor and the input end of the first inverter. The cover is larger than the electrostatic discharge protection device. 10, wherein the protection unit comprises: a third diode, the anode end of which is electrically connected to the mattress and the internal electricity fourth. a 电-type transistor, Wei is electrically connected to the cathode end of the third diode 23 201210165 P980189 33669 twf.doc/I, and the _ terminal of the fourth N-type electro-optical crystal is used for the control end of the unit; and x Protecting the fifth N-type transistor, which is not extremely electrically connected to the source terminal of the transistor, and the source terminal of the U-shaped transistor is electrically grounded a line, and the gate of the fifth N-type transistor is connected to the X-X, S package 2, the electrostatic discharge protection device described in the first item of the patent range - the fourth diode, the cathode end of which is connected to the welding塾 The anode end of the polar body is electrically connected to the grounding wire. Λ 一i2·If applying for the electrostatic discharge protection device described in item 1 of the full-time division, wherein the control unit comprises: a protective device-third P-type electro-crystal Zhao, the source of which is electrically connected to the welding electrode; The N-type electro-optic crystal is electrically connected to the third p-type electric body without extremes. The source of the sixth N-type transistor is electrically connected to the second line to: the sixth N-type transistor The closed terminal is configured to receive the power source: an electric-fourth inverter disposed between the pad and the ground line, wherein the input end of the four-inverter is electrically connected to the sixth pole and the fourth inversion The output end of the device is electrically connected to the third extreme and the protection unit _ control body of the gate 13 · as claimed in the patent, the discovery unit further includes a second isolated electricity: electricity and] = phase The output of the burglary is transmitted through the second isolation circuit = the control terminal of the second isolation circuit = "Electrical Discharge Protection Device as described in Item 12 of 12" 201210165 P980189 33669twf.doc/I ' The TG further includes a second capacitor, wherein the second end of the second capacitor is electrically connected to the second end of the second electric thin end The sixth N-type drain terminal of the transistor. & 15. An electrostatic discharge protection method for protecting an internal circuit, wherein the (four) circuit operates in the _(four) county τ, and receives an input voltage through the soldering, and the electrostatic discharge protection method includes: A discharge circuit that conducts from the mattress to a ground line is provided through a protection unit! 'With reference to the voltage level of the guard unit, the voltage level of the control unit is adjusted to determine whether the discharge path is turned on or not - the holding voltage and a triggering power... when the power source (4) is supplied, the input voltage is turned on to The control terminal of the control unit uses the holding voltage that is turned on by the discharge path and the trigger voltage; and when the power supply voltage is not supplied, the control terminal of the control W is used by the electrostatic signal. Switch to the - floating state or _ ground state, to lower the circuit; ^ conduction (10) holds the power-on trigger voltage. 25