TW201210165A - Electrostatic discharge protection device and method thereof - Google Patents
Electrostatic discharge protection device and method thereof Download PDFInfo
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201210165201210165
P980189 33669tw£doc/I 六、發明說明: 【發明所屬之技術領域】 本發明是有關於一種靜電放電保護裝置與方法,且特 別是有關於一種可調整與放電路徑相關之持有電壓與觸發 電壓的靜電放電保護裝置與方法。 μ 【先前技術】 靜電放電(electrostatic discharge,ESD)為自非導電表 面之靜電移動的現象,其會造成積體電路中之半導體與其 匕電路組成之損害。例如,當在地毯上行走的人體、^封 裝積體電路的機器或測試積體電路的儀器等常見的帶電 體,接觸到晶片時,將會向晶片放電,此靜電放電之瞬間 功率有可能造成晶片中的積體電路損壞或失效。 為了防止積體電路因靜電放電現象而損壞,在積體電 路中都會加入靜電放電保護裝置的設計。一般而言,靜電 ,電保護裝置有許多的設計方式,其中一種常見的方式就 是利用串接的兩級N型電晶體,來達到靜電放電保護的作 用,其中串接之兩級N型電晶體的閘極端皆偏壓在固定的 電壓。然而,此種架構所提供之放電路徑的持有電壓 (holdingvoltage)往往小於1〇 5伏特。因此,當内部電路操 作時,過度電性應力(electrical 〇verstress , E〇s)事件往往 會因持有電壓過低而不斷地發生,進而影響内部電路的操 作。 ’、 因此,如何設計及製作出適當的靜電放電保護裝置,P980189 33669tw£doc/I VI. Description of the Invention: [Technical Field] The present invention relates to an electrostatic discharge protection device and method, and more particularly to an adjustable voltage and a trigger voltage associated with a discharge path Electrostatic discharge protection device and method. μ [Prior Art] Electrostatic discharge (ESD) is a phenomenon of electrostatic movement from a non-conductive surface, which causes damage to the semiconductor and its circuit components in the integrated circuit. For example, when a human body walking on a carpet, a machine that packages an integrated circuit, or a device that tests an integrated circuit, or the like, a conventional charged body that is in contact with the wafer, will discharge to the wafer, and the instantaneous power of the electrostatic discharge may cause The integrated circuit in the wafer is damaged or fails. In order to prevent damage to the integrated circuit due to electrostatic discharge, the design of the electrostatic discharge protection device is added to the integrated circuit. In general, there are many ways to design static electricity and electrical protection devices. One common way is to use a two-stage N-type transistor connected in series to achieve electrostatic discharge protection. Two-stage N-type transistors are connected in series. The gate terminals are all biased at a fixed voltage. However, the holding voltage of the discharge path provided by such an architecture is often less than 1 〇 5 volts. Therefore, when internal circuits are operated, electrical 〇verstress (E〇s) events tend to occur continuously due to low holding voltage, which in turn affects the operation of internal circuits. ', therefore, how to design and manufacture appropriate electrostatic discharge protection devices,
201210165 P980189 33669twf.doc/I 且必須不影響内部電路的正㈣作,M為業界極力發展 的重要課題之一。 【發明内容】 、本發明之-實施例提供一種靜電放電保護裝置,用以 避免内部電路遭如靜電訊號祕響,並且還可維持内部 電路的正常操作。 本發明之1施例提供—種靜較電保護方法,用以 避免内部電路遭受到靜電訊號的影響。 本發明之一貫施例提出一種靜電放電保護裝置,用以 防護内部電路’其中内部電路操作在—電源電壓下,並 ^焊塾接收輸人轉,且靜電放電保護裝置包括防護單元 ”控制單7G。防護單元㈣提供放電路徑,以將來 的靜電,號導通至接地I此外,_單元具有控制端, 且防護單70錄㈣端㈣壓辦而娜 徑導通與否的持有電壓與觸發電壓。另—方面, 壓破供應時’㈣單元將輸人電料通至防護單元的控制 端’以致㈣護單元提高放電路㈣ ^。此外,當電_壓不被供鱗,㈣單 訊號將防料元的㈣端切齡浮絲態或是 態’以致使防護單元降低放電路㈣持有電壓與觸發電壓。 本=一實施例中’上述之控制單元包括第-電 二It晶體、第—反相器、以及第-隔離電路。 其中n谷的第-端電性連接至烊塾。第―N_a 201210165201210165 P980189 33669twf.doc/I and must not affect the positive (four) work of the internal circuit, M is one of the important topics in the industry. SUMMARY OF THE INVENTION The present invention provides an electrostatic discharge protection device for preventing internal circuits from being stunned by static signals and maintaining normal operation of internal circuits. The first embodiment of the present invention provides a static and electrical protection method for preventing internal circuits from being affected by electrostatic signals. The consistent embodiment of the present invention provides an electrostatic discharge protection device for protecting an internal circuit 'where the internal circuit operates under the power supply voltage, and the welding device receives the input and the turn, and the electrostatic discharge protection device includes a protection unit" control unit 7G The protection unit (4) provides a discharge path for future static electricity, and the number is turned on to the ground I. In addition, the _ unit has a control end, and the protection unit 70 records the (four) end (four) pressure and the holding voltage and the trigger voltage. On the other hand, when the supply is broken, the '(4) unit will pass the input power to the control end of the protection unit' so that (4) the protection unit raises the discharge circuit (4) ^. In addition, when the electric pressure is not scaled, (4) the single signal will be prevented. The (four) end of the material element is in a floating state or a state of 'therefore, so that the protection unit lowers the voltage and the trigger voltage of the discharge circuit (4). In the embodiment, the control unit includes the first-electric two-crystal, the first- An inverter, and a first-isolated circuit, wherein the first end of the n valley is electrically connected to the 烊塾. -N_a 201210165
P980189 33669tw£doc/IP980189 33669tw£doc/I
體的汲極端電性連接第一電容的第二端,N 的源極端電性連接接地線,且第一 N型電晶趙的閑極端用 以接收電源電虔。第_反相器配置在焊塾與接地線之間, 且第一反相器的輸入端電性連接第一電容的第二端。再 者,第-隔離電路的第-端電性連接第—反相器的輸出 端,第-隔離電路的第二端電性連接防護單元的控制端, 電路在其第一端的電愿位準大於其第二端的電 壓位準時導通其第一端與第二端。 p型電m之施例中,上述之控制衫更包括第一 曰曰’、中第一 p型電晶體的源極端電性連接焊墊, 第一P型電晶體的沒極端電性連接第一電容的第二端,第 一電晶體的閘極端電性連接第—反相器的輸出端。 二,本發明之—實施射,上述之防護單元包括一第三 中,當〜第四Μ電晶體、以及-苐五電晶體。其 N型體的陽極端電性連接焊墊與内部電路。第四 四N型日電曰^連接第三二極體的陰極端,且第 外,作為防護單元的控制端。此 诉極端/電晶體的汲極端電性連接第四N型電晶體的 =型電==源極端電性連接至接地線,且 電日日組的閘極端耦合至接地線。 電保觀,來看,本發明之—實施例提出-種靜電放 一電it ^護—内部電路’其中内部電路操作在 電伴嗜方,過一焊墊接收一輸入電壓,且靜電放 電保遵方法包括下列步驟:透過一防護單元提供從焊墊導 201210165The body of the body is electrically connected to the second end of the first capacitor, the source terminal of N is electrically connected to the ground line, and the idle terminal of the first N-type transistor is used to receive the power supply. The first inverter is disposed between the soldering wire and the ground line, and the input end of the first inverter is electrically connected to the second end of the first capacitor. Furthermore, the first end of the first isolation circuit is electrically connected to the output end of the first inverter, and the second end of the first isolation circuit is electrically connected to the control end of the protection unit, and the electric power of the first end of the circuit The first end and the second end are turned on when the voltage level is greater than the second end. In the embodiment of the p-type electric m, the control shirt further includes a source electrode electrical connection pad of the first p-type transistor and the first P-type transistor, and the first p-type transistor has no extreme electrical connection. A second end of a capacitor, the gate of the first transistor is electrically connected to the output of the first inverter. Second, in the present invention, the protection unit comprises a third medium, a fourth semiconductor, and a fifth transistor. The anode end of the N-type body is electrically connected to the pad and the internal circuit. The fourth fourth N-type solar power is connected to the cathode end of the third diode and, in addition, serves as the control end of the protection unit. This 诉 extreme/electrical 汲 extremely electrically connected to the fourth N-type transistor = type electric == source is electrically connected to the ground line, and the gate of the electric day group is coupled to the ground line. In view of the electric protection concept, the embodiment of the present invention proposes an electrostatic discharge device, an internal circuit, an internal circuit, an internal circuit, an input voltage, and an electrostatic discharge protection. The method includes the following steps: providing a lead from a soldering pad through a protective unit 201210165
P980189 33669twf.doc/I 接地線的一放電路徑’並參照防護單元之-控制端 2 =而調整用以決定放電路徑導通與否的-持有電 電壓;當電源電壓被供應時,將輸入電壓導通 元的㈣端,叫聽電路 觸發電壓;以及,當電不被供應時,靜 將控制單元的控綱切駄—料 離; 以降低放電雜導通的持有電麵觸發電S。 雜基Γ上述:本發明是彻控鮮元雜·護單元所 祕之放電路㈣持有電壓與觸發電壓的大,卜其中,者 電源電,t供麟,内部電路駐常操作,域制單元將 致使防護單元提高放電騎的持有電壓與觸發電壓。藉 ^,儘管内部電路接㈣來自焊墊的高壓,過度電性應力 事件發生的解也將會轉有電顯職電㈣提高而被 降低m當電源電壓不被供應時,㈣電路將停 止操作’且㈣單元將致使防護單轉減電路徑的持有 電壓與觸發電壓。域-來,防護單元㈣靜電訊號的能 力也將因縣有電賴觸發電壓的降低而被提升。 —為讓本發明之上述特徵和優雜更祕,下文特 舉實施例,並配合所附圖式作詳細說明如下。 【實施方式】 在以下說明中,為呈現對本發明之說明的一貫性,故 在不同的只化例中,若有功能與結構相同或相似的元件會 用相同的元件符號與名稱。 201210165P980189 33669twf.doc/I A discharge path of the grounding wire 'and adjust the conduction voltage to determine whether the discharge path is conducting or not with reference to the control unit 2 = control pin 2; when the supply voltage is supplied, the input voltage is applied The (four) end of the conduction element is called the trigger voltage of the circuit; and, when the power is not supplied, the control unit of the control unit is switched off-to-off; to reduce the holding surface of the discharge hetero-conduction to trigger the electric S. The above-mentioned invention: the invention is a control circuit for the secret control of the fresh element miscellaneous protection unit. (4) The holding voltage and the trigger voltage are large, and among them, the power supply, the t-supply, the internal circuit resident operation, the domain system The unit will cause the guard unit to increase the holding voltage and trigger voltage of the discharge ride. By ^, although the internal circuit is connected to (4) the high voltage from the pad, the solution of the over-current stress event will be transferred to the electric power (4) and the voltage will be lowered. When the power supply voltage is not supplied, (4) the circuit will stop operating. The '(4) unit will cause the holding voltage and trigger voltage of the protection single-turn to power-down path. The ability of the domain-to-protection unit (4) to be electrostatically transmitted will also be boosted by the lowering of the trigger voltage of the county. In order to make the above features and advantages of the present invention more precise, the following embodiments are described in detail with reference to the accompanying drawings. [Embodiment] In the following description, in order to present the consistency of the description of the present invention, in the different embodiments, the same component symbols and names will be used for the same or similar components. 201210165
P980189 33669twfdoc/IP980189 33669twfdoc/I
[第一實施例] 圖1為根據本發明之第一實施例之靜電放電保護 的結構示意圖,其中圖1更繪示出内部電路10與烊5塾2〇 請參照圖1,内部電路1〇操作在一電源電壓%乃下, 透過焊墊20接收一輸入電壓❶此外,靜電放電保護置 100用以防護内部電路10,以避免一靜電訊號對内^ 10造成的損害。 q电释 靜電放電保護裝置100包括防護單元11〇與控制 120。更進一步來看,防護單元11〇包括二極體D2、n型 電晶體N3、與N型電晶體N4。其中,二極體D2的陽極 端電性連接焊墊20與内部電路1〇。\型電晶體奶的沒極 端Ϊ性連接二極體D2的陰極端’且其陳端用以作為防 護單兀110的控制端ΤΜ1 β N型電晶體:^4的汲極端電性 連接N型電晶體N3的源極端,其源極端電性連接至接地 線101 ’且其閘極端輕合至接地線101。 在實際應用上,當電源電壓VDD被供應時,内部電 路10將正常操作。此外,閘極端耦合至接地線101的N 型電晶體N4將可阻隔焊墊2〇導通至接地線1〇1,進而避 免靜電防護電路貢獻漏電流β此外,就佈局結構來說,兩 串接的Ν型電晶體\3與Ν4具有寄生的橫向ΝΡΝ雙載子 電晶體。因此,當電源電壓VDD不被供應時,内部電路 10將停止操作。此外,來自焊墊2〇的靜電訊號將可透過 寄生之ΝΡΝ雙载子電晶體所形成的一放電路徑,而被傳導 至接地線101。藉此,將可避免靜電訊號對内部電路1〇造 201210165 P980189 33669twf.doc/I 成的損害。 值得注意的是,寄生之NPN雙載子電晶體所形成之 放電路徑的導通與否是取決於持有電壓(holding voltage)與 觸發電壓(triggering voltage)的大小。此外,在本實施例中, 防護單元110可參照其控制端了河丨的電壓位準來調整放電 路徑的持有電壓與觸發電壓。而防護單元11〇之控制端 TM1的電壓位準變化則受控於控制單元12〇,故以下將進 一步敘述控制單元120的操作,並藉此說明在控制單元12〇 的操控下防護單元110是如何對應地調整放電路徑的持有 電壓與觸發電壓。 請繼續參照圖1,控制單元12〇包括電容01、N型電 晶體N1、反相器ima、P型電晶體P1與隔離電路⑵。 其中,電容C1的第一端電性連接至焊塾2〇。N型電晶體 N1的汲極端電性連接電容C1的第二端,其源極端電性連 接至接地線10卜且其祕端用以接㈣部電路1G的電源 電壓VDD '反相器iNVi配置在焊墊2〇與接地線⑼之 間,且反相If INV1的輸入端電养連接電容Cl #第二端。 P型電晶體P1的雜端電性連接焊墊2G,其汲極端電性 連接電容C1的第二端,且其_端電性連接反相器猜! 的輸出端。隔離電路121的第—端電性連接反相器爾i 的輸出端’且隔離電路121的第二端電性連 的控制端TM1。 史平兀uu 在實際操作上,當電_壓VDD被供料,[First Embodiment] Fig. 1 is a schematic structural view of an electrostatic discharge protection according to a first embodiment of the present invention, wherein Fig. 1 further shows an internal circuit 10 and a 烊5塾2, please refer to Fig. 1, an internal circuit 1〇 The operation is performed to receive an input voltage through the bonding pad 20 under a power supply voltage %. In addition, the electrostatic discharge protection device 100 is used to protect the internal circuit 10 from damage caused by an electrostatic signal. q Electro-Electrostatic ESD protection device 100 includes a guard unit 11 and a control 120. Further, the protection unit 11A includes a diode D2, an n-type transistor N3, and an N-type transistor N4. The anode end of the diode D2 is electrically connected to the bonding pad 20 and the internal circuit 1〇. The type of transistor milk is not extremely sturdy connected to the cathode end of the diode D2 and its end is used as the control terminal of the protection unit ΤΜ1 β N type transistor: ^4 汲 extreme electrical connection type N The source terminal of the transistor N3 has its source terminal electrically connected to the ground line 101' and its gate terminal lightly coupled to the ground line 101. In practical applications, when the power supply voltage VDD is supplied, the internal circuit 10 will operate normally. In addition, the N-type transistor N4 with the gate terminal coupled to the ground line 101 will conduct the barrier pad 2 〇 to the ground line 1〇1, thereby preventing the electrostatic protection circuit from contributing leakage current β. In addition, in terms of layout structure, two series connection The Ν-type transistors \3 and Ν4 have parasitic lateral ΝΡΝ bipolar transistors. Therefore, when the power supply voltage VDD is not supplied, the internal circuit 10 will stop operating. In addition, the electrostatic signal from the pad 2 will be conducted to the ground line 101 through a discharge path formed by the parasitic bipolar transistor. Thereby, it is possible to avoid damage caused by the electrostatic signal to the internal circuit 1 201210165 P980189 33669twf.doc/I. It is worth noting that the conduction of the discharge path formed by the parasitic NPN bipolar transistor depends on the holding voltage and the triggering voltage. In addition, in this embodiment, the protection unit 110 can adjust the holding voltage and the trigger voltage of the discharge path with reference to the voltage level of the control terminal. The voltage level change of the control terminal TM1 of the protection unit 11 is controlled by the control unit 12, so the operation of the control unit 120 will be further described below, and thereby the protection unit 110 is controlled under the control unit 12〇. How to adjust the holding voltage and trigger voltage of the discharge path correspondingly. Referring to Figure 1, the control unit 12A includes a capacitor 01, an N-type transistor N1, an inverter ima, a P-type transistor P1, and an isolation circuit (2). The first end of the capacitor C1 is electrically connected to the solder bump 2〇. The 汲 terminal of the N-type transistor N1 is electrically connected to the second end of the capacitor C1, and the source terminal is electrically connected to the ground line 10 and its secret terminal is used to connect the power supply voltage VDD of the (4) part circuit 1 VDD 'inverter iNVi configuration Between the pad 2 〇 and the ground line (9), and the input end of the inverted If INV1 is electrically connected to the second end of the capacitor Cl #. The miscellaneous end of the P-type transistor P1 is electrically connected to the pad 2G, and the 汲 terminal is electrically connected to the second end of the capacitor C1, and its _ terminal is electrically connected to the inverter guess! The output. The first terminal of the isolation circuit 121 is electrically connected to the output terminal of the inverter i and the second terminal of the isolation circuit 121 is electrically connected to the control terminal TM1. In the actual operation, when the voltage VDD is supplied,
路1〇將正常操作,且電源電壓VDD將相對應地傳送至N 201210165The circuit 1 will operate normally, and the power supply voltage VDD will be correspondingly transmitted to N 201210165
P980189 33669twfd〇c/I 型電晶體N1的閘極端。此時,N型電晶趙犯的汲極端與 源極端將相互導通,進而導致位在節點A的縣位準被拉 至一接地電壓。另一方面’内部電路10在操作上會透過焊 墊接收輸入電壓。藉此,透過反相器mvi的作動,位 在節點B的電壓位準被拉至輸入電壓,進而導致隔離電路 121接收到輸入電壓。 曰舉例來說,在本實施例中,反相器iNVi包括P型電 的體P2與N型電晶體犯。其中,p型電晶體的源極端電 性連接焊塾20,其汲極端用以作為反相器INV1的輸出 端’且其閘極端用以作為反相器INV1的輸入端。此外,N 型電晶體N2的没極端電性連接p型電晶體p2的汲極端, 其源極端電性連接至接地線1〇1,且其閘極端電性連接P 型電晶體P2的閘極端。在實際操作上,節點a的電壓位 準被拉至接地電壓時’P型電晶體?2將導通其源極端與汲 極端,進而致使節點3的電壓位準被拉至輸入電壓。、 另一方面,就隔離電路121來說,隔離電路會在 其第一端的電壓位準大於其第二端的電壓位準時導通其第 一端與第二端《例如,在本實施例中,隔離電路121可由 一二極體D1所構成,其中二極體D1的陽極端用以作為隔 離電路121的第-端,二極體D1的陰極端用以作為隔離 電路121的第二端。如此一來,當隔離電路121接收到拎 入電壓時,隔離電路121將導通其第一端與第二端,進^ 將防護單元110之控制端TM1的電壓位準拉升至約為輪入 電壓。相對地,隨著控制端TM1之電壓位準的提升, 201210165P980189 33669twfd〇c/I type transistor N1 gate terminal. At this time, the 汲 extremes and the source extremes of the N-type electro-crystal Zhao will be mutually conductive, which in turn causes the county level at the node A to be pulled to a ground voltage. On the other hand, the internal circuit 10 is operatively receiving an input voltage through a pad. Thereby, through the operation of the inverter mvi, the voltage level at the node B is pulled to the input voltage, thereby causing the isolation circuit 121 to receive the input voltage. For example, in the present embodiment, the inverter iNVi includes a P-type body P2 and an N-type transistor. Wherein, the source terminal of the p-type transistor is electrically connected to the pad 20, the drain terminal thereof is used as the output terminal ' of the inverter INV1 and the gate terminal thereof is used as the input terminal of the inverter INV1. In addition, the N-type transistor N2 is not extremely electrically connected to the 汲 terminal of the p-type transistor p2, the source terminal is electrically connected to the ground line 1〇1, and the gate terminal thereof is electrically connected to the gate terminal of the P-type transistor P2. . In actual operation, when the voltage level of node a is pulled to the ground voltage, the 'P-type transistor? 2 will turn on its source and 汲 extremes, causing the voltage level at node 3 to be pulled to the input voltage. On the other hand, in the case of the isolation circuit 121, the isolation circuit turns on the first end and the second end when the voltage level at the first end thereof is greater than the voltage level at the second end thereof. For example, in this embodiment, The isolation circuit 121 can be formed by a diode D1, wherein the anode end of the diode D1 is used as the first end of the isolation circuit 121, and the cathode end of the diode D1 is used as the second end of the isolation circuit 121. In this way, when the isolation circuit 121 receives the inrush voltage, the isolation circuit 121 will conduct its first end and the second end, and the voltage level of the control terminal TM1 of the protection unit 110 is raised to approximately rounded. Voltage. In contrast, with the increase in the voltage level of the control terminal TM1, 201210165
P980189 33669twldoc/I 單TO 110將對應地提高放電路徑的持有電壓與觸發電壓。 換言之,當電源電壓VDD被供應時,放電路徑 屋與觸發電壓將對應地被提昇。藉此,儘管内部電路有5 接收到來自焊墊20的高壓,過度電性應力事件發生的頻率 也將會因持有電壓與觸發電壓的提高而被降低,進而確保 内部電路10的正常操作。 ^再者,當電源電壓VDD不被供應時,内部電路1〇將 • 停止操作,且不會接收到來自焊墊2〇的輸入電壓。取而代 之的,此時的内部電路10可能會遭受到來自焊墊2〇之靜 電訊號的影響。值得注意的是,當電源電壓VDD不被供 應’且靜電放電發生時,纟自焊塾2㈣靜電訊號會透過電 容C1耦合至N型電晶體N1的汲極端。此外,由於電源 電壓VDD不會傳送至N型電晶體N1的閑極端,進而致 使N型電晶體>^的汲極端與源極端相互不導通。 換吕之,此時的靜電訊號會透過電容C1耦合至節點 Α β藉此’節點A的電壓位準將被拉升至高電壓,且透過 反相器INV1 ’節點B的電壓.位準將降低至接地電壓。此 外,此時的P型電晶體P1將導通以形成一回授機制,且 透過此回授機制將進一步地閃鎖住節點A與節點B的電壓 ,準。值得-提的是,P型電晶體ρι主要是用以加強控制 單元120的操作性能,故本領域具有通常知識者可依設計 所需而決定是否將P型電晶體P1移除。 隨著節點B的電壓位準被降低至接地電壓,隔離電路 121將不會導通其第一端與第二端,進而致使防護單元11〇 201210165P980189 33669twldoc/I Single TO 110 will correspondingly increase the holding voltage and trigger voltage of the discharge path. In other words, when the power supply voltage VDD is supplied, the discharge path and the trigger voltage will be correspondingly boosted. Thereby, although the internal circuit 5 receives the high voltage from the pad 20, the frequency at which the excessive electrical stress event occurs will be lowered by the increase in the holding voltage and the trigger voltage, thereby ensuring the normal operation of the internal circuit 10. ^ Again, when the power supply voltage VDD is not supplied, the internal circuit 1〇 will stop operation and will not receive the input voltage from the pad 2〇. Instead, the internal circuit 10 at this time may be affected by the static signal from the pad 2 . It is worth noting that when the power supply voltage VDD is not supplied and the electrostatic discharge occurs, the self-welding solder 2 (4) electrostatic signal is coupled to the 汲 terminal of the N-type transistor N1 through the capacitor C1. In addition, since the power supply voltage VDD is not transmitted to the idle terminal of the N-type transistor N1, the 汲 terminal and the source terminal of the N-type transistor are not electrically connected to each other. In the case of Lu, the electrostatic signal at this time is coupled to the node Α β through the capacitor C1. The voltage level of the node A will be pulled up to a high voltage, and the voltage of the node B through the inverter INV1 'level will be lowered to the ground. Voltage. In addition, the P-type transistor P1 at this time will be turned on to form a feedback mechanism, and the voltage of the node A and the node B will be further flashed through the feedback mechanism. It is worth mentioning that the P-type transistor ρι is mainly used to enhance the operational performance of the control unit 120. Therefore, those skilled in the art can decide whether to remove the P-type transistor P1 according to the design requirements. As the voltage level of the node B is lowered to the ground voltage, the isolation circuit 121 will not conduct its first end and the second end, thereby causing the protection unit 11〇 201210165
P980189 33669tw£doc/I 的控制端TM1維持在浮接(floating)狀態》相對地,隨著控 制端ΤΜ1的浮接,防護單元u〇將對應地降低放電路徑的 持有電®與觸發電壓。換言之,當電源電壓VDD不被供 應’且靜電放電發生時,放電路徑的持有電壓與觸發電壓 將對應地被降低《藉此,防護單元11()消除靜電訊號的能 力也將因應持有電壓與觸發電壓的降低而被提升 ,進而確 保内部電路10不受到靜電訊號的影響。 舉例來說’圖2為防護單元之電壓對電流曲線圖,其 中曲線210為當電源電壓vdd不被供應時防護單元ι1〇 之電壓與電流的變化,且曲線220為當電源電壓VDD被 供應時之防護單元110電壓與電流的變化。如圖2所示, 當防護單元110之控制端TM1被切換至浮接狀態時,用以 界定放電路徑導通與否的持有電壓與觸發電壓將對應地被 降低。例如,如標號P21與P22所示,曲線210所界定出 之放電路徑的持有電壓與觸發電壓分別約為8.6伏特與 11·3伏特。另一方面,當防護單元11〇之控制端丁从丨被切 換至輸入電壓(例如:1〇·5伏特)時,用以界定放電路徑導 通與否的持有電壓與觸發電壓將對應地被提升。例如,如 標號Ρ23與Ρ24所示,曲線220所界定出之放電路徑的持 有電壓與觸發電壓分別約為12.2伏特與14伏特。 值得一提的是,在本實施例中,靜電放電保護裝置1〇〇 更包括一二極體D3。其中,二極體D3的陰極端電性連接 焊墊20,且二極體D3的陽極端電性連接至接地線1〇1。 藉此’反接在焊墊20與接地線1〇1之間的二極體d3將有 201210165The control terminal TM1 of P980189 33669tw£doc/I is maintained in a floating state. Relatively, with the floating of the control terminal ΤΜ1, the protection unit u〇 will correspondingly reduce the holding voltage and the trigger voltage of the discharge path. In other words, when the power supply voltage VDD is not supplied 'and the electrostatic discharge occurs, the holding voltage of the discharge path and the trigger voltage are correspondingly lowered." Thereby, the ability of the protection unit 11 () to eliminate the electrostatic signal will also be held by the voltage. It is boosted by a decrease in the trigger voltage, thereby ensuring that the internal circuit 10 is not affected by the electrostatic signal. For example, FIG. 2 is a voltage versus current graph of the guard unit, wherein the curve 210 is a change in the voltage and current of the guard unit ι1 当 when the power source voltage vdd is not supplied, and the curve 220 is when the power source voltage VDD is supplied. The protection unit 110 changes in voltage and current. As shown in Fig. 2, when the control terminal TM1 of the protection unit 110 is switched to the floating state, the holding voltage and the trigger voltage for defining whether the discharge path is turned on or not will be correspondingly lowered. For example, as indicated by reference numerals P21 and P22, the holding voltage and trigger voltage of the discharge path defined by curve 210 are approximately 8.6 volts and 11.3 volts, respectively. On the other hand, when the control terminal of the protection unit 11 is switched from the clamp to the input voltage (for example, 1 〇 5 volts), the holding voltage and the trigger voltage for defining whether the discharge path is turned on or not will be correspondingly Upgrade. For example, as indicated by reference numerals 23 and 24, the holding voltage and trigger voltage of the discharge path defined by curve 220 are approximately 12.2 volts and 14 volts, respectively. It is worth mentioning that in the embodiment, the electrostatic discharge protection device 1 further includes a diode D3. The cathode end of the diode D3 is electrically connected to the pad 20, and the anode end of the diode D3 is electrically connected to the ground line 1〇1. Therefore, the diode d3 connected between the pad 20 and the ground line 1〇1 will have 201210165
ry»ui89 33669twf.doc/I 助於提昇内部電路l〇抵抗靜電訊號的能力。然而,二極體 D3的設置並非用以限疋·本發明’本領域具有通常知識者可 依設計所需而決定是否將二極體D3移除。 [第二實施例] 圖3為根據本發明之第一實施例之靜電放電保護寒置 的結構示意圖。請參照圖3,本實施例與第一實施例大致 相同,且圖3中相同或相似的元件標號代表相同或相似的 元件,本實施例中便不再贅述。Ry»ui89 33669twf.doc/I helps to improve the internal circuit's ability to resist static signals. However, the arrangement of the diode D3 is not intended to limit the present invention. Those skilled in the art can determine whether or not to remove the diode D3 as desired by the design. [Second Embodiment] Fig. 3 is a view showing the structure of an electrostatic discharge protection cold set according to a first embodiment of the present invention. Referring to FIG. 3, the present embodiment is substantially the same as the first embodiment, and the same or similar components in FIG. 3 denote the same or similar components, and will not be described again in this embodiment.
本實施例與第一實施例主要的不同之處在於:在本實 施例所述之靜電放電保護裝置300中,隔離電路121,是由 多個二極體D31〜D33所構成。其中,二極體D31〜D33相 互串接以形成一二極體串列。此外,二極體串列的陽極端, 也就是二極體D31的陽極端,用以作為隔離電路121,的第 一端,且二極體串列的陰極端,也就是二極體D33的陰極 端’用以作為隱電路121’的第二端。藉此 ⑵’之第-端的㈣位準大於其第二端的電驗^電= 通,進而致使隔離電路121,的兩端相互導通。 的結據例之靜電放電保護裝置 Μ 得令照圖4’本實施例盥第—眘 相同,且圖4中相Ρ1 + 4·, 育知例大致 中相同或相似的元件標號代 疋件,本實施例中便不再贅述。 似的 ^實施例與第—實麵主要的 ^ 施例所述之靜電放電保處在於.在本貫 示叹裝置40〇中,隔離電路121”是由 13 201210165 P980189 33669tw£doc/I - N型電晶體^所構成。其中,N型電晶體奶 端與没極端電性相連,以形餘離電路121,,的第—端 N型電晶S N5力源極端用以作為隔離電路⑵ 端。藉此,當隔離電路121,,之第—_電壓位準大於盆^ 二端的電壓位準時,N型電晶體N5將導通致;吏 離電路121’的兩端相互導通。 致使隔 [第四實施例]The main difference between this embodiment and the first embodiment is that in the electrostatic discharge protection device 300 of the present embodiment, the isolation circuit 121 is composed of a plurality of diodes D31 to D33. The diodes D31 to D33 are connected in series to form a diode series. In addition, the anode end of the diode series, that is, the anode end of the diode D31, serves as the first end of the isolation circuit 121, and the cathode end of the diode series, that is, the diode D33 The cathode end ' serves as the second end of the hidden circuit 121'. Thereby, the (four) level of the first end of (2)' is larger than the electromagnet of the second end, thereby causing both ends of the isolation circuit 121 to be electrically connected to each other. The electrostatic discharge protection device according to the example of the present invention is the same as that of FIG. 4', and the same or similar component code is used for the same as in the case of FIG. This description will not be repeated. The electrostatic discharge protection described in the first embodiment and the first embodiment is in the present embodiment, the isolation circuit 121" is composed of 13 201210165 P980189 33669tw£doc/I - N A type of transistor is formed, wherein the N-type transistor milk end is connected to the first end N-type electric crystal S N5 force source terminal with the non-extremely electrically connected circuit 121, and is used as the isolation circuit (2) end. Therefore, when the first-voltage level of the isolation circuit 121 is greater than the voltage level of the two ends of the basin, the N-type transistor N5 will be turned on; the two ends of the circuit 121' are electrically connected to each other. Four embodiments]
圖5為根縣發明之第四實施狀靜電放電保護裝置 的結構不意圖。請參照圖5 ,本實施例與第一實施例大致 相同,且圖5中相同或相似的元件標號代表相同或相似的 元件’本實施例中便不再贅述P 本實施例與第一實施例主要的不同之處在於:本實施 例所述之靜電放電保護裝置500更包括N個反相器 INV51〜INV53,N為大於1的偶數。其中,反相器 INV51〜INV53配置在焊墊20與接地線1(^之間,且反相 益INV51〜INV53相互串接在反相器的輸出端與隔離 電路121的第一端之間》 、 由於反相器INV1的輸出端是串接偶數個反相器 INV51〜INV53 ’因此反相器INV53與反相器invi兩者所 輸出的訊號將相同。如此一來,對連接在反相器之 後的隔離電路121來說,其依舊是在内部電路1〇操作時, 導通其兩端’以將防護單元110之控制端TM1的電壓位準 拉升至輸入電壓,且隔離電路121依舊是在内部電路1〇 不操作時’不導通其兩端’以將防護單元110之控制端 201210165Fig. 5 is a schematic view showing the structure of an electrostatic discharge protection device according to a fourth embodiment of the invention of the invention. Referring to FIG. 5, the embodiment is substantially the same as the first embodiment, and the same or similar component numbers in FIG. 5 represent the same or similar components. In this embodiment, the P and the first embodiment will not be described again. The main difference is that the electrostatic discharge protection device 500 of the embodiment further includes N inverters INV51 INV INV53, and N is an even number greater than 1. The inverters INV51 INV INV53 are disposed between the pad 20 and the ground line 1 (^, and the reverse phase benefits INV51 INV INV53 are connected in series between the output end of the inverter and the first end of the isolation circuit 121). Since the output of the inverter INV1 is connected in series with an even number of inverters INV51 to INV53', the signals output by both the inverter INV53 and the inverter invi will be the same. Thus, the pair is connected to the inverter. In the subsequent isolation circuit 121, it is still turned on at both ends of the internal circuit 1 ' to pull the voltage level of the control terminal TM1 of the protection unit 110 to the input voltage, and the isolation circuit 121 is still in the When the internal circuit 1 is not operating, 'the two ends are not turned on' to control the control unit 110 201210165
P980189 33669twf.doc/I 切換至浮接狀態。 [第五實施例] 圖6為根據本發明之第五實施例之靜電放電保護裝置 的結構示意圖》請參照圖6,本實施例與第一實施例大致 相同’且圖6中相同或相似的元件標號代表相同或相似的 元件’本實施例中便不再贅述。 本實施例與第一實施例主要的不同之處在於:本實施 例所述之靜電放電保護裝置600更包括Μ個反相器 馨 爾61〜INV63,Μ為大於1的偶數。其中,反相器 INV61〜INV63配置在焊墊20與接地線1〇1之間,且反相 器INV61〜INV63相互串接在電容C1的第二端與反相器 INV1的輸入端之間。 在此’串接的偶數個反相器INV61〜INV63的輸出訊 號是與其輸入訊號相同的,也就是反相器INV61所接收到 的訊號是與反相器INV63所輸出的訊號相同。因此,對連 接在反相器INV63之後的反相器以乂丨來說,其依舊是在 # 内部電路10操作時,接枚到一接地電壓,且反相器INV1 依舊是在内部電路10不操作時,因應靜電訊號的產生而接 收到一高電壓。 [第六實施例] 圖7為根據本發明之第六實施例之靜電放電保護裝置 的結構示意圖。凊參照圖7 ’本實施例與第一實施例大致 相同’且圖7中相同或相似的元件標號代表相同或相似的 元件,本實施例中便不再贅述。 15 201210165P980189 33669twf.doc/I Switches to the floating state. [Fifth Embodiment] Fig. 6 is a schematic structural view of an electrostatic discharge protection apparatus according to a fifth embodiment of the present invention. Referring to Fig. 6, this embodiment is substantially the same as the first embodiment' and is the same or similar in Fig. 6. The component numbers refer to the same or similar components, which are not described in this embodiment. The main difference between this embodiment and the first embodiment is that the electrostatic discharge protection device 600 of the present embodiment further includes a plurality of inverters 61 to INV63, and Μ is an even number greater than 1. The inverters INV61 to INV63 are disposed between the pad 20 and the ground line 1〇1, and the inverters INV61 to INV63 are connected in series between the second end of the capacitor C1 and the input terminal of the inverter INV1. The output signals of the even-numbered inverters INV61 to INV63 connected in series are the same as the input signals thereof, that is, the signals received by the inverter INV61 are the same as those outputted by the inverter INV63. Therefore, for the inverter connected after the inverter INV63, it is still connected to a ground voltage when the # internal circuit 10 is operated, and the inverter INV1 is still in the internal circuit 10 During operation, a high voltage is received in response to the generation of an electrostatic signal. [Sixth embodiment] Fig. 7 is a view showing the configuration of an electrostatic discharge protection apparatus according to a sixth embodiment of the present invention. The present embodiment is substantially the same as the first embodiment, and the same or similar elements in FIG. 7 denote the same or similar elements, and will not be described again in this embodiment. 15 201210165
P980189 33669twfdoc./I 本實施例與第一實施例主要的不同之處在於:本實施 例所述之靜電放電保護裝置7〇〇是將隔離電路121移除, 因此反相器INV1的輸出端將直接電性連接防護單元11〇 的控制端TM1 β在本實施例中,當内部電路操作時, 節點Α的電壓位準會被拉至接地電壓,且透過反相器 的作動,位在節點B的電壓位準被拉至輸入電壓。藉此, 隨著控制端TM1之電壓位準的提升,防護單元n〇將對應 地提高放電路徑的持有電壓與觸發電墨。 另一方面,當内部電路〗〇不操作,且靜電放電發生 時,靜電訊號會透過電容C1轉合至節點A,進而致使節 點A的電壓位準被拉升至高電壓。此外,透過反相器 的作動,節點B的電壓位準將降低至接地電壓。藉此,防 護單元110之控制端TM1的電壓位準將被切換至接地狀 態,進而致使防護單元110相對地降低放電路徑的持有電 壓與觸發電壓。 [第七實施例] 圖8為根據本發明之第七實施例之靜電放電保護裝置 的結構示意圖。請參照圖8,本實施例與第一實施例大致 相同,且圖8中相同或相似的元件標號代表相同或相似的 元件,本實施例中便不再贅述。 本實施例與第一實施例主要的不同之處在於:本實施 例所述之靜電放電保護裝置800是利用p型電晶體p2的 寄生電容CP1來取代圖1中的電容ci^其中,當内部電 路10不操作,且靜電放電發生時,靜電訊號會透過寄生電 201210165 P980189 33669twf.d〇c/l 容CPI耦合至節點A,進而致使節點A的電壓位準被拉升 至高電壓。此時,透過反相器ΓΝΥ1的作動,節點B的電 壓位準將降低至接地電壓。相對地,隔離電路121將不會 導通其第一端與第二端,進而致使防護單元110的控制端 TM1維持在浮接狀態。如此一來,放電路徑的持有電屡盘 觸發電壓將對應地被降低。 、 [第八實施例] 圖f為根據本發明之第八實施例之靜電放電保護裝置 的結構示意®。請參關8,本實施顺第—實施例^致 相同,且圖8中_或相似的元件標號代表相同或相 疋件,本實施例中便不再贅述。 本實施例與第一實施例主要的不同之處在於:本實施 例所述之靜電放電保護裝置卿是將隔離電路⑵移除, 並利用P型電晶體!>2的寄生電容CP1來取代圖i中的電 容C卜換言之,本實施例是第六實施例與第七實施例的結 合’故不再贅述。 [第九實施例] 圖10為減本發明之_實關之靜敎電保護方法 的&程圖’其中所述靜電放電保護方法用以防護内部電 路’且内部電路操作在麵電壓下, 電壓。參照圖H),所述靜電放電保護方法下列步驟接= S1=透過防護單元提供從焊塾導通至接地線的放 =径’並參照防護單元之控制端的電壓位準而調整用以 、、、疋放電雜導it鮮特有電壓朗發電壓丨再者,於 17 201210165P980189 33669twfdoc./I The main difference between this embodiment and the first embodiment is that the electrostatic discharge protection device 7 described in this embodiment removes the isolation circuit 121, so the output of the inverter INV1 will In the present embodiment, when the internal circuit is operated, the voltage level of the node 会 is pulled to the ground voltage, and the operation through the inverter is at the node B. The voltage level is pulled to the input voltage. Thereby, as the voltage level of the control terminal TM1 is increased, the guard unit n〇 will correspondingly increase the holding voltage of the discharge path and trigger the ink. On the other hand, when the internal circuit does not operate and the electrostatic discharge occurs, the electrostatic signal is transferred to the node A through the capacitor C1, causing the voltage level of the node A to be pulled up to a high voltage. In addition, the voltage level of node B will be reduced to the ground voltage through the operation of the inverter. Thereby, the voltage level of the control terminal TM1 of the protection unit 110 is switched to the ground state, thereby causing the protection unit 110 to relatively lower the holding voltage and the trigger voltage of the discharge path. [Seventh Embodiment] Fig. 8 is a view showing the configuration of an electrostatic discharge protection apparatus according to a seventh embodiment of the present invention. The present embodiment is substantially the same as the first embodiment, and the same or similar elements in FIG. 8 denote the same or similar elements, and will not be described again in this embodiment. The main difference between this embodiment and the first embodiment is that the electrostatic discharge protection device 800 of the present embodiment uses the parasitic capacitance CP1 of the p-type transistor p2 instead of the capacitor ci^ of FIG. When the circuit 10 is not operated, and the electrostatic discharge occurs, the electrostatic signal is coupled to the node A through the parasitic electric current 201210165 P980189 33669twf.d〇c/l, thereby causing the voltage level of the node A to be pulled up to a high voltage. At this time, the voltage level of the node B is lowered to the ground voltage by the operation of the inverter ΓΝΥ1. In contrast, the isolation circuit 121 will not conduct its first and second ends, thereby causing the control terminal TM1 of the guard unit 110 to remain in the floating state. As a result, the holding voltage of the discharge path of the discharge path will be correspondingly reduced. [Eighth Embodiment] Fig. f is a structural diagram of an electrostatic discharge protection device according to an eighth embodiment of the present invention. Please refer to Fig. 8, which is the same as the embodiment, and the same or similar elements in Fig. 8 denote the same or corresponding elements, and will not be described again in this embodiment. The main difference between this embodiment and the first embodiment is that the electrostatic discharge protection device described in this embodiment removes the isolation circuit (2) and utilizes a P-type transistor! The parasitic capacitance CP1 of >2 is substituted for the capacitance C in Fig. i. In other words, the present embodiment is a combination of the sixth embodiment and the seventh embodiment, and therefore will not be described again. Ninth Embodiment FIG. 10 is a diagram showing a method of reducing the static electricity protection method of the present invention, wherein the electrostatic discharge protection method is for protecting an internal circuit and the internal circuit is operated at a surface voltage. Voltage. Referring to FIG. H), the electrostatic discharge protection method is as follows: S1=providing a discharge path from the soldering wire to the grounding wire through the shielding unit and adjusting the voltage level of the control terminal of the protection unit for use,疋Discharge hybrid guide it has a special voltage langfa voltage 丨, again on 17 201210165
P980189 33669tw£doc/I 步驟S120 ’當電源電壓被供應時.,將輸入電壓導通至控制 單元的控制端,以提高放電路徑導通的持有電壓與觸發電 壓;以及,於步驟S130 ,當電源電壓不被供應時,利用靜 電訊號將控制單元的控制端切換至浮接狀態或是接地狀 態’以降低放電路徑導通的持有電壓與觸發電壓。 综上所述,本發明是利用控制單元來控制防護單元所 提供之放電路徑的持有電壓與觸發電壓的大小。其中,當 電源電壓被供應時,防護單元之控制端的電壓位準將被控 制單元切換至輸入電壓,進而致使防護單元提高放電路徑 的持有電壓與觸發電屢。相對地,當電源電壓不被供應時, 防護單元之控制端將被控制單元切換至浮接狀態或是接地 狀態,進而致使防護單元降低放電路徑的持有電壓與觸發 電壓。如此一來,本發明之靜電放電保護裝置不僅可以避 免内部電路遭受到靜電訊號的影響,還可避免内部電路在 操作上受到過度電性應力事件的干擾。 雖然本發明已以實施例揭露如上,然其並非用以限定 本發明’任何所屬技術領域中具有通常知識者,在不脫離 本發明之精神和範圍内,當可作些許之更動與潤飾,故本 發明之保護範圍當視後附之申請專利範圍所界定者為準。 【圖式簡單說明】 圖1為根據本發明之第一實施例之靜電玫電保護裝置 的結構不意圖。 ' 圖2為防護單元之電壓對電流的曲線圖。P980189 33669tw£doc/I Step S120 'When the power supply voltage is supplied, the input voltage is turned on to the control terminal of the control unit to increase the holding voltage and the trigger voltage of the discharge path conduction; and, in step S130, when the power supply voltage is When not being supplied, the control terminal of the control unit is switched to the floating state or the grounded state by an electrostatic signal to reduce the holding voltage and the trigger voltage of the discharge path. In summary, the present invention utilizes a control unit to control the holding voltage and the trigger voltage of the discharge path provided by the guard unit. Wherein, when the power supply voltage is supplied, the voltage level of the control terminal of the protection unit is switched to the input voltage by the control unit, thereby causing the protection unit to increase the holding voltage of the discharge path and the triggering power. In contrast, when the power supply voltage is not supplied, the control unit of the protection unit will be switched to the floating state or the grounded state by the control unit, thereby causing the protection unit to lower the holding voltage and the trigger voltage of the discharge path. In this way, the electrostatic discharge protection device of the present invention can not only avoid the internal circuit from being affected by the electrostatic signal, but also prevent the internal circuit from being interfered with by an excessive electrical stress event. The present invention has been disclosed in the above embodiments, and it is not intended to limit the invention to those skilled in the art, and it is possible to make some modifications and refinements without departing from the spirit and scope of the invention. The scope of the invention is defined by the scope of the appended claims. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic view showing the structure of an electrostatic protection device according to a first embodiment of the present invention. Figure 2 is a plot of voltage versus current for the guard unit.
201210165 pys〇l89 33669twf.doc/I 圖3為根據本發明之第二實施例之靜電放電保護裝置 的結構不意圖。 圖4為根據本發明之第三實施例之靜電放電保護裝置 的結構示意圖。 圖5為根據本發明之第四實施例之靜電放電保護裝置 的結構不意圖。 圖6為根據本發明之第五實施例之靜電放電保護裝置 的結構示意圖。 圖7為根據本發明之第六實施例之靜電放電保護裝置 的結構不意圖。 圖8為根據本發明之第七實施例之靜電放電保護裝置 的結構不意圖。 圖9為根據本發明之第八實施例之靜電放電保護裝置 的結構示意圖。 圖10為根據本發明之一實施例之靜電放電保護方法 的流程圖。 【主要元件符號說明】 100、300、400、500、600、700、800、900 ··靜電放 電保護裝置 110 :防護單元 120 ··控制單元 121、12Γ、121” :隔離電路 101 :接地線 19 201210165201210165 pys〇l89 33669twf.doc/I Fig. 3 is a schematic view showing the structure of an electrostatic discharge protection apparatus according to a second embodiment of the present invention. Fig. 4 is a view showing the configuration of an electrostatic discharge protection device according to a third embodiment of the present invention. Fig. 5 is a schematic view showing the structure of an electrostatic discharge protection device according to a fourth embodiment of the present invention. Fig. 6 is a view showing the configuration of an electrostatic discharge protection device according to a fifth embodiment of the present invention. Fig. 7 is a schematic view showing the configuration of an electrostatic discharge protection device according to a sixth embodiment of the present invention. Fig. 8 is a schematic view showing the configuration of an electrostatic discharge protection apparatus according to a seventh embodiment of the present invention. Fig. 9 is a view showing the configuration of an electrostatic discharge protection device according to an eighth embodiment of the present invention. Figure 10 is a flow chart of an electrostatic discharge protection method in accordance with an embodiment of the present invention. [Description of main component symbols] 100, 300, 400, 500, 600, 700, 800, 900 · Electrostatic discharge protection device 110: Protection unit 120 · Control unit 121, 12Γ, 121": isolation circuit 101: ground line 19 201210165
P980189 33669tw£doc/I 10 :内部電路 20 :焊墊 TM1 :防護單元的控制端 INV1、INV51 〜INV53、INV61 〜INV63 :反相器 C1 :電容 D1 〜D3、D31 〜D33 ··二極體 N1〜N5 : N型電晶體 P1〜P2 : P型電晶體 A、B :節點 VDD :電源電壓 210、220 :曲線 P21、P22、P23、P24 :用以說明圖2之曲線的標號 CP1 :寄生電容 S110〜S130:用以說明圖10之各步驟流程 20P980189 33669tw£doc/I 10 : Internal circuit 20 : Solder pad TM1 : Control unit of the protection unit INV1, INV51 to INV53, INV61 to INV63: Inverter C1: Capacitors D1 to D3, D31 to D33 · Dipole N1 ~N5 : N type transistor P1 to P2 : P type transistor A, B : node VDD : power supply voltage 210 , 220 : curve P21 , P22 , P23 , P24 : used to explain the curve of the curve of Figure 2 CP1 : parasitic capacitance S110~S130: used to explain the steps 20 of each step of FIG.
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