TW201208103A - Nanostructured solar cell - Google Patents
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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201208103 圖案化層其上具有奈米結構。 第2B〜2E圖示出奈米結構的實施例之頂視圖。 第3〜6圖示出依本發明形成的奈米結構太陽能電池實 施例之簡化側視圖。 第7圖示出一圖案化層濕蝕刻以增加奈米結構的相對 高度之簡化側視圖。 第8A〜8B圖示出一太陽能電池之一圖案化層的簡化 側視圖。 第9A〜9C圖示出一太陽能電池之一舉例奈米結構圖 案的簡化側視和平面圖。 第10A〜10C圖示出形成一導電層中的組織細構之一 舉例方法。 第11圖示出一在一導電層中具有組織細構的奈米太陽 能電池實施例之一簡化側視圖。 第12圖示出另一用於一依本發明形成之薄膜太陽能電 池的奈米圖案基材實施例之一簡化立體圖。 第13圖示出第12圖的奈米圖案基材之一區段的頂視 圖。 第14A圖示出第12圖的奈米圖案基材之一區段的簡化 側視圖。 第14B圖示出第14A圖的奈米圖案基材之一區段的放 大簡化側視圖。 第15圖示出一依本發明形成的奈米圖案薄膜太陽能電 池實施例之一簡化側視圖。 201208103 第16圖示出另一依本發明形成的奈米圖案薄膜太陽能 電池實施例之一簡化側視圖。 第17圖示出一用於形成第15圖的奈米圖案薄膜太陽能 電池之舉例系統的方塊圖。 第8圖不出帛於形成第16圖的奈米圖案薄膜太陽能 電池之舉例系統的方塊圖。 第19A〜19C圖示出一用於犯丄 用於形成一薄膜太陽能電池之 奈米圖案基材的舉例模板。 第20A〜20C圖示出另—用认_ 阳力用於形成一薄膜太陽能電池 之奈米圖案基材的舉例模板。 第21A〜21D圖示出—用^, 法 用於形成第6圖所示之奈米圖案 4膜太陽能電池之奈米圖幸甚 _ 茶暴材的掃描電子顯微照片。 第22圖示出一類似於第6圖所示之太陽能電池的奈米 圖案薄膜太陽能電池之如電子顯微昭片。 第23圖示出另一類似 似於第6圖所示之太陽能電池的奈 米圖案薄膜太陽能電池之掃描電子紐照片。 第24 25圖不出具有松化表面之奈米結構的奈米圖案 薄膜太陽能電池實施例之簡化側視圖。 第25〜26圖不出具有粗化表面之奈米結構的奈米圖案 薄膜層之掃描電子顯微照片。 t實施方式;J 較佳實施例之詳細說明 當與光伏打模組中的結晶矽(C-Si)比較時,薄膜非晶矽 (如a-Si)具冑車交低成本,且大致可與卷至卷處理(即帶狀處 6 201208103 理)相容。但是以a-Si為基礎的太陽能電池一般會受制於較 低的能量較換效率(PCE)。例如,目前a-Si基的太陽能電池 可具有~實際數目約在4.5至8·5%之間的轉換效率。通常須 要一比約10。/。更大的PCE才能與商業上可用的太陽能電池 (例如C-Si,GaAs等)競爭。此外,目前設計的a-Si基太陽能 電池會比商用C-Si太陽能電池較不穩定。 雖薄臈矽太陽能電池可具成本效益,但它們會有較低 效率,及/或低沈積速率。因此,其形成會包含較長的延滞 時間為能沈積甚至只有Ιμιη的薄膜。又,薄膜矽太陽能電 池類似於太陽能電池6〇,僅能達到大約1〇%的效率值。就 生產模式而言’此效率甚至可能會依據許多實際的減少因 素而更減少。因此,目前實際的效率值可能只有大約6〜 7%。201208103 The patterned layer has a nanostructure on it. 2B to 2E illustrate top views of an embodiment of a nanostructure. Figures 3 to 6 show simplified side views of an embodiment of a nanostructure solar cell formed in accordance with the present invention. Figure 7 shows a simplified side view of a patterned layer wet etch to increase the relative height of the nanostructure. 8A-8B illustrate a simplified side view of a patterned layer of a solar cell. 9A to 9C illustrate a simplified side view and a plan view of one of the solar cells as an example of a nanostructure pattern. 10A to 10C illustrate one example of forming a texture fine structure in a conductive layer. Figure 11 shows a simplified side view of one embodiment of a nano-solar cell having a fine texture in a conductive layer. Figure 12 is a simplified perspective view of another embodiment of a nanopattern substrate for use in a thin film solar cell formed in accordance with the present invention. Fig. 13 is a top plan view showing a section of the nano pattern substrate of Fig. 12. Fig. 14A is a simplified side view showing a section of the nanopattern substrate of Fig. 12. Fig. 14B is a simplified side elevational view showing one of the sections of the nanopattern substrate of Fig. 14A. Figure 15 is a simplified side elevational view of one embodiment of a nanopatterned thin film solar cell formed in accordance with the present invention. 201208103 Figure 16 shows a simplified side view of another embodiment of a nanopatterned thin film solar cell formed in accordance with the present invention. Fig. 17 is a block diagram showing an exemplary system for forming the nano pattern thin film solar cell of Fig. 15. Fig. 8 is a block diagram showing an example system for forming a nanopattern thin film solar cell of Fig. 16. 19A to 19C illustrate an exemplary template for the use of a nano pattern substrate for forming a thin film solar cell. 20A to 20C illustrate an exemplary template for forming a nano pattern substrate of a thin film solar cell by using a positive force. 21A to 21D illustrate a scanning electron micrograph of the nano-patterned solar cell of the nanopattern 4 solar cell shown in Fig. 6. Fig. 22 shows an electron micrograph of a nano-pattern thin film solar cell similar to the solar cell shown in Fig. 6. Fig. 23 is a view showing another scanning electron photo of a nano pattern thin film solar cell similar to the solar cell shown in Fig. 6. Figure 24 25 shows a simplified side view of a nanopatterned thin film solar cell embodiment having a nanostructure with a loosened surface. Figures 25 to 26 show scanning electron micrographs of a nano-patterned film layer having a nanostructure having a roughened surface. t embodiment; J. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT When compared with crystalline germanium (C-Si) in photovoltaic modules, thin film amorphous germanium (such as a-Si) has low cost and is generally Compatible with roll-to-roll processing (ie strip 6 201208103). However, a-Si based solar cells are generally subject to lower energy versus efficiency (PCE). For example, current a-Si based solar cells can have a conversion efficiency of between about 4.5 and 8.5%. Usually a ratio of about 10 is required. /. Larger PCEs can compete with commercially available solar cells (such as C-Si, GaAs, etc.). In addition, currently designed a-Si based solar cells are less stable than commercial C-Si solar cells. Although thin solar cells can be cost effective, they have lower efficiency and/or lower deposition rates. Therefore, its formation may involve a longer lag time for a film which can deposit even Ιμιη. Further, the thin film tantalum solar cell is similar to the solar cell 6 〇 and can only achieve an efficiency value of about 1%. In terms of production mode, this efficiency may even be reduced by many actual reduction factors. Therefore, the actual efficiency value may be only about 6 to 7%.
一些資源顯示以一合理成本來提供奈米結構材料的能 力可顯著地加強太陽能電池的效率。此概念係被論述於: Fontcuberta i Morral,Α.,R Roca i Cabarrocas等人之“以分 光橢圓量測法與核測量研究的多形矽薄膜之結構與氫含 量” Physical Review B Condensed Matter and Materials Physics 69(12): 125307/1-125307/10 (2004); Liao, X., W. Du 等人之“在p和i層中之奈米結構對非晶矽太陽能電池之性能 的影響。Physica Status Solidi C Current Topics in Solid State Physics 6(3): 696-699(2009) ; Pei,Z·,S.-T. Chang等人之“對 一非晶矽奈米線陣列太陽能電池之光伏打行為的數值模擬 UIEEE Electron Device Letters 30(12):1305-1307 (2009) ; A 201208103Some resources show that the ability to provide nanostructured materials at a reasonable cost can significantly enhance the efficiency of solar cells. This concept is discussed in: Fontcuberta i Morral, Α., R Roca i Cabarrocas et al. "Structure and Hydrogen Content of Polymorphic Thin Films by Spectroscopic Ellipsometry and Nuclear Measurement" Physical Review B Condensed Matter and Materials Physics 69(12): 125307/1-125307/10 (2004); Liao, X., W. Du et al. "The effect of the nanostructures in the p and i layers on the performance of amorphous tantalum solar cells. Phis, Z., S.-T. Chang et al. Numerical Simulation of Playing Behavior UIEEE Electron Device Letters 30(12): 1305-1307 (2009) ; A 201208103
Shih,H.-F.,S_-J· Hsieh等人之“使用一次波長結構的光碟之 光陷捕效果的改良” Applied Optics 48(25): F49-F54, (2009),它們的内容皆併此附送。 奈米結構可減少激發子的移行距離,並提供充分的光 吸收。且,具有奈米結構的a-Si層可有較高的穩定性。參 見Fontcuberta。使用一薄a_si層亦可減少沈積時間及/或 成本。 目前在該領域中,提供一奈米結構的太陽能電池是困難的途 徑。例如 ’(http://www.technologyreview.com/energy/24547/pagel/) Solasta使用微球微影術來形成一結晶金屬(鎳)的圖案,並在 頂上沈積碳奈米管(CNT)。但是,此方法缺乏對管柱尺寸的 控制’且一般會冗長地進行。在另一例中,Fan等人係在銘 基材上生長奈米柱。參見Fan等人之“在低成本且可撓之基 材上的三維奈米柱陣列光伏打裝置” Nature Materials, Vol. 8, 648-653 (2009),其内容併此附送。鋁模板可藉陽極化來 獲得。但是,這些方法通常是昂貴的,奈米結構的尺寸可 能難以控制且/或各層之間的介面會傾向不佳導致若與平 坦太陽能電池相較會有較低的PCE。因此,若相較於商業 上可用的太陽能電池,則為了製造而生長一奈米柱陣列會 太昂貴。 請參閱第1〜3圖,一奈米結構太陽能電池100可被使用 能提供一低成本選擇及較大穩定性的奈米壓印微影術,在 一高PCE以低成本來製成。通常,奈米結構太陽能電池100 的製造可包括低黏度之UV可固化的壓印流體及/或依需要 8 201208103 滴配的流體施配。流體的選擇和流體體積可依據一壓印模 板118的圖案密度。壓印模板118可形成一圖案化表面146具 有可成形材料134形成的奈米結構丨5〇和152等。非晶矽(a-Si) 嗣可被沈積在奈米結構150和152上。奈米結構150和152可 增加接觸的表面積。奈米結構150和152亦可被設計成有利 於光陷捕’其可增加吸收率而維持一較小的激發子移行距 離。 請參閱第1和2圖,光微影系統100可被用來在基材112 上形成一凸紋圖案。基材112可由硬的透明材料形成,包括 但不限於,聚對笨二曱酸乙二酯(PET),聚萘二曱酸乙二酯 (PEN) ’及/或類似物等。 基材112可被輕接於基材卡盤1丨4。如所示,基材卡盤 114是一真空吸盤。但該基材卡盤114可為任何卡盤,包括 但不限於,真空、栓型、溝型、靜電、電磁式等等。舉例 的卡盤係被揭述於No. 6,873,〇87美國專利中,其内容併此 附送。 基材112和基材卡盤114又可被階枱116支撐。階枱116 可提供沿該X,y和z軸的平移及/或旋轉運動。階枱116、基 材112和基材卡盤114亦可被置設在一底座(未示出)上。 與基材112間隔分開的是模板丨丨8。模板丨丨8可包含—本 體具有-第-面與一第二面’其一面具有一凸台12〇由之朝 向基材112伸出。凸台120上具有一圖案化表面122。又,凸 σ 120亦可稱為-模12〇。或者,模板118可被製成沒有凸台 120 〇 ° 9 201208103 模板118及/或模120可被由如下材料形成,包括但不限 於:熔凝的二氧化矽、石英、矽、有機聚合物、矽氧烷聚 合物、硼矽酸鹽玻璃、碳氟聚合物、金屬、硬化的藍寶石, 及/或類似物等。如所示’圖案化表面122包含由多數間隔 分開的凹部124及/或凸部126所界定的細構等,雖本發明的 實施例並不限於此等構形。圖案化表面】22可界定任何原始 圖案’其會形成一要被形成於基材112上之圖案的基礎。 模板118可被耦接於卡盤128。卡盤128可被構製為,但 不限於,真空 '栓型、溝型、靜電、電磁式,及/或其它類 似的卡盤型式。舉例的卡盤亦被揭述於No· 6,873,087美國 專利中’其内容併此附送。又,卡盤128可被耦接於壓印頭 130,而使卡盤128及/或壓印頭130可被構設成能方便模板 118的移動。 系統110可更包含一流體施配系統132。流體施配系統 132可被用來將可成形材料134(如可聚合化材料)沈積在基 材112上。可成形材料134可使用如下的技術配置於基材112 上,譬如滴配、旋塗、浸塗、化學蒸汽沈積(CVD)、物理蒸 汽沈積(PVD)、薄膜沈積、厚膜沈積等等。藉由依需要滴佈 的施配法能進行可變圖案密度的壓印,而最少化化學和機 械的浪費。此外’不需要特殊化的雙面旋塗器。藉由依需 要滴佈的施配法一般被認為比旋塗式沈積更乾淨。又,依 需要滴佈能達成一非常薄且實質上均一的殘留層厚度,如 後之更詳細描述。 可成形材料134可在一所需容積被界定於模丨22與基材 10 201208103 112之間之前及/或之後被沈積在基材112上,乃依設計考量 而定。可成形材料134可為具有該太陽能電池工業,及/或 須要一功能性奈米微粒的其它工業中之用途的功能性奈米 微粒。在一例中,可成形材料134可包含一單體混合物,如 在No. 7,157,036美國專利和No. 2005/0187339美國專利公 開案中所述者,該兩案内容皆併此附送。或者,可成形材 料134可包括,但不限於,太陽能電池材料,及/或類似物 等。 請參閱第1和2圖,系統110可更包含能源138被耦接成 可沿著路徑142來導引能量140。壓印頭130和階枱116可被 構設成能將模板118和基材112定位於路徑142中。系統110 可被處理器154規制而與階枱116、壓印頭130、流體施配系 統132 ’及/或能源138通訊,並能依一儲存於記憶體156中 之電腦可讀的程式操作。 該壓印頭130及階枱116的一或二者會改變模120與基 材112之間的距離來界定其間之一所需容積,其會被可成形 材料134填滿。例如,壓印頭130可施加一力於模板118而使 模120接觸可成形材料134。在該所需容積填滿可成形材料 134之後,能源138會產生能量140,例如紫外線輻射,使可 成形材料134固化及/或交鏈而順應於基材112之表面144和 圖案化表面122的形狀’在基材112上界定出圖案化層146。 圖案化層146可包含一殘留層148及奈米結構150和152等, 奈米結構150具有一厚度q,而殘留層有一厚度t2。 奈米結構150和152可改變尺寸及/或具有不同的形 201208103 狀,包括但不限於直線 '柱、孔、角錐或任何奇特的形狀。 細構高度-般可為至少大約l〇〇nm,或至少大約5斷m,或 至少大約1 μιη。 s玄產業内的奈米結構傾向於由碳奈米管柱及類似物等 所形成,因此複雜的結構物之提供通常會較昂貴。但是, 奈米壓印微影術能以低成本提供可調變性,而來提供最佳 化奈米結構之形狀的能力。就此,奈米結構15〇和152之大 小和形狀的設計可被構設成能最佳化太陽能電池1 〇〇。大小 和形狀的構設可以依據(1)針對奈米結構150及/或152之一 指定深度來最大化a-Si的體積之間距、形狀和縱橫比的選 擇;(2)最大化的光陷捕率;及/或(3)在钮刻製程之前及之後 的最大化穩定性。 第2B〜2E圖示出什用於太陽能電池1〇〇中之奈米結構 150和152的實施例等。請參閱第2B圖,其中示出奈米結構 150a和150b可被形成直線。直線150a和150b的長度及排列 (例如圖案)可提供穩定性。例如,直線150a與直線150b可以 實質上尺寸相似而彼此互呈角度地置設。如所示,直線150a 係相對於直線150b以一90度角置設。雖所示為一90度角, 但直線150a和150b可被以任何能提供穩定性的角度來設 置。 請參閱第2C圖’奈米結構150可包令—延伸部151及一 柱形成物153。延伸部151可為一會互接柱153等之實質上呈 直線的形成物。可擇地,一直線155可互接相鄰的柱153, 而在延伸部151、柱153和直線155之間形成一盒狀圖案 12 201208103 157。直線155可具有實質上小於延伸部151的尺寸。 奈米結構150和152的細構尺寸可依據一在蝕刻製程時 的預知尺寸縮減而被預先偏設。例如,第2D圖示出在蝕刻 之前和蝕刻之後一奈米結構150的十字圖案形成物。奈米結 構150可考量此縮減而被預先偏設。同樣地,如第2E圖中所 示’呈柱形成物的奈米結構150可如於此更詳細描述地考量 I虫刻時的尺寸縮減而被預先偏設。 上述的系統和製法亦可被應用於有關下列美國專利案 中的壓印微影製法和系統:No. 6,932,934,No. 7,077,992, Ν〇· 7,179,396,及No. 7,396,475等,其内容皆併此附送。一 卷至卷製法可被以該製法和工具的有限變化來發展。當使 用撓性基材時,該壓印枱能被併入一卷至卷系統中。而該 基材會被由一料卷退繞,然後以壓印圖案化,且最後被捲 收於另一料卷上。卷至卷製法是高產能的’並能以較低成 本操作。 睛參閱第3圖,在基材112上形成奈米結構150和152之 後,一透明的導電氧化物層(TC〇層)160可被置設在圖案化 層H6上。TCO層160可藉蒸發、CVD、濺射等來被沈積。 通常’ TCO層160可被以一低於200°C或小於底下層之劣化 溫度的目標溫度來沈積。 TCO層160可被由如下材料來形成’包括但不限於,銦 錫氧化物,氧化鋅,二氧化錫等。一般而言,用於TCO層 160的合格材料包含具有一高導電率兼具平衡的陽光透射 率的材料。TCO層160通常含有低片電阻率’例如大約 13 201208103 100ohm/sq或更小。TCO層160的厚度可在大約50nm至 250nm的範圍内。在圖案化層146上沈積TCO層160會形成一 前電極。 一活性層162可被沈積在TCO層160上。活性層162可為 一三層(p-i-n)的a-Si :即a-Si p層 16卜 a-Si本徵層 163,a-Si η層165。活性層162可被以PECVD、LPCVD、HWCVD或類 似方法來沈積。通常,活性層162可在大約200°C的溫度, 或者比底下圖案化材料之劣化溫度更低的溫度來被沈積。 底下的圖案化層146之奈米結構150和152等可消除一 般在薄膜太陽能電池設計中之“厚,’與“薄”的折衷妥協,並 分開電子的路徑與光子的路徑。例如,較厚的活性層162係 會有較多的入射光可被收集,且更多的自由電子能被產 生。但若增加厚度,則較少的自由電子可被有效地送出。 如於此所述之奈米結構150和152的置設與設計會提供一增 加的表面積,而最小化自由電子被送出的距離。 又,a-Si的劣化可取決於該本徵層163的厚度^例如, —厚度為100nm或更小的太陽能電池相較於一較厚尺寸者 通常不會有顯著的劣化。就此,本徵層163的厚度可被構製 成在大約80nm〜200nm的範圍内,p層161可被構製成在大 約5nm〜20nm的範圍内,且n層165可被構製成在大約5nm 〜40nm的範圍内。 圖案化層146的設計可被構製成能提供一高縱橫比以 增加活性層162的吸收能力而保持沈積厚度。縱橫比可在i 至3之間或可在1·〜 1 〇之間或者更多。在一例中,奈米结構 14 201208103 150的高度可在大約500nm〜lOOOnm或更大的範圍内。在另 一例中,間距可在大約500nm〜2μιη或更大之間,而奈米結 構150具有一由25nm至300nm或更大的寬度。 一後反射層16 4可被沈積在形成奈米結構太陽能電池 100的活性層162上。後反射層164可由如下材料形成,包括 但不限於,紹、銀及/或類似物等。一般而言,用於後反射 層164的合格材料會包含具有高度反射率和導電性的材 料。後反射層164可被使用包括蒸發、濺射、cVD等技術來 沈積。 後反射層164的厚度可被構製成能提供良好的導電 率’例如在一由30nm至200nm或更大的範圍内。此外,後 反射層164的厚度可被設計成能在環境攻擊時提供太陽能 電池100的保護。後反射層164可反射光至活性層162。此 外,後反射層164可藉由對應於其表面組織之尺寸及/或形 狀的電毁子效應來陷捕具有一特定波長範圍的光。 一抗反射層170可選擇地被置設鄰接於基材112(例如 沈積在基材112上)。抗反射層170可由具有抗反射性質而能 透射入射光的材料來形成。抗反射層17〇的厚度可在大約 10nm 〜200nm之間。 -緩衝層172(例如摻雜的氧化鋅)可相反於抗反射層 170被直接置設在太陽能電池10〇3上,如第3〜4圖中所示。 例如,緩衝層172可被設在後電極164與活性層162之間。緩 衝層Π2的厚度可被構製成薄得足以供接觸金屬的電聚子 效應並引致有_膜層中的應力,但厚得足以充分地阻擒 15 201208103 §亥等電洞(例如約在3〇nm〜100mn之間)。緩衝層172可幫助 收集電子’並防止原子擴散於二層164和162之間。此外, 第二緩衝層(如pc-Si)可被沈積附加於該a-Si p層來協助 收集電洞。 第4圖提供一第3圖所示之奈米結構太陽能電池1 〇 〇的 變化例,被示為奈米結構太陽能電池100a。奈米結構太陽 能電池l〇〇a相較於同樣的圖案化層146a可具有更多的活性 材料。通常,一第一TCO層160a可被沈積在基材112上。圖 案化層146a可被使用有關第1〜2圖所述的方法和系統來形 成於第一TCO層160a上。圖案化層146a的凹陷區域166可被 曝露於一除渣蝕刻中。一蝕刻製程(例如VUV除渣)可移除 在凹陷區域166的光阻來曝露160a ^該TCO層160a的曝露區 域可將電荷送出。光阻蝕刻可被以一低成本的方法進行, 例如VUV除渣法,其係與卷至卷的處理相容。 一第二TCO層160b及/或一金屬層(例如10nm的鈦)可被 沈積在圖案化層146a上。第二TCO層160b可協助傳導例如 位在頂端168及/或側壁174處之活性層162所產生的電荷。 TCO層160b可被構製成足夠地薄,俾可不會占用太大的空 間且實質上不會吸收入射光’而能提供相當良好的導電 性。活性層162嗣可被沈積在TCO層160b上。應請瞭解奈米 結構太陽能電池1〇〇(第3圖所示)的可擇性選擇亦可被併入 奈米結構太陽能電池100a的設計中。 第5圖示出第3圖所示的奈米結構太陽能電池100之一 變化例,被示為奈米結構太陽能電池100b。應請瞭解第3圖 16 201208103 中所示的奈米結構太陽能電池100之可擇性選擇亦可被併 入該奈米結構太陽能電池100b的設計中。 奈米結構太陽能電池1〇〇b大致係為奈米結構太陽能電 池100之一反向設計,而具有奈米結構150b的圖案化層146b 被形成於基材112a上。但’太陽能電池100b的基材112a不 必是透明的,因其不在陽光的路徑上。導電層164b係形成 於圖案化層146b上,然後是緩衝層172b’活性層162b和TCO 層160c。金屬接點167b可被形成於TCO層160c上。 第6圖提供第4圖所示的奈米結構太陽能電池l〇〇a之一 變化例,被示為奈米結構太陽能電池100c。應請瞭解第4圖 中所示之奈米結構太陽能電池1 〇 〇的變化例如奈米結構太 陽能電池100a可被併入奈米結構太陽能電池100c的設計 中。 奈米結構太陽能電池100c大致係為奈米結構太陽能電 池100a之一反向設計。概括而言,太陽能電池i〇〇c可包含 —導電層180及圖案化層146c形成於其上。該圖案化層146c 的殘留層可被蝕掉如前所述,而留下奈米結構15如等。緩 衝層172c、活性層162c和TCO層160c係形成於奈米結構丨5〇c 上,且金屬接點167可被形成於TCO層160c上。導電層18〇 可被由如下材料形成,包括但不限於,不生銹的銀或铭及/ 或一種塗覆玻璃或可塑性聚合物(如PET、PEN,或無機材 料例如黏土和陶瓷)的金屬,或其它導電材料等。 第7圖示出太陽能電池1 〇〇a和100c之一變化例,其中導 電層18 0的濕蝕刻可增加奈米結構丨5 〇的相對高度由h ^至 17 201208103 h。濕蝕刻可藉使用一酸性溶液而在導電層18〇中產生一凹 入形狀。濕蝕刻一般係為等向性的,並可在導電層18〇中具 有顯著的倒切放大開口區域等。但是,此倒切可被估計且 併入直線寬度中。在一例中,如第8圖所示,圖案化層146 可藉奈米壓印被沈積在導電層丨8〇頂上。圖案化層146可被 構製成具有一寬度實質上等於L i加倒切的尺寸(例如2 χ蝕 刻深度= 。一濕蝕刻層182可被沈積在導電層180 和圖案化層146之間。濕蝕刻層丨82與180相較可具有一快速 蝕刻速率及/或較佳的蝕刻斷面。於此,倒切會較劇烈且初 始直線或其它細構可比蝕刻後所留下的更大許多。一黏著 層可選擇地被需要,俾能對圖案化層146或導電層18〇或兩 者提供較佳的黏著。此外,一表面活性劑可被添加。考量 濕蝕刻時的倒切,該初始直線可被預設成較粗些,俾能在 蝕刻後造成一合理細的奈米結構150(例如線或柱)。 濕蝕刻可藉其低成本和與卷對卷製法相容來增加細構 高度及縱橫比。但蝕刻進入該導電層180中,或在其它情況 下蝕入非導電基材中’可不受限於濕蝕刻。假若合宜,其 它的蝕刻方法譬如乾蝕刻亦可使用。 如上有關第1和2圖所示,壓印微影術一般係包含將一 廓形圖案由模板118複印至位於模板丨18與基材丨12之間的 可成形材料134中。當壓印時,模板118與基材112的間距可 被減少,且可成形材料134會流動而順應於模板ιΐ8和基材 112的廓形。當模板118與騎112非常靠近在一起時,該可 成形材料134的流動通道是狹窄的,因此,流動會受拘限。 18 201208103 若可成形材料13 4係由低黏度材料所形成(例如具有低於1 〇 厘泊黏度的材料),則此情況能被改善。低黏度材料可供用 於一大約25nm或更小的流道之間。該流道的厚度通常會提 供殘留層148的厚度。由於變形流動的結果,具有一非零厚 度的殘留層148總會在壓印於可成形材料134中之後出現。 用以移除殘留層14 8之最普通的方法係進行一以電漿為基 礎的蝕刻製程。該等製程能夠定向性(即主要是垂向)蝕刻, 而使殘留層148可被移除,且奈米結構150的橫向尺寸只有 最小的改變。但電漿式蝕刻可能不適合於此所提供之電池 100〜100d的形成,因為某些因素譬如高成本、低產能,及 /或較低的壓力環境。 如一變化例,一真空紫外線(VUV)製程可被用來移除 在所述之太陽電池中的殘留層148及/或被以非壓印法形成 的底下有機物層。一般而言,VUV製程會在一控制成分的 氣體環境中將材料曝露於來自一光源的輻射。νυν的輕射 可為在大約120nm至190nm之間的波長。輻射可被使用一xe 準分子介電障壁放電燈來造成,其具有一在大約172nm波長 的尖峰強度,及一大約15nm FWHM的光譜帶寬。在一例 中,於该材料表面的輕射強度可為大約5至15〇nW/cm2。氣 體成为可包含至少95%的鼠和低於5%的氧。νυν製程亦可 被用於由非壓印方法所形成的圖案移除底下的有機物層。 VUV製程亦可被用來蝕刻無機材料。在蝕刻無機材料 時,氣體成分可由用於有機材料者被改變。例如,含氣的 氣體混合物可蝕刻例如銅和砷化鎵等材料。來見Li等人, 201208103Shih, H.-F., S_-J. Hsieh et al. "Improvement of the light trapping effect of a disc using a wavelength structure" Applied Optics 48(25): F49-F54, (2009), their contents are This is included. The nanostructure reduces the travel distance of the excitons and provides sufficient light absorption. Moreover, the a-Si layer having a nanostructure can have higher stability. See Fontcuberta. The use of a thin a_si layer also reduces deposition time and/or cost. Currently in the field, providing a nano-structured solar cell is a difficult route. For example, '(http://www.technologyreview.com/energy/24547/pagel/) Solasta uses microsphere lithography to form a pattern of crystalline metal (nickel) and deposits carbon nanotubes (CNTs) on top. However, this method lacks control over the size of the column' and generally proceeds lengthily. In another example, Fan et al. grew a column of nanoparticles on a substrate. See Fan et al., "Three-Dimensional Nanopillar Array Photovoltaic Devices on Low Cost and Flexible Substrates" Nature Materials, Vol. 8, 648-653 (2009), the contents of which are hereby incorporated. Aluminum stencils can be obtained by anodization. However, these methods are generally expensive, the size of the nanostructures may be difficult to control and/or the interface between layers may be less prone to result in a lower PCE if compared to a flat solar cell. Therefore, it would be too expensive to grow a nanocolumn array for manufacturing, as compared to commercially available solar cells. Referring to Figures 1 to 3, a nanostructure solar cell 100 can be used to provide a low cost option and a large stability of nanoimprint lithography, which is produced at a low cost in a high PCE. Typically, the fabrication of the nanostructured solar cell 100 can include a low viscosity UV curable imprint fluid and/or a fluid dispensed as needed. The choice of fluid and fluid volume may depend on the pattern density of an imprint template 118. Imprint template 118 can form a patterned surface 146 having nanostructures 〇5〇 and 152 formed by formable material 134, and the like. Amorphous germanium (a-Si) germanium can be deposited on the nanostructures 150 and 152. Nanostructures 150 and 152 increase the surface area of the contact. The nanostructures 150 and 152 can also be designed to facilitate light trapping, which increases the absorbance while maintaining a small exciton shift distance. Referring to Figures 1 and 2, photolithography system 100 can be used to form a relief pattern on substrate 112. Substrate 112 may be formed from a hard, transparent material including, but not limited to, poly(p-butylene phthalate) (PET), polyethylene naphthalate (PEN)' and/or the like. The substrate 112 can be lightly attached to the substrate chuck 1丨4. As shown, the substrate chuck 114 is a vacuum chuck. However, the substrate chuck 114 can be any chuck including, but not limited to, vacuum, plug, groove, electrostatic, electromagnetic, and the like. An example of a chuck is disclosed in U.S. Patent No. 6,873, the entire disclosure of which is incorporated herein by reference. Substrate 112 and substrate chuck 114 are in turn supported by stage 116. Stage 116 can provide translational and/or rotational motion along the X, y, and z axes. The stage 116, the substrate 112 and the substrate chuck 114 can also be placed on a base (not shown). Separate from the substrate 112 is a template 丨丨8. The template 8 may include a body having a - face and a second face having a boss 12 projecting therefrom toward the substrate 112. The boss 120 has a patterned surface 122 thereon. Further, the convex σ 120 may also be referred to as a -modulo 12 〇. Alternatively, the template 118 can be made without the bosses 120 〇° 9 201208103 The template 118 and/or the mold 120 can be formed from materials including, but not limited to, fused ceria, quartz, ruthenium, organic polymers, A siloxane polymer, a borosilicate glass, a fluorocarbon polymer, a metal, a hardened sapphire, and/or the like. As shown, the patterned surface 122 includes a thin structure or the like defined by a plurality of spaced apart recesses 124 and/or protrusions 126, although embodiments of the invention are not limited to such configurations. The patterned surface 22 can define any original pattern that will form the basis of a pattern to be formed on the substrate 112. The template 118 can be coupled to the chuck 128. Chuck 128 can be constructed, but is not limited to, vacuum 'plug type, groove type, static electricity, electromagnetic type, and/or other similar chuck type. An example of a chuck is also disclosed in U.S. Patent No. 6,873,087, the disclosure of which is incorporated herein. Also, the chuck 128 can be coupled to the stamping head 130 such that the chuck 128 and/or the stamping head 130 can be configured to facilitate movement of the template 118. System 110 can further include a fluid dispensing system 132. The fluid dispensing system 132 can be used to deposit a formable material 134, such as a polymerizable material, onto the substrate 112. The formable material 134 can be disposed on the substrate 112 using techniques such as dropping, spin coating, dip coating, chemical vapor deposition (CVD), physical vapor deposition (PVD), thin film deposition, thick film deposition, and the like. Imprinting of variable pattern densities can be performed by dispensing as needed, with minimal chemical and mechanical waste. In addition, there is no need for a special double-sided spin coater. The dispensing method by drip cloth as needed is generally considered to be cleaner than the spin-on deposition. Again, a very thin and substantially uniform residual layer thickness can be achieved as needed, as described in more detail below. The formable material 134 can be deposited on the substrate 112 before and/or after a desired volume is defined between the die 22 and the substrate 10 201208103 112, depending on design considerations. The formable material 134 can be a functional nanoparticle having utility in the solar cell industry, and/or in other industries where a functional nanoparticle is required. In one example, the formable material 134 can comprise a monomer mixture as described in U.S. Patent No. 7,157,036, issued to U.S. Pat. Alternatively, the formable material 134 can include, but is not limited to, solar cell materials, and/or the like. Referring to Figures 1 and 2, system 110 can further include an energy source 138 coupled to direct energy 140 along path 142. Imprint head 130 and stage 116 can be configured to position template 118 and substrate 112 in path 142. System 110 can be regulated by processor 154 to communicate with stage 116, stamping head 130, fluid dispensing system 132' and/or energy source 138, and can be operated by a computer readable program stored in memory 156. One or both of the stamping head 130 and the step 116 will change the distance between the die 120 and the substrate 112 to define a desired volume therebetween, which will be filled by the formable material 134. For example, the stamping head 130 can apply a force to the template 118 to contact the mold 120 with the formable material 134. After the desired volume fills the formable material 134, the energy source 138 generates energy 140, such as ultraviolet radiation, to cure and/or crosslink the formable material 134 to conform to the surface 144 of the substrate 112 and the patterned surface 122. The shape 'defines a patterned layer 146 on the substrate 112. The patterned layer 146 can include a residual layer 148 and nanostructures 150 and 152, etc., the nanostructure 150 has a thickness q, and the residual layer has a thickness t2. Nanostructures 150 and 152 may vary in size and/or have a different shape 201208103 including, but not limited to, a straight line 'column, hole, pyramid or any odd shape. The microstructure height may generally be at least about 10 nm, or at least about 5 m, or at least about 1 μm. The nanostructures in the smectic industry tend to be formed by carbon nanotube columns and the like, and thus the provision of complicated structures is generally expensive. However, nanoimprint lithography provides tunable denaturation at low cost to provide the ability to optimize the shape of the nanostructure. In this regard, the size and shape of the nanostructures 15 and 152 can be designed to optimize the solar cell. The size and shape configuration can be based on (1) specifying a depth for one of the nanostructures 150 and/or 152 to maximize the choice of a-Si volume spacing, shape and aspect ratio; (2) maximizing light trapping Capture rate; and/or (3) maximum stability before and after the button engraving process. 2B to 2E show an embodiment of the nanostructures 150 and 152 used in the solar cell 1 and the like. Referring to Figure 2B, it is shown that the nanostructures 150a and 150b can be formed into a straight line. The length and arrangement (e.g., pattern) of lines 150a and 150b provides stability. For example, the straight line 150a and the straight line 150b may be substantially similar in size and disposed at an angle to each other. As shown, the line 150a is disposed at a 90 degree angle with respect to the line 150b. Although shown as a 90 degree angle, the lines 150a and 150b can be set at any angle that provides stability. Referring to Figure 2C, the nanostructure 150 can be used to extend the portion 151 and a pillar formation 153. The extension portion 151 can be a substantially linear formation of a joint post 153 or the like. Alternatively, the straight line 155 may be interconnected with adjacent columns 153, and a box-like pattern 12 201208103 157 is formed between the extension 151, the post 153 and the line 155. The line 155 can have a size that is substantially smaller than the extension 151. The fine dimensions of the nanostructures 150 and 152 can be pre-biased in accordance with a predetermined size reduction during the etching process. For example, Figure 2D shows a cross pattern former of a nanostructure 150 before and after etching. The nanostructure 150 can be pre-biased in consideration of this reduction. Similarly, the nanostructure 150, which is shown as a pillar formation as shown in Fig. 2E, can be pre-biased in consideration of the size reduction in the case of insects as described in more detail herein. The above system and method can also be applied to the imprint lithography method and system in the following U.S. patents: No. 6,932,934, No. 7,077,992, Ν〇· 7,179,396, and No. 7,396,475, etc., the contents of which are hereby incorporated by reference. . A roll-to-roll method can be developed with limited variations in the process and tools. When a flexible substrate is used, the stamping station can be incorporated into a roll-to-roll system. The substrate is unwound from a roll, then patterned by embossing, and finally reeled onto another roll. The roll-to-roll method is highly productive and can operate at lower cost. Referring to Fig. 3, after the nanostructures 150 and 152 are formed on the substrate 112, a transparent conductive oxide layer (TC layer) 160 may be disposed on the patterned layer H6. The TCO layer 160 can be deposited by evaporation, CVD, sputtering, or the like. Typically, the TCO layer 160 can be deposited at a target temperature below 200 ° C or less than the degradation temperature of the underlying layer. The TCO layer 160 can be formed of materials including, but not limited to, indium tin oxide, zinc oxide, tin dioxide, and the like. In general, acceptable materials for the TCO layer 160 comprise materials having a high electrical conductivity and balanced solar transmittance. The TCO layer 160 typically contains a low sheet resistivity 'e. e.g., about 13 201208103 100 ohm/sq or less. The thickness of the TCO layer 160 can range from about 50 nm to 250 nm. Depositing the TCO layer 160 on the patterned layer 146 forms a front electrode. An active layer 162 can be deposited on the TCO layer 160. The active layer 162 may be a three-layer (p-i-n) a-Si: i.e., a-Si p layer 16 a a-Si intrinsic layer 163, a-Si η layer 165. The active layer 162 can be deposited by PECVD, LPCVD, HWCVD or the like. Generally, the active layer 162 can be deposited at a temperature of about 200 ° C or a temperature lower than the degradation temperature of the underlying patterned material. The nanostructures 150 and 152 of the underlying patterned layer 146 eliminate the "thick," and "thin" compromises typically found in thin film solar cell designs, and separate the path of electrons from the path of photons. For example, thicker The active layer 162 has more incident light that can be collected, and more free electrons can be generated. However, if the thickness is increased, less free electrons can be efficiently sent out. The placement and design of the meters 150 and 152 provides an increased surface area while minimizing the distance at which free electrons are sent. Again, the degradation of a-Si may depend on the thickness of the intrinsic layer 163. For example, the thickness is A solar cell of 100 nm or less generally does not have significant deterioration compared to a thicker size. Thus, the thickness of the intrinsic layer 163 can be configured to be in the range of about 80 nm to 200 nm, and the p layer 161 can be The composition is in the range of about 5 nm to 20 nm, and the n layer 165 can be configured to be in the range of about 5 nm to 40 nm. The design of the patterned layer 146 can be configured to provide a high aspect ratio to increase activity. The absorption capacity of layer 162 remains thick The aspect ratio may be between i and 3 or may be between 1 and 1 〇 or more. In one example, the height of the nanostructure 14 201208103 150 may be in the range of about 500 nm to 100 nm or more. In another example, the pitch may be between about 500 nm and 2 μm or more, and the nanostructure 150 has a width of from 25 nm to 300 nm or more. A rear reflective layer 16 4 may be deposited to form a nanostructured solar energy. The active layer 162 of the battery 100. The back reflective layer 164 may be formed of materials including, but not limited to, silver, silver, and the like. In general, acceptable materials for the back reflective layer 164 may include highly reflective Rate and conductivity material. The back reflection layer 164 can be deposited using techniques including evaporation, sputtering, cVD, etc. The thickness of the back reflection layer 164 can be configured to provide good conductivity 'eg, from 30 nm to In addition, the thickness of the back reflection layer 164 can be designed to provide protection of the solar cell 100 in the event of environmental attack. The back reflection layer 164 can reflect light to the active layer 162. Further, the back reflection layer 164 By corresponding to An electrical smash effect of the size and/or shape of the surface tissue traps light having a particular range of wavelengths. An anti-reflective layer 170 is optionally disposed adjacent to the substrate 112 (e.g., deposited on the substrate 112) The anti-reflective layer 170 may be formed of a material having anti-reflective properties and capable of transmitting incident light. The thickness of the anti-reflective layer 17A may be between about 10 nm and 200 nm. - The buffer layer 172 (eg, doped zinc oxide) may be reversed The anti-reflection layer 170 is directly disposed on the solar cell 10〇3 as shown in Figures 3 to 4. For example, the buffer layer 172 may be disposed between the rear electrode 164 and the active layer 162. The thickness of the buffer layer Π2 can be made thin enough to contact the metal's electro-converescence effect and cause stress in the _ film layer, but thick enough to sufficiently block the hole of 201208103 § hai (for example, 3〇nm~100mn). Buffer layer 172 can help collect electrons' and prevent atoms from diffusing between layers 164 and 162. In addition, a second buffer layer (e.g., pc-Si) may be deposited in addition to the a-Si p layer to assist in the collection of holes. Fig. 4 is a view showing a variation of the nanostructure solar cell 1 〇 shown in Fig. 3, which is shown as a nanostructure solar cell 100a. The nanostructure solar cell 10a can have more active material than the same patterned layer 146a. Typically, a first TCO layer 160a can be deposited on the substrate 112. The patterned layer 146a can be formed on the first TCO layer 160a using the methods and systems described in relation to Figures 1 through 2. The recessed regions 166 of the patterned layer 146a can be exposed to a desmearing etch. An etch process (e.g., VUV slag removal) removes the photoresist in recessed region 166 to expose 160a. The exposed region of TCO layer 160a can deliver charge. Photoresist etching can be performed in a low cost manner, such as VUV slag removal, which is compatible with roll-to-roll processing. A second TCO layer 160b and/or a metal layer (e.g., 10 nm of titanium) may be deposited on the patterned layer 146a. The second TCO layer 160b can assist in conducting, for example, the charge generated by the active layer 162 at the top end 168 and/or sidewall 174. The TCO layer 160b can be configured to be sufficiently thin that it can provide substantially good conductivity without taking up too much space and substantially not absorbing incident light'. The active layer 162 can be deposited on the TCO layer 160b. The optional selection of the nanostructured solar cell 1 (shown in Figure 3) should also be incorporated into the design of the nanostructure solar cell 100a. Fig. 5 shows a variation of the nanostructure solar cell 100 shown in Fig. 3, which is shown as a nanostructure solar cell 100b. It should be noted that the optional selection of the nanostructure solar cell 100 shown in Fig. 3 201208103 can also be incorporated into the design of the nanostructure solar cell 100b. The nanostructure solar cell 1〇〇b is roughly designed as one of the reverse structure of the nanostructure solar cell 100, and the patterned layer 146b having the nanostructure 150b is formed on the substrate 112a. However, the substrate 112a of the solar cell 100b is not necessarily transparent because it is not in the path of sunlight. Conductive layer 164b is formed over patterned layer 146b, followed by buffer layer 172b' active layer 162b and TCO layer 160c. Metal contacts 167b can be formed on the TCO layer 160c. Fig. 6 is a view showing a variation of the nanostructure solar cell 10a shown in Fig. 4, which is shown as a nanostructure solar cell 100c. It should be noted that changes in the nanostructure solar cell 1 〇 shown in Fig. 4, for example, the nanostructure solar cell 100a can be incorporated into the design of the nanostructure solar cell 100c. The nanostructure solar cell 100c is roughly a reverse design of the nanostructure solar cell 100a. In summary, the solar cell i〇〇c can include a conductive layer 180 and a patterned layer 146c formed thereon. The residual layer of the patterned layer 146c can be etched away as previously described, leaving the nanostructures 15 as such. The buffer layer 172c, the active layer 162c, and the TCO layer 160c are formed on the nanostructure 丨5〇c, and the metal contacts 167 may be formed on the TCO layer 160c. The conductive layer 18 can be formed of materials including, but not limited to, silver that does not rust or a metal that is coated with glass or a plastic polymer such as PET, PEN, or inorganic materials such as clay and ceramics. , or other conductive materials, etc. Fig. 7 shows a variation of the solar cells 1a and 100c in which wet etching of the conductive layer 18 0 increases the relative height of the nanostructures 丨5 由 from h ^ to 17 201208103 h. Wet etching can produce a concave shape in the conductive layer 18 by using an acidic solution. The wet etch is generally isotropic and may have a significant undercut enlargement opening area or the like in the conductive layer 18A. However, this incision can be estimated and incorporated into the line width. In one example, as shown in FIG. 8, the patterned layer 146 can be deposited on top of the conductive layer 借8 by nanoimprint. The patterned layer 146 can be configured to have a width substantially equal to the size of the L i plus the undercut (eg, 2 χ etch depth = a wet etch layer 182 can be deposited between the conductive layer 180 and the patterned layer 146). The wet etch layer 82 can have a fast etch rate and/or a preferred etch profile compared to 180. Here, the undercut can be severe and the initial straight line or other fine structure can be much larger than that left after etching. An adhesive layer is optionally required to provide better adhesion to the patterned layer 146 or the conductive layer 18 or both. Further, a surfactant may be added. Considering the reverse cut during wet etching, The initial straight line can be preset to be thicker, which can result in a reasonably fine nanostructure 150 (such as a wire or column) after etching. Wet etching can be increased by its low cost and compatibility with the roll-to-roll method. The height and aspect ratio are formed, but etching into the conductive layer 180, or otherwise etched into the non-conductive substrate, may not be limited to wet etching. If appropriate, other etching methods such as dry etching may also be used. Imprint lithography as shown in Figures 1 and 2 Typically, a profile pattern is copied from the template 118 to a formable material 134 between the template 丨 18 and the substrate 丨 12. When embossed, the spacing of the stencil 118 from the substrate 112 can be reduced and The forming material 134 will flow to conform to the profile of the template ι 8 and the substrate 112. When the stencil 118 is very close to the ride 112, the flow path of the formable material 134 is narrow and, therefore, the flow is limited. 18 201208103 This can be improved if the formable material 13 4 is formed from a low-viscosity material (for example, a material having a viscosity of less than 1 〇 centipoise). A low-viscosity material is available for a flow of about 25 nm or less. Between the channels, the thickness of the runner will generally provide the thickness of the residual layer 148. As a result of the deformation flow, the residual layer 148 having a non-zero thickness will always appear after being imprinted in the formable material 134. The most common method of removing the residual layer 14 8 is to perform a plasma-based etching process which is capable of directional (i.e., predominantly vertical) etching, allowing the residual layer 148 to be removed, and the nano Landscape of structure 150 There is only minimal change in inch. However, plasma etching may not be suitable for the formation of batteries 100 to 100d provided herein because of certain factors such as high cost, low throughput, and/or low pressure environment. As a variant, A vacuum ultraviolet (VUV) process can be used to remove the residual layer 148 in the solar cell and/or the underlying organic layer formed by non-imprinting. In general, the VUV process will be in a controlled composition. The material is exposed to radiation from a source in a gaseous environment. The light radiation of νυν can be a wavelength between about 120 nm and 190 nm. The radiation can be caused by using an xe excimer dielectric barrier discharge lamp, which has an The peak intensity at 172 nm and a spectral bandwidth of approximately 15 nm FWHM. In one example, the light intensity at the surface of the material can be about 5 to 15 〇 nW/cm 2 . The gas becomes at least 95% rat and less than 5% oxygen. The νυν process can also be used to remove the underlying organic layer from the pattern formed by the non-imprint method. VUV processes can also be used to etch inorganic materials. When the inorganic material is etched, the gas component can be changed by those used for the organic material. For example, a gas-containing gas mixture can etch materials such as copper and gallium arsenide. See Li et al., 201208103
Appl· Phys_ A,Vol 57 p 457 1993, Streller等人,八卩卩1.811比Appl· Phys_ A, Vol 57 p 457 1993, Streller et al., gossip 1.811 ratio
Sci. vol· 109/110, p 442 1997 ;其内容併此附送。矽層可在 含有氟化物例如XeF2的氣體混合物中被蝕刻。參見Streller 等人 ’ Appl. Phys. Lett, vol 69 p 3004 1996 ’ 其内容併此附 送。在某些實施例中,νυν製程可後續一液體處理步驟來 進一步改良蝕刻成果。例如Sic可藉首先曝露於VUV輕射,Sci. vol. 109/110, p 442 1997; its contents are hereby attached. The ruthenium layer can be etched in a gas mixture containing fluoride such as XeF2. See Streller et al. 'Appl. Phys. Lett, vol 69 p 3004 1996 ’ for details. In some embodiments, the νυν process can be followed by a liquid processing step to further improve the etching results. For example, Sic can be exposed to VUV light first.
嗣浸入一含有HC1和Η2〇2的水溶液中,又再浸入一含有HF 的水溶液中來被蝕刻(見Zhang等人,Appl. Phys. A. vol 64, p 367, 1997^在此例中,該等水溶液會協助除去νυν曝光 產物。2011年1月26曰申請之No. 13/014,508美國專利申請 案,内容併此附送,乃示出一用於vuv處理的舉例系統和 方法等。 VUV製程的產能可被許多因素決定,包括基材表面強 度,材料移除速率,材料厚度等等。因此,其可能較好是 最小化要被移除的材料之厚度,因如此可増加該vuv製程 的產能。對—壓印微影製法而言,此可能需要以-非常薄 的殘留層來壓印。但以—非常薄的殘留層來壓印,所有的 圖案類型-般都不是直進的。例如,料殘留層變得非常 4則穿過-亥通道的流動會愈加地受拘限,如前所述。此 流動的拘限可藉最小化在該殘留層水平處的ϋ案之磨擦而 被最小化。 在例中如第8八圖中所示,奈米結構圖案146可被設 計呈一稀疏的_,即奈米結構丨_寬度係實質地小於奈 米、σ構之間的距離丨5 2,且在某些情況下會小於該距離2〜3 20 201208103 倍。在此圖案中’殘留層148的厚度t2可以實質上較大。要 移除殘留層U8時,圖案化層146可被曝露於wv製程來消 除殘留層148,如第_中所示。但是,其可能要費一段長 時間,因k較厚,且其產能可能不會高。 請參閲第9A和9B圖,一對該製法的改良可包括形成圖 案化層146具有附加的階狀圖案147鄰接於奈米結構.以 界定出-甚至更薄的殘留層148a覆蓋著圖案化層⑽之— 小區域⑽。對底下基材112的接觸可藉只移除在圖案化層 146之區域149處的殘留層14如來達到,如第ιΐβ时所示, 而非該殘留層的整個厚度vvuv製㈣錄會因減少被移 除的材料之厚度而改善。此外’ vuv曝露時間會減少而最 Η匕VUV曝咸在奈米結構15〇上的有害作用。例請參閲第9C 圖’奈米結構15〇等可被形錄,如毫圓圈所示,並補充接 觸孔149等’如暗圓圈所示。在此設計中,接觸孔⑷的區 域密度可為足以減少接觸電阻,但會提供—非常薄的殘留 層148a來被VUV製程容易地移除。 。月參閱第13〜18圖,於此所述之太陽能電池的TC〇層 160及/或導電層18〇可選擇地被使用有關第 1和2圖的方法 與系統來圖案化。—組織化表面具有組織細構15Ga和152a 等可減少光反射。又,一在導電層18〇上之良好界定的圖案 可增加光散射’並加強電漿子效應而增加光陷捕。最佳的 組織細構150a〜152a之尺寸(如形狀、深度、縱橫比)可相對 於第3〜6圖中所提供的奈米結構150和152等之尺寸來改變 (例如可為非稀疏的及/或縱橫比可更低甚多,例如大約1 : 1: 21 201208103 或甚至更低)。 導電層180的圖案化可激發在該金屬/半導體(如金屬 /Si,金屬/ITO,金屬/ZnO等)介面處的表面電漿子(sp)效 應’並有效率地陷捕/導引光至活性層162。就此,一較薄 的活性層162可以足夠用於光吸收及/或光陷捕,而此“較薄,, 膜可包含譬如較佳電荷的收集’較少再結合及較短的激發 子遷移等電特性。此外,一較薄膜可減少該暗電流,增加 開放電路電壓等等。 該SP效應一般會施加於介面,但透過指數的衰減可能 影響至數百奈米。在具有所設計形狀的金屬介電質介面(例 如Ag/Si〇2)處,一諧振波長的光場強度增強可能高達1〇〇 倍。該t皆振波長能藉改變間距尺寸和金屬/介電質材料而被 調諧。入射的太陽光流可被有效地迴轉最多至9〇。,且光可 被沿著該太陽能電池的橫向吸收,其具有的尺寸量級大於 垂直長度(活性層厚度)。例如,在一模擬中,具有一大約 180nm間距的奈米圖案細構150a ’以Ag作為後反射層並有 ΓΓΟ圖案及a-Si層者,顯示一98.8倍的最大增強會在8〇〇nm 的諧振波長被達到。雖當該後波長由尖峰值(如8〇〇nm)移轉 時,該增強係數會迅速地衰減,但在可見光和近紅外光區 (由400至lOOOnm)的整體增強係非常顯著,在9〇〇nm為66 倍,在lOOOnm為15倍,在700nm為22倍,在500nm為6倍。 對一TCO層而言,奈米圖案細構的規格可被依據太陽能電 池的結構,活性層的光學性質和厚度,所須的光諧振波長 (例如串接太陽能電池且有不同的帶隙可吸收並轉化太陽 22 201208103 光的不同部份)而來構製。 在第3〜6圖中所示的太陽能電池100〜100c更可包含 TCO層160的組織化細構150a和152a等,及/或導電層180以 更增加PCE。此可包含一或更多附加的步驟,藉添加圖案 化的TCO層160、後反射層164,或兩者,而來形成太陽能 電池100〜100c。 第10A〜10C圖示出一實施例,其中沈積活性層162的 稀疏圖案之形成,及TCO層160或導電層182的進一步圖案 化,可在單一的微影步驟中完成。例如,模板118(示於第1 圖中)的設計可提供用以壓印具有組織細構150a和152a及奈 米結構150d的功能材料134,如第10A圖中所示。奈米結構 150d及組織細構150a和152a的殘留層可被以VUV或其它製 法移除。濕蝕刻或其它適當的蝕刻法會被進行來由溝槽 152a等蝕刻曝露的導電層180d,如第10B圖中所示。一第二 除渣蝕刻製程可移除可成形材料(即光阻)以供後續的沈 積,如第10C圖中所示。如此’增加的PCE能被以最小的成 本來獲得。 第11圖不出 ^奈米結構太1¼能電池的貫施例1 〇〇d,其 設計類似於太陽能電池l〇〇c(示於第6圖中),而添加一圖案 化的導電層18〇d。除了奈米結構150d外,奈米圖案化的導 電層180d含有組織細構150a和152a的區域,可藉由SP和表 面散射來協助陷捕更多的光,而導致一甚至比太陽能電池 100c更高的PCE。 奈米結構的其它組織化亦可被進行以增加PCE。例 23 201208103 如,形成奈米結構的表面能被處理成呈現增大的粗度。此 粗糙的表面會提多增加的光散射和陷捕,因而有更改良的 PCE。§亥粗縫組織能被隨意化,且該細構尺寸可為實質上 小於主要圖案細構尺寸。該粗糙組織能被併入於該壓印模 板中,而使該粗糙能直接由該模板被轉移至所壓印部的光 阻。或者,該粗糙可被以乾蝕刻來造成。當乾蝕刻時,在 某些條件下,聚合物或其它材料能被沈積在該等樣品上而 形成一微罩。此微罩效果能引致蝕刻的表面粗糙。第26圖 示出一乾蝕刻的玻璃具有粗表面5 5丨a在規則圖案化(較大) 的角錐奈米結構550a上。 該粗糙亦能藉在該模板上或直接在該太陽能電池圖案 化表面上沈積#膜來被造成。在某些情況下,被沈積的薄 膜可為粒狀的:因此會造成祕。第27圖為-SEM影像示 出粗ITO薄膜沈積在具有角錐奈求結構5働的圖案化玻璃 基材上,而造成袓表面551be第12、13和14八〜14B圖示出 可用於太陽能電池之奈米結構的更多實施例,特別是角雜 奈米結構25G ’其已被詳細地示出具有改良的光陷捕特性。 13#〇ΐ4Αϋ * ϋ 以間距p排列成直列和橫排f,而在相鄰的角錐基部之間有 距離d。高度h 一般可為至少大約lOOnm,或至少500nm,或 至少1μΐΏ的高度。在某些態樣中,該高度h—般可在150〜 lOOOnm的範圍内。間距p一般可為至少大約2〇〇nm,或至少 大約Ιμιη,或至少2nm。在某些態樣中,該間距?_般可在 3〇〇nm至600nm的範圍内。角錐奈米結構25〇具有方形基 24 201208103 部,如所示,但該等基部同樣地可為其它多邊形或圓形。 在表面152與角錐奈米結構的錐面154之間的角度0 一般可 為至少100,或至少135。,或至少15〇。,或至少170。。在某 些態樣中,角度0可在11〇至150度的範圍内。此外,角錐 奈米結構250的整個細構尺寸乃可依據在蝕刻及/或配合添 加層及/或壓印製程中之一預知的尺寸縮減而被預先偏設。 如在第14A〜14B圖中所示,在表面252與角錐基部之 間的交會處可被圓弧化。此圓弧化可被以多種方法來達 成,包括藉由蝕刻及/或壓印技術等,如後之進一步描述。 此圓孤化形態對覆層於該基材上來組成該太陽能電池的添 加材料之穩定性和改良的性能會很重要。尤其是,覆層於 具有尖角之圖案化基材上的導電材料容易應變和破裂,故 會損壞該導電材料並減低電池性能。藉著圓弧化該表面與 角錐基部的交會處’導電材料能被沈積在該圖案化表面 上’並會遍及該圖案保持其整體性,而導致改良的性能。 請參閱第15圖,太陽能電池200能在角錐奈米結構250 形成於基材212之後’如前所述地被形成。第一導電材料264 可被沈積在基材212上。第一導電材料264可由如下材料形 成’包括但不限於,鋁、銀或類似物等。一般而言,用於 導電材料264的合格材料包含具有高反射率和導電性的材 料。該導電材料可被直接塗敷於基材212,或可擇地一黏著 層(未示出)可被敷設於基材212與導電材料264之間,來促進 基材212與導電材料264間的黏著。適用於黏著層的材料包 括但不限於Ni和Cr。黏著層和導電材料264可被使用包括蒸 25 201208103 發、濺射、CVD等技術來沈積。 導電材料264的厚度可被構製成能提供良好的導電 性,例如在一由30nm至200nm或更大的範圍内。此外,導 電材料264的厚度可被設計成能提供太陽能電池2〇〇對抗環 土兄劣化的保遵。導電材料可反射光至活性層266。此外,導 電材料264可藉由對應於其表面組織的尺寸及/或形狀之電 聚子效應來陷捕具有一特定波長範圍的光。 一半導體層262可被沈積在導電材料264上。半導體層 262可為一三層(p-i_n)的a_Si層:a_Si ?層261,a Si本徵層 263,a_Si n層265,而該p層典型被定向為最靠近光源。半 導體層262可被以PECVD ’ LPCVD,HWCVD法等來沈積。 一般而言,半導體層262可在大約200°C或比底下圖案化材 料的劣化溫度更低的溫度被沈積。其它可用於薄膜太陽能 電'也的適當半導體材料亦可被使用,包括但不限於微結晶 ^ 奈米結晶碎,蹄化録,及銅姻嫁砸化物。 一緩衝層(如摻雜的氧化辞)(未示出)可被選擇地設在 第—導電材料264與半導體層262之間。緩衝層的厚度可被 構製成薄得足夠接觸金屬的電漿子效應,並引致有關該膜 的應力’但厚得足以充分地阻擋電洞(例如大約3〇nm〜 l〇〇nm)。該緩衝層可協助收集電子,並防止原子在264與262 之間擴散。其它的分級或緩衝層可被添加於該p-i_n接面以 改良其性能。範列包括a-Si窗層和pc-Si(或nc-Si)摻雜層。 —第二導電材料260可被設在半導體層262上。當第二 導電材料是最靠近於光源時,該第二導電材料可為一透明 26 201208103 的導電氧化物層(TCO層)。第二導電材料260可被以蒸發、 CVD、濺射法等來沈積。通常,第二導電材料260可被以— 低於底下層之劣化溫度的樣品溫度來沈積。 第二導電材料260可被以如下材料形成,包括但不限 於,銦錫氧化物、氧化鋅、二氧化錫等。可撓的導電層及, 或合併的材料可被用薄膜太陽能電池,包括石墨物基的導 電層及/或細金屬柵格。一般而言,導電材料260的合格材 料包括具有一高導電率和平衡於陽光之透射率的材料。第 二導電材料260通常含有低片電阻率,例如大約100〇hm/sq 或更小。第二導電材料260的厚度可在大約5〇11111至25〇11111的 範圍。沈積第二導電材料260時半導體層262會形成一電極。 該陣列式角錐奈米結構之設計可被構製成能提供一高 縱橫比,以增加半導體層162的吸收能力,而保持沈積厚 度。縱橫比可在1〜10或更多之間。在一例中,奈米結構25〇 的高度可在大約500nm〜800nm或更多之間的範圍内。在另 一例中,間距可在約500nm〜1.5μιη或更大之間,且奈米結 構250具有一寬度由25nm或300nm或更大。 第16圖提供一第15圖中所示之奈米結構太陽能電池 200的變化例,被示為奈米結構太陽能電池28〇。奈米結構 太陽能電池280概為奈米結構太陽能電池2〇〇之一反向設 計,被設計成可轉化來自一初始在該基材的相反側之光源 的光。基材272有圖案化層276形成於其上,乃包含圖案化 的角錐奈米結構280和殘留層248。或者該圖案化層本身可 被使用典型的蝕刻或其它圖案化技術來轉移至一基材中。 27 201208103 圖案化層276能被以如前所述的壞印微影技術使用一可聚 合化材料(亦稱為壓印光阻)來形成,以產生一成形圖案具有 一薄殘留層在該等圖案細構之間。歹走留層⑽可具有一小於 5〇ηηι或小於25nm的厚度。一最小的殘留層兼能減少整體材 料消耗成本而提供生產日㈣絲效益,以及減低光的吸收 而增加轉換效率。 基材272可由包括玻璃及/或1明聚合物之透明材料 所形成。圖案化層276可為-透明聚合物。在某些情況下, 可能較好是使用-含賴聚合物作為該壓印光阻。一旦固 化後’該圖案化層可被進行氧氣處理來形成—似玻璃的上 表面層。此-上表面層本身可有利地作為—用於薄膜太陽 月b電池構件之進一步沈積的介面。其亦會對所形成的圖案 添加強度和穩定性,而在沈積條件和較低的出氣量(可藉預 先烘烤或氧化)下提供較大的穩定性。此外,其會提供一對 杬水氣的密封以保護該a-Si對抗環境的劣化。該上表面層之 此玻璃狀化能在造成用以壓印添加圖案的工作模板時更為 有利。 第一導電材料290係沈積在圖案化層276上,且可為一 透明的導電氧化物(tco)層。半導體層292係沈積在第一導 電材料上,且亦可為一三層(p-i-n)的a_si: a_si p層292,a-Si 本徵層293,a-Si η層295。在本例中,該1?層可被形成最靠 近於圖案化層276和該光源的預定走向,而丨層293和11層295 後續地形成。第二導電材料294係形成於該半導體層292 上,且可由如下的材料形成,包括但不限於,不生銹的銀 28 201208103 或鋁,及/或一被覆玻璃或可塑性聚合物(如PET、PEN)或無 機材料如黏土和陶瓷)的金屬’或其它具有反射性質的導電 材料等。一緩衝層(即ZnO)可被沈積在292與294之間來改良 性能。 如前所述,該形成的圖案化層及/或奈米結構更可被處 理以增加表面粗度來提供更多的光散射和陷捕,而得更改 良PCE。第24〜25圖示出具有粗化表面之角錐奈米結構的 a-Si : Hp-i-n太陽能電池。第25圖之太陽能電池200a的基本 構態係類似於第15圖的太陽能電池200。壓印層212係形成 於基材214上,且嗣會接受一如所述的粗化處理,以對角錐 奈米結構280a提供粗化表面281a。金屬層264a、ZnO緩衝層 262a,a-Si : Η層(由底部為n-i-p層等)266a和TCO頂電極層 260a,嗣會被覆層在該基材上來形成太陽能電池200a。類 似地,第24圖示出太陽能電池270a,類似於第14圖的太陽 能電池270。壓印層276a係形成於基材272a上,並同樣地接 受一如上述的粗化製程,以對角錐奈米結構250a提供粗化 表面251a。TCO層290a,a-Si : Η層(由底部為p-i-n層 等)296a,ZnO緩衝層292,和金屬電極264a,嗣會被覆層於 該基材上來形成太陽能電池270a。一具有角錐奈米結構的 奈米結構太陽能電池可被以第17和18圖之流程圖中所示的 製法1100來製成。第17圖之流程圊示出一製法可供形成一 壓印模板用以將一陣列的角錐奈米結構壓印在一所需的基 材中。在第一步驟11〇2時,一奈米壓印圖案化製程會被用 來在石夕晶圓上形成由一柵格或一柱之陣列構成的聚合物圖 29 201208103 案化層。该柵格或柱陣列會接受一異向性濕蚀刻(如 KOH),而在該矽中形成一倒反的角錐奈米結構陣列(步驟 1104)。在步驟1106時,該倒反的陣列則會被用來在一玻璃 基材上反向壓印一角錐奈米結構的圖案化層,其嗣會在步 驟1108時被RIE蝕刻於該基材中。此二步驟將會在步驟111〇 和1112時重複,以將該倒反的角錐奈米結構陣列反向壓印 於一第二玻璃基材中。在步驟1114時,該第二玻璃基材可 被選擇地進行一被緩衝的氧化物蝕刻(B〇E)。該boe蝕刻會 圓弧化該基材表面和倒反角錐奈米結構間的交會處。具有 該倒反角錐陣列的第二玻璃基材嗣可用作一壓印模板以供 圖案化功能性光阻材料(即一可成形材料),而使該等角錐奈 米結構形成於一選擇的基材上,包括玻璃、聚合物、金屬 等之撓性基材’其係被使用於製造薄膜太陽能電池者《被 壓印的材料將會具有角錐奈米結構,且在該基材表面與角 錐基部之間有圓弧化的交會處。 一用於在一功能性光阻中壓印倒反角錐奈米結構之具 正向角錐奈米結構的壓印模板能被簡單地藉省略步驟1110 和1112而輕易地造成。 在第18圖中的流程圖示出製法1140可供使用一依據第 17圖之製法所製成的模板來形成一如第15圖的太陽能電 池。在步驟1146時,一聚合性材料,即壓印光阻會被沈積 在一適當的基材上。就薄膜太陽能電池而言,此等適當的 基材包括玻璃、撓性玻璃、塑膠、和金屬基材等。在步驟 1148時,一如上所述的壓印模板會被用來將一角錐奈米結 30 201208103 構圖案轉移至該材料中,該圖案可為正向或反向的,乃取 決於該壓印模板的調向。在步驟1152時,一例如Ni的黏著 層會被以濺射法形成於該圖案化的聚合性材料上,接著在 步驟1154時,再濺射一反射性電極材料,例如Ag,於該黏 著層上。在步驟1156時,一例如ZnO的緩衝層會被濺射於 該電極層上。在步驟1158時’ PECVD沈積會被用來形成一 n-i-p的a-Si層。在步驟1160時’ 一第二導電材料’譬如一透 明導電氧化物(TCO)層會被藏射於該n-i-p a-Si層上。 應請瞭解,第16圖的太陽能電池能夠依據上述製法, 只要倒反該第一和第二導電層的定位,及倒反該pECVD製 程來形成一p-i-n的a-Si層,而被製成。 當使用壓印微影術來造成具有壓印角錐奈米結構的奈 米結構太陽能電池時,可能需使所設計的壓印模板能補償 忒聚合物材料在固化時會發生的收縮。第19A〜19C圖示出 該收縮在典型情況下的影響,模板31〇包含倒反倒反角錐奈 米結構圖案350具有錐面352等,及一相對於模板表面似的 /未度Zi模板3〇〇係被设成相對於基材Η],且聚合材料 係成液體被沈積在該騎表面344上。若模板3職移向基 =312 ’該模板會接觸聚合材料334,其會填滿該角錐奈米 。構355圖案’如第1S>B圖中所示然後會固化並與該模板 :離:如第19C圖所示,而產生奈米結構角錐354等。收縮 典錢非所有的尺寸都是-致的4第19C圖中所示,在垂 直轴方向由21至22的收縮,典型為9〜㈣左右,但通 過及角錐的錐面354亦會有不-致的收縮,而會產生凹曲錐 31 201208103 面356。 為達到一具有一所需高度乙,和較平直錐面之所需的角 錐奈米結構,乃可能必須造成一壓印模板其具有倒反的角 錐奈米結構會有一對應的較大深度Z3 ’且錐面或側壁係對 應於凹曲的角錐面等,如在第20A〜20C圖中所示。模板31〇 如第20A圖中所示,係被設計成具有倒反角錐奈米結構圖案 356,而有深度&和凹曲錐面354等,及一相對於模板表面 322的深度Ζι。當充填時,未固化的聚合材料334最初具有 對應的尺寸,如第2〇B圖中所示。一旦固化後,所造成的角 錐奈米結構會具有所需的形狀,如第20C圖中所示,而在z 軸的收縮會將其高度由Z3減至Z! ’且最初的凹曲角錐面會 收縮成較平直的錐面352。 (範例) 具有角錐奈米結構的奈米圖案太陽能電池係被使用所 述的製法來製成,且如第21〜23圖_所示。一壓印模板會 先被形成,如第21A〜21D圖中所示。一石夕晶圓會導先被以 一聚合性材料,即壓印光阻來壓印,而具有一壓印柵格陣 列402其有一650nm的間距,如第24A圖中所示。該圖案會 被使用KOH濕蝕刻來將角錐奈米結構4〇4蝕刻於石夕中,而具 有分別為大約350nm和650nm的高度及間距尺寸,如第2ib 圖中所示。該圖案會被壓印於一玻璃基材上的光阻中來形 成角錐奈來結構406(第21C圖)’接著藉反應離子敍刻(rie) 將該圖案轉移至該玻璃基材中’而形成角錐奈米結構45〇, 如第21D圖中所示。該製程嗣會被重複而在一第二玻璃基材 32 201208103 上造成該角錐奈米結構的倒反圖案,其嗣會接受緩衝氧化 物钱刻大約1分鐘,以圓弧化該模板表面與該模板的倒反角 錐基部之間的邊緣。如先前所述。所形成的模板嗣會被用 來形成第23圖中所示的太陽能電池。 第22圖的太陽能電池係被使用一如前所述但具有一大 約180nm高度和大約530nm間距的類似模板所形成。第22圖 示出一太陽能電池設有角錐奈米結構450b等具有上述尺寸 (大約180nm高和約530nm間距),且其會被乾触刻於一玻璃 基材中。此相當於一圖案化表面具有大約15%的該表面包 含該等角錐奈米結構。Ni會被濺射於該圖案化表面上以形 成一大約1 Onm的Ni黏著層。Ag嗣會被濺射於該黏著層上以 形成一大約1 〇〇nm的第一反射導電層464b,然後藉藏射ZnO 來形成一大約40nm的ZnO緩衝層於該Ag導電層上。一a-Si 層462b嗣會被以n-i-p a-Si的PECVD沈積法來沈積在該緩衝 層上,而形成大約19nmn層,160nmi層和12nmp層的n-i-p a-Si。一透明導電氧化物(TCO)的第二導電層460b會藉以一 影罩覆於該a-Si層上來濺射銦錫氧化物(ITO)而被形成。 第23圖示出一第二太陽能電池如上所述地形成,但係 使用一壓印模板製成角錐奈米結構4 64a,具有一大約3 5 0n m 的高度和大約650nm的間距,其相當於一圖案化表面具有大 約50%的該表面包含該等角錐奈米結構。第一Ag導電層 464a,a-Si層462a,和ITO層460a會如上所述地被形成於該 圖案上。 第22和23圖的太陽能電池會被相較於平坦或平面的太 33 201208103 %能電池(即基材沒有圖案化者),以及含有隨意組織的太陽 能電池。該隨意組織的太陽能電池係使用隨意組織的氧化 錫作為一構建該太陽能電池的TCO材料來造成。該等太陽 能電池的尺寸和其餘態樣(例如Ag層,n-i-p a-Si層,銦錫氧 化物(ITO)的頂TCO層)係保持固定。其結果被示於表1中。 表1 電池 Voc Jsc(mA/cm2) FF PCE(%) 平面的 0.68 6.8 0.60 2.75 組織化 0.71 8.6 0.60 3.70 圖案化(15%,第13圖) 0.69 10.5 0.60 4.37 圖案化(50%,第14圖) 0.7 10.85 0.59 4.51 如可看出,該角錐奈米圖案的太陽能電池顯示一優於 傳統平坦的太陽能電池和隨意組織的太陽能電池在能量轉 換效率(PCE)之戲劇性的改良。又,角錐奈米結構的密度更 能造成PCE的增加,因該50%的太陽能電池(第23圖)性能勝 過15%的太陽能電池(第22圖)。 第4圖示出本發明的a_Si : H p-i-n太陽能電池。其基本 構態係與第2圖類似。但是,該壓印結構(第二部份)會被處 理成具有添加的粗度。此粗表面會提供增加的光散射和陷 捕,因而會更改良PCE。 第5圖示出本發明的a_Si : H n-i-P太陽能電池而具有粗 表面。其基本構形係與第3圖類似。 該粗糙組織可被隨意化,且其細構尺寸係實質地小於 主要圖案細構尺寸。該粗糙組織能被製設於該麼印模板 上。因此該粗糙可被由該模板直接地轉移至被壓印的光阻。 該粗糙可藉乾蝕刻來造成。當乾蝕刻時’在某些條件 34 201208103 下,聚合物或其它材料可被沈積在該等樣品上並形成微 罩。此微罩效果能使蝕刻表面粗糙。第6圖示出一乾蝕刻的 玻璃具有粗表面在規則圖案化(較大)的角錐結構上。 4粗糖亦可藉在该模板上或直接在該太陽能電池之圖 案化表面上的薄膜沈積來被造成。在特定的條件下,被沈 積的4膜可為粒狀的,因此會造成粗糙。第7圖係為一SEM 影像不出粗ιτο薄膜沈積在圖案化的玻璃基材上。 所有的該等製程,包括前和後電極的形成,j & F壓印 以形成奈米圖案,a-Si沈積,及有機層的移除(假使可用) 等,皆較好是與卷至卷製法相容以減低製造成本。所有於 此論述的理念和設計等皆可被應用於單a_si太陽能電池,以 及串接的太陽能電池。此外,於此論述的理念和設計等皆 可被應用於薄膜無機、薄膜有機、薄膜混合式太陽能電池 和類似物等。同樣地,該等設計可被應用於該結構中含有 一薄膜太陽能電池所組成的串接太陽能電池等。在某些情 況下,其可被應用於C-Si。例如,在C-Si中,組織化表面可 減少前反射。因C-Si太陽能電池的形成在該產業中持續薄 化(例如減少至20或50gm),故具有後反射層的奈米圖案可 改良PCE。 各種不同態樣的更多修正和變化實施例將可為精習於 該技術者參閱本說明後輕易得知。因此,本說明係僅被視 為舉例說明。應請瞭解所示和所述的形式是被當作實施 例。元件和材料可針對所示和所述者來被替換,零件和製 程可被倒反,且某些特徵可被獨立地利用,全部可為精習 35 201208103 於該技術者在得到本說明的利益之後輕易得知。改變可被 作成於所述的元件中,而不超出如後申請專利範圍中所述 的精神與範圍。 I:圖式簡單說明3 第1圖示出一舉例的壓印微影系統之一簡化側視圖。 第2A圖示出第1圖中所示的基材之一簡化側視圖,有一 圖案化層其上具有奈米結構。 第2B〜2E圖示出奈米結構的實施例之頂視圖。 第3〜6圖示出依本發明形成的奈米結構太陽能電池實 施例之簡化側視圖。 第7圖示出一圖案化層濕蝕刻以增加奈米結構的相對 高度之簡化側視圖。 第8A〜8B圖示出一太陽能電池之一圖案化層的簡化 側視圖。 第9A〜9C圖示出一太陽能電池之一舉例奈米結構圖 案的簡化側視和平面圖。 第10A〜10C圖示出形成一導電層中的組織細構之一 舉例方法。 第11圖示出一在一導電層中具有組織細構的奈米太陽 能電池實施例之一簡化側視圖。 第12圖示出另一用於一依本發明形成之薄膜太陽能電 池的奈米圖案基材實施例之一簡化立體圖。 第13圖示出第12圖的奈米圖案基材之一區段的頂視 圖。 36 201208103 第14A圖示出第12圖的奈米圖案基材之一區段的簡化 側視圖。 第14B圖示出第14A圖的奈米圖案基材之一區段的放 大簡化側視圖。 第15圖示出一依本發明形成的奈米圖案薄膜太陽能電 池實施例之一簡化側視圖。 第16圖示出另一依本發明形成的奈米圖案薄膜太陽能 電池實施例之一簡化側視圖。 第17圖示出一用於形成第15圖的奈米圖案薄膜太陽能 電池之舉例系統的方塊圖。 第18圖示出一用於形成第16圖的奈米圖案薄膜太陽能 電池之舉例系統的方塊圖。 第19A〜19C圖示出一用於形成一薄膜太陽能電池之 奈米圖案基材的舉例模板。 第20A〜20C圖示出另一用於形成一薄膜太陽能電池 之奈米圖案基材的舉例模板。 第21A〜21D圖示出一用於形成第6圖所示之奈米圖案 薄膜太陽能電池之奈米圖案基材的掃描電子顯微照片。 第22圖示出一類似於第6圖所示之太陽能電池的奈米 圖案薄膜太陽能電池之掃描電子顯微照片。 第23圖示出另一類似於第6圖所示之太陽能電池的奈 米圖案薄膜太陽能電池之掃描電子顯微照片。 第24〜25圖示出具有粗化表面之奈米結構的奈米圖案 薄膜太陽能電池實施例之簡化側視圖。 37 201208103 第25〜26圖示出具有粗化表面之奈米結構的奈米圖案 薄膜層之掃描電子顯微照片。 【主要元件符號說明】 100,200,270...奈米結構太陽 能電池 110.. .光微影系統 112.212.214.272.274.312.. . 基材 114.. .基材卡盤 116…階枱 118.. .壓印模板 120.. .凸台 122.. .圖案化表面 124…凹部 126.. .凸部 128.. .模板卡盤 130.. .壓印頭 132.. .流體施配系統 134.. .可成形材料 138.. .能源 140.. .能量 142.. .路徑 144,344…基材表面 146,276...圖案化層 147.. .階狀圖案 148,248...殘留層 149.. .小區域 150,152…奈米結構 151.. .延伸部 153·.·柱 154.. .處理器 155.. .直線 156.. .記憶體 157.. .盒狀圖案 160,260a...透明導電氧化物 (TCO)層 161,261,292...a-sip層 162.. .活性層 163,263,293...a-si本徵層 164.. .後反射層 164b,180...導電層 165,265,295...a-sin層 166.. .凹陷區域 167b...接點 38 201208103 168.. .頂端 170.. .抗反射層 172,262a·..緩衝層 174.. .側壁 182.. .濕蝕刻層 212a,276a...壓印層 250,280...角錐奈米結構 251a,281a,551a,551b... 粗表面 260,264,290,294...導電材料 262,292...半導體層 300,310...模板 322.. .模板表面 334.. .聚合材料 350.. .倒反角錐奈米結構圖案 352.. ·錐面 354.. .奈米結構角錐 354,356…凹曲錐面 355,404,406,450…角錐奈米 結構 402.. .柵格陣列 460,464...導電層 462.. .a-si 層 550a,550b...奈米結構 1100,1140...製法 1102,1114,1146〜1160...各 製程步驟 39 201208103 發明專利說明f (本說明書格式、順序,請勿任意更動,※記號部分請勿填寫) ※申請案號:(仰丨以蛑p ※申請曰:(ρ·^,ι / ※”(:分類: 一、發明名稱:(中文/英文)The crucible is immersed in an aqueous solution containing HCl and Η2〇2 and immersed in an aqueous solution containing HF to be etched (see Zhang et al., Appl. Phys. A. vol 64, p 367, 1997^ in this example, The aqueous solution will assist in the removal of the ν υ 曝光 曝光 曝光 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 The capacity can be determined by a number of factors, including substrate surface strength, material removal rate, material thickness, etc. Therefore, it may be preferable to minimize the thickness of the material to be removed, as this may add to the vuv process. Capacity - For imprint lithography, this may require embossing with a very thin residual layer. However, with a very thin residual layer embossing, all pattern types are not straightforward. The residual layer of the material becomes very 4, and the flow through the -Hai channel will be more and more restricted, as described above. The limitation of this flow can be minimized by the friction of the case at the level of the residual layer. Minimized. In the example, as shown in Figure 8 The nanostructure pattern 146 can be designed to be a sparse _, that is, the nanostructure 丨 _ width is substantially smaller than the distance 奈 5 2 between the nano and σ structures, and in some cases is less than the distance 2~ 3 20 201208103 times. In this pattern, the thickness t2 of the residual layer 148 may be substantially larger. When the residual layer U8 is removed, the patterned layer 146 may be exposed to the wv process to eliminate the residual layer 148, such as the first However, it may take a long time, because k is thicker, and its productivity may not be high. Referring to Figures 9A and 9B, a modification of the process may include forming a patterned layer 146 with additional The stepped pattern 147 is adjacent to the nanostructure. To define - even a thinner residual layer 148a overlying the small area (10) of the patterned layer (10). Contact to the underlying substrate 112 can be removed only by the patterned layer The residual layer 14 at region 149 of 146 is reached as shown in Fig. π, and the entire thickness of the residual layer, vvuv (4), is improved by reducing the thickness of the removed material. In addition, the 'vuv exposure time will Reduce the harmful effects of VUV exposure on the surface of the nanostructure For example, see Figure 9C. 'Nano structure 15〇, etc. can be recorded, as shown by the circle, and supplement the contact hole 149, etc.' as shown by the dark circle. In this design, the area density of the contact hole (4) It may be sufficient to reduce the contact resistance, but will provide a very thin residual layer 148a to be easily removed by the VUV process. See Figure 13 to Figure 18 for the solar cell TC layer 160 and/or The conductive layer 18 is optionally patterned using the methods and systems described in relation to Figures 1 and 2. - The textured surface having tissue textures 15Ga and 152a, etc., reduces light reflection. Again, a well-defined pattern on the conductive layer 18〇 increases light scattering' and enhances the plasmon effect to increase light trapping. The dimensions of the optimal tissue textures 150a-152a (e.g., shape, depth, aspect ratio) may vary relative to the dimensions of the nanostructures 150 and 152, etc. provided in Figures 3-6 (e.g., may be non-sparse And / or the aspect ratio can be much lower, such as about 1: 1: 21 201208103 or even lower). Patterning of conductive layer 180 can excite surface plasmon (sp) effects at the interface of the metal/semiconductor (eg, metal/Si, metal/ITO, metal/ZnO, etc.) and efficiently trap/guide light To the active layer 162. In this regard, a thinner active layer 162 may be sufficient for light absorption and/or light trapping, and thus "thinner, the film may comprise, for example, better charge collection" less recombination and shorter exciton migration. In addition, a thin film can reduce the dark current, increase the open circuit voltage, etc. The SP effect is generally applied to the interface, but the attenuation through the index may affect hundreds of nanometers. At a metal dielectric interface (such as Ag/Si〇2), the intensity of the light field at a resonant wavelength can be as high as 1〇〇. The t-wavelength can be tuned by changing the pitch size and metal/dielectric material. The incident solar stream can be effectively rotated up to 9 〇. and the light can be absorbed along the lateral direction of the solar cell, having a size greater than the vertical length (active layer thickness). For example, in a simulation Among them, a nano-pattern fine structure 150a' having a pitch of about 180 nm has Ag as a back reflection layer and has a germanium pattern and an a-Si layer, showing that a maximum enhancement of 98.8 times is achieved at a resonance wavelength of 8 〇〇 nm. Although when When the wavelength is shifted by a sharp peak (such as 8 〇〇 nm), the enhancement coefficient will decay rapidly, but the overall enhancement in the visible and near-infrared regions (from 400 to 100 nm) is very significant, at 9 〇〇 nm. 66 times, 15 times in lOOOnm, 22 times in 700nm, and 6 times in 500nm. For a TCO layer, the fineness of the nano pattern can be determined according to the structure of the solar cell, the optical properties and thickness of the active layer. The required optical resonant wavelength (eg, tandem solar cells with different band gaps can absorb and convert different portions of the sun 22 201208103 light). The solar cell 100 shown in Figures 3-6 ~100c may further comprise organized textures 150a and 152a of TCO layer 160, etc., and/or conductive layer 180 to further increase PCE. This may include one or more additional steps by adding patterned TCO layer 160, after The reflective layer 164, or both, forms the solar cells 100 to 100c. FIGS. 10A-10C illustrate an embodiment in which the formation of a sparse pattern of the active layer 162 and further patterning of the TCO layer 160 or the conductive layer 182 are deposited. Can be done in a single lithography step. The design of template 118 (shown in Figure 1) can be provided to imprint functional material 134 having tissue textures 150a and 152a and nanostructures 150d, as shown in Figure 10A. Nanostructures 150d and tissue The residual layers of the features 150a and 152a may be removed by VUV or other methods. Wet etching or other suitable etching may be performed to etch the exposed conductive layer 180d by trenches 152a, etc., as shown in FIG. 10B. A second desmear process can remove the formable material (i.e., photoresist) for subsequent deposition, as shown in Figure 10C. Thus 'increased PCE can be obtained at minimal cost. Figure 11 shows the example 1 〇〇d of a nano-structured solar cell, which is similar in design to a solar cell 10c (shown in Figure 6), and a patterned conductive layer 18 is added. 〇d. In addition to the nanostructure 150d, the nanopatterned conductive layer 180d contains regions of tissue texture 150a and 152a that can assist in trapping more light by SP and surface scattering, resulting in an even more solar cell 100c High PCE. Other organization of the nanostructure can also be performed to increase PCE. Example 23 201208103 For example, the surface energy forming the nanostructure can be processed to exhibit an increased thickness. This rough surface will increase the amount of light scattering and trapping, resulting in a well-changed PCE. The coarse-grained structure can be randomized and the fine-grained size can be substantially smaller than the fine-grained size of the main pattern. The rough tissue can be incorporated into the embossing stencil such that the roughness can be transferred directly from the stencil to the photoresist of the embossed portion. Alternatively, the roughness can be caused by dry etching. When dry etched, under certain conditions, a polymer or other material can be deposited on the samples to form a micro-mask. This micro-mask effect can cause the surface of the etch to be rough. Figure 26 shows a dry etched glass having a rough surface 5 5 丨a on a regularly patterned (larger) pyramidal nanostructure 550a. This roughness can also be caused by depositing a #膜 on the template or directly on the patterned surface of the solar cell. In some cases, the deposited film can be granular: it can be a secret. Figure 27 is a SEM image showing the deposition of a coarse ITO film on a patterned glass substrate having a pyramidal structure 5 turns, resulting in a tantalum surface 551be shown in Figures 12, 13 and 14-8-14B for solar cells. Further embodiments of the nanostructure, particularly the angular hybrid structure 25G', have been shown in detail to have improved light trapping characteristics. 13#〇ΐ4Αϋ * 排列 Arrange the in-line and horizontal rows f at a pitch p and a distance d between the bases of adjacent pyramids. The height h can generally be at least about 100 nm, or at least 500 nm, or at least 1 μΐΏ. In some aspects, the height h can generally be in the range of 150 to 100 nm. The pitch p can generally be at least about 2 〇〇 nm, or at least about Ιμηη, or at least 2 nm. In some aspects, the spacing? _ can be in the range of 3 〇〇 nm to 600 nm. The pyramidal nanostructure 25 has a square base 24 201208103, as shown, but the bases may equally be other polygons or circles. The angle 0 between the surface 152 and the tapered surface 154 of the pyramidal nanostructure may generally be at least 100, or at least 135. , or at least 15 weeks. , or at least 170. . In some aspects, the angle 0 can range from 11 150 to 150 degrees. In addition, the overall fine dimensions of the pyramidal nanostructure 250 can be pre-biased depending on the size reduction known in one of etching and/or mating addition layers and/or imprinting processes. As shown in Figures 14A-14B, the intersection between the surface 252 and the base of the pyramid can be arcuate. This arcing can be achieved in a number of ways, including by etching and/or imprinting techniques, etc., as further described below. This rounded sonication pattern is important for the stability and improved performance of the additive material that coats the substrate to form the solar cell. In particular, a conductive material coated on a patterned substrate having sharp corners is susceptible to strain and cracking, thereby damaging the conductive material and reducing battery performance. By arcing the intersection of the surface and the base of the pyramid, the conductive material can be deposited on the patterned surface and will maintain its integrity throughout the pattern, resulting in improved performance. Referring to Fig. 15, the solar cell 200 can be formed as described above after the pyramidal nanostructure 250 is formed on the substrate 212. The first conductive material 264 can be deposited on the substrate 212. The first conductive material 264 may be formed of materials including, but not limited to, aluminum, silver or the like. In general, acceptable materials for conductive material 264 comprise materials having high reflectivity and electrical conductivity. The electrically conductive material can be applied directly to the substrate 212, or alternatively an adhesive layer (not shown) can be applied between the substrate 212 and the electrically conductive material 264 to promote the interface between the substrate 212 and the electrically conductive material 264. Adhesive. Materials suitable for the adhesive layer include, but are not limited to, Ni and Cr. The adhesive layer and conductive material 264 can be deposited using techniques including evaporation, sputtering, CVD, and the like. The thickness of the conductive material 264 can be configured to provide good electrical conductivity, for example, in a range from 30 nm to 200 nm or more. In addition, the thickness of the conductive material 264 can be designed to provide protection for solar cell 2 degradation against the ring. The electrically conductive material can reflect light to the active layer 266. In addition, the electrically conductive material 264 can trap light having a particular range of wavelengths by an electromeric effect corresponding to the size and/or shape of its surface tissue. A semiconductor layer 262 can be deposited over the conductive material 264. The semiconductor layer 262 can be a three-layer (p-i_n) a-Si layer: a_Si? layer 261, a Si intrinsic layer 263, a_Si n layer 265, and the p layer is typically oriented closest to the source. The semiconductor layer 262 can be deposited by PECVD 'LPCVD, HWCVD, or the like. In general, the semiconductor layer 262 can be deposited at a temperature of about 200 ° C or less than the degradation temperature of the underlying patterned material. Other suitable semiconductor materials that can be used in thin film solar cells can also be used, including but not limited to microcrystalline ^ nanocrystalline crystals, hoofed records, and copper ingots. A buffer layer (e.g., doped oxidized) (not shown) may be selectively disposed between the first conductive material 264 and the semiconductor layer 262. The thickness of the buffer layer can be configured to be sufficiently thin to contact the metal plasmonic effect and cause stresses associated with the film but thick enough to adequately block the holes (e.g., about 3 〇 nm to l 〇〇 nm). This buffer layer assists in the collection of electrons and prevents atoms from diffusing between 264 and 262. Other grading or buffer layers can be added to the p-i_n junction to improve its performance. The vane includes an a-Si window layer and a pc-Si (or nc-Si) doped layer. A second conductive material 260 may be disposed on the semiconductor layer 262. When the second conductive material is closest to the light source, the second conductive material may be a transparent oxide layer (TCO layer) of 201208103. The second conductive material 260 may be deposited by evaporation, CVD, sputtering, or the like. Typically, the second electrically conductive material 260 can be deposited at a sample temperature that is lower than the degradation temperature of the underlying layer. The second conductive material 260 may be formed of materials including, but not limited to, indium tin oxide, zinc oxide, tin dioxide, and the like. The flexible conductive layer and, or a combination of materials, can be used with thin film solar cells, including graphite based conductive layers and/or fine metal grids. In general, acceptable materials for conductive material 260 include materials having a high electrical conductivity and a balance of transmittance to sunlight. The second electrically conductive material 260 typically contains a low sheet resistivity, such as about 100 〇hm/sq or less. The thickness of the second conductive material 260 may range from about 5 〇 11111 to 25 〇 11111. The semiconductor layer 262 forms an electrode when the second conductive material 260 is deposited. The array of pyramidal nanostructures can be designed to provide a high aspect ratio to increase the absorptive capacity of the semiconductor layer 162 while maintaining the deposited thickness. The aspect ratio can be between 1 and 10 or more. In one example, the height of the nanostructure 25 Å may range between about 500 nm and 800 nm or more. In another example, the pitch may be between about 500 nm and 1.5 μm or more, and the nanostructure 250 has a width of 25 nm or 300 nm or more. Fig. 16 is a view showing a modification of the nanostructure solar cell 200 shown in Fig. 15, which is shown as a nanostructure solar cell 28A. Nanostructure Solar cell 280 is a reverse design of a nanostructured solar cell 2 , designed to convert light from a source initially on the opposite side of the substrate. Substrate 272 having patterned layer 276 formed thereon includes a patterned pyramidal nanostructure 280 and a residual layer 248. Alternatively the patterned layer itself can be transferred to a substrate using typical etching or other patterning techniques. 27 201208103 The patterned layer 276 can be formed using a polymerizable material (also known as an embossed photoresist) using the lithography technique as previously described to produce a shaped pattern having a thin residual layer therein. The pattern is between the textures. The ruthenium retention layer (10) may have a thickness of less than 5 〇ηηι or less than 25 nm. A minimal residual layer can reduce overall material consumption costs while providing production day (four) silk benefits, as well as reducing light absorption and increasing conversion efficiency. Substrate 272 may be formed from a transparent material comprising glass and/or a clear polymer. Patterned layer 276 can be a transparent polymer. In some cases, it may be preferred to use a conjugated polymer as the embossed photoresist. Once cured, the patterned layer can be oxygen treated to form a glass-like upper surface layer. This upper surface layer itself can advantageously serve as an interface for further deposition of the thin film solar cell b component. It also adds strength and stability to the resulting pattern, while providing greater stability under deposition conditions and lower gas output (which can be pre-baked or oxidized). In addition, it provides a pair of helium water seals to protect the a-Si from environmental degradation. This glazing of the upper surface layer is more advantageous when creating a working template for imprinting the added pattern. A first conductive material 290 is deposited over the patterned layer 276 and can be a transparent conductive oxide (tco) layer. The semiconductor layer 292 is deposited on the first conductive material, and may also be a three-layer (p-i-n) a_si: a_si p layer 292, an a-Si intrinsic layer 293, a-Si η layer 295. In this example, the 1 Å layer can be formed closest to the patterned layer 276 and the predetermined direction of the light source, while the 丨 layer 293 and the 11 layer 295 are subsequently formed. A second conductive material 294 is formed on the semiconductor layer 292 and may be formed of materials including, but not limited to, non-rusting silver 28 201208103 or aluminum, and/or a coated glass or a plastic polymer (eg, PET, PEN) or metal of inorganic materials such as clay and ceramics or other conductive materials having reflective properties, and the like. A buffer layer (i.e., ZnO) can be deposited between 292 and 294 to improve performance. As previously described, the resulting patterned layer and/or nanostructures can be more manipulated to increase surface roughness to provide more light scattering and trapping, with good PCE changes. Figures 24 to 25 show a-Si:Hp-i-n solar cells having a pyramidal nanostructure having a roughened surface. The basic configuration of the solar cell 200a of Fig. 25 is similar to the solar cell 200 of Fig. 15. The embossed layer 212 is formed on the substrate 214 and the ruthenium is subjected to a roughening treatment as described to provide the roughened surface 281a to the pyramidal nanostructure 280a. The metal layer 264a, the ZnO buffer layer 262a, a-Si: a germanium layer (n-i-p layer from the bottom) 266a and a TCO top electrode layer 260a are coated on the substrate to form the solar cell 200a. Similarly, Fig. 24 shows a solar cell 270a similar to the solar cell 270 of Fig. 14. The embossed layer 276a is formed on the substrate 272a and likewise receives a roughening process as described above to provide the roughened surface 251a to the pyramidal nanostructure 250a. The TCO layer 290a, a-Si: a germanium layer (p-i-n layer from the bottom, etc.) 296a, a ZnO buffer layer 292, and a metal electrode 264a are coated on the substrate to form a solar cell 270a. A nanostructure solar cell having a pyramidal nanostructure can be fabricated by the process 1100 shown in the flow charts of Figs. The process of Figure 17 illustrates a process for forming an embossing template for imprinting an array of pyramidal nanostructures in a desired substrate. In the first step 11〇2, a nanoimprinting patterning process is used to form a polymer layer consisting of a grid or a column array on the Shixi wafer. The grid or array of columns will undergo an anisotropic wet etch (e.g., KOH) to form an inverted array of pyramidal nanostructures in the crucible (step 1104). At step 1106, the inverted array is used to reverse emboss a patterned layer of a pyramidal nanostructure on a glass substrate, which is then RIE etched into the substrate at step 1108. . These two steps will be repeated at steps 111A and 1112 to reverse emboss the inverted pyramidal nanostructure array in a second glass substrate. At step 1114, the second glass substrate can be selectively subjected to a buffered oxide etch (B〇E). The boe etch will arc the intersection between the surface of the substrate and the inverted pyramidal nanostructure. A second glass substrate having the inverted pyramid array can be used as an imprint template for patterning a functional photoresist material (i.e., a formable material), such that the equiangular pyramid structure is formed in a selected On the substrate, a flexible substrate comprising glass, polymer, metal, etc., which is used in the manufacture of thin film solar cells, "the embossed material will have a pyramidal nanostructure, and the surface of the substrate and the pyramid There is a rounded intersection between the bases. An imprint template having a positive pyramidal nanostructure for embossing an inverted pyramid nanostructure in a functional photoresist can be easily caused by simply omitting steps 1110 and 1112. The flowchart in Fig. 18 shows that the manufacturing method 1140 can form a solar battery as shown in Fig. 15 using a template made in accordance with the method of Fig. 17. At step 1146, a polymeric material, i.e., an embossed photoresist, is deposited on a suitable substrate. In the case of thin film solar cells, such suitable substrates include glass, flexible glass, plastic, and metal substrates. At step 1148, an imprint template as described above can be used to transfer a pyramidal nanojunction 30 201208103 pattern into the material, which pattern can be positive or negative, depending on the imprint The orientation of the template. At step 1152, an adhesive layer such as Ni is formed by sputtering on the patterned polymeric material, and then at step 1154, a reflective electrode material, such as Ag, is sputtered onto the adhesive layer. on. At step 1156, a buffer layer such as ZnO is sputtered onto the electrode layer. At step 1158, PECVD deposition is used to form an n-i-p a-Si layer. At step 1160, a second conductive material, such as a transparent conductive oxide (TCO) layer, is deposited on the n-i-p a-Si layer. It should be understood that the solar cell of Fig. 16 can be fabricated according to the above-described manufacturing method by merely reversing the positioning of the first and second conductive layers and inverting the pECVD process to form a p-i-n a-Si layer. When embossing lithography is used to create a nanostructured solar cell having an embossed pyramidal nanostructure, it may be desirable to have the imprint template designed to compensate for the shrinkage that the ruthenium polymer material will undergo upon curing. 19A to 19C illustrate the effect of the shrinkage in a typical case, and the template 31 includes an inverted inverted pyramidal nanostructure pattern 350 having a tapered surface 352 and the like, and a Zi template which is similar to the surface of the template. The lanthanide is disposed relative to the substrate, and the polymeric material is deposited as a liquid on the riding surface 344. If the template 3 is moved to the base = 312 ', the template will contact the polymeric material 334, which will fill the pyramidal nanometer. The pattern 355 is then cured as shown in Fig. 1S>B and is bonded to the template: as shown in Fig. 19C, to produce a nanostructure pyramid 354 or the like. Not all dimensions of the shrinking code are shown in Fig. 19C, which is a contraction of 21 to 22 in the vertical axis direction, typically 9 to (4), but there is also a cone 354 passing through the pyramid. - The resulting contraction produces a concave curved cone 31 201208103 face 356. In order to achieve a desired pyramidal nanostructure having a desired height B and a relatively flat tapered surface, it may be necessary to cause an imprinted template having an inverted pyramidal nanostructure having a correspondingly large depth Z3. 'And the tapered surface or the side wall corresponds to the concave tapered surface or the like as shown in Figs. 20A to 20C. The template 31, as shown in Fig. 20A, is designed to have an inverted pyramidal nanostructure pattern 356 having a depth & a concave curved surface 354 and the like, and a depth 相对 relative to the template surface 322. When filled, the uncured polymeric material 334 initially has a corresponding size, as shown in Figure 2B. Once cured, the resulting pyramidal nanostructure will have the desired shape, as shown in Figure 20C, while the shrinkage in the z-axis will reduce its height from Z3 to Z!' and the original concave curved cone It will shrink into a relatively flat cone 352. (Example) A nano-pattern solar cell having a pyramidal nanostructure is produced by the above-described method, and is shown in Figures 21 to 23. An imprint template will be formed first, as shown in Figures 21A-21D. A lithographic wafer is first embossed with a polymeric material, i.e., embossed photoresist, and has an embossed grid array 402 having a pitch of 650 nm, as shown in Figure 24A. The pattern is etched using KOH wet etching to etch the pyramidal nanostructures 4〇4 in the stone, with height and pitch dimensions of approximately 350 nm and 650 nm, respectively, as shown in Figure 2ib. The pattern is imprinted in a photoresist on a glass substrate to form a pyramidal structure 406 (FIG. 21C) and then transferred to the glass substrate by reactive ion ray (rie) A pyramidal nanostructure 45 形成 is formed, as shown in Figure 21D. The process will be repeated to create an inverted pattern of the pyramidal nanostructure on a second glass substrate 32 201208103, which will then receive a buffer oxide for about 1 minute to arc the template surface with the The edge of the base of the inverted pyramid of the template. As mentioned previously. The formed template 嗣 will be used to form the solar cell shown in Fig. 23. The solar cell of Fig. 22 was formed using a similar template as described above but having a height of about 180 nm and a pitch of about 530 nm. Fig. 22 shows a solar cell provided with a pyramidal nanostructure 450b or the like having the above dimensions (about 180 nm in height and about 530 nm in pitch), and which is dry-touched in a glass substrate. This corresponds to a patterned surface having about 15% of the surface comprising the isosceles nanostructure. Ni is sputtered onto the patterned surface to form a Ni adhesion layer of about 1 Onm. Ag嗣 is sputtered onto the adhesive layer to form a first reflective conductive layer 464b of about 1 〇〇 nm, and then a ZnO buffer layer of about 40 nm is formed on the Ag conductive layer by ZnO. An a-Si layer 462b is deposited on the buffer layer by PECVD deposition of n-i-p a-Si to form an approximately 19 nmn layer, a 160 nm layer and a 12 nm layer of n-i-p a-Si. A second conductive layer 460b of a transparent conductive oxide (TCO) is formed by sputtering a layer of indium tin oxide (ITO) by overlying the a-Si layer. Figure 23 shows a second solar cell formed as described above, but using an imprint template to form a pyramidal nanostructure 4 64a having a height of about 305 nm and a pitch of about 650 nm, which is equivalent to A patterned surface has about 50% of the surface comprising the isosceles nanostructure. The first Ag conductive layer 464a, the a-Si layer 462a, and the ITO layer 460a are formed on the pattern as described above. The solar cells of Figures 22 and 23 will be compared to flat or planar solar cells (ie, the substrate is not patterned), as well as solar cells containing random tissue. The randomly organized solar cell is caused by the use of randomly organized tin oxide as a TCO material for constructing the solar cell. The dimensions of the solar cells and the remaining aspects (e.g., Ag layer, n-i-p a-Si layer, top TCO layer of indium tin oxide (ITO)) remain fixed. The results are shown in Table 1. Table 1 Battery Voc Jsc (mA/cm2) FF PCE (%) Plane 0.68 6.8 0.60 2.75 Organizational 0.71 8.6 0.60 3.70 Patterning (15%, Figure 13) 0.69 10.5 0.60 4.37 Patterning (50%, Figure 14 0.7 10.85 0.59 4.51 As can be seen, the solar cell of the pyramidal nanopattern shows a dramatic improvement in energy conversion efficiency (PCE) over conventional flat solar cells and randomly organized solar cells. Also, the density of the pyramidal nanostructures is more likely to cause an increase in PCE, since the 50% solar cell (Fig. 23) outperforms the 15% solar cell (Fig. 22). Fig. 4 shows an a_Si:H p-i-n solar cell of the present invention. Its basic configuration is similar to Figure 2. However, the embossed structure (second portion) will be treated to have an added thickness. This rough surface provides increased light scattering and trapping, which in turn changes the good PCE. Fig. 5 shows an a_Si:H n-i-P solar cell of the present invention having a rough surface. Its basic configuration is similar to Figure 3. The rough tissue can be freed and its fine size is substantially smaller than the major pattern fineness. The rough tissue can be fabricated on the stencil. This roughness can therefore be transferred directly from the template to the stamped photoresist. This roughness can be caused by dry etching. When dry etched, under certain conditions 34 201208103, a polymer or other material may be deposited on the samples and form a micro-mask. This micro-mask effect can make the etched surface rough. Figure 6 shows a dry etched glass with a rough surface on a regularly patterned (larger) pyramid structure. 4 Crude sugar can also be caused by film deposition on the template or directly on the patterned surface of the solar cell. Under certain conditions, the deposited 4 film can be granular and therefore rough. Figure 7 is an SEM image without a thick ιτ film deposited on a patterned glass substrate. All of these processes, including the formation of front and back electrodes, j & F embossing to form nanopatterns, a-Si deposition, and organic layer removal (if available), etc., are preferably The rolling process is compatible to reduce manufacturing costs. All of the concepts and designs discussed here can be applied to single a_si solar cells, as well as tandem solar cells. In addition, the concepts and designs discussed herein can be applied to thin film inorganic, thin film organic, thin film hybrid solar cells and the like. Similarly, such designs can be applied to tandem solar cells and the like which comprise a thin film solar cell. In some cases, it can be applied to C-Si. For example, in C-Si, the organized surface reduces frontal reflection. Since the formation of C-Si solar cells continues to be thinned in the industry (e.g., reduced to 20 or 50 gm), the nanopattern with the back reflector can improve PCE. Further modifications and variations of the various aspects will be readily apparent to those skilled in the art. Therefore, the description is to be considered as illustrative only. It should be understood that the forms shown and described are to be considered as examples. The components and materials may be replaced for those shown and described, the parts and processes may be reversed, and certain features may be utilized independently, all of which may be in the interest of 35 201208103. It is easy to know later. The changes can be made in the described elements without departing from the spirit and scope as set forth in the appended claims. I: Schematic description of the drawing 3 Fig. 1 shows a simplified side view of an exemplary imprint lithography system. Fig. 2A shows a simplified side view of one of the substrates shown in Fig. 1, with a patterned layer having a nanostructure thereon. 2B to 2E illustrate top views of an embodiment of a nanostructure. Figures 3 to 6 show simplified side views of an embodiment of a nanostructure solar cell formed in accordance with the present invention. Figure 7 shows a simplified side view of a patterned layer wet etch to increase the relative height of the nanostructure. 8A-8B illustrate a simplified side view of a patterned layer of a solar cell. 9A to 9C illustrate a simplified side view and a plan view of one of the solar cells as an example of a nanostructure pattern. 10A to 10C illustrate one example of forming a texture fine structure in a conductive layer. Figure 11 shows a simplified side view of one embodiment of a nano-solar cell having a fine texture in a conductive layer. Figure 12 is a simplified perspective view of another embodiment of a nanopattern substrate for use in a thin film solar cell formed in accordance with the present invention. Fig. 13 is a top plan view showing a section of the nano pattern substrate of Fig. 12. 36 201208103 Figure 14A shows a simplified side view of a section of the nanopattern substrate of Figure 12. Fig. 14B is a simplified side elevational view showing one of the sections of the nanopattern substrate of Fig. 14A. Figure 15 is a simplified side elevational view of one embodiment of a nanopatterned thin film solar cell formed in accordance with the present invention. Figure 16 is a simplified side elevational view of another embodiment of a nanopatterned thin film solar cell formed in accordance with the present invention. Fig. 17 is a block diagram showing an exemplary system for forming the nano pattern thin film solar cell of Fig. 15. Fig. 18 is a block diagram showing an exemplary system for forming the nano pattern thin film solar cell of Fig. 16. 19A to 19C illustrate an exemplary template of a nano pattern substrate for forming a thin film solar cell. 20A to 20C illustrate another exemplary template for forming a nano pattern substrate of a thin film solar cell. 21A to 21D illustrate scanning electron micrographs of a nanopattern substrate for forming a nanopattern thin film solar cell shown in Fig. 6. Fig. 22 shows a scanning electron micrograph of a nano-pattern thin film solar cell similar to the solar cell shown in Fig. 6. Fig. 23 shows a scanning electron micrograph of another nanopattern thin film solar cell similar to the solar cell shown in Fig. 6. Figures 24 to 25 show a simplified side view of an embodiment of a nanopattern thin film solar cell having a nanostructure with a roughened surface. 37 201208103 Figures 25 to 26 show scanning electron micrographs of a nanopattern film layer having a nanostructure having a roughened surface. [Main component symbol description] 100,200,270... nanostructure solar cell 110... light lithography system 112.212.214.272.274.312.. substrate 114.. substrate chuck 116...step 118 .. . Imprint template 120.. . boss 122.. patterned surface 124... recess 126.. convex 128.. template chuck 130.. embossing head 132.. . Fluid dispensing system 134.. . Formable material 138.. Energy 140.. Energy 142.. Path 144, 344... Substrate surface 146, 276... Patterned layer 147.. Step pattern 148, 248.. Residual layer 149.. small area 150, 152... nanostructure 151.. extension 153·. column 154.. processor 155.. straight line 156.. memory 157.. box Pattern 160, 260a... transparent conductive oxide (TCO) layer 161, 261, 292... a-sip layer 162.. active layer 163, 263, 293... a-si intrinsic layer 164.. Back reflection layer 164b, 180... conductive layer 165, 265, 295... a-sin layer 166.. recessed area 167b... contact 38 201208103 168.. top 170.. anti-reflection layer 172, 262a ·.. buffer layer 174.. sidewall 182.. wet etching layer 212a, 276a... embossing layer 250, 280... pyramidal nanostructure 251a , 281a, 551a, 551b... Rough surface 260, 264, 290, 294... Conductive material 262, 292... Semiconductor layer 300, 310... Template 322.. Template surface 334.. Polymer material 350.. . inverted pyramidal nanostructure pattern 352.. · cone surface 354.. nano structure pyramid 354, 356... concave curved surface 355, 404, 406, 450... pyramidal nanostructure 402.. Array 460, 464... Conductive layer 462.. . a-si layer 550a, 550b... nanostructure 1100, 1140... method 1102, 1114, 1146~1160... process steps 39 201208103 invention Patent Description f (Do not change the format and order of this manual, please do not fill in the ※ part) ※Application number: (Yangsuke 蛑p ※Application 曰: (ρ·^, ι / ※) (: Category: First, the name of the invention: (Chinese / English)
奈米結構太陽能電池 NANOSTRUCTURED SOLAR CELL 二、中文發明摘要: ^用於製造具有奈米結構陣列之奈米結構太陽能電池的系統和方法 係被描述,包括具有一重複的角錐奈米結構圖案之奈米結構太陽能電 池’可提供低成本的薄膜太陽能電池並有改良的PCE。 三、英文發明摘要:Nanostructured solar cell NANOSTRUCTURED SOLAR CELL II. Abstract of the invention: ^ A system and method for fabricating a nanostructured solar cell having a nanostructure array, including a nanocrystal having a repeating pyramidal nanostructure pattern Structured solar cells' offer low-cost thin-film solar cells with improved PCE. Third, the English invention summary:
H〇\L -2006.01 , 2006,01 W\o\LH〇\L -2006.01 , 2006,01 W\o\L
Systems and methods for fabrication of nanostructured solar cells having arrays of nanostructures are described, including nanostructured solar cells having a repeating pattern of pyramid nanostructures, providing for low cost thin film solar cells with improved PCE. 1 201208103 七、申請專利範圍: ^ —種太陽能電池,包含: 一基材具有一聚合的奈米結構陣列由之伸出; 第導電材料置設在該基材上; 一半導體層置設在該第一導電材料上;及 一第二導電材料置設在該半導體層上。 2.如申凊專利範圍第1項的太陽能電池,其中該等奈米钟 構具有選自下列組群的形狀:線、柱、孔、角錐或奇特 的形狀。 ^ 3’如申請專利範圍第1或2項的太陽能電池,其中該等奈米 結構具有一 l〇〇nm〜2μπ1之間的高度,一 1〇〇nm〜2^m之 間的寬度,及一 5〇〇nm〜2μιη之間的間距。 4. 如申請專利範圍第!〜3項之任一項的太陽能電池,其中 邊等奈米結構具有一 0.5〜10的縱橫比。 5. 如申請專利範圍第1〜4項的太陽能電池,其中該等奈米 結構具有粗糙化的表面。 6. 如申請專利範圍第1〜5項的太陽能電池,其中該基材是 導電的。 & 7 .如申請專利範圍第1〜6項的太陽能電池,其中該第一導 電材料是反射性的,且該第二導電材料是透明的。 8’如申請專利範圍第1〜6項的太陽能電池,其中該基材和 第—導電材料是透明的,且該第二導電材料是反射性 的。 9.如申請專利範圍第1〜8項的太陽能電池,其中該半導體 40Systems and methods for fabrication of nanostructured solar cells having arrays of nanostructures are described, including nanostructured solar cells having a repeating pattern of pyramid nanostructures, providing for low cost thin film solar cells with improved PCE. 1 201208103 VII. Patent application scope: ^ — The solar cell comprises: a substrate having an array of polymerized nanostructures extending therefrom; a conductive material disposed on the substrate; a semiconductor layer disposed on the first conductive material; and a second A conductive material is disposed on the semiconductor layer. 2. The solar cell of claim 1, wherein the nanostructures have a shape selected from the group consisting of: a line, a column, a hole, a pyramid or a peculiar shape. ^3' The solar cell of claim 1 or 2, wherein the nanostructures have a height between 1 〇〇 nm and 2 μπ1, a width between 1 〇〇 nm and 2 cm, and A spacing between 5 〇〇 nm and 2 μιη. 4. If you apply for a patent scope! A solar cell according to any one of the items 3 to 3, wherein the side nanostructure has an aspect ratio of 0.5 to 10. 5. The solar cell of claim 1 to 4, wherein the nanostructures have a roughened surface. 6. The solar cell of claim 1 to 5, wherein the substrate is electrically conductive. The solar cell of claim 1 to 6, wherein the first conductive material is reflective and the second conductive material is transparent. A solar cell according to any one of claims 1 to 6, wherein the substrate and the first conductive material are transparent, and the second conductive material is reflective. 9. The solar cell of claim 1 to 8 wherein the semiconductor 40
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