201205395 六、發明說明： 【發明所屬之技術領域】 本發明係有關一種電容式觸控板，特別是關於一種電容式 觸控板的感測電路及方法。 【先前技術】 觸控功能已經廣泛的應用在智慧型手機、筆記型電腦、多 媒體播放器以及資訊家電等範缚上，而電容式的觸控感應由於 φ 能達到尚感度以及低成本，使得市場相繼使用電容式的觸控感 應。二維式的電容式觸控板正被廣泛的應用在各類電子產品上 作為輸入裝置，但這種觸控板在應用上會有多指觸控定位、抗 水滴及水膜干擾以及顯示器干擾等問題。 藉感/則感應電極板之間的父互電g(mu加al capacitance)， 可以達成多指觸控定位，提高手指與水滴的辨識的效果。如圖 1所示，感應電極板10及12之間的電力線構成了交互電容 (mutual capacitor)。當手指16靠近時，感應電極板1〇、12之 馨 間的電力線會被人體所形成的大下地電容所吸引，造成感應電 極板10、12之_交互電容值下降，透過細此交互電容的 變化，可以達到手指16的感測。若是水膜18附在介質14上， 由於水膜18為浮動節點，因此電力線由感應電極板1〇流經水 膜18再流進感應電極板12，造成交互電容略微上升。根據交 互電容不_變化特性，可分辨手指16與水膜18。但是感應 電極板10、12分別有寄生電容的存在，而寄生電容會嚴重影 響感測電路對交互電容感測時的感度。 【發明内容】 本發明的目的在於提出一種偵測電容式觸控板的交互電 容的感測電路及方法。 根據本發明，一種電容式觸控板的感測電路包含切換電路 連接該電容式觸控板的第一感應電極板，將該第一感應電極板 連接電源端或接地端，運算放大器具有第一輸入端、第二輸入 端及輸出端，該第一輸入端連接參考電壓，取樣電路連接在該 運算放大器的第二輸入端及輸出端之間，從該第二感應電極板 感測該交互電容的變化，以及回授開關連接在該運算放大器的 第二輸入端及輸出端之間，在該取樣電路感測該交互電容以前 讓該運算放大器回授補償該第二感應電極板的寄生電容。 根據本發明’一種電容式觸控板的感測方法包含週期性地 將該電容式觸控板的第一感應電極板於電源電壓及接地電壓 之間切換’回授補償該電容式觸控板的第二感應電極板的寄生‘ 電容’以及從該第二感應電極板感測該第一及第二感應電極板 之間的交互電容的變化。 【實施方式】 圖2係本發明之感測電路的第一實施例。感應電極板1〇、 12分別具有寄生電容cpi、cP2，而兩感應電極板1〇、12之 間存在交互電容C1。切換電路2〇具有開關SW7連接在電源 端Vdd及感應電極板10之間，以及開關SW8連接在感應電 極板10及接地端之間，開關SW7及SW8分別受控於兩個互 201205395 不重疊(non-overlap)的時脈。運算放大器22具有輪入端224連 接參考 VREF。開關SW1連接在感應電極板12及運算放 大器22的輸入端222之間。開關SW6連接在運算放大器22 的輸入端222及輸出端226之間，用以使運算放大器22建立 回授機制。取樣電路24包括參考電容C2、C3，參考電容C2、 C3的一端皆連接運算放大器22之輸入端222 /開關sw連 接於參考電容C2之另-端與運算放大器22的輸出端挪之 間，開關SW4連接於參考電容a之另一端與電壓源遞之 間，開關SW3連接於參考電容C3之另一端與運算放大器22 的輪出端226之間，開關SW5連接於參考電容C2之另一端 與接地端之間。本實施例的細電路—開始職應電極板12 及運算放大H 22之__ SW1連通喊啦互電容c卜 將參考f容C2與C3分職電絲考電壓VREF=G 5xVDD電 壓以後，根據開關SW7及SW8的切換時脈對交互電容α進 行週期性的電荷娜。在每絲考電容C2或C3對交互電容 C山1做電荷轉移以前’將開關SW6舰運算放大器24的輸入 知222及輸出端226進行回授，將寄生電容Cp2的電壓充至 VREF’降低為了解生電容Cp2補償而產生感度下降的影 響。經過多次週期性對外部感應電容的電荷轉移之後，再中斷 開關swi ’藉量測單元26量測參考電容C2、c3的電荷。量 測單元26尹有類比數位轉換器(ADC)將參考電容C2、C3的跨 廢轉換成數位信號，以供後級電路了解交互電容C1的電荷變 化0 圖3係圖2的開關的時序圖。感測流程一開始，係控制開 201205395 5 SW1使運算放大器22的輸入端222連接感應電極板12於 1點VT在時相p3〇中的操作係重設(reset)參考電容c2，將 開關SW4及SW6連通，運算放大器22將節點ντ的電壓拉 至，考電壓VREF’參考電容C2的兩端分別連接電壓源 及印點VT ’使參考電容C2的跨壓充到。接著於時相 P32中’開M sw2跟著開關SW7連通，讓參考電容C2與交 f電谷ci進行電荷轉移。時相P34中，連通開 關SW6，讓運 算放大器22 f子寄生電容〇>2作回補償，將節點的電壓 拉回至參考電壓VREF。由於初始時需要重設參考電容G， 因此於第-雜作時相J>34的同時會連通_祕，使參考 電容C3兩端連接接地端及感縣極板12，把參考電容C3的 跨恩充到VREF。時相P36中_ SW3跟著開關謂連通， 讓參考m與交互電容C1進行電荷轉移。時相PM又將 開關SW6連通，運算放大器22再對寄生電容cp2作回授補 償，將節點ντ的電壓拉回到參考龍WEF。接下來只要根 據開關SW7及SW8的切換週期性地重複操作時相p32、p34、 P36與P38 ’對父互電容C1進行多次的電荷轉移。最後，於 =相P40中’中斷開關S1且連通開關驗、湖，把參考電 谷C2與C3㈣使彼此的電荷相加，再由後方制單元％轉 換出與待測之交互電容C1的細感測資料。 圖4係圖2的節點與证的電壓波形圖。根據圖3的 時序圖，取樣電路24週期性地重複操作時相p32、⑼、p36 f38，參考電容C2、C3對交互電容α進行多次的電荷轉 移’而節點DN與UP的電壓因為參考電容c2、CW電荷變 201205395 化而呈階梯式的變動，一階一階的趨近參考電壓VREF。 圖5係本發明之感測電路的第二實施例，感應電極板10、 12、切換電路20、運算放大器22以及開關SW1、SW6和圖2 的電路是相同的。取樣電路42係將圖2的兩個參考電容C2、 C3簡化為一個參考電容C2，同時省略開關SW3，開關SW5 直接連接於接地端及運算放大器22的輸入端222之間。圖6 係圖5的開關的時序圖，其運作方式與圖2的實施例相似，只 少了與參考電容C3相關的操作。本實施例節點DN的電壓波 • 形和圖4所示的電壓波形雷同。 圖7係本發明之感測電路的第三實施例，感應電極板1〇、 12、切換電路20、運算放大器22以及開關SW卜SW6和圖2 的電路是相同的。取樣電路44係將圖2的兩個參考電容C2、 C3簡化為一個參考電容C3，同時省略開關SW2及SW4。圖 8係圖7的開關的時序圖’其運作方式與圖2的實施例相似， 只少了與參考電容C2相關的操作，並且於最後量測單元26 在轉換與待測之交互電容C1相關的感測資料時，SW6取代原 • 來的SW2 ’使量測單元26量測到C3的電荷量。本實施例節 點UP的電壓波形和圖4所示的電壓波形雷同。 圖9係本發明之感測電路的第四實施例，感應電極板1〇、 12、切換電路20、運算放大器22以及開關SWb SW6和圖2 的電路是相$的。取樣電路46係利用開關sup、SDN的切換 使-個參考電谷C4取代圖2的兩個參考電容C2、C3。圖1〇 係圖9的開關的時序圖，其運作方式與圖2的實施例相似，但 是只在時相P50的操作中重設參考電容C4 一次，將開關 m 7 SDN、SW4及SW6連通，參考電容C4的兩端給予電壓vdd 及參考電壓VREF=0.5xVDD，使參考電容C4的跨壓充到 VREF。時相P52係讓參考電容C4對電容C1做電荷轉移，時 相P54係讓運算放大器22對寄生電容CP2作回授補償，將節 點VT的電壓拉回到參考電壓VREF。時相P56係將參考電容 C2正負端點反接，並對交互電容C1做電荷轉移，時相P58 將運算放大器22的負輸入端以負回授紐態拉回參考電壓 VREF。接下來只要根據開關sw7及SW8的切換週期性地重 複操作時相P52、P54、P56與P58，對交互電容C1進行多次 的電荷轉移。最後，於時相P60中，中斷開關SW1，連通開 關SW2、SW5 ’讓後級的量測單元26轉換出參考電容C4的 跨壓，以推斷交互電容C1的變化。 本發明可適用於一維式及二維式的電容式觸控板及電容 式觸控按鍵。由於能有效的補償寄生電容使其對交互電容的感 度上升，除了可以抗水滴及水膜干.擾以外，在二維式的電容式 觸控板的應用上還能達到多點觸控定位的功效。圖2及圖9的 實施例更有抗雜訊的功能。圖U細9的電路抑制或消除低 頻雜訊的示意圖。假設低頻雜訊緩慢的變化，而電路操作頻率 遠高於低頻雜訊頻率’在01與02週期内受到低頻雜訊的干 擾量可以視為皆為+Δνη。那麼在0 1週期時’雜訊會在泉考 電容C4產生雜訊輕，若是％週_續受獅訊^響:就 會如Vnoise的波形’ 一直累積到參考電容C4上。但是^ 9的 實施例會在02棚時域u打方所示，將參考^ C4的 電容極性反接’使得gj為雜而造成參考餘以產生的跨厘 如vcn的電壓波形，把分1產生的雜訊電壓消除，利用此動作 達成低頻雜訊齡。相同的操作概念，若有—連串雜訊頻率等 於或高於電路操作鱗_訊脈衝進人，只要在ο與0週 期内’雜訊脈衝做了等量的高低觀，職雜訊林考電容 C4產生的雜訊電壓將相互抵銷、而圖2之實___造 成的誤差分別存於參考電容Q及α中，在最後的量測中， 參考電容〇2及(：3的㈣、;肖除了雜輯祕的誤差。 圖12係結合本發明之感測電路的積分三角㈣咖輪) 感測器。本發明的感測電路62連接構成交互電容〇的兩個 感應電極板1G與12，根據積分三角的量測方法，量測參考電 容C5轉移至交互電容C1的電荷量，時脈比較器(⑽ Compamw; CCMP)66比考電紅5的職與參考電壓電 路68提供的參考電壓。當時脈比較器的的輸出為低準位時， 微控制單元⑽⑽〇>咖〖Unit; MCU)7G控娜贱⑽使參 考電容C5料部的交互f容α輯荷轉移，做—次完整週 期即完成触f彳_，敎—讀絲differ) 感測。當時脈比較器66的輸出為高準位時，微控制單元％控 制數位控㈣騎64 考電容Ο ，參考電容ο 的電荷m為擬絲魏，而電荷補充為單端恤㈣型離，组 成差動式積分三角感測器(祿rentiai_delt_時^ 係應用夕崎分二角制單元於二_容式觸控板的系統架 翻，利賴控制單元7G控制多工器72同時平行處理多组積 分三角感測私74，提升感測二維電容式觸控面板％的速 度’並能增加操作錄，經資朗％求平均崎低雜訊干擾， 提供二維電容式觸控板更即時更穩定的應用。 以上對於本發明之較佳實施例所作的敘述係為闡明之目 的，而無意限定本發明精確地為所揭露的形式，基於以上的教 導或從本發明的實施例學習而作修改或變化是可能的，實施例 係為解說本發明的原理以及讓熟習該項技術者以各種實施例 彻本發明在實際顧上而選擇及敘述，本發明的技術思想企 圖由以下的申請專利範圍及其均等來決定。 【圖式簡單說明】 圖1係感應電極板之間的交互電容的變化的示意圖； 圖2係本發明之感測電路的第一實施例； 圖3係圖2的開關的時序圖； 圖4為圖2的節點DN與UP的電壓波形圖； 圖5係本發明之感測電路的第二實施例； 圖6係圖5的開關的時序圖； 圖7係本發明之感測電路的第三實施例； 圖8係圖7的開關的時序圖； 圖9係本發明之感測電路的第四實施例； 圖10係圖9的開關的時序圖； 圖11係圖9的電路消除低頻雜訊的示意圖； 圖12係結合本發明之感測電路的積分三角感測器；以及 圖13係應用多組積分三角感測器於二維電容式觸控板 的系統架構圖。 201205395 【主要元件符號說明】201205395 VI. Description of the Invention: [Technical Field] The present invention relates to a capacitive touch panel, and more particularly to a sensing circuit and method for a capacitive touch panel. [Prior Art] Touch functions have been widely used in smart phones, notebook computers, multimedia players, and information appliances, and capacitive touch sensors have achieved market sensitivity and low cost. Capacitive touch sensing is used successively. Two-dimensional capacitive touch panels are being widely used as input devices in various electronic products, but such touch panels have multi-finger touch positioning, anti-drop and water film interference, and display interference in applications. And other issues. Borrowing/sensing the mutual electrical energy g (mu plus al capacitance) between the electrode plates can achieve multi-finger touch positioning and improve the recognition of fingers and water droplets. As shown in Fig. 1, the power lines between the sensing electrode plates 10 and 12 constitute a mutual capacitance. When the finger 16 approaches, the power line between the sensing electrodes 1 and 12 will be attracted by the large ground capacitance formed by the human body, causing the value of the mutual capacitance of the sensing electrode plates 10 and 12 to decrease. The change can be achieved by the sensing of the finger 16. If the water film 18 is attached to the medium 14, since the water film 18 is a floating node, the power line flows from the sensing electrode plate 1 through the water film 18 and then into the sensing electrode plate 12, causing the mutual capacitance to rise slightly. The finger 16 and the water film 18 can be distinguished based on the non-changing characteristics of the mutual capacitance. However, the sensing electrode plates 10 and 12 respectively have the existence of parasitic capacitance, and the parasitic capacitance seriously affects the sensitivity of the sensing circuit for sensing the mutual capacitance. SUMMARY OF THE INVENTION It is an object of the present invention to provide a sensing circuit and method for detecting an alternating capacitance of a capacitive touch panel. According to the present invention, a sensing circuit of a capacitive touch panel includes a switching circuit connected to a first sensing electrode plate of the capacitive touch panel, and the first sensing electrode plate is connected to a power terminal or a ground terminal, and the operational amplifier has a first An input terminal, a second input end, and an output end, the first input end is connected to the reference voltage, and the sampling circuit is connected between the second input end and the output end of the operational amplifier, and the alternating capacitance is sensed from the second sensing electrode plate The change, and the feedback switch is connected between the second input end and the output end of the operational amplifier, and the operational amplifier is fed back to compensate the parasitic capacitance of the second sensing electrode plate before the sampling circuit senses the alternating capacitance. According to the present invention, a sensing method of a capacitive touch panel includes periodically switching a first sensing electrode plate of the capacitive touch panel between a power supply voltage and a ground voltage to compensate for the capacitive touch panel. The parasitic 'capacitance' of the second sensing electrode plate and the change of the mutual capacitance between the first and second sensing electrode plates are sensed from the second sensing electrode plate. Embodiments Fig. 2 is a first embodiment of a sensing circuit of the present invention. The sensing electrode plates 1 and 12 respectively have parasitic capacitances cpi and cP2, and an alternating capacitance C1 exists between the two sensing electrode plates 1 and 12. The switching circuit 2 has a switch SW7 connected between the power supply terminal Vdd and the sensing electrode plate 10, and a switch SW8 connected between the sensing electrode plate 10 and the grounding terminal, and the switches SW7 and SW8 are respectively controlled by two mutual 201205395 not overlapping ( Non-overlap). The operational amplifier 22 has a turn-in terminal 224 coupled to a reference VREF. The switch SW1 is connected between the sensing electrode plate 12 and the input terminal 222 of the operational amplifier 22. Switch SW6 is coupled between input 222 and output 226 of operational amplifier 22 for enabling operational amplifier 22 to establish a feedback mechanism. The sampling circuit 24 includes reference capacitors C2 and C3. One end of the reference capacitors C2 and C3 is connected to the input terminal 222 of the operational amplifier 22. The switch sw is connected between the other end of the reference capacitor C2 and the output of the operational amplifier 22, and the switch SW4 is connected between the other end of the reference capacitor a and the voltage source. The switch SW3 is connected between the other end of the reference capacitor C3 and the wheel terminal 226 of the operational amplifier 22. The switch SW5 is connected to the other end of the reference capacitor C2 and grounded. Between the ends. The fine circuit of the embodiment - starting the electrode plate 12 and operating the amplification H 22 __ SW1 connected shouting mutual capacitance c will refer to the f capacity C2 and C3 divided electric wire test voltage VREF = G 5xVDD voltage, according to The switching clocks of the switches SW7 and SW8 periodically charge the alternating capacitance α. Before each wire capacitance C2 or C3 performs charge transfer on the alternating capacitor C1, 'the input 222 and the output 226 of the switch SW6 operational amplifier 24 are fed back, and the voltage of the parasitic capacitance Cp2 is charged to VREF' to be reduced to Understand the effect of the sensitivity reduction caused by the compensation of the raw capacitor Cp2. After a plurality of periodic charge transfer to the external sense capacitor, the switch swi' is again interrupted to measure the charge of the reference capacitors C2, c3. The measuring unit 26 has an analog-to-digital converter (ADC) to convert the cross-cutting of the reference capacitors C2 and C3 into a digital signal for the latter circuit to understand the charge change of the alternating capacitor C1. FIG. 3 is a timing diagram of the switch of FIG. . At the beginning of the sensing process, the system controls the opening of 201205395. 5 SW1 causes the input terminal 222 of the operational amplifier 22 to be connected to the sensing electrode plate 12 to reset the reference capacitor c2 at the operating point of the VT in the phase p3, and the switch SW4 is switched. And SW6 is connected, the operational amplifier 22 pulls the voltage of the node ντ to the voltage VREF', and the two ends of the reference capacitor C2 are respectively connected to the voltage source and the printed spot VT' to charge the voltage across the reference capacitor C2. Then, in the phase P32, 'open M sw2 is connected to the switch SW7, and the reference capacitor C2 and the intersection f are electrically charged. In the phase P34, the switch SW6 is connected, and the operational amplifier 22f sub-parasitic capacitance 〇>2 is compensated back, and the voltage of the node is pulled back to the reference voltage VREF. Since the reference capacitor G needs to be reset at the initial stage, the first-time phase J>34 will be connected to the _ secret, so that the reference capacitor C3 is connected to the ground terminal and the sense plate 12 at both ends, and the reference capacitor C3 is crossed. Encharged to VREF. In the phase P36, _SW3 is connected to the switch, and the reference m and the interaction capacitor C1 are subjected to charge transfer. The phase PM in turn connects the switch SW6, and the operational amplifier 22 replenishes the parasitic capacitance cp2 to pull the voltage of the node ντ back to the reference dragon WEF. Then, as long as the operation phases p32, p34, P36, and P38' are repeatedly repeated in accordance with the switching of the switches SW7 and SW8, the charge transfer to the parent capacitance C1 is performed a plurality of times. Finally, in the = phase P40, 'interrupt the switch S1 and connect the switch to the lake, the reference electric valleys C2 and C3 (4) to add the mutual charge, and then the rear unit 100% converts the fine sense with the interaction capacitor C1 to be tested. Measuring data. FIG. 4 is a voltage waveform diagram of the node and the certificate of FIG. 2. According to the timing diagram of FIG. 3, the sampling circuit 24 periodically repeats the operation phases p32, (9), p36 f38, the reference capacitors C2, C3 perform multiple charge transfer on the alternating capacitance α, and the voltages of the nodes DN and UP are due to the reference capacitance. C2, CW charge becomes 201205395 and changes stepwise, and the first-order first-order approaches the reference voltage VREF. 5 is a second embodiment of the sensing circuit of the present invention. The sensing electrode plates 10, 12, the switching circuit 20, the operational amplifier 22, and the switches SW1, SW6 and the circuit of FIG. 2 are identical. The sampling circuit 42 simplifies the two reference capacitors C2, C3 of FIG. 2 into a reference capacitor C2, while omitting the switch SW3, which is directly connected between the ground terminal and the input terminal 222 of the operational amplifier 22. Figure 6 is a timing diagram of the switch of Figure 5, which operates in a similar manner to the embodiment of Figure 2 with only a few operations associated with reference capacitor C3. The voltage waveform of the node DN in this embodiment is the same as the voltage waveform shown in Fig. 4. 7 is a third embodiment of the sensing circuit of the present invention, and the sensing electrode plates 1A, 12, the switching circuit 20, the operational amplifier 22, and the switch SW SW6 and the circuit of FIG. 2 are identical. The sampling circuit 44 simplifies the two reference capacitors C2, C3 of FIG. 2 into a reference capacitor C3 while omitting the switches SW2 and SW4. 8 is a timing diagram of the switch of FIG. 7 in a manner similar to that of the embodiment of FIG. 2, with only the operation associated with the reference capacitor C2 being omitted, and in the final measurement unit 26 the conversion is related to the interaction capacitor C1 to be tested. When sensing the data, SW6 replaces the original SW2' so that the measuring unit 26 measures the amount of charge of C3. The voltage waveform of the node UP in this embodiment is the same as the voltage waveform shown in Fig. 4. Figure 9 is a fourth embodiment of the sensing circuit of the present invention. The sensing electrode plates 1, 12, the switching circuit 20, the operational amplifier 22, and the switches SWb SW6 and the circuit of Figure 2 are phase $. The sampling circuit 46 replaces the two reference capacitors C2, C3 of Fig. 2 with a reference electric valley C4 by switching between the switches sup and SDN. 1 is a timing diagram of the switch of FIG. 9, which operates in a similar manner to the embodiment of FIG. 2, but only resets the reference capacitor C4 once in the operation of the phase phase P50, and connects the switches m 7 SDN, SW4, and SW6. Both ends of the reference capacitor C4 are given a voltage vdd and a reference voltage VREF=0.5xVDD, so that the voltage across the reference capacitor C4 is charged to VREF. The phase P52 causes the reference capacitor C4 to perform charge transfer on the capacitor C1. The phase P54 causes the operational amplifier 22 to compensate the parasitic capacitance CP2, and pulls the voltage of the node VT back to the reference voltage VREF. The phase P56 reverses the positive and negative terminals of the reference capacitor C2 and performs charge transfer on the alternating capacitor C1. The phase P58 pulls the negative input of the operational amplifier 22 back to the reference voltage VREF with a negative feedback state. Next, as long as the operation phases P52, P54, P56, and P58 are periodically repeated in accordance with the switching of the switches sw7 and SW8, the charge capacitance C1 is subjected to charge transfer a plurality of times. Finally, in the phase P60, the switch SW1 is interrupted, and the switches SW2, SW5' are connected to cause the measuring unit 26 of the subsequent stage to convert the voltage across the reference capacitor C4 to infer the change of the alternating capacitance C1. The invention can be applied to one-dimensional and two-dimensional capacitive touch panels and capacitive touch buttons. Because it can effectively compensate the parasitic capacitance and increase its sensitivity to the interaction capacitance, in addition to resisting water droplets and water film interference, it can achieve multi-touch positioning in the application of two-dimensional capacitive touch panels. efficacy. The embodiment of Figures 2 and 9 is more resistant to noise. A schematic diagram of the circuit of Figure 9 is used to suppress or eliminate low frequency noise. It is assumed that the low-frequency noise changes slowly, and the circuit operating frequency is much higher than the low-frequency noise frequency. The interference of low-frequency noise in the 01 and 02 periods can be regarded as +Δνη. Then, in the 0 1 cycle, the noise will generate noise in the spring capacitor C4. If it is % weeks _ continue to be heard by the lion: it will accumulate to the reference capacitor C4 as the waveform of Vnoise. However, the embodiment of ^9 will be shown in the 02 shed time domain u, and the polarity of the capacitor of the reference C4 will be reversed to make gj be a miscellaneous and cause a reference voltage to generate a voltage waveform across the PCT such as vcn. The noise voltage is eliminated, and this action is used to achieve the low frequency noise level. The same operational concept, if there is - a series of noise frequency is equal to or higher than the circuit operation scale _ pulse into the person, as long as the ο and 0 cycle 'noise pulse has done the same amount of high and low view, job noise forest test The noise voltage generated by the capacitor C4 will cancel each other, and the error caused by the real ___ in Fig. 2 is stored in the reference capacitors Q and α respectively. In the last measurement, the reference capacitor 〇2 and (:3 (4) In addition to the error of the miscellaneous secrets, Fig. 12 is an integrating triangle (four) coffee wheel) sensor incorporating the sensing circuit of the present invention. The sensing circuit 62 of the present invention connects the two sensing electrode plates 1G and 12 constituting the alternating capacitance ,, and measures the amount of charge transferred from the reference capacitor C5 to the alternating capacitor C1 according to the measuring method of the integral triangle, and the clock comparator ((10) Compamw; CCMP) 66 is the reference voltage provided by the reference voltage circuit 68. When the output of the pulse comparator is at a low level, the micro control unit (10) (10) 〇 > coffee 〖Unit; MCU) 7G control 贱 (10) makes the reference capacitance C5 material part of the interaction f capacity α load transfer, do - complete The cycle is completed by touching f彳_, 敎-reading silk differential). When the output of the pulse comparator 66 is at a high level, the micro control unit controls the digital control (four) to ride the 64 test capacitor Ο, the charge m of the reference capacitor ο is the pseudowire, and the charge is supplemented by the single-ended shirt (four) type, and the composition Differential Integral Triangular Sensor (Lu rentiai_delt_) ^ Application 夕崎 分二角单位 unit in the second _ capacitive touchpad system frame, Lilai control unit 7G control multiplexer 72 simultaneous parallel processing The group integrates the triangle sensing private 74, enhances the sensing speed of the two-dimensional capacitive touch panel, and can increase the operation record, and obtains the average low noise interference by the capital, and provides the two-dimensional capacitive touch panel more instantly. The above description of the preferred embodiments of the present invention is intended to be illustrative, and is not intended to limit the scope of the invention to the disclosed embodiments. Or variations are possible, and the embodiments are intended to illustrate and explain the principles of the present invention, and to enable those skilled in the art to select and describe the present invention in various embodiments. The technical idea of the present invention is intended to be The scope of the patent and its equalization are determined. [Simplified illustration of the drawings] Fig. 1 is a schematic diagram showing changes in the mutual capacitance between the sensing electrode plates; Fig. 2 is a first embodiment of the sensing circuit of the present invention; FIG. 4 is a voltage waveform diagram of nodes DN and UP of FIG. 2; FIG. 5 is a second embodiment of the sensing circuit of the present invention; FIG. 6 is a timing chart of the switch of FIG. A third embodiment of the sensing circuit of the present invention; FIG. 8 is a timing diagram of the switch of FIG. 7; FIG. 9 is a fourth embodiment of the sensing circuit of the present invention; FIG. 10 is a timing chart of the switch of FIG. 11 is a schematic diagram of the circuit of FIG. 9 for eliminating low frequency noise; FIG. 12 is an integral triangular sensor incorporating the sensing circuit of the present invention; and FIG. 13 is for applying a plurality of sets of integral triangular sensors to a two-dimensional capacitive touch panel. System architecture diagram 201205395 [Main component symbol description]
10 第一感應電極板 12 第二感應電極板 14 介質層 16 手指 18 水膜 20 切換電路 22 運算放大器 222 運算放大器的輸入端 224 運算放大器的輸入端 226 運算放大器的輸出端 24 取樣電路 26 量測單元 42 取樣電路 44 取樣電路 46 取樣電路 62 感測電路 64 數位控制電流源 66 時脈比較器 68 參考電壓電路 70 微控制單元 72 多工器 74 積分三角感測單元 76 資料閂 201205395 78 二維電容式觸控面板10 first sensing electrode plate 12 second sensing electrode plate 14 dielectric layer 16 finger 18 water film 20 switching circuit 22 operational amplifier 222 operational amplifier input 224 operational amplifier input 226 operational amplifier output 24 sampling circuit 26 measurement Unit 42 Sampling Circuit 44 Sampling Circuit 46 Sampling Circuit 62 Sensing Circuit 64 Digital Control Current Source 66 Clock Comparator 68 Reference Voltage Circuit 70 Micro Control Unit 72 Multiplexer 74 Integral Triangle Sensing Unit 76 Data Latch 201205395 78 Two-Dimensional Capacitor Touch panel
m 12m 12