201203525 六、發明說明： 【發明所屬之技術領域】 本發明是有關於一種影像感測器，且特別是有關於一種背 面照度影像感測器之封裝製程。 【先前技術】 影像感測器係用以將接收到的光訊號轉換為電訊號，其主 要應用於各種數位影像電子產品中。傳統影像感測器係將感測 元件δ又置於半導體基板上，並且感測元件被配置於半導體基板 上的多層金屬線路層所覆蓋。進入傳統影像感測器的光線必須 0 先通過多層金屬線路層才能到達感測元件，因此，感測元件之 感光能力受到局限。為了進一步提升影像感測器的感光能力， 近年来背面照度影像感測器随之出現。背面照度影像感測器係 把感測元件置於半導體基板的背面，而於半導體基板上（正面^ 僅是配置多層金屬線路層。由於背面照度影像感測器之感光元 件沒有被金屬線路層所覆蓋，因此感光量大增，從而使得影像 感測器之感光能力大大增強。 目前，背面照度影像感測器之封裝製程，通常包括將半導 體基板與載板貼合，於半導體基板設置感測元件，以及於載板 配置金屬線路層等步驟。一般地，為使配置於載板的金屬線路 層與半導體基板電性連接，通常在半導體基板與载板貼合之 後，根據半導體基板上多個接合墊的位置，再在載板上開設對 應這些接合墊的孔，並進行後續之金屬化製程，以製作導通孔 及於半導體基板製作金屬線路。但是，由於半導體基板與載板 貼合之後，半導體基板的這些接合墊便處於不可見狀態，因 此，在載板開孔過程中要對位這些接合墊比較困難，不儘費時 費力導致封裝效率低下，而且還很容易出現孔與接合塾對位不 準確，進而影響封裝品質。 201203525 【發明内容】 有鑑於此’本發日歧供—射面照度影像制器之封 程，以降低對位難度，從而提高封裝效率並提升封裝品質4 為達上述優點，本發明翻—種背面照度f彡像感測器 裝製程，其包括以下步驟。提供晶圓，此晶圓具有第一表= i與！1:相對之第二表面，且第一表面設置有複數個接合 墊加工第-載板，以於第一載板中形成複數個盲孔，其 -載板具有貼合面以及無合面姆之背面，且這 合面形成開口。黏著第-載板之貼合面與晶圓之第一表面且 使盲孔分別與接合墊相對應。形成間隔層於晶圓之第二表 上，其中間隔層具有至少一間口區暴露出晶圓之第二表 曰上於第-載板之皮面進行载板薄化製程，以使這些 為貫通薄化後的第-載板之複數通孔，且暴露出接合墊。 絕緣層於第-載板上，以覆蓋背面以及通孔之側^ ▲ 層於絕緣層上，並填入通孔中，以使導電層電連接於接^電 括·明之一實施例中，上述之加工第一载板之方法包 括.&供第一載板；形成氧化層於第-載板之貼合面上；以及 ^除部分氧化層及形成這些盲孔於第—載板中。在本發明之一 施例中’上述之移除部分氧化層及形成這些盲孔之方法包括 钱刻製程或鑽孔製程。在本發明之—實施例中，上述 板為矽基板，且氧化層為二氧化矽層。 在本發明之—實施财，上狀設置這些感_元件之方 :二遍形成光二極體於晶圓之第二表面；形成彩色濾光片於 一極體上；以及形成微透鏡於彩色濾光片上。 在本發明之一實施例中，上述之第二載板為透明基板。 201203525 圓薄化f形成該間隔層之前，更包括晶 形成研磨表面.包括：研磨晶圓之第二表面’以 仅茚，以及蝕刻晶圓之研磨表面。 明之—實施例中，上述之絕緣層為二氧化石夕層。 、、尤積絕缘;之—實施例中’上述之職絕緣層之方法包括： ==載板之背面’以覆蓋背面、接合墊:及通 之-實施例Φ 於接合墊上之絕緣材料。在本發明 法。 ’上述之沈積絕緣材料之方法為化學氣相沈積 之一實施例中，上述之間隔層為圖案化黏著層。 ιίΓΓΓ實施例中，上述之黏著第一載板之貼合面於 曰曰0之第一表面之步驟係於真空環境中進行。 、 裝製點’本發明糾—婦面照度雜感測器之封 裝t，其包括以下步驟。提供晶圓， ^ ί加:第表面:r第二表面，且第，設置=數= 二1且通孔’其中第 載板八有貼a面以及與齡面相對之背面， 貼合面與背面。黏著第一載板之貼合面與晶圓二上貝f 使通孔分職接合墊相制，且祕錢 = :之::表:上’其中間隔層具有至少-開口區 =第:表面。在此至少一開口區設置複數偏感測器元件。勒著 第-載板於間隔層上。形成絕緣層於第一載板上，以覆蓋背面 以及通孔之側壁。形成導電層於絕緣層上，並填人通孔 使導電層電連接於接合塾。 λ f日巧背面照度影像感測器之封裝製程，在晶_著於 第-載板“，已於第-餘中形成複數個盲孔或通孔，因 201203525 此，僅需要在晶_著於第-載板時，進行這 接合墊的躲。聽在職㈣肺中，f考慮 置與不可見的接合墊的對位的問題’從而有效降低了對位 ，，改善了對位準雜，進而有助於提高封裝效率並提升封裝 口口質 ，為讓本發明之上述和其他目的、特徵和優點能 懂’下文特舉較佳實施例’並配合所關式，作詳細說明如下。 【實施方式】 請參閱圖1A至圖1H，圖1A至圖1H是本發明楚一杳斤 例之背面照度影像感測ϋ之封裝製㈣流程剖面干i第圖一實私 先’提供晶圓議，例如是半ί體晶圓。 曰曰圓100具有第一表面102以及與第一表面1〇2相對之第二表 面104。第一表面102設置有複數個接合墊1〇6。 一 請參照圖1Β，然後，加工第一載板u〇，以於 110中形成複數個盲孔m。具體來說，提供第—載板11〇， 載板110具有貼合面114以及與貼合面114相對之背面lb。 形成氧化層118於第一載板u〇上，钱刻移除部分氧 m 且蚀刻形成盲孔112。其中盲孔112係指盲孔ιΐ2並未貫通貼 合面114與背S 116’僅於貼合面114形成開口 μ。在直他 移除部分氧化層118及形▲盲孔112的步驟亦可採 用鑽孔製程，例如雷射鑽孔製程4本實施例中 no H基板，且氧化層118為二氧切層，但不以此為^。 黏著第-載板㈣之貼合面114與晶圓⑽ 使盲孔112分別與接合墊106相對應，即， 合面114形成之開口 119分別與接合塾相 對。換句話說，接合$ 1G6係暴露於盲孔112中。氧化層⑽ 201203525 位於第一表面102及貼合面114之間，且氧化層118可電絕緣 接σ整106。值得注意的是，在其他實施例巾亦可使用其他 絕緣性黏著層黏著第—载板11G與晶圓削，但是後續需要將 接a塾106上的黏著材料去除。本實施例中，黏著第一载板 110之貼合面114於晶圓1〇〇之第一表面1〇2係於真空環境中 進行，因此可避免空氣殘留於盲孔中。201203525 VI. Description of the Invention: [Technical Field] The present invention relates to an image sensor, and more particularly to a packaging process for a back illumination image sensor. [Prior Art] The image sensor is used to convert the received optical signal into an electrical signal, which is mainly used in various digital image electronic products. The conventional image sensor places the sensing element δ on the semiconductor substrate again, and the sensing element is covered by a multilayer metal wiring layer disposed on the semiconductor substrate. The light entering the conventional image sensor must pass through the multi-layer metal circuit layer to reach the sensing element. Therefore, the sensing capability of the sensing element is limited. In order to further enhance the sensitivity of the image sensor, back-illumination image sensors have appeared in recent years. The back-illuminance image sensor places the sensing element on the back side of the semiconductor substrate, and on the semiconductor substrate (the front side is only configured with a plurality of metal wiring layers. Since the photosensitive element of the back-illuminance image sensor is not covered by the metal wiring layer) Covering, so the amount of light is greatly increased, so that the photosensitive capability of the image sensor is greatly enhanced. Currently, the packaging process of the back-illuminated image sensor generally includes bonding the semiconductor substrate and the carrier, and providing the sensing component on the semiconductor substrate. And a step of arranging a metal wiring layer on the carrier. Generally, in order to electrically connect the metal wiring layer disposed on the carrier to the semiconductor substrate, usually after the semiconductor substrate is bonded to the carrier, a plurality of bonding on the semiconductor substrate is performed. Positioning the pads, and then forming holes corresponding to the bonding pads on the carrier, and performing subsequent metallization processes to form via holes and fabricating metal lines on the semiconductor substrate. However, after the semiconductor substrate is bonded to the carrier, the semiconductor These pads of the substrate are invisible, so it is necessary to These bonding pads are difficult, and the packaging efficiency is not time-consuming and labor-intensive, and the alignment of the holes and the joints is inaccurate, which in turn affects the package quality. 201203525 [Inventive content] In view of this, the present invention The process of sealing the surface illuminance image controller to reduce the difficulty of alignment, thereby improving the packaging efficiency and improving the package quality. 4 In order to achieve the above advantages, the present invention provides a back illuminance image sensor assembly process including the following steps. Providing a wafer having a first surface = i and !1: opposite the second surface, and the first surface is provided with a plurality of bonding pads to process the first carrier, to form a plurality of blinds in the first carrier a hole, the carrier plate has a bonding surface and a back surface of the non-closing surface, and the bonding surface forms an opening. The bonding surface of the first carrier layer and the first surface of the wafer are adhered and the blind holes are respectively associated with the bonding pads Correspondingly, forming a spacer layer on the second surface of the wafer, wherein the spacer layer has at least one opening region exposing the second surface of the wafer and performing a thinning process on the surface of the first carrier to make the carrier thinning process For the first through the thinning - a plurality of through holes of the carrier and exposing the bonding pads. The insulating layer is on the first carrier, covering the back surface and the side of the via hole ▲ layer on the insulating layer, and filling the through holes to make the conductive layer In one embodiment of the invention, the method for processing the first carrier includes: & for the first carrier; forming an oxide layer on the bonding surface of the first carrier; and removing the portion The oxide layer and the formation of the blind vias in the first carrier. In one embodiment of the invention, the method of removing a portion of the oxide layer and forming the blind vias includes a process of engraving or drilling. In the embodiment, the plate is a ruthenium substrate, and the oxide layer is a ruthenium dioxide layer. In the present invention, the sensation-component is disposed on the upper side: the second generation of the photodiode on the wafer Forming a color filter on a body; and forming a microlens on the color filter. In one embodiment of the invention, the second carrier is a transparent substrate. 201203525 Before forming the spacer layer, the thinning f further includes crystal forming the abrasive surface. The method comprises: grinding the second surface of the wafer to smear only, and etching the polished surface of the wafer. In the embodiment, the insulating layer is a layer of SiO2. In particular, the method of the above-mentioned insulating layer includes: == the back side of the carrier plate to cover the back surface, the bonding pad: and the insulating material of the embodiment Φ on the bonding pad. In the method of the invention. The above method of depositing an insulating material is chemical vapor deposition. In one embodiment, the spacer layer is a patterned adhesive layer. In the embodiment, the step of adhering the bonding surface of the first carrier to the first surface of the 曰曰0 is performed in a vacuum environment. The mounting point 'the corrective-face-to-face illuminance sensor package t includes the following steps. Providing the wafer, ^ ί plus: the first surface: r the second surface, and the first, the setting = the number = two 1 and the through hole 'where the first carrier plate 8 has a face and the back face opposite the age face, the fit face and back. Adhesive surface of the first carrier is adhered to the wafer, and the top of the wafer is used to make the through-hole joint bonding pad, and the secret money =::: Table: upper 'where the spacer layer has at least - open area = first: surface . A plurality of partial sensor elements are disposed in at least one of the open areas. Pull the first carrier plate on the spacer layer. An insulating layer is formed on the first carrier to cover the back surface and sidewalls of the via holes. A conductive layer is formed on the insulating layer, and a via hole is filled to electrically connect the conductive layer to the bonding pad. λ f, the back-illumination image sensor packaging process, in the crystal - on the first - carrier ", has formed a plurality of blind holes or through holes in the first -, because 201203525, only need to be in the crystal In the first-carrier, the hiding of the bonding pad is carried out. In the middle of the working (4) lung, f considers the problem of the alignment of the invisible bonding pad, thereby effectively reducing the alignment and improving the alignment. Further, in order to improve the packaging efficiency and improve the quality of the package mouth, the above and other objects, features and advantages of the present invention will become apparent from the following description. 1A to 1H, FIG. 1A to FIG. 1H are a package of a back-illuminance image sensing device of the present invention. (IV) Process profile. For example, the wafer 100 has a first surface 102 and a second surface 104 opposite to the first surface 112. The first surface 102 is provided with a plurality of bonding pads 1〇6. Figure 1Β, then, processing the first carrier u〇 to form a plurality of blind holes in 110 Specifically, a first carrier 11 is provided, and the carrier 110 has a bonding surface 114 and a back surface lb opposite to the bonding surface 114. An oxide layer 118 is formed on the first carrier u〇, and the carrier is removed. Part of the oxygen m and etching forms a blind hole 112. The blind hole 112 means that the blind hole ι2 does not penetrate the bonding surface 114 and the back S 116' forms an opening μ only to the bonding surface 114. The partial oxide layer 118 is removed in the straight direction. The step of forming the blind hole 112 may also be performed by a drilling process, such as a laser drilling process 4 in the present embodiment, and the oxide layer 118 is a dioxygen layer, but not as a ^. The bonding surface 114 of the carrier (4) and the wafer (10) respectively make the blind holes 112 correspond to the bonding pads 106, that is, the openings 119 formed by the bonding surfaces 114 are respectively opposed to the bonding pads. In other words, the bonding $1G6 system is exposed to blindness. In the hole 112, the oxide layer (10) 201203525 is located between the first surface 102 and the bonding surface 114, and the oxide layer 118 can be electrically insulated from the σ. 106. It is noted that other insulating coatings may be used in other embodiments. The layer adheres to the first carrier 11G and the wafer is cut, but the subsequent need to connect the adhesive material on the a 106 In this embodiment, the first adhesive bonding surface 110 of the carrier 114 within the vacuum environment to the first surface of the wafer based 1〇〇 of 1〇2, thus avoiding air remaining in the blind hole.
於黏著第一載板11〇之貼合面114與晶圓1〇〇之第一表面 102之後，可選擇性地進行晶圓薄化製程，以將晶圓刚縮減 至適當的厚度。請參照圖1D，在晶圓薄化製程中，首先，研 磨晶圓100之第二表面104，以形成研磨表面（圖未示）。研 磨b曰圓100的方法，例如是利用銳削(milling)、磨削(grinding) 或研磨(polishing)等方式。然後，蝕刻晶圓1〇〇之研磨表面， 從而獲得經薄化之晶圓100’。經薄化之晶圓1〇〇，具有與第一 表面102相對之第二表面1〇4,。 請參照圖1E，接著，形成間隔層12〇於晶圓100,之第二 表面104’上，用以於第一載板110與第二載板140之間形成一 間距。間隔層120具有至少一開口區122暴露出晶圓1〇〇,之第 二表面104’。 請繼續參照圖1E，之後，設置複數個感測器元件130在 開口區122之晶圓100,上。具體設置的方法根據感測器元件 130的不同會有所差異。在本實施例中，係首先在開口區122 之晶圓100’之第二表面1〇4’形成光二極體132,並嵌入晶圆 1〇〇’中。然後，於光二極體132上形成彩色濾光片134。接著， 於彩色濾光片134上形成微透鏡136。之後，黏著第二載板140 於間隔層120上。第二載板14〇為透明基板，例如玻璃基板。 本實施例中’間隔層12〇為圖案化黏著層，第二載板140可透 201203525 過間隔層120直接黏著於晶圓100,上’但並不以 _ 層120亦可採用其他適宜結構。 又間隔 請參照@ 1F ’接著，於第一載板110之背面u 板薄化製程，以將第一載板Π0縮減至適當的厘择戰 經薄化之第一載板H0，，並且使第一載板11〇之^孔' =形成 貫通薄化後的第-載板11〇,之通孔i 12,。換句話說 貫通經薄化之第一載板110’之貼合面114與背面U6, 接合墊106從通孔U2,暴露出來。本實施例中，薄化丄^使 110的方法，例如是利用蝕刻、銑削、磨削或研磨等方、板 請參照圖1G，形成絕緣層150於第一載拓11n, L工 蓋背面116,以及通孔112,之側壁。本實施例中，首’以覆 性地沈積絕緣材料於第一載板11〇，之背面116，，二=應 ⑽、接合塾廳以及通孔112，之側壁。其中絕緣材 -氧化碎。然、後’侧移除位於接合塾1G6上之絕緣材料，= 成絕緣層150。在本實補巾’沈積絕緣材料之方法為化風^ 相沈積法，但並不以此為限。 丨 千乳 請參照圖1H，形成導電層16〇於絕緣層15〇上，並填入 通孔112’中，以使導電層16〇電連接於接合墊1〇6。導電層16〇 可採用電鑛或沈積的方法形成，在此不予詳述。 圖2是本發明第二實施例之背面照度影像感測器之封裝 製程的第一載板與晶圓黏著之剖面示意圖。本發明第二實施例 之背面照度影像感測器之封裝製程與第一實施例之區別在於 加工第一載板的步驟。請參照圖2，具體地，本實施例中，加 工第一載板ll〇a，以形成複數個通孔112a於第一載板11〇a 中。第一載板ll〇a具有彼此相對的貼合面114與背面116。 其中通孔112a貫通第一載板11〇a之貼合面u4與背面116。 201203525 之後’黏著第一載板110之貼合面114於晶圓100之第一表面 102，使通孔112a分別與接合墊106相對應，並使接合墊1〇6 從通孔112a暴露出來。因為第一載板ll〇a中已經形成有通孔 112a ’因此，本實施例中，當第一載板11〇a厚度適當時，不 需要進行載板薄化製程。當然，如果第一載板11〇a厚度不適 當，亦可選擇性地進行載板薄化製程，以使第一載板11〇a縮 減至適當的厚度。After the bonding surface 114 of the first carrier 11 and the first surface 102 of the wafer 1 are adhered, the wafer thinning process can be selectively performed to reduce the wafer to a proper thickness. Referring to FIG. 1D, in the wafer thinning process, first, the second surface 104 of the wafer 100 is ground to form an abrasive surface (not shown). The method of grinding the round 100 is, for example, by means of milling, grinding, or polishing. Then, the polished surface of the wafer 1 is etched to obtain a thinned wafer 100'. The thinned wafer has a second surface 1〇4 opposite the first surface 102. Referring to FIG. 1E, a spacer layer 12 is formed on the second surface 104' of the wafer 100 for forming a space between the first carrier 110 and the second carrier 140. The spacer layer 120 has at least one open region 122 that exposes the second surface 104' of the wafer. Referring to FIG. 1E, a plurality of sensor elements 130 are disposed on the wafer 100 of the open region 122. The method of setting specifically varies depending on the sensor element 130. In the present embodiment, the photodiode 132 is first formed on the second surface 1'4' of the wafer 100' of the open region 122 and embedded in the wafer 1'. Then, a color filter 134 is formed on the photodiode 132. Next, a microlens 136 is formed on the color filter 134. Thereafter, the second carrier 140 is adhered to the spacer layer 120. The second carrier 14 is a transparent substrate such as a glass substrate. In this embodiment, the spacer layer 12 is a patterned adhesive layer, and the second carrier 140 can be directly adhered to the wafer 100 through the spacer layer 120, but the other layer may also be used. Please refer to @1F' for the interval. Then, the board is thinned on the back side of the first carrier 110 to reduce the first carrier Π0 to the appropriate thinned first carrier H0, and The hole of the first carrier 11 is formed as a through hole i 12 which penetrates the thinned first carrier 11 。. In other words, the bonding surface 114 and the back surface U6 of the thinned first carrier 110' are passed through, and the bonding pad 106 is exposed from the through hole U2. In the present embodiment, the method of thinning the 110, for example, by etching, milling, grinding or grinding, etc., please refer to FIG. 1G to form the insulating layer 150 on the first carrier 11n, the back surface of the L-cover 116. And the through hole 112, the side wall. In this embodiment, the first 'depositively deposits the insulating material on the first carrier 11 〇, the back side 116, the second side, the second side, and the side wall 112. Among them, the insulating material - oxidized. However, the back side removes the insulating material on the bonding pad 1G6, and becomes the insulating layer 150. In the present invention, the method of depositing the insulating material is a chemical vapor deposition method, but is not limited thereto. Referring to FIG. 1H, a conductive layer 16 is formed on the insulating layer 15A and filled in the via hole 112' to electrically connect the conductive layer 16A to the bonding pad 1〇6. The conductive layer 16 can be formed by electrowinning or deposition and will not be described in detail herein. 2 is a cross-sectional view showing the adhesion of a first carrier to a wafer of a package process of a back-illuminance image sensor according to a second embodiment of the present invention. The packaging process of the back side illumination image sensor of the second embodiment of the present invention differs from the first embodiment in the step of processing the first carrier. Referring to FIG. 2, specifically, in the embodiment, the first carrier plate 11a is processed to form a plurality of through holes 112a in the first carrier 11a. The first carrier 11a has a bonding surface 114 and a back surface 116 that face each other. The through hole 112a penetrates the bonding surface u4 and the back surface 116 of the first carrier 11A. After 201203525, the bonding surface 114 of the first carrier 110 is adhered to the first surface 102 of the wafer 100, so that the through holes 112a respectively correspond to the bonding pads 106, and the bonding pads 1〇6 are exposed from the through holes 112a. Since the through hole 112a' has been formed in the first carrier 11a, in this embodiment, when the thickness of the first carrier 11a is appropriate, the carrier thinning process is not required. Of course, if the thickness of the first carrier 11a is not appropriate, the carrier thinning process can be selectively performed to reduce the first carrier 11a to a proper thickness.
综上所述，本發明之背面照度影像感測器之封裝製程至少 具有以下優點：在晶圓黏著於第一載板之前，已於第一載板中 形成複數個盲孔或通孔，因此，僅需要在晶圓黏著於第一載板 的步驟時，進行這些盲孔或通孔與接合墊的對位。避免在形成 孔的過权中，尚需考慮進行鑽孔的位置與不可見的接合墊的對 位的問題，從而有效降低了對位難度，改善了對位準確性，進 而有助於提高封裝效率並提升封裝品質。 雖然本發明已以較佳實施例揭露如上，然其並非用以限定 本發明’任健習此技藝者’在不麟本發明之精神和範圍 内’ 2作些許之更動與潤飾，因此本發明之㈣範圍當視後 附之申请專利範圍所界定者為準。 【圖式簡單說明】 〜至圖1H疋本發明第—實施例之背面照度影像感測 器之封裝製程的流程剖面示意圖。 劍楚2本發明第二實施例之背賴度影像感測器之封裝 製私的第-載板與晶圓黏著之剖面示意圖。 【主要元件符號說明】 100、100’ ：晶圓 102 :第一表面 201203525 104、104’ ：第二表面 106 :接合墊 110、110a :第一載板 112 :盲孔 112’、112a :通孔 114 :貼合面 116、116’ ：背面 118 :氧化層 119 :開口 120 :間隔層 122 :開口區 130 :感測器元件 132 :光二極體 134 :彩色濾光片 136 :微透鏡 140 :第二載板 150 :絕緣層 160 :導電層In summary, the package process of the back illumination image sensor of the present invention has at least the following advantages: a plurality of blind holes or through holes are formed in the first carrier before the wafer is adhered to the first carrier, It is only necessary to perform the alignment of the blind vias or vias with the bonding pads when the wafer is adhered to the first carrier. In the process of forming the hole, it is necessary to consider the problem of the position of the drilling and the alignment of the invisible bonding pad, thereby effectively reducing the alignment difficulty, improving the alignment accuracy, and thus contributing to the improvement of the package. Efficiency and improved package quality. Although the present invention has been disclosed in the above preferred embodiments, it is not intended to limit the invention to the invention and the invention may be modified and modified in the spirit and scope of the present invention. The scope of (4) is subject to the definition of the scope of the patent application attached. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1H is a schematic cross-sectional view showing a process of a package process of a back side illumination image sensor according to a first embodiment of the present invention. Jian Chu 2 The package of the backside image sensor of the second embodiment of the present invention is a cross-sectional view of the adhesion between the first carrier and the wafer. [Description of main component symbols] 100, 100': wafer 102: first surface 201203525 104, 104': second surface 106: bonding pads 110, 110a: first carrier 112: blind holes 112', 112a: through holes 114: bonding surface 116, 116': back surface 118: oxide layer 119: opening 120: spacer layer 122: opening region 130: sensor element 132: photodiode 134: color filter 136: microlens 140: Two carrier plates 150: insulating layer 160: conductive layer