201136120 六、發明說明： 【發明所屬之技術領域】 本發明係關於一種電源轉換系統，特別是關於一種應用於單電感 多輸出直流/直流轉換器之減少互穩壓效應之電源轉換系統與電源控 制方法》 【先前技術】 現今電源管理晶片已廣泛應用於手機、PDA、筆記型電腦等可攜 式電子產品。在系統晶片發展的趨勢下，為了減少晶片面積，將採用 單電感多輸出直流/直流轉換器的架構。然而，此多輸出架構將存有穩 胃定度不佳與互穩壓效應的問題。 傳統主要為將多輸出相互獨立，使得輸出端不被彼此負載變化所 干擾，以解決互穩壓效應問題》可利用連續假導通(pseucj0_ccM>電流 技術，整體系統有如不連續電流模式(DCM)的狀態，將使系統易於穩 定。且由於具有相當於不連續電流模式之零電流，每個切換週期内具 有一緩衝階段，使得瞬間負載變化不會影響下一週期，以減少互穩壓 效應。然而，此方式必須在整個脈衝寬度調變(pWM)週期内加入一續 流(Freewheel)階段’由於非理想導通開關的等效電組效應，將使大量 % 功率會於此階段内消耗，整體系統的導通損(C〇nducti〇n l〇ss)將因此 增加’進㈣響效率轉換。此外，續流階段電感帽存雜量無法傳 至輸出端’平均電感電流將大於輸出負載的總和^且因單電感多輸出 模組架構之輸出電感電流不連續的特性，較大的平均電感電流會造成 較大之輸出電壓漣波，因此，需—高效能後級讎電路對輸出電壓進 一步處理。 、另種做法，為採取優先次序能量分配流程。然而，此方式僅僅 適用於某特定之負·態，並且其係细味^控纖出電壓，相棘 於閉迴路t採驗差放大ϋ健制，紐觀效料盡理想。 此外可使用電感搭配電荷幫浦(Charge pump)的架構。不過， 201136120 外使用外部電容與二極體，且會有較大的輸出電壓連 較差的舰^負電壓輸㈣由電前浦達成’因此，負電壓輸出會有 較差的穩壓情況，實際細上相當不理想。 有鑑於此本發明係針對上述該些困擾與目標，同時結合電子電 路技術與Ai：控制概念，提丨_減少互麵效狀電轉 源控制方法。 、 【發明内容】 本發明之主要目的係在提供—賊少互讎效應之魏轉換系統 電源控制方法，其係利用電壓迴授調整電路調變誤差訊號，以有效 消除互穩壓效應，達到穩定之雙輪出電源。 本發明之另一目的係在提供一種減少互穩壓效應之電源轉換系統 與電源控制方法，其係_預先_輸出電壓能量變化，反應輸出端 負載狀態變動航’峨賴整纽纽職，使縣祕備良好輸 出穩態與暫態響應，功率轉換效率極佳。 本發明之又一目的係在提供一種減少互穩壓效應之電源轉換系統 與電源控制方法，其係可整合於各式電源管理模組，實際應用層面極 為廣泛。 為達到上述之目的’本發明提出之減少互穩壓效應之電源轉換系 統，其係包括一開關電路、一電流偵測器、複數個誤差放大器、一電 壓迴授調整電路、一峰值產生器、一比較器組與一控制電路。開關電 路電性連接至少一電感，藉由開關電路之開啟與閉合控制電感之充放 電’以輸出複數個輸出電壓，且流經電感之電感電流將藉由電流偵測 器偵測'，以感測電感電壓。並且誤差放大器接收迴授之輸出電壓，計 算輸入電壓之誤差訊號。電壓迴授調整電路係接收與調變誤差訊號， 產生複數個誤差調變訊號。且誤差調變訊號將經由峰值產生器所接 收’產生峰值電壓。並且以比較器組將誤差調變訊號與峰值電壓及電 感電壓分別與電感電壓比較，產生複數個電壓訊號，且電壓訊號經由 201136120 控制電路接收，以產生複數個控制訊號用以控制開關電路，控制電感 之充放電。 本發明提出之減少互穩壓效應之電源控制方法，其步驟係包括， 首先’依據複數個輸出電壓之負載狀態，計算複數個輸出電壓之各別 誤差訊號。之後’調變誤差訊號，計算符合負載狀態之輸出電壓之能 量，並產生複數個誤差調變訊號。接著’依據誤差調變訊號計算峰值 電壓，並藉由峰值電壓計算充放電週期之能量總值，使得充電周期之 能量總值為系統所需之總能量’放電週期之能量總值為輪出電壓之能201136120 VI. Description of the Invention: [Technical Field] The present invention relates to a power conversion system, and more particularly to a power conversion system and power supply control for reducing mutual voltage regulation effect of a single inductor multi-output DC/DC converter Method [Prior Art] Today's power management chips have been widely used in portable electronic products such as mobile phones, PDAs, and notebook computers. In the trend of system chip development, in order to reduce the chip area, a single-inductor multi-output DC/DC converter architecture will be adopted. However, this multi-output architecture will have problems with poor stability and mutual voltage regulation. The tradition is mainly to make the multiple outputs independent of each other, so that the output terminals are not interfered by the load changes of each other to solve the problem of mutual voltage regulation effect. Continuous false conduction can be utilized (pseucj0_ccM> current technology, the overall system is like discontinuous current mode (DCM) The state will make the system easy to stabilize. And because it has zero current equivalent to the discontinuous current mode, there is a buffer phase in each switching cycle, so that the instantaneous load change will not affect the next cycle to reduce the mutual voltage regulation effect. This mode must be added to the freewheel phase during the entire pulse width modulation (pWM) period. Due to the equivalent group effect of the non-ideal conduction switch, a large amount of % power will be consumed during this phase. The conduction loss (C〇nducti〇nl〇ss) will therefore increase the 'into four (four) ring efficiency conversion. In addition, the inductive cap memory of the freewheeling stage cannot be transmitted to the output terminal' the average inductor current will be greater than the sum of the output loads ^ and The output inductor current of the single-inductor multi-output module architecture is discontinuous, and the larger average inductor current causes a large output voltage ripple. Therefore, the high-performance post-stage circuit is required to further process the output voltage. Alternatively, the priority energy distribution process is adopted. However, this method is only applicable to a specific negative state, and the system is fine. The fiber is out of voltage, the phase is stuck in the closed loop, and the differential amplifier is used to improve the performance. The inductor can be used in conjunction with the charge pump architecture. However, external capacitors and diodes are used outside of 201136120. Body, and there will be a large output voltage with poor ship ^ negative voltage input (four) by the electric pre-pulse to achieve 'Therefore, the negative voltage output will have a poor voltage regulation, the actual fine is quite unsatisfactory. In view of this invention In view of the above-mentioned problems and targets, combined with electronic circuit technology and Ai: control concept, the method of reducing the mutual-effect electric power source control is provided. [The content of the invention] The main purpose of the present invention is to provide The 转换 effect of the Wei conversion system power control method, which uses the voltage feedback adjustment circuit to adjust the error signal to effectively eliminate the mutual voltage stabilization effect and achieve a stable two-wheel power supply. Another object of the invention is to provide a power conversion system and a power supply control method for reducing the mutual voltage stabilizing effect, which is a _pre- _ output voltage energy change, a change in the load state of the reaction output terminal, and a county It is a good source of steady state and transient response, and the power conversion efficiency is excellent. Another object of the present invention is to provide a power conversion system and a power control method for reducing the mutual voltage stabilization effect, which can be integrated into various power management modes. The module has a wide range of practical applications. In order to achieve the above purpose, the power conversion system for reducing mutual voltage regulation proposed by the present invention includes a switching circuit, a current detector, a plurality of error amplifiers, and a voltage back. The adjustment circuit, a peak generator, a comparator group and a control circuit are electrically connected to the at least one inductor, and the charge and discharge of the inductor are controlled by the opening and closing of the switch circuit to output a plurality of output voltages, and the flow The inductor current through the inductor will be detected by the current detector to sense the inductor voltage. And the error amplifier receives the feedback output voltage and calculates the error signal of the input voltage. The voltage feedback adjustment circuit receives and modulates the error signal to generate a plurality of error modulation signals. And the error modulation signal will be received by the peak generator to generate a peak voltage. And comparing the error modulation signal and the peak voltage and the inductor voltage with the inductor voltage by the comparator group to generate a plurality of voltage signals, and the voltage signal is received by the control circuit of 201136120 to generate a plurality of control signals for controlling the switch circuit, and controlling Charge and discharge of the inductor. The power control method for reducing the mutual voltage stabilizing effect proposed by the present invention comprises the steps of: first calculating respective error signals of the plurality of output voltages according to the load states of the plurality of output voltages. After that, the error signal is modulated to calculate the energy of the output voltage in accordance with the load state, and a plurality of error modulation signals are generated. Then 'calculate the peak voltage according to the error modulation signal, and calculate the total energy value of the charge and discharge cycle by the peak voltage, so that the total energy of the charge cycle is the total energy required by the system. The total energy value of the discharge cycle is the turn-off voltage. Energy
量的總合》最後，依據峰值電壓充電至至少一電感，電感係將儲存充 電周期之能量總值。 底下藉由具體實施例配合所附的圖式詳加說明 發明之目的、技術内容、特點及其所達成之功效。 【實施方式】 本發明提出-種減少互懸效應之電源轉換系統與電源控制方 法’其係利用迴授控制’於輸出端負載狀態變動時，預先翻輸出端 能量的變化’使射、統麟依據貞雜態調整責任週期，快速驅於穩 態，以降低互穩壓效應(Cross Reg_on)的發生。底下則將以^ 施例詳述本發明之技術特徵。 =-圖為本發明電路架構之示意圖，如圖所示，—開關電路印電 連接至少-電感L ’其包含有複數個電晶體開關Μι、m2與 =制電晶體開關M1、M2與M3開啟或閉合控制電感L充放電，以 輸^正輸出電壓(V〇p)與負輸出電壓(v〇n)。H經電感L上之Finally, the charge is charged to at least one inductor based on the peak voltage, and the inductor stores the total energy of the charge cycle. The object, technical content, features and effects achieved by the invention will be explained in detail by way of specific embodiments in conjunction with the accompanying drawings. [Embodiment] The present invention proposes a power conversion system and a power supply control method for reducing the mutual suspension effect, which utilizes feedback control to change the energy of the output end in advance when the load state changes at the output end. The duty cycle is adjusted according to the impurity state, and the steady state is quickly driven to reduce the occurrence of the cross-regulation effect (Cross Reg_on). The technical features of the present invention will be described in detail below by way of example. =- Figure is a schematic diagram of the circuit architecture of the present invention, as shown in the figure, - the switch circuit is electrically connected to at least - the inductor L' which comprises a plurality of transistor switches Μι, m2 and = transistor transistors M1, M2 and M3 open Or the control inductor L is charged and discharged to output a positive output voltage (V〇p) and a negative output voltage (v〇n). H through the inductor L
52 ^ ^t«l(Vs)T EA=n1)峨輸_推迴授電壓 2=/ 肖56，繩編(ea)54㈣係以 ㈣)為基準，產生正輪出電壓誤差訊號(Vep)及負輸出電壓誤 201136120 差訊號(ven)。 正輸出電壓誤差訊號(v印)及負輸出電壓誤差訊號(Ven)|經由與誤 差放大器(EA)54、56電性連接之迴授調整電路58接收其係 將正輸出縣誤差域(vep)、貞輸出電驗差峨(Ven)相互迴授正 輸出電屋誤差訊號(vep)係利用迴授之負輸出電壓誤差訊號(Ven)進行電 壓位準的調變，產生正輸出f壓誤差調變訊號(Vemp);諸出電屋誤差 訊號(ven)_用迴授之正輸出㈣誤差訊號(Vep)進行電壓位準的調 變’產生負輸出電壓誤差調變訊號(Vemn)。 正輸出電壓誤差調變訊號(vemp)及負輸出電塵誤差調變訊號d) 再將輸入至與電壓迴授調整電路58電性連接之一峰值產生器60，其 係利用正輸ώ電壓誤差調變訊號(vemp)與貞輸出電壓誤差調變訊號 (Vernn)產生峰值電壓(Vepn)。此峰值電壓將為電感L之充電週期内最大 的充電限制。 -比㈣組(CMP)62係與紐_n 52、電壓調整電路58及峰 值產生器60電性連接，且接收電感電壓(Vs)、峰值電壓(Vepn)與正輸出 電壓誤差調變訊號(Vemp)，並將峰值電壓(Vepn)以及正輸出電壓誤差調 變訊號(vemp)分別與電感電壓(Vs)進行比較，產生複數個電壓訊號(Vcab) 與(VCA)，並且電壓訊號(VCAB)與(VCA)將傳送至一控制電路64 ^控制 電路64包含一路徑決策邏輯641與一偏壓調整電路642,路徑決策邏 輯641係接收電壓訊號(VCab)與(Vca)以及系統時脈訊號(vclk),控制偏 壓調整電路642產生控制訊號Vg1、Vg2與Vg3，以控制開關電路5〇 之電晶體開關M1、M2與M3開啟或閉合，以達到控制電感L之充放 電。 此外’ 一斜率補償器68係電性連接電流偵測器52 '，用以補償電 感電流變動所產生之次猎波振盈，以及產生所需之系統時脈訊號 (vdk)。且參考電壓(vref>及負輸出電壓(von>分壓側之電壓(Vnn)將由一能 隙參考電路70產生。並且一基體切換電路66設置於開關電路5〇 = 電晶體開關Ms，防止基體效應。另外，電壓迴授調整電路58係可與 201136120 誤差放大器(EA>54及56整合。 以上為本發明之電路系統架構的詳細說明’底下將對於本發明電 源控制方法做進一步說明。 第二圖為本發明電源控制之流程圖，請同實參閱第一圖，如圖所 示’首先，如步驟S10，誤差放大器(EA)54與56依據輸出電壓(v〇p) 及(Von)之負載狀態所迴授之迴授電壓(Vfp)及(vfn)，計算輸出電壓之誤 差訊號(Vep)及(Ver〇。 之後，如步驟S12，電壓迴授調整電路58調變誤差訊號(Vep)及 (Ven) ’產生誤差調變訊號(vemp)及(vemn)，以使得輸出電壓之能量與負 載狀態相符合。 接著’如步驟S14，峰值產生器60依據誤差調變訊號(Vemp)及(Vemn) 計算峰值電壓(Vepn)，藉由峰值電壓(Vepn)計算充放電週期之能量總 值，此峰值電壓(Vepn)係為充電周期之最大充電限制，充電周期之能量 總值將為系統所需之總能量，並且放電週期之能量總值係為輸出電壓 之能量的總合。 最後，如步驟S16，依據峰值電壓(％pn)充電至電感L，電感匕將 儲存充電周期之能量總值。 上述為本發明之電源控制方法的說明，底下將以能量觀點，對於 本發明在負載狀態變動時，透過預先偵測輸出電壓能量變化，達到減 少互穩壓效應加以進一步說明。 第三圖為本發明電感充放電週期之波形圖，並請同時參閱第一圖 之電路架構示意圖與第二圖之電源控制流程圖，以及第四(句圖與第四 (b)圖之正負輸出電壓能量變化示意圖，如圖所示，於穩態時，輸出電 壓之能量分別為負輸出電壓能量2〇與正輸出電壓能量22。在考慮未 設置電壓迴授調整電路58的情況下，當正輸出電壓(V0P)之負載狀態變 化’，負輪出電壓(V〇n)之負載狀態不變時，由於正輸出電流(|叩)將突然增 加’正輸出電壓誤差訊號(V印)係上升，連帶使得峰值電壓(Vepn)上升。 因此’負輪出電壓能量2〇及正輸出電壓能量&鑛增加為負輸出電 201136120 此時互穩壓效應即發生。 θ力成為負輸出電壓能量30， 輸出整電路58在正輪咖(V姻狀態變化，正 I號(Ven)位準，成為負輸出電壓誤差調變訊號(vemn>。如“能夠下拉 繼(l°p)㈣蝴，貞_壓能量40 給Γ 同一脈衝寬度調變(PWM)週期内，負载狀態未有 ===Γ"糧㈣.，㈣發生輸出 以上為正輸出電壓(ν叩)負載狀態變化，正輸出電流(^)增加之狀態 說明。其他各種負餘態下之負.載電流、迴授電壓、誤差調變訊號、 峰值電壓之變化情形係如表⑴所示相對應之能量變化情形係可依據 電壓、電流變化進而推知，在此不在加以贅述。 表（1)52 ^ ^t«l(Vs)T EA=n1)峨 _ push feedback voltage 2=/ Xiao 56, rope (ea) 54 (four) is based on (4)), generate positive wheel voltage error signal (Vep) And negative output voltage error 201136120 difference signal (ven). The positive output voltage error signal (vprint) and the negative output voltage error signal (Ven) are received via the feedback adjustment circuit 58 electrically coupled to the error amplifiers (EA) 54, 56, and the system will output the county error domain (vep)贞 Output 测 峨 (Ven) mutual feedback positive output electric house error signal (vep) is the use of feedback negative output voltage error signal (Ven) for voltage level modulation, producing positive output f pressure error adjustment The variable signal (Vemp); the output error signal (ven) _ with the positive output of the feedback (four) error signal (Vep) for the voltage level modulation 'generates the negative output voltage error modulation signal (Vemn). The positive output voltage error modulation signal (vemp) and the negative output electric dust error modulation signal d) are further input to the voltage feedback adjustment circuit 58 for electrically connecting one of the peak generators 60, which utilizes the positive input voltage error. The modulation signal (vemp) and the output voltage error modulation signal (Vernn) generate a peak voltage (Vepn). This peak voltage will be the maximum charge limit during the charge cycle of inductor L. - The (4) group (CMP) 62 system is electrically connected to the New_n 52, the voltage adjusting circuit 58 and the peak generator 60, and receives the inductor voltage (Vs), the peak voltage (Vepn), and the positive output voltage error modulation signal ( Vemp), and compares the peak voltage (Vepn) and the positive output voltage error modulation signal (vemp) with the inductor voltage (Vs) to generate a plurality of voltage signals (Vcab) and (VCA), and the voltage signal (VCAB) The (VCA) will be passed to a control circuit 64. The control circuit 64 includes a path decision logic 641 and a bias adjustment circuit 642 that receives the voltage signals (VCab) and (Vca) and the system clock signal ( Vclk), the control bias adjustment circuit 642 generates control signals Vg1, Vg2, and Vg3 to control the transistor switches M1, M2, and M3 of the switch circuit 5 to open or close to achieve charge and discharge of the control inductor L. In addition, a slope compensator 68 is electrically coupled to the current detector 52' to compensate for the secondary hunting wave generated by the variation of the inductor current and to generate the required system clock signal (vdk). And the reference voltage (vref> and the negative output voltage (von> voltage on the voltage dividing side (Vnn) will be generated by a band gap reference circuit 70. And a base switching circuit 66 is provided in the switching circuit 5 〇 = transistor switch Ms to prevent the substrate In addition, the voltage feedback adjustment circuit 58 can be integrated with the 201136120 error amplifier (EA > 54 and 56. The above is a detailed description of the circuit system architecture of the present invention.) The power control method of the present invention will be further explained below. The figure is a flow chart of the power control of the present invention, please refer to the first figure as shown in the figure. First, as step S10, the error amplifiers (EA) 54 and 56 are based on the output voltages (v〇p) and (Von). The feedback voltages (Vfp) and (vfn) fed back by the load state are used to calculate the error signals (Vep) and (Ver) of the output voltage. Thereafter, in step S12, the voltage feedback adjustment circuit 58 adjusts the error signal (Vep). And (Ven) 'generates an error modulation signal (vemp) and (vemn) such that the energy of the output voltage matches the load state. [Next, as in step S14, the peak generator 60 is based on the error modulation signal (Vemp) and ( Vemn) Calculate the peak voltage (Vepn The peak value (Vepn) is used to calculate the total energy of the charge and discharge cycle. The peak voltage (Vepn) is the maximum charge limit of the charge cycle. The total energy of the charge cycle will be the total energy required by the system, and the discharge The total energy of the cycle is the sum of the energy of the output voltage. Finally, as in step S16, according to the peak voltage (%pn) charged to the inductor L, the inductor 匕 will store the total energy value of the charging cycle. The description of the control method will further explain the effect of reducing the mutual voltage regulation by detecting the change of the output voltage energy in advance when the load state changes according to the present invention. The third figure is the charging and discharging cycle of the inductor of the present invention. Waveform diagram, and please refer to the schematic diagram of the circuit diagram of the first diagram and the power supply control flowchart of the second diagram, and the fourth (sentence diagram and fourth (b) diagram of the positive and negative output voltage energy changes, as shown in the figure, At steady state, the energy of the output voltage is negative output voltage energy 2 〇 and positive output voltage energy 22, respectively. Considering the case where the voltage feedback adjustment circuit 58 is not provided Next, when the load state of the positive output voltage (V0P) changes, and the load state of the negative wheel-out voltage (V〇n) does not change, the positive output current (|叩) will suddenly increase 'positive output voltage error signal (V The printing system rises, and the peak voltage (Vepn) rises. Therefore, the negative negative voltage energy 2〇 and the positive output voltage energy & mineral increase to negative output power 201136120 At this time, the mutual voltage regulation effect occurs. The output voltage energy 30, the output whole circuit 58 is in the positive round (the V-in-law state changes, the positive I (Ven) level, becomes the negative output voltage error modulation signal (vemn>. Such as "can pull down (l °p) (four) butterfly, 贞 _ pressure energy 40 give Γ within the same pulse width modulation (PWM) cycle, the load state does not have ===Γ" grain (four)., (four) the output is positive above Output voltage (ν叩) load state change, positive output current (^) increase state description. Negative load current, feedback voltage, error modulation signal, peak voltage change in various other negative residual states are as follows (1) The corresponding energy change situation shown in the figure can be inferred from the voltage and current changes, and will not be described here. Table (1)
負載電流 (lop Jon) 迴授電壓 (Vfp ,Vfn) 正誤差調變 訊號(Vemp) 負誤差調變 訊说(Vemn) 峰值電壓 (Vepn) lop t Vfp i Vemp t t Vemn i \ «HM/ Vftpn f lop 1 Vfp t Vemp 1 i Vemn t Vfipn 1 l〇n t Vfn t Vemp t Vemn t t Vepn t ! t Ion l Vfn i Vemp 1 Vemn 1 l Vepn 1 1 J 經由上述實施例說明可知本發明係將藉由電壓迴授調整電路58 調變誤差訊號，達到依據負載狀態，預先偵測輸出電壓能量的目的。 使得充電週期之能量為系統所需之總能量，且負載未變化之輸出電壓 的能量將保持固定，大幅消除降低互穩壓效應，系統將具有極佳輸出 穩態與暫態響應。此外，本發明係適用於非隔離式之昇壓式、降壓式、 201136120 昇降壓式電源轉換電路及隔離式之順向式、全橋式、半橋式、推挽式 之電源轉換電路等各式電源轉換電路及電源轉換電路組合。 以上所述之實施例僅係為說明本發明之技術思想及特點，其目的 在使熟習此項技藝之人士能夠瞭解本發明之内容並據以實施，當不能 以之限定本發明之專利範圍，即大凡依本發明所揭示之精神所作之均 等變化或修飾’仍應涵蓋在本發明之專利範圍内。 【圖式簡單說明】 第一圖為本發明電路架構之示意圖。 第二圖為本發明電源控制之流程圖。Load current (lop Jon) Feedback voltage (Vfp, Vfn) Positive error modulation signal (Vemp) Negative error modulation (Vemn) Peak voltage (Vepn) lop t Vfp i Vemp tt Vemn i \ «HM/ Vftpn f Lop 1 Vfp t Vemp 1 i Vemn t Vfipn 1 l〇nt Vfn t Vemp t Vemn tt Vepn t ! t Ion l Vfn i Vemp 1 Vemn 1 l Vepn 1 1 J Through the above description, it is known that the present invention will be by voltage The feedback adjustment circuit 58 adjusts the error signal to achieve the purpose of detecting the output voltage energy in advance according to the load state. The energy of the charging cycle is the total energy required by the system, and the energy of the output voltage of the unchanging load will remain fixed, greatly eliminating the effect of reducing the mutual voltage regulation, and the system will have excellent output steady state and transient response. In addition, the present invention is applicable to non-isolated boost, buck, 201136120 buck-boost power conversion circuits and isolated forward, full-bridge, half-bridge, push-pull power conversion circuits, etc. Various types of power conversion circuits and power conversion circuits are combined. The embodiments described above are merely illustrative of the technical spirit and the features of the present invention, and the objects of the present invention can be understood by those skilled in the art, and the scope of the present invention cannot be limited thereto. That is, the equivalent variations or modifications made by the spirit of the present invention should still be covered by the scope of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS The first figure is a schematic diagram of the circuit architecture of the present invention. The second figure is a flow chart of the power control of the present invention.
第三圖為本發明電感充放電週期之波形圖。 第四(a)圖為本發明負輸出電壓能量變化之示意圖。 第四(b)圖為本發明正輪出電壓能量變化之示意圖。 22正輸出電壓能量 32正輸出電壓能量 42正輸出電壓能量 52電流偵測器 56誤差放大器 6〇峰值產生器 64控制電路 642偏壓調整電路 68斜率補償器 【主要元件符號說明】 20負輸出電壓能量 30負輸出電壓能量 40負輸出電壓能量 50開關電路 54誤差放大器 58電壓迴授調整電路 62比較器組 641路徑決策邏輯 66基體切換電路 70能隙參考電路The third figure is a waveform diagram of the charge and discharge cycle of the inductor of the present invention. The fourth (a) diagram is a schematic diagram of the change in the energy of the negative output voltage of the present invention. The fourth (b) diagram is a schematic diagram of the change in the voltage of the positive wheel of the present invention. 22 positive output voltage energy 32 positive output voltage energy 42 positive output voltage energy 52 current detector 56 error amplifier 6 〇 peak generator 64 control circuit 642 bias adjustment circuit 68 slope compensator [main component symbol description] 20 negative output voltage Energy 30 negative output voltage energy 40 negative output voltage energy 50 switching circuit 54 error amplifier 58 voltage feedback adjustment circuit 62 comparator group 641 path decision logic 66 base switching circuit 70 gap reference circuit