201124835 六、發明說明： 【發明所屬之技術領域】 本發明係關於一種電源供應裝置，尤指電源供應器於 待機操作狀態下之控制方法與放電方法。 【先前技術】 科技的進步，於現代人生活中，已提供許多不同功能 的電子設備，方便人們享用，也加速人們的多方面訊息的 傳播，譬如：τν、電腦、工作站、網域等等，相對地也需 要提供較大、較穩定的電源支應。使用於工作、遊戲、通每 訊或是資訊處理等，幾乎完全依賴電腦設備進行處理。因 此，電腦設備必須能夠提供穩定的運作以便利人們的使 用。目前一般電腦設備大致包括中央處理器（Central Processing Umt，CPU)、晶片組、記憶體、儲存設備、界面 連接裝置以及電源供應器。其中，電源供應器可提供穩定 的電壓供應，以將外部提供之電源訊號(如電力公司）轉換成 電腦内部電路所需之各種電壓的電源訊號，例如+5v、 土 12V、或是+3.3V等多種電壓，以利電腦設備穩定的運作。· 當電腦設備接上外部電源時，電腦設備即可於正常工 作模式(on mode)、睡眠模式(sleep m〇de)、待機工作模式 (stand-by mode)或是關機模式(〇ff m〇de)等不同工作模式 · 下„’。進行運作。但是’由於能源短缺及全球暖化的現象日 趨嚴重，對應於各種不同工作模式下的功率耗損，也訂定 了各種不同的標準。 ^相關的規範有越來越嚴格的趨勢，例如，於歐盟之“耗 月匕產品壤保設計”指令（Energy_using Pr〇ducts，Eup )對於電 4/19 201124835 腦設備之㈣轉供縣置（Intemal PQwef Suppiy, ips)201124835 VI. Description of the Invention: [Technical Field] The present invention relates to a power supply device, and more particularly to a control method and a discharge method of a power supply in a standby operation state. [Prior Art] The advancement of science and technology, in the modern life, has provided many electronic devices with different functions, which are convenient for people to enjoy, and also accelerate the spread of people's various information, such as: τν, computer, workstation, domain, etc. Relatively, it is also necessary to provide a large, relatively stable power supply support. Used for work, games, communication, or information processing, it relies almost entirely on computer equipment for processing. Therefore, computer equipment must be able to provide stable operation to facilitate people's use. At present, general computer equipment generally includes a central processing unit (CPU), a chipset, a memory, a storage device, an interface connecting device, and a power supply. Among them, the power supply can provide a stable voltage supply to convert externally supplied power signals (such as power companies) into power signals of various voltages required by the internal circuits of the computer, such as +5v, earth 12V, or +3.3V. A variety of voltages to facilitate the stable operation of computer equipment. · When the computer device is connected to an external power supply, the computer device can be in the normal mode (sleep mode), sleep mode (sleep m〇de), standby mode (stand-by mode) or shutdown mode (〇ff m〇 De) and other different working modes · „'. Operation. However, due to the shortage of energy and global warming, various standards have been set for power consumption in various working modes. The norms are becoming more and more rigorous. For example, in the European Union's “Energy-using Pr〇ducts” (Eup) for electricity 4/19 201124835 brain equipment (4) transfer to the county (Intemal PQwef Suppiy, ips)
於待機工作模式下的功率耗損（或稱為待機功耗)規範，已於 2008年1〇月在EuP指令第三次會議上公佈了内部電源供 應裝置的實施措施草案。其巾，對於待機卫作模式下的電 能耗損作了以下規定：⑴從細年】月7日起，待機工 作模式下的电月匕耗損必須小於j w的要求；⑵從洲3年 起’待機工作模式下的電能耗損必須小於〇 sw的要求。換 言之，電源供應裝置必·後端⑽_能配合之最小輸 出負載條件下(50毫安培至60毫安培），使其電源供應裝置 ^電能耗損小於1W ,甚至小於G.5W。然而，目前傳統的 電源供應裝置，並無法達成此嚴苛的條件。 第-圖所示為傳統電源供應裝置之系統模組示意圖。 第二圖所示為傳統電源供應裝置之待機工作模式下電 能耗損曲線圖。 傳統電源供應裝置1具有一整流電路n，與一外部^ 源ω.連接以接收外部電源訊號，並進行綠以形成一整3 汛號：一功因校正電路…赠—故〜敗咏啊川 了正机電路11連接’接收整流訊號，並修正電流譜波失真 以輸出一穩定的直流訊號；—輸出電路13，與功因校正H 路丨2連接，接收直流訊號’並轉換成數種不同電壓之主-源以驅動電腦設備；另外，—待機電路14，與功因校正負 路12連接’且與輸出電路13並聯，當輸出電路13關閉時 =將直流訊賴遞至躺魏14，使得㈣設備得以於一 待機工作模式下，以-最低電能耗損之待機電源，例如: 5V，保持電腦設備於待機狀態。 於傳統電祕縣置i，所制低電缺損的策略是 5/19 201124835 14，唯餘/下’利較低電能關之待機電路 f持輪出1機電源’使得電腦設備得以進入待機工 ^式’，節省輪出電路13之電能_。但是利用這種方 無法符合日益嚴料電能耗損的規範。如第二圖所示， $作於5G毫安培至6〇毫安叫則其電能耗損介於〇柳 •7W之間，無法符合耗能產品環保設計指令於2013车 的要求。 千 【發明内容】 一根據本發明之實施例’提供—種電源供應裝置，包括：· 關電路；-輸出電路，透過該開關電路與-外部電源 、以輸出-主電源；-待機電路，連接至該外部電源'，、 础待機電源；以及一控制電路，連接至該外部電源， ^據一正常工作模式’導通該開關電路以讓該外部電源 =電源峨傳遞至該輸出電路，以及根據一待機工作模 二不導通該開關電路，以讓該電源訊號之一第一週、 第二週期傳遞至該待機電路。 一 根據本發明之實施例’提供一種電源供應裝置的控制鲁 —/ ，包括：判斷該電源供應裝置於一正常工作模式，將 2源訊號傳送至一輸出電路；以及判斷該電源供應裳置 待機工作模式’透過一控制電路控制一開關電路 2電源訊號之—第一週期或一第二週期傳遞至一待機電 根據本發明之實施例，提供一種電源供應裝置之放電 姑’包括：判斷-外部電源移除；以及控制—控制電路， 根據移除該外部電源瞬間之—電源訊號，導通一並聯於該 6/19 201124835 外部電源之-放電電路，以使得並聯於該外部 谷付以透過該放電電路進行放電。 ’、之〜電 本發明之機制係與公知技術截然不同，俾以 電源供應裝置於待機操作狀態下之控制方法與放^供〜種 以達到最低魏損耗與更精確控制f容貞载 L方决’ 間，使得在降低待機電力電能損耗時並不敌時The power consumption (or standby power consumption) specification in standby mode has been announced at the third meeting of the EuP Directive in January 2008. The towel has the following provisions for the electric energy consumption loss in the standby mode: (1) From the 7th of the following year, the electric crescent loss in the standby mode must be less than the requirement of jw; (2) the standby from the 3rd year of the continent The electrical energy loss in the working mode must be less than the 〇sw requirement. In other words, the power supply unit must be equipped with the minimum output load (50 mA to 60 mA), so that the power supply device's power consumption is less than 1W or even less than G.5W. However, the current power supply devices cannot achieve this severe condition. The first figure shows a schematic diagram of the system module of the conventional power supply device. The second figure shows the graph of the energy consumption loss in the standby mode of the conventional power supply unit. The conventional power supply device 1 has a rectifying circuit n connected to an external source ω. to receive an external power signal, and is green to form a full 3 nickname: a power factor correction circuit ... a gift - so ~ 咏 咏 川The positive circuit 11 is connected to receive the rectified signal and correct the current spectral distortion to output a stable DC signal. The output circuit 13 is connected to the power factor correction H path ,2, receives the DC signal and converts it into several different voltages. The main source is to drive the computer device; in addition, the standby circuit 14 is connected to the power factor correction negative path 12 and is connected in parallel with the output circuit 13. When the output circuit 13 is turned off, the DC signal is passed to the lie 14, so that (4) The equipment can be in standby mode, with the lowest power consumption of the standby power supply, for example: 5V, to keep the computer equipment in standby state. In the traditional electric secret county, the low-power defect strategy is 5/19 201124835 14, only the remaining / lower 'lower power off standby circuit f holding a 1 power supply' to enable computer equipment to enter the standby ^式', saving the power of the circuit 13 of the wheel. However, the use of such a party cannot meet the specifications of increasingly severe electrical energy consumption. As shown in the second figure, the energy consumption of 5G mA to 6〇 mAh is between 7W and 7W, which cannot meet the requirements of the 2013 design of energy-saving products. [Invention] According to an embodiment of the present invention, a power supply device is provided, comprising: a shutdown circuit; an output circuit through which the switch circuit is connected to an external power supply, an output-main power supply, and a standby circuit. To the external power source, the base standby power source; and a control circuit connected to the external power source, according to a normal operation mode, the switch circuit is turned on to allow the external power source = power port to be transmitted to the output circuit, and according to The standby mode 2 does not turn on the switch circuit to transmit the first cycle and the second cycle of the power signal to the standby circuit. According to an embodiment of the present invention, a control device for providing a power supply device includes: determining that the power supply device is in a normal operation mode, transmitting the two source signals to an output circuit; and determining that the power supply is in standby The working mode 'controls a switching circuit 2 power signal through a control circuit - the first cycle or the second cycle is transmitted to a standby power. According to an embodiment of the present invention, a power supply device is provided. And the control-control circuit, according to the power signal for removing the external power supply, turning on a discharge circuit connected in parallel with the external power supply of the 6/19 201124835, so as to be connected in parallel to the external valley to transmit the discharge The circuit is discharged. The mechanism of the invention is completely different from the known technology. The control method and the power supply device are used in the standby operation state to achieve the minimum Wei loss and more precise control. Between the two, making it less time-consuming when reducing standby power loss
5又私令所制定之嚴苛的規範條件，以促進產業升保 以上之概述與接下來的詳細說明及附圖，皆曰、’。 進-步說明本發明為達成預定目的所採取之疋=能 功效。而有關本發明的其他目的及優點 = 及圖式中加以闡述。 仕俊、，的况明 【實施方式】 電源供應裝置之系 第二圖所示為根據本發明實施例之 統模組示意圖。 冤源、供應裝置2 具有一整流電路11 路21與一外部雷、、停川琮二Ai，透過一開關電 源訊號，並進行二以幵^ ’ ^_電源1〇之外部電 , 开乂成—整流訊號，且開關電路21受 ==之控制訊號，於-正常工作模式下，開； ，功因校正電路12傳遞至輸出電路 以及放電電路22可_ “路13控/ ^電^ 過控制電路控制苴導涵，、 利八¥通或疋透 帝路21π道、s二 以及於一待機工作模式下，開關 ^味措、备 L，以瓖—第一週期或一第二週期之外部電源 5fu…至待機電路；1因校正電路η，與整流電路η 7/19 201124835 腦設備 連接’接輕流訊號，雜正電流魏失真，以輸出一穩 定的直流訊號；—輸出電路13，與功陳正電路12連接: ?收直流喊，並轉換成數種^同電壓之主電源以驅動電5 and the strict regulatory conditions set by the private order to promote the industrial upgrading. The above overview and the detailed description and drawings below are all. Further steps illustrate the 疋=energy efficiency of the present invention for achieving the intended purpose. Other objects and advantages of the present invention are illustrated in the drawings. [States] [Embodiment] A system of a power supply device The second figure shows a schematic diagram of a module according to an embodiment of the present invention. The power supply and supply device 2 has a rectifying circuit 11 and an external lightning, and a downstream power supply, and transmits a switching power supply signal, and performs external power generation of the power supply. - rectification signal, and the switching circuit 21 is controlled by ==, in the normal operation mode, the power factor correction circuit 12 is transmitted to the output circuit and the discharge circuit 22 can be _ "road 13 control / ^ electric control The circuit control 苴 苴, , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Power supply 5fu... to the standby circuit; 1 due to the correction circuit η, connected with the rectifier circuit η 7/19 201124835 brain device 'connected light flow signal, mixed positive current Wei distortion, to output a stable DC signal; - output circuit 13, with Gong Chen Zheng circuit 12 connection: ? Receive DC shout, and convert into several kinds of the same voltage main power to drive electricity
電源供應裝置2還具有一待機電路14，與功因校正電 路12連接且與輸出電路13並聯，當輸出電路η關閉時， 則將直流tfi麟遞轉機電路14,待機魏14接收直流訊 说，並輸出-待機電源，使得電職備得以於—待機工作 :莫式下以-最低電能耗損，保持一待機狀態；一放電電路 22，連接於整流電路n與功因校正電路12之間，可根據 -控制訊號，對電源供應裝置2之電容負載進行放電；— 控制電路23，連接於外部雷、、盾1Λ μ Μ電/原10的一端，可根據外部電源 私源减’產生-控制訊號’控制開關電路21及放電電 ^2。其中’整流電路11可為各種不同的半波整流電路或 =王波整《路，於本實施侧_橋式整流電路對 電源訊號進行全波整流。The power supply device 2 further has a standby circuit 14 connected to the power factor correction circuit 12 and connected in parallel with the output circuit 13. When the output circuit η is turned off, the DC tfi lining machine circuit 14 is received, and the standby Wei 14 receives the DC signal. And output-standby power supply, so that the electric service can be used in the standby mode: the minimum power consumption is reduced to maintain a standby state; a discharge circuit 22 is connected between the rectifier circuit n and the power factor correction circuit 12, According to the - control signal, the capacitive load of the power supply device 2 is discharged; - the control circuit 23 is connected to one end of the external lightning, the shield 1 Λ μ Μ electricity / the original 10, and can be generated according to the external power source private source control signal 'Control switch circuit 21 and discharge power ^2. The 'rectifier circuit 11 can be a variety of different half-wave rectification circuits or = Wang wave-completed roads. In this implementation side, the bridge rectifier circuit performs full-wave rectification on the power signals.
電源供應裝置2之降低魏耗損的策略是：於待機 =莫式下，關閉輸出電路13,利用開關電路21的導通或: ^通’控制外部電源訊號之傳導，例如：姻開關電路： =外部電源訊號之第-週期或是第二週期直接傳遞至》 機電路u，以避免整流電路η、放電電路22、功因校正, $ 12之電能耗損。因此’僅外部麵訊號之部分週期 &供部分的電祕號至待機電路14，並謂免整流電; =、放電電路22、功因校正電路12之電能耗損，藉此降/ 整體電源供織置2之整體電能耗損。於本實施例，第. 週期為外部電源訊號之正半週期，而第二週期為外部電> 8/19 201124835 訊號之負半週期，且外部電源訊號為—交流訊號。 ”並且’由於電源供應裝置2具有一放電電路22，放電 電路22可於外部電源10移除時，受控於控制電路23而導 通’使得電源供應裝置2之電容負載所 儲存之電荷得以透 過，電電路22之放電路徑進行快速的放電，藉此，當移除 電源1G之後’電源供應裝置2之内部電容負載之儲電 里即=快速降低，以避免漏電，並能更精確控制㉟放時間。The strategy for reducing the Wei loss of the power supply device 2 is: in the standby mode, the output circuit 13 is turned off, and the conduction of the switch circuit 21 is used or: ^T' is used to control the conduction of the external power signal, for example: the switch circuit: = external The first period or the second period of the power signal is directly transmitted to the "machine circuit u" to avoid the power consumption loss of the rectifier circuit η, the discharge circuit 22, the power factor correction, and $12. Therefore, only part of the period of the external surface signal & part of the electric secret number to the standby circuit 14, and said that the rectifier power; =, the discharge circuit 22, the power factor correction circuit 12 electrical energy loss, thereby reducing / overall power supply The overall electrical energy consumption of the weave 2. In this embodiment, the first cycle is the positive half cycle of the external power signal, and the second cycle is the negative half cycle of the external power > 8/19 201124835 signal, and the external power signal is an ac signal. "And since the power supply device 2 has a discharge circuit 22, the discharge circuit 22 can be controlled by the control circuit 23 when the external power source 10 is removed, so that the charge stored by the capacitive load of the power supply device 2 is transmitted, The discharge path of the electric circuit 22 is rapidly discharged, whereby after the power supply 1G is removed, the internal capacitive load of the power supply device 2 is rapidly reduced to avoid leakage, and the 35 time can be more accurately controlled. .
第四圖所示為根據本發明實施例之電源供應裝置 路圖。 四圖之電路圖為第三圖之本發明實施例電源供應裝 =的=電路實現。其中’整流電路u，為一橋式整‘ 電路，由D2-D5等四個二極體所組成；開關電路^，為一 開關p ’但疋亦可為其他種類的關丨功因校正電路I)， ^合C2、電阻R5、二極體D6以及開關％所組成，直 =關S2受到一功因校正晶片（未顯示）所控制；輸出電 以及待機電路14分別連接至功因校正電路12，且 出電路13以及待機電路14互為並聯關係，直中，輸: =Π以及待機電路14為本領域技術者所熟知，故僅略； 八連接關係；放電電路22，於本實施例為電阻Μ四、 電晶體所組成’第四電晶體Q4根據控制電路 制訊斜if，貞彳電源供鱗置3 工 電路U所形成之放電路徑㈣放電放電 分壓電路幻及R2以及-整流二極體二 電：端，並根據外部電源訊號控制開關電路2;^^ 其中’於本實施例之電晶體Q1、Q2'Q4、q5、q^ 9/19 201124835 NMOS電晶體，而第二番曰感a 此技藝者，亦可以則為·Ρ電晶體，熟知 代。並且，_杯日评ί 體、開誠是電路來取 精神’控制電路23及開關電路21 可連接於外部電源10夕紅山 』则电俗Zi 第-週期或是第二㈣j ，#此控制外部電源訊號之 一週功傳遞至電源供應裝置3。 電腦設備工作於一π a 、 吊工作柄式時，電源供岸梦晋3 透過輸出電路13輸出3 之主雷、動電腦設備運行，此時 : '± 2V、或是+3 3v等多種電壓的組合，以 利電腦設備穩定的運作。彳3 祕丁你m, 疋，當電腦設備賴或是於待 機工作Μ，_秘縣置3之 待機電路14輪出一樓媳J迟心 待機电源，以維持電腦設備於待機工作 桓式的運作。 於待機工作模式下，控制電路23藉由整流二極體m 以及分壓電路R1AR2取得第―週期或是第二週期之外部 電源訊號。第-電晶體Q1與第六電晶體Q6之閘源極(Μ) 電壓會大於其臨界電壓（Vth)而導通，因此，第五電晶體 Q5之閘源極（Vgs)電璧小於其臨界電壓（則而不導通。 同樣地’第二電晶體Q2之閘極電位（Vg)會 曰 體Φ之汲極（Vd)等電位，因此第二電晶體Q2不導通曰: 則第三電晶體Q3亦不導通。因此，在此待機工作模式下， 開關電路21之關S1及放電電路22之第四電晶體…之 閘極電位（Vg)為低準位，因此不導通。 換言之，當電源供應裝置3操作於待機工作模式下， 則開關電路21則不導通。即是，於本實施例，外部電源訊 號之第-週期（正半週期）於電源供應裝置3輕形成一 電路迴路，因此外部電源訊號之第_職黯法傳遞至電 10/19 201124835 源供應裝置3;相 期）於電源供應裳置3 二週期（負半週 二號之第二週_可料至4二路；^，因此外部電源 體D7所形成 、應哀置3’亚可透過二極 路14即可產生—待;電源。藉機電路14 ’則待機電 :寺機，式下，整流電路3 η、:二==裝置3, ”路U及輸出電路u皆不消耗 mThe fourth figure shows a circuit diagram of a power supply device according to an embodiment of the present invention. The circuit diagram of the four figures is the circuit implementation of the power supply device of the embodiment of the present invention in the third figure. The 'rectifier circuit u is a bridge type' circuit, which is composed of four diodes such as D2-D5; the switch circuit ^ is a switch p' but can be other kinds of related power correction circuits I), ^C2, resistor R5, diode D6 and switch%, the direct = off S2 is controlled by a power factor correction chip (not shown); the output power and standby circuit 14 are respectively connected to the power factor correction circuit 12, and The output circuit 13 and the standby circuit 14 are in a parallel relationship with each other, and the input: = Π and the standby circuit 14 are well known to those skilled in the art, so that only the eight connection relationship; the discharge circuit 22 is a resistor 本 in this embodiment. Fourth, the transistor consists of 'fourth transistor Q4 according to the control circuit system slant if, 贞彳 power supply scales 3 circuit U formed by the discharge path (four) discharge discharge voltage circuit magic and R2 and - rectifier diode Body 2: terminal, and according to the external power signal control switch circuit 2; ^ ^ where in the embodiment of the transistor Q1, Q2 'Q4, q5, q ^ 9/19 201124835 NMOS transistor, and the second Pan Sense a, this artist can also be a Ρ Ρ crystal, familiar with the generationAnd, _ cup daily comment ί body, Kaicheng is the circuit to take the spirit 'control circuit 23 and switch circuit 21 can be connected to the external power supply 10 Xihongshan』 then the custom Zi period - cycle or second (four) j, # this control external One of the power signals is transmitted to the power supply device 3. When the computer equipment works in a π a, hanging work handle type, the power supply shore Meng Jin 3 through the output circuit 13 output 3 main thunder, moving computer equipment to run, at this time: '± 2V, or +3 3v and other voltages The combination to facilitate the stable operation of computer equipment.彳3 Secret Ding you m, oh, when the computer equipment is on or in standby, _ secret county set 3 standby circuit 14 round out of the first floor 媳J late standby power supply to maintain computer equipment in standby mode Operation. In the standby mode of operation, the control circuit 23 obtains the external power signal of the first period or the second period by the rectifying diode m and the voltage dividing circuit R1AR2. The gate (源) voltage of the first transistor Q1 and the sixth transistor Q6 is turned on more than its threshold voltage (Vth), and therefore, the gate (Vgs) of the fifth transistor Q5 is less than its threshold voltage. (There is no conduction. Similarly, the gate potential (Vg) of the second transistor Q2 will be the equipotential (Vd) equipotential of the Φ, so the second transistor Q2 will not conduct 曰: then the third transistor Q3 Therefore, in this standby mode of operation, the gate potential (Vg) of the switch circuit 21 and the fourth transistor of the discharge circuit 22 are at a low level, and therefore are not turned on. In other words, when the power supply is supplied When the device 3 is operated in the standby mode, the switch circuit 21 is not turned on. That is, in the embodiment, the first cycle (positive half cycle) of the external power signal lightly forms a circuit loop in the power supply device 3, so the external The first signal of the power signal is transmitted to the electricity 10/19 201124835 source supply device 3; phase) is placed on the power supply for 3 cycles (the second week of the negative half cycle 2) can be expected to 4 2 road; ^ Therefore, the external power supply body D7 is formed, and the 3' sub-transmission can be waived. May be generated - to be; opportunity power circuit 14 'is to be organic: Temple machine, of the formula, two rectifying circuit 3 η ,: == apparatus 3, "and an output circuit path U u neither consumed m.
之第二週期傳遞至待機電路 電源訊號 電能消耗即可大巾轉降低。舰電源供應裝置3之 “UL60950-1第1〇時’如國際法規 源供應褒置3所内存之多f外部電源10後一秒内’電 避免漏電的狀況。S t::，源1。的勝以 除外部電源W後，__卜f電電路22，於移 電路22導通，以利電源供卜°二二的瞬間’將放電 電電路22進行怏进的令、 電谷負載能夠透過放 2版，，的規範速的放電’以符合國際法規“脳_第 期斑第ιΓ10所提供之外部電源訊號具有第一週 d興第-週期’因此，於 ^ 部電源訊號處於第一 _ ^電源10的瞬間，可能外 -週期Λ 第二週期，因此需要對此第 電電_ ^収找路’以使得無論於任何外部 电源減ί、如間移除時， 負載進行放電。 守、欲电兒路22以利電谷 當移除外部電源 週期時（負半週期）， 的閘源極電壓（Vgs ) 10，且剛好位於外部電源訊號之第二 此時第一電晶體Q1及第六電晶體Q6 不會瞬間低於臨界電壓（Vth)，因此 201124835 第-電晶體Q1及第六電晶體q6仍會維持導通狀態— 間’此時，第五電晶體Q5之閘源極（Vgs)於：臨 界電壓（Vth)而不導通。因此’第二直流電源V2即^；透 過電阻R4及二極體D9以使得第二電晶體Q2之問源極 壓（Vgs)高於臨界電壓（Vth)而導通，並且第三電 Q3亦隨之導通，而第二直流電源V2即可㈣至開關=路 21之開關S1及放電電路22之第四電晶體Q4， μ 及第四電晶體Q4導通，電源供應裝置3之電容㈣即 過放電電路22之電阻R3及第四電晶體Q4組成之放電路 禮，進行放電。 /主移除外部電源1G ’划彳好位於外部電源訊號之第一 週期):此時第一電晶_及第六電晶師 的間源極糕（VgS)會低概界麵⑽），因此第一電 晶體Q1及第六電晶體Q6不導通 導通。此時，第一直流雷调兮、位 乐冤日日肢Q5 —*、 笔源1透過電阻R6及電容C3ii 行充電，並透過齊納二極體D8，估π rv x ^ 骽8使侍第二電晶體Q2之閘 源極電£ (Vgs)而於臨界電壓（v 一 電晶體Q3亦隨之導通， 、，並且第二 電路21及放電電路22之第將四第電一曰直^電源V2傳遞至開關 及放雷雷路22逡第四電日日體Q4,使得開關電路21 及放電電路22導通’電源供應裝 放電電路22之電阻R3及笛 電令負載P可透過 進行放電。 電3曰體Q4組成之放電路徑， 因此，，tf；上所述，卷狡〜认& 源訊號處於第-週^^外。_ 1G，無論其外部電 I使得電源’皆可導職電電路 所產生之放電路彳—hh —得以透過放電電路22 丁、速的放電。根據本發明實施例， 12/19 201124835 置3可於約300毫秒將所内存之電容負戴之雷 何放電至低於外部電源儲電量之37%以下。因此，、2電 的提出，不僅可以改善待機模式下的電 ，路 國際法規“UL6095(M第2版，，對於沒放時間之規範1合 工』==發明實施例電源_置-待機 根據本發明實施例，電源供應裝置3於一待機 式下，輸出負載電流為50至6〇毫安 $ 為0.4W至〇.48W之間，可大φ5痄楠限你抽 包此粍知約 vv怠間j大巾田度地降低傳統電源供應奘罢 於待機卫作模灯之電能損耗，使得麵供縣置3得 符合耗能產品環保設計指令於2〇丨3年的要求。 惟’以上所述，僅為本發明的具體實施例之詳細★兒明 及圖式而已’並非用以限制本發明，本發明之所有範圍應 以下述之申請專利·鱗，任何熟_項技藝者在本發 明之領域内，可輕易思及之變化或修㈣可涵蓋在以下本 案所界定之專利範圍。 【圖式簡單說明】 圖所示為傳統電源供應裝置之系統模組示意圖。 ^第二圖所示為傳統電源供應裝置之待機工作模式下電 能損耗曲線圖。 第二圖所示為根據本發明實施例之電源供應裝置之系 統模組示意圖。 心、 路 第四圖所示為根據本發明實施例之電源供應裝置的電 第五圖所示為根據本發明實施例電源供應裝置之待機 13/19 201124835 工作模式電能耗損曲線圖。 【主要元件符號說明】 I :傳統電源供應裝置 2、3 :電源供應裝置 10 :外部電源 II :整流電路 12 :功因校正電路 13 :輸出電路 14 :待機電路 21 :開關電路 22 :放電電路 23 :控制電路 二極體The second cycle is passed to the standby circuit. The power signal can be reduced by the power consumption. "UL60950-1 1st time" of the ship power supply device 3, as the international regulations source supply device 3, the memory of the external power supply 10 is within one second of 'electrical avoidance of leakage. S t::, source 1. After the external power supply W is removed, the __Bu electric circuit 22 is turned on in the shift circuit 22, so that the power supply is supplied to the power supply circuit 22, and the electric discharge circuit 22 can be driven through. Put 2 version, the standard speed of discharge 'to comply with international regulations 脳 _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ ^ The moment of the power supply 10 may be outside-cycle Λ the second cycle, so it is necessary to find the way for this electric power so that the load is discharged regardless of any external power supply, such as when removed. Shou, Deli Electric Road 22 to Lee Valley when removing the external power cycle (negative half cycle), the gate source voltage (Vgs) 10, and just at the second of the external power signal, the first transistor Q1 And the sixth transistor Q6 does not instantaneously fall below the threshold voltage (Vth), so the 201124835 first transistor Q1 and the sixth transistor q6 will remain in the on state - at this time, the gate of the fifth transistor Q5 (Vgs) at: the threshold voltage (Vth) is not turned on. Therefore, the second DC power source V2 is turned on; the resistor R4 and the diode D9 are turned on so that the source voltage (Vgs) of the second transistor Q2 is higher than the threshold voltage (Vth), and the third power Q3 is also The second DC power source V2 can be turned on (4) to the switch S1 of the switch=way 21 and the fourth transistor Q4, μ of the discharge circuit 22 and the fourth transistor Q4, and the capacitor (4) of the power supply device 3 is over-discharged. The resistor R3 of the circuit 22 and the fourth transistor Q4 are arranged to discharge the circuit. /Main removes the external power supply 1G 'should be located in the first cycle of the external power supply signal): At this time, the first electro-crystal _ and the sixth electro-ceramicer's inter-source cake (VgS) will be lower than the interface (10)), therefore The first transistor Q1 and the sixth transistor Q6 are not turned on. At this time, the first DC lightning 兮, the 冤 冤 日 日 日 Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q The gate of the second transistor Q2 is electrically charged (Vgs) to the threshold voltage (v-the transistor Q3 is also turned on, and the second circuit 21 and the discharge circuit 22 are turned on. ^ The power supply V2 is transmitted to the switch and the thunderbolt 22, the fourth electric day body Q4, so that the switch circuit 21 and the discharge circuit 22 are turned on. The resistance R3 of the power supply and discharge circuit 22 and the flute enable the load P to be discharged. The discharge path composed of electric 3 body Q4, therefore, tf; above, the volume ~ recognition & source signal is in the first - week ^ ^. _ 1G, regardless of its external electrical I make the power supply 'can lead The discharge circuit h-hh generated by the occupational circuit can be discharged through the discharge circuit 22. In accordance with an embodiment of the present invention, 12/19 201124835 can be used to reduce the capacitance of the memory in about 300 milliseconds. Discharge to less than 37% of the external power storage capacity. Therefore, 2 power can not only improve the standby mode Electric power, road international regulations "UL6095 (M 2nd edition, for the specification of the time limit 1) == invention embodiment power supply _ set - standby according to the embodiment of the invention, the power supply device 3 in a standby Under the formula, the output load current is 50 to 6 〇 mA $ 0.4W to 〇.48W, which can be large φ5 痄 限 限 限 限 抽 粍 粍 粍 粍 粍 粍 粍 粍 粍 v v 大 大 大 大 大 大 大 大 大 大 大 大 大 大 大 大 大 大电能 奘 待机 待机 待机 待机 待机 待机 待机 待机 待机 待机 待机 待机 待机 待机 待机 待机 待机 待机 待机 待机 待机 待机 待机 待机 待机 待机 待机 待机 待机 待机 待机 待机 待机 待机 待机 待机 待机 待机 待机 待机 待机 待机 待机 待机 待机 待机 待机DETAILED DESCRIPTION OF THE INVENTION The present invention is not intended to limit the invention, and all the scope of the present invention should be applied to the following patents and scales. Any skilled person in the field of the present invention can easily change or Repair (4) can cover the scope of patents as defined in the following case. [Simple description of the diagram] The figure shows the system module of the traditional power supply device. ^The second figure shows the power in the standby mode of the traditional power supply device. Loss graph. The second graph shows A schematic diagram of a system module of a power supply device according to an embodiment of the present invention. A fourth diagram of a power supply device according to an embodiment of the present invention is shown in a fifth diagram of a power supply device according to an embodiment of the present invention. Standby 13/19 201124835 Operating mode electric energy consumption loss graph. [Main component symbol description] I: Traditional power supply device 2, 3: Power supply device 10: External power supply II: Rectifier circuit 12: Power factor correction circuit 13: Output circuit 14 : Standby circuit 21 : Switch circuit 22 : Discharge circuit 23 : Control circuit diode
Ql、Q2、Q3、Q4、Q5、Q6 :電晶體 Dl、D2、D3、D4、D5、D6、D7、D9 IU、R2、R3、R4、R5 :電阻 a、C2、C3、C4 :電容 V卜V2 :直流電源 SI、S2 :開關 D8 :齊納二極體 14/19Ql, Q2, Q3, Q4, Q5, Q6: transistor Dl, D2, D3, D4, D5, D6, D7, D9 IU, R2, R3, R4, R5: resistance a, C2, C3, C4: capacitance V Bu V2: DC power supply SI, S2: Switch D8: Zener diode 14/19