TW201117544A - Power supply - Google Patents

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TW201117544A
TW201117544A TW99124974A TW99124974A TW201117544A TW 201117544 A TW201117544 A TW 201117544A TW 99124974 A TW99124974 A TW 99124974A TW 99124974 A TW99124974 A TW 99124974A TW 201117544 A TW201117544 A TW 201117544A
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Taiwan
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waveform
power supply
output
alternating
signal
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TW99124974A
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Chinese (zh)
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TWI430553B (en
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Owen Jones
Lawrence R Fincham
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Thx Ltd
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Abstract

A power supply includes two or more input waveforms being shaped or selected so that after being separately level-shifted and rectified, their additive combination results in a DC output waveform with substantially no ripple. The power supply may comprise a waveform generator, a level conversion stage for step up or down conversion, a rectification stage, and a combiner. The waveform generator may generate complementary waveforms, preferably identical but phase offset from each other, such that after the complementary waveforms are level-converted, rectified and additively combined their sum will be constant, thus requiring no or minimal smoothing for generation of a DC output waveform. The level conversion may be carried out using transformers or switched capacitor circuits. Feedback from the DC output waveform may be used to adjust the characteristics of the input waveforms.

Description

201117544 六、發明說明: 【發明所屬之技術領域】 本發明之領域大體而言係關於電源供應器,且更具體而 言係關於一通用DC輸出電源供應器。 【先前技術】 存在兩個主要的電源供應器或轉換器分類:(i)ac至dc 及(2) DC至DC。-AC至DC電源供應器通常將作為其輸入 之AC線路電壓轉換至一 DC輸出電壓且舉例而言,存在於 例如家庭音訊放大器等應用中。其通常可實施為一線性或 切換式電源供應器。一DC至DC電源供應器自一個現有〇(: 電壓轉換至另一電壓,例如自一電池轉換至另一較高或較 低電壓位準。其通常與一切換式電源供應器一起實施。對 於一般使用,DC至DC電源供應器轉換電壓且亦提供輸入 與輸出之間的隔離。 S用電源供應器之共同組件包含一變壓器、整流器及 平滑/儲存電容器。一切換式電源供應器中普遍利用之額 外組件包含一控制1C晶片、功率電晶體、用以防止電磁干 擾(EMI)之濾波及屏蔽。對越來越小裝備之要求已導致切 換式電源供應器之一優勢。 用於(例如)家庭音訊放大器中之習用線性電源供應器使 用一大、笨重、昂貴之變壓器來將一低頻率、高電壓AC 線路供應轉換至適於該放大器或其他應用之一較低電壓。 首先,將該高電壓AC線路供應降壓至一較低AC電壓,且 然後將該較低AC電壓波形整流成DC。然而,該經整流電 149927.doc -4 - 201117544 壓係不連續且因此需要大的儲存電容器來為該放大器提供 一平滑錢。即使如此,該Dc供應器仍具有疊加在沉上 之一可感覺的不規則性(波紋電塵),其可在放大器輸出處 顯現為一可聽得到的哼聲及蜂音除非對該放大器設計及佈 局採取相當大的關注。 儘管此一電源供應器之設計係相對簡單且該ΕΜι發射相 對低,但該變壓器係大、笨重且極昂貴。該等儲存電容器 亦係大且叩貝。因此,此電源供應器方案之總體積將其排 除在用於輕便、低輪廓設計上之外。該電源供應器中之電 力損耗係相對低,其中一總效率通常在85至9〇%之範圍 中。 使用線性電源供應器之一替代方案係採用一切換模式電 力轉換技術《在此技術中,首先,在全線路電壓下整流及 平滑該線路電壓。此相比於線性電源供應器允許儲存電容 器為較小且亦較不昂貴。然後’藉由在一極高頻率下(通 常為數十kHz)對所得高電壓DC信號斬波以產生藉由一小 變壓器向下變壓至一較低電壓之一 AC輸出信號而將其轉 換至一較低電壓。由於作業頻率比一線性電源供應器之一 作業頻率高得多’因此該變壓器可比在一習用線性電源供 應器中小得多。然而’不得不再整流該變壓器之輸出側上 之該AC信號以獲得DC,且還必須藉助儲存電容器平滑’ 但係比在一線性電源供應器中+的儲存電容器。此一電源 供應器之一實例係通常用於給一膝上型電腦供電之一外部 電源供應器。 149927.doc 201117544 此方案中欲付出之一個代價係:為保持效率,對〇(:之 斬波產生具有一不連續、方形波形之高頻率AC。此—波 形產生高級別之極高頻率,該等極高頻率輻射以引起射頻 干擾(EMI)。需要精心的設計、佈局及屏蔽以將此等發射 減少至一可接受限度。切換頻率組件亦需要移除或與輸入 及輸出線路隔離,從而需要額外磁性組件,此增加供應器 之成本及體積。儘管理論上效率能夠係極高,但其通常在 80至90%之範圍中。總而言之,該切換模式電源供應器之 大小及重量相比於一習用線性電源供應器可明顯減小,且 基本組件成本亦可係較低。然而,一切換式電源供應器設 計中固有之複雜性明顯增加設計及證明成本且產生數月之 一上市時間。 總之,線性電源供應器趨於在大小及輪廓上較大、相對 高價且笨重。但其等在效率及低EMI方面係有利的。切換 式電源供應器趨於較小且較輕。但由於較高頻率作業,一 切換式電源供應器之變壓器及電容器趨於比一線性電源供 應器小。然而,切換式電源供應器可比線性電源供應器較 不有效’且產生顯著更多之EMI,該EMI需要精心濾波及 屏蔽。切換式電源供應器亦係更複雜,從而需要控制電路 及功率切換裝置。其等花費較長時間來設計且通常比線性 電源供應器更昂貴。趨勢係朝向越來越小電源供應器發 展’從而需要較高頻率作業且因此更多關於E]v1I2潛在問 題。 較大的電源供應器可利用三相發電,其係目前為止所闡 149927.doc 201117544 述之電源供應器技術之一替代電源供應器技術。在一三相 系統中,三個電源線路載運相同頻率但不同相位之三個交 變電流’ 1等在不同時間達到其瞬時峰值。電流波形彼此 偏移120度(亦即,每一電流自另外兩個波形偏移一循環之 一刀之)。波形之此交錯允許能量在減小的但卻無實質 波紋之情形下被連續地提供至負冑。因此,經由電流之每 -循環轉移-恆定量電力。變壓器可用於在一三相電力網 路中之各種點處升壓或降壓電壓位準。一三相整流器橋普 遍包含六個二極體’其中兩個二極體用於三相系統之每一 分支。 儘管三相電源供應器系統具有—些益處但其等亦經受 某些缺點或限制。舉例而言’通常需要最少三個導體或電 力線路’以及三組電路用於位準移位(藉助變壓器)及整流 每刀支。而且,儘官波紋經由一單相電源供應器減小, 但波紋仍係實質的且—般而言需要儲存電容器來將其降低 至一可接受位準。 需要可製作成小的、輕便及適當便宜且具有最小emi之 -電源供應器或轉換器。進一步需要避免一切換式電源供 應器之複雜性及複雜化之此—電源供應器。進―步需要可 減少對大組件之需要且因此可製作成在大小及輪廓方面為 小且輕便之一電源供應器。 【發明内容】 在-項態樣中’提供一種電源供應器,其中一個或多個 輸入㈣㈣形或以其他方式經選擇以使得輸出波形需要 149927.doc 201117544 針對一 DC輸出波形之產生進行最小平滑。 根據一項或多項實施例,一電源供應器經提供具有在被 提供至一隔離變壓器之前經塑形或以其他方式選擇之一個 或多個輸入波形。該等輸入波形之性質經塑形或經選擇以 使得經變壓波形不需要針對一 DC輸出波形之產生進行平 滑或需要進行最小平滑。 該電源供應器可包括一波形產生器、用於升壓(或降壓) 電壓位準之一位準轉換級、一整流級及一信號組合器。該 波形產生器可產生互補波形’以使得在整流及組合該等互 補波形中之每一者之後,其等總和將係恆定的,因此不需 要針對一 DC輸出波形之產生進行平滑或需要進行最小平 滑。 在一項實施例中,一 DC輸出電源供應器包括一波形產 生器、至少一個變壓器、一整流級及一信號組合器。該波 形產生器可產生互補波形,以使得在整流及組合該等互補 波形中之每一者之後,其等總和將係恆定的。該等互補波 形較佳地係相同但彼此相差9〇度相位,但在其他實施例 中,該等波形可具有-不同關係。將該等互補波形施加至 對變壓器或具有單獨繞組之一單個變壓器。將該等變壓 7之輸出提供至s亥整流級,其輸出一對經整流信號。該等 經整流信號具有當相加在一起時其等總和係恆定之屬性。 將忒等經整流信號提供至該信號組合器,其對該等信號求 和且產生一恆定DC輸出信號。 在某些實施例中,監視所述輸出電壓且將其回饋至該電 149927.doc 201117544 '、A、應器之輸入側,從而在施加至變壓器之前調整該等互 補波形信號之振幅或其他特性。 在其他實施例中,使用一切換式電容器技術代替變壓器 來調整(例如,升壓)該等互補波形之電壓位準。在其他方 面中’該電源供應器以一類似方式運作。 本文中所闡述之實施例可產生一個或多個優點,包含比 一習用電源供應器小、輕、薄及/或不昂貴,具有較少大 組件,同時維持高效率。該電源供應器可經設計以產生最 小或不顯著EMI。由於該電源供應器設計及製造起來可係 較簡單,因此可使其更快速上市,因此產生一較快產品設 計循環。 本文中亦闡述或在附圖中圖解說明進一步實施例、替代 方案及變化型式。 【實施方式】 根據一項或多項實施例,一電源供應器經提供具有在提 供至一隔離變壓器之前塑形或以其他方式選擇之一個或多 個輸入波形。該等輸入波形之性質經塑形、選擇或以其他 方式產生以使得經變壓波形需要針對一 DC輸出波形之產 生進行最小整流及/或平滑。 圖8係本文中所揭示之一電源供應器8〇〇之一概念方塊 圖。在圖8中,一信號源(波形)產生器8〇5產生一對互補波 形化號823、824。該等互補波形信號823、824經選擇以在 藉由一位準轉換級830耦合至一輸出(整流)級84〇(在其上整 流且組合經位準轉換信號)之後提供一恆定DC輸出位準, 149927.doc 201117544 同時最小化輸出級840中之儲存/平滑電容器需要。該等互 補波形信號823、824較佳地係本文中後文所述之一種類 型。該等互補波形信號823、824分別經由區塊835、836升 壓或降壓’該等區塊可實施為一個或多個變壓器或切換式 電容器網路,例如如本文中進一步詳細闡述。位準轉換級 830將信號837、838提供至輸出級840。將來自第一位準轉 換區塊835之信號837提供至輸出級840之一第一整流器區 塊860。將來自第二位準轉換區塊836之信號839提供至輸 出級840之一第二整流器區塊861。該等整流器區塊86〇、 861中之每一者可實施為(例如)一全波整流器橋。整流器區 塊860、861之經整流輸出信號866、867係性質上互補以使 得當在一起求和時,結果係一恆定DC位準之波形。為 此’將經整流輸出信號866、867提供至一信號組合器 870,該信號組合器對該等經整流輸出信號866、867組合 或以其他方式組合該等經整流輸出信號且在通常不需要儲 存/平滑電容器之情形下提供性質上大致恆定之一 DC輸出 信號885。 圖1係本文中所揭示基於圖8之一般原理且使用一個或多 個變壓器用於信號位準轉換之一 DC輸出電源供應器i 〇〇之 一概念方塊圖。如圖1中所示,一信號源(波形)產生器ι〇5 在信號線路123、124上產生一對互補波形信號Vini、 vIN2。該等互補波形信號Vini、ViN2經選擇以在藉由一變 壓器級130耦合至一輸出級14〇(在其上整流且組合該等互 補波形信號)之後提供一恆定DC輸出位準,同時最小化輪 149927.doc •10· 201117544 出級mo中之儲存/平滑電容器需要。該等互補波形信號 v:N,、〜2較佳地係本文中後文所述之一種類型。該等互 補波形信號vIN1、vIN2藉由變M器級13G且更具體而言藉由 變=器級U0之各W變廢器135、136輕合至輸出級14〇。變 壓器135、136性質上可係升屋或降壓,且較佳地在特性上 相同(假設該等互補波形作缺V Λ, 领戍个1。琥VIN丨、V丨Ν2之振幅係相同)。 可將變壓器"5、136實體實施為具有用於輸入信號123、 124及用於輸出信號137、138之單獨繞組但u 之一單個變壓器,否則可將置耸眘辨杳+ & 只J』刑·具寺貫體貫施為兩個實體分離 的變壓器。 變麼器級130將信號137、138提供至輸出級14〇。將來自 變壓器U5之副級輸出之信號137提供至輸出級⑽之一第 '一整流益區塊160。將來自變廢哭— 打水目更Μ态136之副級輸出之信號 W提供至輸出級14〇之_第:整流器區塊161。該等整流 器區塊160、161中之每一者可實施為(例如)一全波整流器 橋。該等整流器區塊160、161之經整流輸出信號166、167201117544 VI. Description of the Invention: Field of the Invention The field of the invention relates generally to power supplies, and more particularly to a universal DC output power supply. [Prior Art] There are two main power supply or converter classifications: (i) ac to dc and (2) DC to DC. The -AC to DC power supply typically converts the AC line voltage as its input to a DC output voltage and, for example, in applications such as home audio amplifiers. It can usually be implemented as a linear or switched power supply. A DC to DC power supply is implemented from an existing port (: voltage to another voltage, such as from one battery to another higher or lower voltage level. It is typically implemented with a switched power supply. Typically used, the DC to DC power supply converts the voltage and also provides isolation between the input and output. The common components of the S power supply include a transformer, rectifier and smoothing/storage capacitors. Commonly used in a switched power supply. The additional components include a control 1C chip, power transistors, filtering and shielding to prevent electromagnetic interference (EMI). The need for smaller and smaller equipment has led to one of the advantages of switched power supplies. For example, A conventional linear power supply in a home audio amplifier uses a large, bulky, expensive transformer to convert a low frequency, high voltage AC line supply to a lower voltage suitable for the amplifier or other application. First, the high The voltage AC line is stepped down to a lower AC voltage and then the lower AC voltage waveform is rectified to DC. However, the rectified power is 149927. Doc -4 - 201117544 The pressure system is discontinuous and therefore requires a large storage capacitor to provide a smooth money for the amplifier. Even so, the Dc supply has a sensible irregularity superimposed on the sink (corrugated electric dust) ), which can appear as an audible click and beep at the output of the amplifier unless considerable attention is paid to the design and layout of the amplifier. Although the design of this power supply is relatively simple and the transmission is relatively low However, the transformer is large, bulky and extremely expensive. These storage capacitors are also large and mussel. Therefore, the total volume of this power supply solution is excluded from being used for lightweight, low profile designs. The power loss in the supplier is relatively low, and a total efficiency is usually in the range of 85 to 9〇%. One of the alternatives to using a linear power supply is to use a switching mode power conversion technique. In this technique, first, Rectifying and smoothing the line voltage at full line voltage. This allows the storage capacitor to be smaller and less expensive than a linear power supply. The resulting high voltage DC signal is chopped at a very high frequency (usually tens of kHz) to produce a lower output voltage converted to a lower voltage by a small transformer to convert it to a lower Voltage. Since the operating frequency is much higher than the operating frequency of one of the linear power supplies', the transformer can be much smaller than in a conventional linear power supply. However, the AC signal on the output side of the transformer has to be rectified. To obtain DC, and also must be smoothed by means of a storage capacitor 'but a storage capacitor + than in a linear power supply. One example of this power supply is usually used to power a laptop. 149927.doc 201117544 One of the costs to pay for this solution is: To maintain efficiency, the chopping (: chopping wave produces a high frequency AC with a discontinuous, square waveform. This—the waveform produces a very high frequency of very high frequencies that cause radio frequency interference (EMI). Careful design, layout, and shielding are required to reduce these emissions to an acceptable level. The switching frequency components also need to be removed or isolated from the input and output lines, requiring additional magnetic components, which increases the cost and size of the supply. Although theoretically the efficiency can be extremely high, it is usually in the range of 80 to 90%. In summary, the size and weight of the switched mode power supply can be significantly reduced compared to a conventional linear power supply, and the basic component cost can be lower. However, the inherent complexity of a switched power supply design significantly increases design and certification costs and results in months of market time. In summary, linear power supplies tend to be large, relatively expensive, and cumbersome in size and profile. However, they are advantageous in terms of efficiency and low EMI. Switched power supplies tend to be smaller and lighter. However, due to higher frequency operation, the transformer and capacitor of a switched power supply tend to be smaller than a linear power supply. However, switched-mode power supplies can be less effective than linear power supplies' and produce significantly more EMI, which requires careful filtering and shielding. Switched power supplies are also more complex, requiring control circuitry and power switching devices. It takes a long time to design and is usually more expensive than a linear power supply. The trend is toward smaller and smaller power supplies', which requires higher frequency operations and therefore more about E]v1I2 potential problems. Larger power supplies can utilize three-phase power generation, which is one of the power supply technologies described in 149927.doc 201117544. In a three-phase system, three power lines carrying three alternating currents of the same frequency but different phases, etc., reach their instantaneous peaks at different times. The current waveforms are offset from each other by 120 degrees (i.e., each current is offset by one cycle from the other two waveforms). This interlacing of the waveform allows energy to be continuously supplied to the negative enthalpy in the case of reduced but no substantial ripple. Therefore, each cycle of current is transferred - a constant amount of power. The transformer can be used to boost or step down voltage levels at various points in a three-phase power network. A three-phase rectifier bridge typically contains six diodes, two of which are used for each of the three-phase systems. Although three-phase power supply systems have some benefits, they also suffer from certain drawbacks or limitations. For example, 'usually requires a minimum of three conductors or power lines' and three sets of circuits for level shifting (by means of a transformer) and rectification of each knives. Moreover, the official ripple is reduced by a single phase power supply, but the ripple is still substantial and generally requires storage capacitors to reduce it to an acceptable level. It needs to be made small, light and suitably cheap and has a minimum emi - power supply or converter. There is a further need to avoid the complexity and complication of a switched power supply - the power supply. Further steps are needed to reduce the need for large components and thus can be made into a power supply that is small and lightweight in terms of size and profile. SUMMARY OF THE INVENTION In the context of the present invention, a power supply is provided in which one or more inputs (four) (four) are shaped or otherwise selected such that the output waveform requires 149927.doc 201117544 for minimum smoothing of a DC output waveform generation . In accordance with one or more embodiments, a power supply is provided with one or more input waveforms that are shaped or otherwise selected prior to being provided to an isolation transformer. The nature of the input waveforms is shaped or selected such that the transformed waveform does not need to be smoothed for a DC output waveform or requires minimal smoothing. The power supply can include a waveform generator, a level conversion stage for boosting (or stepping down) voltage levels, a rectification stage, and a signal combiner. The waveform generator can generate a complementary waveform 'so that after rectifying and combining each of the complementary waveforms, the sum of them will be constant, so there is no need to smooth for the generation of a DC output waveform or to minimize smooth. In one embodiment, a DC output power supply includes a waveform generator, at least one transformer, a rectification stage, and a signal combiner. The waveform generator can generate complementary waveforms such that after rectifying and combining each of the complementary waveforms, their sum will be constant. The complementary waveforms are preferably identical but different from each other by a phase of 9 degrees, but in other embodiments, the waveforms may have a - different relationship. These complementary waveforms are applied to a transformer or to a single transformer with one of the individual windings. The output of the transformers 7 is provided to a sigma rectification stage that outputs a pair of rectified signals. The rectified signals have the property that their sums are constant when added together. A rectified signal is provided to the signal combiner, which sums the signals and produces a constant DC output signal. In some embodiments, the output voltage is monitored and fed back to the input side of the 149927.doc 201117544 ', A, to adjust the amplitude or other characteristics of the complementary waveform signals before being applied to the transformer. . In other embodiments, a switched capacitor technique is used in place of the transformer to adjust (e.g., boost) the voltage levels of the complementary waveforms. In other respects the power supply operates in a similar manner. The embodiments set forth herein may yield one or more advantages, including being smaller, lighter, thinner, and/or less expensive than a conventional power supply, with fewer components while maintaining high efficiency. The power supply can be designed to produce minimal or no significant EMI. Because the power supply is designed and built to be simple, it can be brought to market faster, resulting in a faster product design cycle. Further embodiments, alternatives, and variations are also set forth herein or illustrated in the drawings. [Embodiment] According to one or more embodiments, a power supply is provided with one or more input waveforms that are shaped or otherwise selected prior to being provided to an isolation transformer. The nature of the input waveforms is shaped, selected, or otherwise generated such that the transformed waveform needs to be minimally rectified and/or smoothed for the generation of a DC output waveform. Figure 8 is a conceptual block diagram of one of the power supply units 8 disclosed herein. In Fig. 8, a signal source (waveform) generator 8A5 produces a pair of complementary waveform numbers 823, 824. The complementary waveform signals 823, 824 are selected to provide a constant DC output bit after being coupled to an output (rectification) stage 84 by a one-bit conversion stage 830 (on which the level-converted signal is rectified and combined) Standard, 149927.doc 201117544 At the same time minimize the need for storage/smoothing capacitors in output stage 840. The complementary waveform signals 823, 824 are preferably of a type described hereinafter. The complementary waveform signals 823, 824 are boosted or stepped down via blocks 835, 836, respectively. The blocks may be implemented as one or more transformer or switched capacitor networks, for example as explained in further detail herein. Level conversion stage 830 provides signals 837, 838 to output stage 840. Signal 837 from first level shift block 835 is provided to one of rectifier stage blocks 860 of output stage 840. Signal 839 from second level shift block 836 is provided to a second rectifier block 861 of one of output stages 840. Each of the rectifier blocks 86A, 861 can be implemented as, for example, a full wave rectifier bridge. The rectified output signals 866, 867 of the rectifier blocks 860, 861 are complementary in nature such that when summed together, the result is a constant DC level waveform. To this end, the rectified output signals 866, 867 are provided to a signal combiner 870 that combines or otherwise combines the rectified output signals 866, 867 and typically does not need to A DC output signal 885 that is substantially constant in nature is provided in the case of a storage/smoothing capacitor. 1 is a conceptual block diagram of a DC output power supply i 基于 based on the general principles of FIG. 8 and using one or more transformers for signal level conversion. As shown in FIG. 1, a signal source (waveform) generator ι5 produces a pair of complementary waveform signals Vini, vIN2 on signal lines 123, 124. The complementary waveform signals Vini, ViN2 are selected to provide a constant DC output level while being coupled to an output stage 14 (by rectifying and combining the complementary waveform signals) by a transformer stage 130 while minimizing Wheel 149927.doc •10· 201117544 Required for storage/smoothing capacitors in the output mo. The complementary waveform signals v: N, 〜2 are preferably of a type described later herein. The complementary waveform signals vIN1, vIN2 are coupled to the output stage 14A by the variable M stage 13G and more specifically by the W variators 135, 136 of the variable = U0. The transformers 135, 136 can be lifted or depressurized in nature, and preferably have the same characteristics (assuming that the complementary waveforms are missing V Λ, the collar is 1. The amplitudes of the sir VIN 丨 and V 丨Ν 2 are the same). The transformer "5, 136 entity can be implemented as a single transformer with input windings 123, 124 and separate windings for output signals 137, 138 but u can be deliberately 杳 + & only J The sentence of the sentence is a transformer separated by two entities. Transmitter stage 130 provides signals 137, 138 to output stage 14A. A signal 137 from the secondary output of transformer U5 is provided to one of the output stages (10). The signal W from the output of the sub-stage of the waste-crushing-to-water state 136 is supplied to the _th:rectifier block 161 of the output stage 14〇. Each of the rectifier blocks 160, 161 can be implemented as, for example, a full wave rectifier bridge. Rectified output signals 166, 167 of the rectifier blocks 160, 161

可係性質上互補以使得當在-起求和時結果係怪定DC 位準之週期波形。為此,將該等經整流輸出信號i66、i67 提供至-信號組合器170,該信號組合器對經整流輸出信 號166、167求和且在通常不需要儲存/平滑電容器之情形 下提供性質上大致恒定之一DC輸出信號185。實務中,可 能發生少量波紋,其可藉助相對小的平滑電容器(未展示) 平滑掉’電容器可提供在任何便利位置中,例如在整流器 區塊160、161之輸出處及/或在信號組合器17〇之後。 149927.doc 11 201117544 所產生波形V1N1、Viw之特性經選擇為週期波形,以使 得在變壓、整流及組合(例如,相加)該等信號之後,所得 輸出信號185係一恆定DC位準。較佳地,波形ViNi、ViN2 形狀上相同,但彼此偏移9〇度。而且,該等波形較佳地係 大體平滑的,沒有自-_角度而言可係不期望之尖波或 其他特徵。信號vIN1、vINS之適合波形之實例展示於圖1 中,且亦更詳細地圖解說明於圖2中。在圖2中,圖形2八及 2B分別展示波形VlN1& VlN2(其等在圖2中表示為波形2〇3、 204),该等波形中之每一者構成一交替未經反轉/經反轉升 餘弦波形,但相位彼此偏移90度。在全波整流之後,所得 波形213、214圖解說明於圖形2(:及2£)中,其等分別與波 形Vm、VIN2相關。波形213、214係彼此偏移9〇度之正弦 曲線波形,亦即,具有正弦與餘弦之關係’此反應原始波 形VIN!、V1NZ之相位偏移。當相加在一起時,經整流波形 213、214產生具有一恆定DC輸出位準之一輸出波形22〇, 如圖形2E中所示。換言之,波形VlNi、ViN2之整流及求和 即產生一恆疋DC輸出位準,而通常不需要如習用切換式 電源供應器中通常將需要之大的儲存/平滑電容器。 除了在圖2之圖形2A及2B中所圖解說明之波形2〇3、2〇4 之外’亦可使用其他波形且該等波形提供一類似最終結 果。圖3圖解說明經選擇以在整流及求和之後提供一恆定 DC輸出位準之互補週期波形之一第二實例。在圖3中,圖 形3A及3B分別繪示波形VlN1&V1N2(其等在圖3中表示為波 形303、304) ’該等波形中之每一者構成一三角形波形, 149927.doc 12 201117544 該波形具有交替未經反轉/經反轉三角波,但相位彼此偏 移90度。在全波整流之後,所得波形313、314展示於圖形 3C及3D中’其等分別與波形VIN1、VIN2相關。經整流波形 313、3 14皆係正三角形波形,其等具有對稱形狀,彼此偏 移90度,此反應原始波形V1N丨、VINZ之相位偏移。當相加 在一起時’經整流波形3 13、3 14產生具有一丨亙定DC輸出 位準之一輸出波形320,如圖形3E中所示。由於經整流波 形3 13、3 14針對三角波之升高及下降部分具有相同線性斜 率,因此第一經整流波形3 13之電壓之下降匹配第二經整 流波形314之電壓之升高且反之亦然。因此,波形Vini、 ViN2之整流及求和即產生一 ‘丨亙定DC輸出位準,而通常不需 要如在習用切換式電源供應器中通常將需要之大的儲存/ 平滑電容器。 除了圖2及3中所示針對V1N1、Vin2之波形外,亦可使用 其他波形。較佳地’波形V丨N1、V丨Nz經選擇或經產生以使 得在變壓及全波整流之後’該等經整流波形彼此互補以便 其等可相加在一起以產生一恆定DC位準。此等波形可包 3產生性質上對稱以使其升高斜率及曲率與其下降斜率及 曲率相同之經整流波形之週期波形。同樣地,經整流波形 較佳地係關於其中點對稱以使得其交替「正」及「負」波 在形狀上相同但自彼此反轉。圖2及3中所示之波形實例滿 足以上準則。在此等經整流波形係相同但彼此偏移9〇度之 情形下,該等經整流波形之對稱性質意指一個經整流波形 之升高將精確匹配另一經整流波形之下降,因此導致一怪 149927.doc 13 201117544 定經組合輸出位準。 除上述波形之外,亦可使 VlN2 °舉例而言,波形丨 成,及/或可隨時間變化。 用更複雜之波形用於V1N1、 、VIN2可由多個不同諧波構 上文所述電力轉換技術可應用於基於電壓或基於電流之 電源供應器。本文中進一步闡述更詳細實例。 圖4係展示所揭示的根據圖i之概念方塊圖之一電壓控制 DC輸出電源供應器4〇〇之一實施例之組件之一方塊圖。電 源供應器400可由一本端電源(例如一電池)供應或由一外部 電源(例如一線路源)供應。在圖4中,一信號產生器4〇5產 生一對互補波形信號412、413,該等互補波形信號較佳地 性質上為週期性且通常具有先前針對ViNl及VW2所述之特 性-亦即,其等經塑形或選擇以在藉由一變壓器級耦合、 整流及組合之後提供一恆定DC輸出。將該等互補波形信 號412、413提供至一電壓控制放大器(V(:A)415,其基於經 由回饋感測放大器490自DC輸出信號485接收之回饋而調 整波形信號412、413之振幅。在某些實施例中,電壓控制 放大器41 5可和回饋路徑491及感測放大器490—樣省略。 電壓控制放大器4 1 5輸出該對經振幅調整互補波形信號 VinI及ν1Ν:ί分別至線性放大器430、43 1,如圆4中所示的覆 蓋圖形中之波形423、424所反應,該等覆蓋圖形繪示類似 於圖1及圖2之類似實例中所使用之波形之一實例。430、 43 1之功率輸入連接至電源供應器軌道+V及_v,且該等線 性放大器輸出經放大信號432及433,該等信號基本上在軌 149927.doc • 14· 201117544 道間跨越(自放大器430、431經受較小損耗)。在初始所產 生波形呈現為如針對Vin]及ViN2之圖形423、424中之情況 下針對一個波形實例之信號432、43 3之電壓特性分別反 應於圖4中所圖解說明之覆蓋圖形4 4 〇及4 4丨(繪示波形v p i 及Vp2)中。VP1及Vp2之對應電流特性分別反應於覆蓋圖 形442及443(繪示波形Ipl及Ip2)中。如可自圖形44〇、 441 442及443看到,針對此特定實例之電壓波形Vp丨及 VP2之特性在於交替經反轉及未經反轉升餘弦波(其中Vpi 及Vp2係相同但彼此偏移9〇度),而對應電流波形ip 1及 呈現方形波之形式,該等方形波具有對應於未經反轉升餘 弦波之時間週期之一恆定正電流,及對應於經反轉升餘弦 波之k間週期之怪疋負電流。與電壓波形類似,電流波形 Ip 1及Ip2相同但彼此偏移90度。 第一線性放大器430之輸出耦合至一第一變壓器435之主 級繞組。第二線性放大器431之輸出耦合至一第二變壓器 436之主級繞組。變壓器435、436之副級繞組耦合至一輸 出級440,該輸出級自變壓器435、436接收變壓器輸出信 號437、438。變壓器435、436性質上可係升壓或降壓,且 較佳地在特性上相同(假設互補波形信號v p〖及v p 2之振幅 係相同)。可將變壓器435、436實體實施為具有用於輸入 信號432、433及用於輸出信號437、438之單獨繞組但共用 相同磁芯之一單個變壓器’否則可將其等實體實施為兩個 單獨變壓器。變壓器435、436較佳地經設計以具有低洩露 電感。 149927.doc 15 201117544 輪出級450較佳地包括一對整流器區塊46〇、461,其等 可貫施為(例如)全波整流器橋。將來自變壓器435之副級輸 出之信號437提供至輸出級45〇之一第一整流器區塊46〇。 將來自變壓器436之副級輸出之信號439提供至輸出級45〇 之一第二整流器區塊461。整流器區塊46〇、46〗中之每一 者可實施為(例如)一全波整流器橋。在此情況下,整流器 區塊460、461之經整流輸出信號係週期波形,其等在性質 上互補以使得當在一起求和時結果係一恆定DC位準。為 此,整流器區塊460、461之輸出串聯結合在一起以使得加 性組合來自其等之經整流輸出信號,藉此在通常不需要儲 存/平滑電容器之情形下提供性質上大致恆定之一Dc輸出 信號485。實務上,可能發生少量波紋,該波紋可藉助相 對小的平滑電容器(未展示)平滑掉,平滑電容器可提供於 任何便利位置處,例如在整流器區塊46〇、46丨之輸出處及/ 或橫跨負載470。因此,給負載470供應一恆定DC輸出供 應信號。 若需要,可經由感測放大器49〇提供回饋,該感測放大 斋對DC輸出信號485取樣且提供一電壓回饋信號至電壓控 制放大器415,該電壓控制放大器又調整輸入波形412、 413之振幅以適於線性放大器43〇、431。以此方式,可將 該DC輸出信號485維持在一恆定電壓位準處。 電源供應器400之作業大體類似於圖1之電源供應器 100。舉例而言,在輸入波形412、413呈現例如圖2之圖形 2 A及2B中所圖解說明之週期交替經反轉/未經反轉升餘弦 149927.doc •16· 201117544 波之形狀之情形下,所得經整流及經組合波形將類似於圖 2之圖形2C、2D及2E中所示之彼等波形,如先前所闡釋。 在輸入波形412、4 1 3呈現例如圖3之圖形3 a及3B中所圖解 說明之具有交替經反轉/未經反轉三角形波之三角波形之 形狀之情形下,所得經整流及經組合波形將類似於圖3之 圖形3C、3D及3E中所示之彼等波形,亦如先前所闡釋。 與圖1 一樣,可使用任何適合週期波形,包含具有多個諧 波或隨時間交替之波形。藉助本文中所述之適合波形,電 源供應器400理論上可在不需要儲存/平滑電容器之情形下 產生一恆定DC輸出信號485。 圖5係展不根據圖i之一般方法之一電源供應器5〇〇之另 實施例之組件之一方塊圖。不同於圖4之電源供應器(其 係電壓控制DC輸出電源供應器),圖5圖解說明一電流控 制DC輸出電源供應器5〇〇。在圖5中,標記為5χχ之元件功 月b上通常與圖4中類似標記之元件4χχ相似。電源供應器 5〇〇可如前文由一本端電源(例如一電池)供應或由一外部電 源(例如一線路源)供應。一信號產生器5〇5產生一對互補波 形L號5 12 5 13 ’其等較佳地在性質上為週期性且通常具 有先前針對V,NjViN2所述之特性·亦即,其等經塑形或選 擇以在藉由-變壓器級輕合、整流及組合之後提供一值定 DC輸出。將互㈣形信號512、513提供至一電堡控制放 ,器(,15’該電壓控制放大器基於經由回饋感測放大 器590自DC輸出信號585接收之回饋調整波形信號π、 513之振幅。在某些實施例中,電壓控制放大器515可如回 149927.doc -17- 201117544 饋路徑591及感測放大器590—樣省略。 電壓控制放大器5 1 5輸出該對經振幅調整互補波形信號 Vini& V1N:j分別至線性跨導放大器53〇、531,如圖5中所示 之覆蓋圖形中之波形523、524所反應,該等覆蓋圖形繪示 類似於圖1及圖2之類似實例中所使用之波行之一實例。跨 導放大器530、531輸出與其輸入電壓成比例之一電流,且 因此可被視為電壓控制電流源。跨導放大器53〇、53 1之效 應在於由信號產生器505產生之波形512、513基本上將被 轉換至類似形狀之電流波形。如下文所論述,此對於下游 處理可具有優點且可產生甚至更佳EMI特性。跨導放大器 530、531連接至電源供應器軌道+¥及_乂,且輸出經放大 信號532、533至變壓器535、536。在初始所產生波形呈現 為如針對Vi»丨及V丨Μ之圖形523、524中之情況下,信號 5 3 2、5 3 3之電流特性分別反應於圖5中所圖解說明之覆蓋 圖形540及541 (繪示波形Ip 1及ip2)中。信號432、433之對 應電壓特性分別反應於覆蓋圖形542及543(繪示波形Vp 1及 Vp2)中。如可自圖形540、541、542及543看到,針對此特 定實例之電流波形Ip 1及Ip2之特性在於交替經反轉與未經 反轉升餘弦波(其中Ip 1及Ip2係相同但彼此偏移9〇度),而 對應電壓波形Vp 1及Vp2呈現方形波形式,該等方形波具 有對應於未經反轉升餘弦波之時間週期之一恆定正電壓, 及對應於經反轉升餘弦波之時間週期之值定負電壓β與電 流波形Ip 1及Ιρ2相同’電壓波形Vp 1及Vp2相同但彼此偏移 90度。 149927.doc •18· 201117544 第一跨導放大器530之輸出耦合至一第一變壓器53 5之主 級繞組。第二跨導放大器531之輸出耦合至一第二變壓器 536之主級繞組。變壓器535、536之副級繞組耦合至一輸 出級540,該輸出級自變壓器535、536接收變壓器輸出信 號53 7、538。變壓器535、536性質上可係升壓或降壓,且 較佳地在特性上相同(假設傳入信號532、533之振幅係相 同)。可將變壓器535、536實體實施為具有用於輸入信號 532、533及用於輸出信號537、538之單獨繞組但共用相同 磁芯之一單個變壓器,否則可將其等實體實施為兩個單獨 變壓器。 輸出級550較佳地包括一對整流器區塊56〇、561,其等 可實施為(例如)全波整流器橋。將來自變壓器535之副級輸 出之信號537提供至輸出級550之一第一整流器區塊56〇。 將來自變壓器536之副級輸出之信號539提供至輸出級550 之一第二整流器區塊561。整流器區塊560、561中之每一 者可實施為(例如)一全波整流器橋。在此情況下,整流器 區塊560、561之經整流輸出信號係週期波形,其等在性質 上互補以使得當在一起求和時結果係一恆定DC位準。為 此,整流器區塊56〇、561之輸出並聯結合在一起以使得加 性組合來自其等之經整流輸出信號’藉此在通常不需要儲 存/平滑電容器之情形下提供性質上大致恆定之一 DC輸出 L號585。實務中,可能發生少量波紋,其可藉助相對小 的平容器(未展示)平滑掉,平滑電容器可提供於任何 便利位置中,例如在整流器區塊560、561之輸出處及/或 I49927.doc •19- 201117544 鉍跨負載570。因此,給負載57〇供應一恆定d 信號。 /需要’可經由感測放大器590提供回冑,該感測放大 器對DC輸出仏號585取樣且提供—電壓回饋信號至電壓控 制放大器515 ’該電麼控制放大器又調整輸入波形M2、 513之振幅以係跨導放大器53()、531之—適合位準。以此 弋可將DC輸出h號585維持在一怪定電壓位準處。回 饋迴路較佳地經設計以使得跨導放大器53〇、別靠近軌道 運作以達到最大效率,但;^夠遠以使得該等放A||仍處在 線性操作區中且不限幅。電壓回饋迴路有助於甚至在負載 之特性(例如,其電阻)隨時間波動之情形下亦確保電壓位 準保持為相對恆定《電壓回饋亦可用於確保若輸入電壓下 降(例如,使用一電池作為輸入源),則輸出電壓將保持相 對恆定。 在將波形產生器105之輸出信號123、124視為與電流相 關時,電源供應器5〇〇之作業大體類似於圖丄之電源供應器 500。在輸入波形512、513呈例如圖2之圖形2A及2B中所 圖解說明之週期交替經反轉/未經反轉升餘弦波之形狀之 情形下,所得經整流及經組合波形將類似於圖2之圖形 2C、2D及2E中所示之彼等波形,如先前所闡釋。在輸入 波形5 12、513呈例如圖3之圖形3 A及3B中所圖解說明之具 有交替經反轉/未經反轉三角形波之三角波形之形狀之情 形下’所得經整流及經組合波形將類似於圖3之圖形3C、 3D及3E中所示之彼等波形’亦如先前所闡釋。與圖1 一 149927.doc •20· 201117544 樣,可使用任何適合週期波形,包含具有多個错波或隨時 間乂替之波形藉助本文中所述之適合波形,電源供應器 500理論上可在不需要儲存/平滑電容器之情形下產生一值 定DC輸出信號585。 圖11A及中展示使用—替代放大器配置之一電源供 應器之另-實施例。在此等實例中,出於簡化之目的,僅 展不主級側電源供應器之半部;將複製每一情況下之電路 以完成該電源供應器之主級側部分。因此,圖uA中所示 之變壓器1148概念上將對應於圖i中之變壓器ΐ35(τι),而 將利用一第二組電路及對應於變壓器136(Τ2)之第二變壓 器來完成該電源供應器之主級侧部分。同樣地,由於圖 11八及113中僅繪示主級側上之電源供應器電路11()2,因此 副級側上之電路通常將由如(例如)圖丨中展示為整流器 160(R1)或如圖5中(亦即,輸出級55〇之二極體〇1至〇4)所 示之橋電路之半部形成。 圖11A及11B中之一般方法係採用一推挽放大器設計; 因此,變壓器U48具有一單個副級繞組1146但兩個主級繞 組 1147。 首先觀察圖11A之實例,電壓源1105、11〇6分別產生輸 出波形1112及1113,其等繪示於接近電壓源11〇5、11〇6之 隨附疊置圖形中。波形1112及U13通常分別等同於圖2八中 所示週期波形之正半循環及負半循環。第一電壓源n〇5產 生對應於圖2A中之未經反轉升餘弦波之一波形1112,而第 二電壓源1106產生對應於圖2A中之經反轉升餘弦波之一波 149927.doc 21 201117544 形;但此等波展示為正而非負,此乃因其等施加於雙主級 變壓器1148之反轉侧。對於產生互補波形之第二變壓器 (未展示)而言,將提供兩個類似電壓源以產生分別對應於 圖2B中所示週期波形之正半循環及負半循環之波形,且自 電壓產生器1105、1106之波形類似地相位偏移,正如圖2 a 及2B之波形。 波形111 2、111 3中之每一者構成一系列未經反轉升餘弦 波’其等在此實例中係彼此相位偏移1 8〇度。將電壓源 11 05、11 06作為輸入分別提供至線性放大器丨〗2〇、1 j 21, 其等又饋送場效應晶體管(FET)113〇、1131。晶體管 1130、1131中之母一者連接至變壓器1148之主級繞組ι147 中之一者,且每一者之源極亦連接至各別信號放大器 11 2 0、1121之非反轉輸入且至各別電流感測電阻器丨丨丨6及 1117。同樣,變壓器1149之中心分接頭1149及放大器 1120、1121之電源供應器輸入連接至一單獨電源供應器 11 07 ’其可包括(例如)一系列電池或其他DC電源。 放大器1120及電晶體丨丨儿⑴丨)連同放大器1121及電晶體 113 1 (Q2) —起形成一推挽放大器,該推挽放大器提供由電 壓波形1112、1113界定之一經界定電流輸出,該等電壓波 形由源11 05及11 06施加。將該等電流波形饋送至變壓器 1149 ’且然後出現在副級繞組丨丨46上以供輸出級(圖丨丨a中 未展示)進行整流。 在某些組態中,圖11 A之裝置可提供一優點,此乃因可 利用單極性功率電晶體裝置且驅動電壓可係單極且參照接 149927.doc •22· 201117544 地。 為達成最佳效能’電晶體1130、1131可係根據習用方法 組態以傳導一永久靜態電流以便改良在較低輸出電流位準 下回應之線性及速度。然而’此一靜態電流可降低電源供 應器之總效率。圖11B中所示之稍微經修改操作配置可減 小靜態電流量。圖11B之基本結構類似於圖11A,但由信 號產生器1105、1106供應之波形經修改以改良在低輸出電 >>IL位準下回應之線性及速度’同時最小化總效率之任何降 低。展示於主驅動波形1112、1113之下之額外週期波形 1197、1198係在一共模波形同時添加至推挽放大器之兩個 半部之每一情形下之振幅擴大視圖。此共模波形致使電晶 體1130、1131僅在各別主波形m2、m3接近零之區域周 圍傳導靜態電流;在傳導週期外之所有其他週期處,電晶 體1130、1131被施偏壓OFF。該共模電流致使電晶.體 1130、1131在需要其等運轉之前不久進入其傳導區域,因 此減小導通畸變。輸出級(在副級側上)之每一半部中之共 模電流在變壓器11 48中抵消且因此沒有出現在來自變塵器 副級繞組1146之輸出中。 其間共模波形致使電晶體1130、1131傳導之週期可與所 示實例不同。以此方式,由於該靜態電流所致之平均功率 損耗相比於連續傳導情況可係顯著減小。 圖5與圖ΠΑ及11B中所繪示之功率放大器配置通常可稱 為線性跨導放大器’其等具有一標稱平坦頻率回應,以使 得其等準確地重現饋送至其輸入之互補波形。該等互補波 149927.doc •23- 201117544 形係非正弦曲線且因此通常自放大器需要一高增益頻寬積 以達成最佳效能。 在圖2A及2B中所示特定互補波形之情形下,此約束可 藉由適當修改該等互補波形而得以放鬆以使得該等放大器 可組態為積分器。一積分器之閉迴路回應通常隨著頻率增 加以6 dB/octave下降,此允許採用具有一較低開迴路頻寬 之一放大器。 此方法可使用之一放大器組態之—項實例展示於圖丄2 中。在此實施例中’與圖11A及11B中之設計一樣,僅圖 解說明對應於與兩個變壓器中之一者相關聯之電路的主級 側電源供應器之半部。與早期設計一樣,此實例中之變壓 器1248具有一單個副級繞組1246但有兩個主級繞組1247。 如刚文’僅繪示主級側上之電源供應器電路丨2〇2,而針對 主級側電路之此半部之副級側上之電路通常將包括類似於 例如圖1或圖5之輸出級之半部之彼電路之橋電路。在此實 例中,一對電壓源12〇5、1206分別產生輸出波形1212及 1213,其等繪示於接近電壓源1205、1206之隨附圖形中。 經由電阻器1270(R3)及1271(R4)將電壓源1205、1206之輸 出分別提供至線性放大器丨22〇、丨22 1,而故大器丨220、 1221又饋送場效應電晶體(FET)123〇、1231。電晶體 1230、1231中之每一者連接至變壓器1248之主級繞組1247 中之一者,且其每一者之源極亦分別連接至電流感測電阻 1216及1217且至各別積分電容器1272((:1)及1274((:2),該 等積分電谷器中之每一者分別由一電阻器1273(R5)及 149927.doc •24· 201117544 1275(R6)騎跨。變壓器1249之中心分接頭1249及放大器 1220、1221之電源供應器輸入連接至一單獨電源供應器 1207 ’其可包括(例如)一系列電池或其他DC電源。 在作業中,來自電流感測電阻器1216(R1)及1217(R2)之 • 回饋係藉助電容器1272(C1)及1273(C2)達成,其中包含電 • 阻器i273(R5)及1274(R6)以提供DC穩定性。電容器1272及 1之73之積分器作用強迫橫跨電阻器1216(R1)及1217(R2)之 電壓且因此通過電晶體1230(Q1)及1231(Q2)之電流成為由 信號產生器1205及1206輸出之電壓(亦即,電壓1212及 12 13)之組成部分。為使彼電流匹配所需形狀,電壓波形 1212及121 3經選擇係圖2A中所繪示波形203(或針對主級側 電源供應器電路之互補區段之波形204)之差分波形,再(類 似於圖11A)針對波形1212及波形1213僅每隔半個循環自波 形203進行截取。由於波形1213施加至雙主級變壓器1248 之負繞組,因此該等波展示為性質上係正。 一替代積分器組態可藉由免除電容器1273及1274((:1及 C2)且用電感器替代電流感測電阻器1216及1217(R1及R2) 來構造。此情況下,通過電感器之電流將係橫跨其等之電 ' 壓之組成部分。 • 使用一積分器用於功率放大器區段並不限於此等特定實 例。在圖5之電源供應器電路之更一般版本中,放大器53〇 及531可組態為具有一積分器特性之跨導放大器,其等饋 送有經修改電壓波形代替圖5中所示波形523及524。用於 此目的之經修改波形展示為圖13中之波形1312、i3i3,同 149927.doc •25· 201117544 時實線展示積分之後所得之波形1303、1304 ^經修改波形 13 12、13 13可闡述為一序列正弦或餘弦波,其中該正弦或 餘弦波形在每一循環結束時反轉。與圖2A及2B 一樣,波 形13 12、13 13及所得經積分波形丨3〇3、丨3〇4形狀上相同, 但相位彼此偏移。 低靜態功耗之目標亦可以其他方式實現,舉例而言藉由 採用刖饋技術來線性化功率放大器。此方法圖解說明於圖 14中。為簡化起見,圖14中所示之電路14〇2對應於圖 之功率放大器之一個側;將提供對應於圖11A之功率放大 器之另一半部之一第二組類似組件以形成一完整放大器; 且然後,又將再複製整組電路以提供用於在電源供應器之 另一側上進行整流及組合之互補信號。在圖〖4中,放大器 1420、電晶體1430(Q1)及電阻器1416(R1)形成如圖UA中 一樣執行之一放大器A1,但具有低至零之靜態電流。電晶 體1430(Q1)之輸出1432連接至一雙主級變壓器(類似於圖 11A中所示變壓器1148)之主級繞組中之一者。—Dc電源 1407將電力供應至放大器丨420及1421,且該電源亦連接至 該變壓器之一中心分接頭(類似於連接至圖u A之變壓器 1148之中心分接頭之DC源信號)。 放大器1421、電晶體143 1(Q2)及電阻器1417(R2)形成一 低功率錯誤校正放大器A2,其放大且調節至^之輸入電 壓(自信號產生器1405輸出)與橫跨電阻器1416(R1)之輸出 電壓之間的差。將此差電壓之一經調節版本轉換至通過電 晶體1431 (Q2)之一電流以添加至來自電晶體“⑽⑴丨)之電 149927.doc •26· 201117544 流。此一部分係使用差分器141 8來達成,該差分器自電壓 源1405(V1)接收電壓信號且減去電晶體^⑽⑴丨)之源極與 感測電阻器1 4 16(R1)之間的節點處之電壓信號。放大器A2 因此將補償A1中之錯誤之一校正電流添加至輸出。自放大 器A2需要之校正電流通常比自放大器A丨輸出之電流明顯 小,且因此放大器A2可係一比放大器A1低之功率放大 器,且亦可具有一小得多之靜態功率浪費。 可將電晶體對1430、1431之輸出1432饋送至類似於圖 11A之一變壓器之主級繞組中之一者。另一經類似組態之 前饋放大器將如圖11A中連接至該變壓器之另一主級繞 組。信號產生器(1405及其對等部分)可經組態以產生類似 於圖11A或本文中所揭示其他實施例之信號。 使用如圖14中所圖解說明之前饋校正之一替代方案係如 圖15之實施例中所示之配置中應用前饋及回饋技術兩者。 與圖14一樣,圖15中之電路15 02對應於圖11A之功率放大 器之一個側;一第二組類似組件將對應於圖丨丨A之功率放 大器之另一半部以形成一完整放大器;且然後,又將整組 電路再複製以提供用於在電源供應器之另一側上進行整流 及組合之互補信號。在圖15中,放大器1520、電晶體 1530(Q1)及阻抗元件1516(Z4)形成如圖11A中一樣執行之 一放大器A1,但具有低至零之靜態電流。放大器ι52ι、電 晶體1531(Q2)及阻抗元件1517(Z3)形成一低功率校正放大 器。另一阻抗元件1572(Z2)形成自放大器1520之輸出至其 反轉輸入之一回饋路徑,且阻抗元件1571 (Z1)連接放大器 149927.doc •27· 201117544 1520之反轉輸入至電晶體與阻抗元件1516(Z4)之 間的節點。若滿足關係Ζ2·Ζ4=Ζ1·Ζ3,則電晶體i53〇(qi) 中之畸變可自由通過電晶體153〇(Ql)及1531((^2)之電流之 總和形成之輸出電流消除。因此,放大器級A1可在低至零 之靜態電流下作業以達成最大效率。 此外,若將阻抗元件1 572(Z2)選擇為一電容器,將阻抗 兀件1516(Z4)選擇為一電感器,且阻抗元件1571(21)及 15 17(Z3)係電阻器,則滿足平衡方程式,同時輸出電流係 來自信號產生器1505之輸入電壓¥1之組成部分’此允許使 用圖12中所示之波形。 阻抗元件Z1至Z4之其他組合亦可用來達成類似結果,且 阻抗元件不需要係整體電路元件,而可係元件網路。舉例 而言,阻抗元件1572(Z2)可係一電容器,阻抗元件 1571(Z1)可係電阻器及電容器之一串聯組合,阻抗元件 1516(Z4)可係一電阻器,且阻抗元件1517(Z3)可自電阻器 及電谷器之一並聯組合。此亦可使用圖1 2中所示之波形作 為輸入。作為另一實例,阻抗元件1 572(Z2)可係一電容 器’阻抗元件1571(Z1)可係一電阻器,阻抗元件1516(Z4) 亦可係一電阻器,且阻抗元件1517(Z3)可係一電容器。在 此情形下’裝置可使用圖11A中所示之輸入波形或其他適 合波形。 一其他替代方案係組合針對Z3之一阻抗元件與至放大器 1521之非反轉輸入端子之輸入上之一遽波器。校正放大器 A2之轉移函數亦可藉由如圖16中所示添加回饋元件 149927.doc -28- 201117544 1675(Z5)及1676(Z6)來更改。舉例而言’阻抗元件 1675(Ζ5)可係一電阻器,且阻抗元件1676(Ζ6)可係—電容 器。放大器Α2之轉移函數可經修改以使阻抗元件l6i7(z3) 看起來如同一不同類型阻抗元件;舉例而言,可期望將阻 抗元件MiVZS)實施為一電阻器,因此避免使用一無功元 件作為阻抗元件1617。在其他方面中,圖16與圖15相同, 且圖16中之組件l6xx大體對應於圖15中之其對等部分組件 1 5xx ° 儘管已相關一特定功率放大器組態闡述及圖解說明前饋 錯誤校正及前饋加回饋校正技術,但其等亦可應用於其他 功率放大器及相關設計。 圖7係展示大體根據圖8之概念圖之原理使用切換式電容 器貝施之一電源供應器7〇〇之一實施例之一方塊圖。與本 文中所闡述之其他實例一樣,電源供應器7〇〇可由一本端 電源(例如一電池)供應或由一外部電源(例如一線路源)供 應。在圖7中,包括(在此實例中)一對信號產生器7〇5、715 之一波形產生器產生一對互補波形信號7〇6、716,其等較 佳地在性質上㈣期性且通常具有先前針對乂⑻及^所 闡述之特性-亦即,其等經塑形或選擇以在經位準移位、 整流及組合之後提供一恆定沉輸出。此等波形之實例展 示為週J交替經反轉/未經反轉升餘弦信號波形及 717(根據—項實例,分別對應於波形信號706及716)。互補 週期波形信號706、716可視情況提供至—電壓控制放大器 (VCA)(未展示)以基於自DC輸出信號785接收之一回饋信 149927.doc -29· 201117544 號(亦未展示)調整波形信號7〇6、716之振幅。 將波形信號706提供至跨導放大器731及75 I,同時將波 形信號71 6提供至跨導放大器74丨及761。跨導放大器731、 741、751及761輸出與其輸入電壓成比例之一電流,且因 此可視為電壓控制電流源。跨導放大器73丨及741之效應係 將波形信號706、716基本上轉換至類似形狀之電流波形 735、745。跨導放大器751及761之效應係將波形信號 706、7 16基本上轉換至類似形狀但性質上反轉之電流波形 755、765 ’性質上反轉係由於波形信號7〇6、7 16耦合至跨 導放大器751及761之反轉輸入之事實所致。與圖5實施例 一樣’轉換至一電流驅動波形可對下游處理具有優點且可 產生改良之EMI特性。跨導放大器731、741、751及761可 係與先前所述之彼等組態類似之組態。 對於圖7中所圖解說明之實例,信號735及745之電流特 性之特性可在於交替經反轉/未經反轉升餘弦波(其中信號 73 5及745之電流波形相同但彼此偏移9〇度),而與信號73 5 及745相關之對應電壓波形通常係方形波,該等方形波具 有對應於未經反轉升餘弦波之時間週期之一恆定正電壓, 及對應於經反轉升餘弦波之時間週期之恆定負電壓。與信 號735及745之電流波形相同,電壓波形係相同但彼此偏移 90度。類似地,信號755及765之電流及電壓特性自信號 735及745反轉。因此,針對此實例之信號755及765之電流 特性之特性可在於交替未經反轉/經反轉升餘弦波(其中信 號755及765之電流波形係相同但彼此偏移9〇度),而與信 149927.doc •30· 201117544 號755及765相關之對應電壓波形通常係方形波,該等方形 波具有對應於未經反轉升餘弦波之時間週期之一恆定正電 壓及對應於經反轉升餘弦波之時間週期之恆定負電壓。與 信號755及765之電流波形相同,電壓波形係相同但彼此偏 移90度。 跨導放大器73卜74i、751及761之輸出各自耦合至一類 似組件網路,該等組件運作以使用(例如)一充電增壓切換 式電容器電路升壓(或降壓)輸入電壓位準且將一經位準轉 換輸出作為一恆定DC源信號785提供至負載77〇。第一跨 導放大器731之輸出耦合至一電容器732,該電容器之另一 4耗合至輸入電源供應器軌道789。跨導放大器731用於以 致使所施加信號之位準升壓(近似雙倍)之一方式對電容器 732週期性充電,因此產生一經位準轉換信號737。二極體 734用於整流經升壓(或降壓)信號737。以一類似方式,跨 導放大器741、751及761分別耦合至電容器742、75 2及 762 ’ δ玄專電谷器中之每一者分別經由二極體m3、753及 763耗合至輸入電源供應器軌道789。電容器742、752及 762以及相關聯二極體743、753及763形成切換式電容器電 路,該等電路升壓(或降壓)輸入信號位準,因此產生經位 準轉換信號747、757及767。整流二極體744、754及764分 別用於以與關於經升壓(或降壓)信號737之整流二極體734 相同之方式整流經升壓(或降壓)信號747、757及767 ^自經 位準轉換信號737及757獲取之經整流信號之加性組合係 (對於圖解說明於圖7中之實例)類似於圖2中之波形213。自 149927.doc 31 201117544 經位準轉換信號747及767獲取之經整流信號之加性組合係 (對於此同一實例)類似於圖2中之波形214-亦即,與由自經 位準轉換信號737及757獲取之經整流信號之加性組合產生 之波形相同之波形之一 90度偏移版本。如以上所述,波形 2 1 3及2 14之加性組合係一恆定DC信號位準。 因此’藉由將自經位準轉換信號737、747、757及767獲 取之所有四個經整流信號組合在一起,最終結果係性質上 大致恆定之一經升壓(或降壓)DC信號785,而通常不需要 儲存/平滑電容器。實務中,可能發生少量波紋,其可藉 助相對小的平滑電容器772平滑掉,電容器772可提供於任 何便利位置中,例如橫跨負載77〇。藉此,給負載77〇供應 一恆定DC輸出供應信號。四相位設計亦確保自供應器789 取得之電流係大致無波紋。圖7之實例圖解說明一單個電 壓升壓級,但相同原理可應用於一多級升壓轉換器。The coefficients may be complementary in nature such that when the sum is summed, the result is a periodic waveform of the DC level. To this end, the rectified output signals i66, i67 are provided to a -signal combiner 170 which sums the rectified output signals 166, 167 and provides properties in the event that normally no storage/smoothing capacitors are required. One of the DC output signals 185 is substantially constant. In practice, a small amount of ripple may occur, which may be smoothed out by means of a relatively small smoothing capacitor (not shown). Capacitors may be provided in any convenient location, such as at the output of rectifier blocks 160, 161 and/or in a signal combiner. After 17 baht. 149927. Doc 11 201117544 The characteristics of the generated waveforms V1N1, Viw are selected as periodic waveforms such that after transforming, rectifying, and combining (e.g., adding) the signals, the resulting output signal 185 is a constant DC level. Preferably, the waveforms ViNi, ViN2 are identical in shape but offset from each other by 9 degrees. Moreover, the waveforms are preferably substantially smooth and do not have undesired sharp waves or other features from the - angle. Examples of suitable waveforms for signals vIN1, vINS are shown in Figure 1, and are also illustrated in more detail in Figure 2. In Fig. 2, graphs 2-8 and 2B respectively show waveforms VlN1 & VlN2 (which are represented in Fig. 2 as waveforms 2〇3, 204), each of which constitutes an alternating unreversed/warm Reverse the raised cosine waveform, but the phases are offset from each other by 90 degrees. After full-wave rectification, the resulting waveforms 213, 214 are illustrated in Figure 2 (: and 2 £), which are associated with waveforms Vm, VIN2, respectively. The waveforms 213, 214 are sinusoidal waveforms that are offset from each other by 9 degrees, i.e., have a relationship between sine and cosine 'this phase shifts the original waveforms VIN!, V1NZ. When summed together, the rectified waveforms 213, 214 produce an output waveform 22 having a constant DC output level, as shown in Figure 2E. In other words, the rectification and summation of the waveforms VlNi, ViN2 produces a constant DC output level, and generally does not require as large a storage/smoothing capacitor as would normally be required in conventional switched power supplies. Other waveforms may be used other than the waveforms 2〇3, 2〇4 illustrated in Figures 2A and 2B of Figure 2 and these waveforms provide a similar final result. Figure 3 illustrates a second example of a complementary periodic waveform selected to provide a constant DC output level after rectification and summing. In Fig. 3, the patterns 3A and 3B respectively show waveforms V1N1 & V1N2 (which are shown as waveforms 303, 304 in Fig. 3). Each of the waveforms constitutes a triangular waveform, 149927. Doc 12 201117544 The waveform has alternating unreversed/reversed triangular waves, but the phases are offset by 90 degrees from each other. After full-wave rectification, the resulting waveforms 313, 314 are shown in Figures 3C and 3D, which are associated with waveforms VIN1, VIN2, respectively. The rectified waveforms 313 and 314 are all equilateral triangle waveforms, which have a symmetrical shape and are offset from each other by 90 degrees. The phase of the original waveforms V1N丨 and VINZ is shifted. When summed together, the rectified waveforms 3 13, 3 14 produce an output waveform 320 having a predetermined DC output level, as shown in Figure 3E. Since the rectified waveforms 3 13 , 3 14 have the same linear slope for the rising and falling portions of the triangular wave, the voltage drop of the first rectified waveform 313 matches the voltage of the second rectified waveform 314 and vice versa . Thus, the rectification and summation of the waveforms Vini, ViN2 produces a 'determined DC output level, and typically does not require large storage/smoothing capacitors as would normally be required in conventional switched power supplies. In addition to the waveforms for V1N1 and Vin2 shown in Figures 2 and 3, other waveforms can be used. Preferably, the 'waveforms V丨N1, V丨Nz are selected or generated such that after the transformer and full-wave rectification' the rectified waveforms are complementary to each other so that they can be added together to produce a constant DC level. . These waveforms may include a periodic waveform of a rectified waveform that is symmetric in nature to increase its slope and curvature to the same slope and curvature as its falling slope. Similarly, the rectified waveform is preferably symmetrical about its midpoint such that its alternating "positive" and "negative" waves are identical in shape but inverted from each other. The waveform examples shown in Figures 2 and 3 are sufficient for the above criteria. In the case where the rectified waveforms are the same but offset by 9 degrees from each other, the symmetrical nature of the rectified waveforms means that the rise of one rectified waveform will exactly match the fall of the other rectified waveform, thus causing a strange 149927. Doc 13 201117544 The standard combination output level. In addition to the above waveforms, it is also possible to make VlN2 °, for example, waveforms, and/or change over time. Using more complex waveforms for V1N1, VIN2 can be constructed from multiple different harmonics. The power conversion techniques described above can be applied to voltage-based or current-based power supplies. More detailed examples are further elaborated herein. 4 is a block diagram showing one of the components of one of the disclosed voltage controlled DC output power supplies 4 according to the conceptual block diagram of FIG. The power supply 400 can be supplied by a local power source (e.g., a battery) or by an external power source (e.g., a line source). In FIG. 4, a signal generator 4A5 produces a pair of complementary waveform signals 412, 413 which are preferably periodic in nature and generally have the characteristics previously described for ViN1 and VW2 - that is, They are shaped or selected to provide a constant DC output after being coupled, rectified, and combined by a transformer stage. The complementary waveform signals 412, 413 are provided to a voltage controlled amplifier (V(:A) 415 that adjusts the amplitude of the waveform signals 412, 413 based on feedback received from the DC output signal 485 via the feedback sense amplifier 490. In some embodiments, the voltage control amplifier 41 5 can be omitted as the feedback path 491 and the sense amplifier 490. The voltage control amplifier 4 1 5 outputs the pair of amplitude-adjusted complementary waveform signals VinI and ν1 Ν: ί to the linear amplifier 430, respectively. , 43 1, as reflected by the waveforms 423, 424 in the overlay pattern shown in circle 4, which illustrate one example of a waveform similar to that used in the similar examples of Figures 1 and 2. 430, 43 The power input of 1 is connected to the power supply rails +V and _v, and the linear amplifier outputs amplified signals 432 and 433, which are substantially on rail 149927. Doc • 14· 201117544 Inter-channel crossing (self-amplifiers 430, 431 experience less loss). The voltage characteristics of the signals 432, 43 3 for one waveform instance in the case where the initial generated waveform is presented as in the graphs 423, 424 for Vin] and ViN2 respectively correspond to the overlay pattern 4 illustrated in Fig. 4 And 4 4 丨 (showing waveforms vpi and Vp2). The corresponding current characteristics of VP1 and Vp2 are respectively reflected in the overlay patterns 442 and 443 (illustrated waveforms Ipl and Ip2). As can be seen from Figures 44〇, 441 442 and 443, the voltage waveforms Vp丨 and VP2 for this particular example are characterized by alternating inverted and unreversed raised cosine waves (where Vpi and Vp2 are identical but offset from each other). Shifting 9 degrees), corresponding to the current waveform ip 1 and in the form of a square wave having a constant positive current corresponding to one of the time periods of the unreversed raised cosine wave, and corresponding to the inverted raised cosine The strange cycle of the k-cycle between the waves. Similar to the voltage waveform, the current waveforms Ip 1 and Ip2 are the same but offset by 90 degrees from each other. The output of the first linear amplifier 430 is coupled to the primary winding of a first transformer 435. The output of the second linear amplifier 431 is coupled to the primary winding of a second transformer 436. The secondary windings of transformers 435, 436 are coupled to an output stage 440 that receives transformer output signals 437, 438 from transformers 435, 436. Transformers 435, 436 may be boosted or stepped down in nature, and are preferably identical in characteristics (assuming that the complementary waveform signals vp and vp2 have the same amplitude). The transformers 435, 436 can be physically implemented with a single transformer for the input signals 432, 433 and for the output windings 437, 438 but sharing one of the same cores 'otherwise it can be implemented as two separate transformers . Transformers 435, 436 are preferably designed to have a low leakage inductance. 149927. Doc 15 201117544 The wheeling stage 450 preferably includes a pair of rectifier blocks 46A, 461 which may be implemented as, for example, a full wave rectifier bridge. Signal 437 from the secondary output of transformer 435 is provided to one of first stage rectifiers 46 of output stage 45. A signal 439 from the secondary stage output of transformer 436 is provided to one of the output stage 45's second rectifier block 461. Each of the rectifier blocks 46A, 46 can be implemented as, for example, a full wave rectifier bridge. In this case, the rectified output signals of the rectifier blocks 460, 461 are periodic waveforms that are complementary in nature such that when summed together, the result is a constant DC level. To this end, the outputs of the rectifier blocks 460, 461 are combined in series such that the additive combination is derived from its rectified output signal, thereby providing one of the substantially constant properties in the case where a storage/smoothing capacitor is typically not required. Output signal 485. In practice, a small amount of ripple may occur, which may be smoothed out by means of a relatively small smoothing capacitor (not shown), which may be provided at any convenient location, such as at the output of rectifier blocks 46, 46, and/or Across load 470. Therefore, the load 470 is supplied with a constant DC output supply signal. If desired, feedback can be provided via sense amplifier 49, which samples the DC output signal 485 and provides a voltage feedback signal to voltage control amplifier 415, which in turn adjusts the amplitude of input waveforms 412, 413 to Suitable for linear amplifiers 43A, 431. In this manner, the DC output signal 485 can be maintained at a constant voltage level. The operation of power supply 400 is generally similar to power supply 100 of FIG. For example, the input waveforms 412, 413 exhibit alternating periods of inverted/uninverted raised cosine 149927, such as illustrated in Figures 2A and 2B of Figure 2. Doc •16· 201117544 The shape of the wave, the resulting rectified and combined waveforms will be similar to those shown in Figures 2C, 2D and 2E of Figure 2, as previously explained. In the case where the input waveforms 412, 4 1 3 exhibit a shape of a triangular waveform having alternating inverted/non-inverted triangular waves as illustrated in the patterns 3a and 3B of FIG. 3, the resulting rectified and combined The waveforms will be similar to those shown in Figures 3C, 3D and 3E of Figure 3, as also explained previously. As with Figure 1, any suitable periodic waveform can be used, including waveforms with multiple harmonics or alternating over time. With the appropriate waveforms described herein, the power supply 400 can theoretically generate a constant DC output signal 485 without the need for a storage/smoothing capacitor. Figure 5 is a block diagram showing one of the components of another embodiment of the power supply unit 5 according to one of the general methods of Figure i. Unlike the power supply of Figure 4, which is a voltage controlled DC output power supply, Figure 5 illustrates a current controlled DC output power supply 5 . In Fig. 5, the component power month b labeled 5 通常 is generally similar to the similarly labeled component 4 图 in Fig. 4. The power supply unit 5 can be supplied as previously provided by a local power source (e.g., a battery) or by an external power source (e.g., a line source). A signal generator 5 〇 5 produces a pair of complementary waveforms L 5 5 5 13 13 ' which are preferably periodic in nature and generally have the characteristics previously described for V, NjViN 2 · that is, they are plasticized Shape or selection to provide a constant DC output after being lighted, rectified, and combined by the transformer-level. The mutual (quad) shaped signals 512, 513 are provided to a battery control, and the voltage control amplifier adjusts the amplitude of the waveform signals π, 513 based on the feedback received from the DC output signal 585 via the feedback sense amplifier 590. In some embodiments, the voltage controlled amplifier 515 can be returned as 149927. Doc -17- 201117544 Feed path 591 and sense amplifier 590 are omitted. The voltage control amplifier 51 is outputting the pair of amplitude-adjusted complementary waveform signals Vini&V1N:j to the linear transconductance amplifiers 53A, 531, respectively, as reflected by the waveforms 523, 524 in the overlay pattern as shown in FIG. The overlay image depicts an example of a wave row similar to that used in the similar examples of Figures 1 and 2. Transconductance amplifiers 530, 531 output a current proportional to their input voltage and can therefore be considered a voltage controlled current source. The effect of the transconductance amplifiers 53A, 53 1 is that the waveforms 512, 513 generated by the signal generator 505 will substantially be converted to similarly shaped current waveforms. As discussed below, this can have advantages for downstream processing and can produce even better EMI characteristics. Transconductance amplifiers 530, 531 are coupled to power supply rails + and _, and output amplified signals 532, 533 to transformers 535, 536. In the case where the initial generated waveform is presented as in the graphs 523, 524 for Vi»丨 and V丨Μ, the current characteristics of the signals 5 3 2, 5 3 3 are respectively reflected in the overlay pattern 540 illustrated in FIG. 5, respectively. And 541 (showing waveforms Ip 1 and ip2). The corresponding voltage characteristics of signals 432, 433 are reflected in overlay patterns 542 and 543 (showing waveforms Vp 1 and Vp2, respectively). As can be seen from the figures 540, 541, 542 and 543, the current waveforms Ip 1 and Ip2 for this particular example are characterized by alternating inverted and unreversed raised cosine waves (where Ip 1 and Ip2 are identical but each other Offset 9〇), and the corresponding voltage waveforms Vp 1 and Vp2 are in the form of square waves having a constant positive voltage corresponding to one of the time periods of the unreversed raised cosine wave, and corresponding to the inverted rise The value of the time period of the cosine wave is constant. The negative voltage β is the same as the current waveforms Ip 1 and Ιρ2. The voltage waveforms Vp 1 and Vp2 are the same but offset from each other by 90 degrees. 149927. Doc •18· 201117544 The output of the first transconductance amplifier 530 is coupled to the primary winding of a first transformer 53 5 . The output of the second transconductance amplifier 531 is coupled to the primary winding of a second transformer 536. The secondary windings of transformers 535, 536 are coupled to an output stage 540 that receives transformer output signals 53 7, 538 from transformers 535, 536. The transformers 535, 536 may be boosted or stepped down in nature and are preferably identical in characteristics (assuming the amplitudes of the incoming signals 532, 533 are the same). The transformers 535, 536 can be physically implemented as a single transformer having input windings 532, 533 and separate windings for outputting signals 537, 538 but sharing the same magnetic core, otherwise the entities can be implemented as two separate transformers . Output stage 550 preferably includes a pair of rectifier blocks 56A, 561, which may be implemented, for example, as a full wave rectifier bridge. Signal 537 from the secondary output of transformer 535 is provided to one of the first rectifier blocks 56 of output stage 550. Signal 539 from the secondary output of transformer 536 is provided to one of second rectifier blocks 561 of output stage 550. Each of the rectifier blocks 560, 561 can be implemented as, for example, a full wave rectifier bridge. In this case, the rectified output signals of the rectifier blocks 560, 561 are periodic waveforms that are complementary in nature such that when summed together, the result is a constant DC level. To this end, the outputs of the rectifier blocks 56A, 561 are coupled in parallel such that the additive combination is derived from its rectified output signal 'by providing one of a substantially constant property in the event that a storage/smoothing capacitor is typically not required. DC output L number 585. In practice, a small amount of ripple may occur, which may be smoothed out by means of a relatively small flat container (not shown), which may be provided in any convenient location, such as at the output of rectifier blocks 560, 561 and/or I49927. Doc •19- 201117544 铋 负载 load 570. Therefore, a constant d signal is supplied to the load 57 。. /Required to provide a feedback via sense amplifier 590, which samples the DC output nickname 585 and provides a voltage feedback signal to the voltage control amplifier 515 'This control amplifier then adjusts the amplitude of the input waveforms M2, 513 For the transconductance amplifiers 53 (), 531 - suitable for the level. In this way, the DC output h number 585 can be maintained at a strange voltage level. The feedback loop is preferably designed such that the transconductance amplifier 53 is operated close to the track for maximum efficiency, but is far enough so that the A|| is still in the linear operating region and is not limited. The voltage feedback loop helps ensure that the voltage level remains relatively constant even when the characteristics of the load (eg, its resistance) fluctuate over time. Voltage feedback can also be used to ensure that if the input voltage drops (for example, using a battery as a Input source), the output voltage will remain relatively constant. When the output signals 123, 124 of the waveform generator 105 are considered to be current dependent, the operation of the power supply 5 is substantially similar to the power supply 500 of the figure. In the case where the input waveforms 512, 513 are alternately inverted or unreversed raised cosine waves in a period such as illustrated in graphs 2A and 2B of FIG. 2, the resulting rectified and combined waveforms will be similar to the graph. The waveforms shown in Figures 2C, 2D and 2E of Figure 2 are as previously explained. The resulting rectified and combined waveforms are obtained in the case where the input waveforms 5 12, 513 are in the shape of a triangular waveform having alternating inverted/non-inverted triangular waves as illustrated in Figures 3A and 3B of FIG. The waveforms similar to those shown in Figures 3C, 3D and 3E of Figure 3 are also as previously explained. With Figure 1 a 149927. Doc •20· 201117544, any suitable periodic waveform can be used, including waveforms with multiple erroneous waves or over time. With the appropriate waveforms described herein, the power supply 500 can theoretically eliminate the need for storage/smoothing capacitors. In the event of a value, a fixed DC output signal 585 is generated. Another embodiment of a power supply using one of the alternative amplifier configurations is shown in Figures 11A and. In these examples, for the sake of simplicity, only the half of the primary side power supply is shown; the circuit in each case will be duplicated to complete the primary side portion of the power supply. Thus, the transformer 1148 shown in Figure uA will conceptually correspond to transformer ΐ 35 (τι) in Figure i, and will be completed using a second set of circuits and a second transformer corresponding to transformer 136 (Τ2). The main side of the unit. Similarly, since only the power supply circuit 11() 2 on the primary side is shown in FIGS. 11 and 113, the circuit on the secondary side will typically be shown as, for example, the rectifier 160 (R1) in FIG. Alternatively, a half of the bridge circuit shown in FIG. 5 (that is, the diodes 〇1 to 〇4 of the output stage 55〇) is formed. The general method of Figures 11A and 11B employs a push-pull amplifier design; therefore, transformer U48 has a single secondary winding 1146 but two primary windings 1147. Referring first to the example of Fig. 11A, voltage sources 1105, 11〇6 respectively produce output waveforms 1112 and 1113, which are shown in the accompanying overlay pattern adjacent to voltage sources 11〇5, 11〇6. Waveforms 1112 and U13 are typically equivalent to the positive half cycle and the negative half cycle of the periodic waveform shown in Figure 2, respectively. The first voltage source n〇5 produces a waveform 1112 corresponding to the unreversed raised cosine wave of Fig. 2A, and the second voltage source 1106 produces a wave corresponding to the inverted raised cosine wave of Fig. 2A 149927. Doc 21 201117544; however, these waves are shown as positive rather than negative, as they are applied to the inverting side of the dual main transformer 1148. For a second transformer (not shown) that produces a complementary waveform, two similar voltage sources will be provided to generate a waveform corresponding to the positive half cycle and the negative half cycle of the periodic waveform shown in Figure 2B, respectively, and the self voltage generator The waveforms of 1105 and 1106 are similarly phase shifted, as shown in Figures 2a and 2B. Each of the waveforms 111 2, 111 3 constitutes a series of unreversed raised cosine waves' which are phase shifted from each other by 18 degrees in this example. Voltage sources 11 05, 11 06 are supplied as inputs to linear amplifiers 〇 2 〇, 1 j 21 , which in turn feed field effect transistors (FETs) 113 〇, 1131. One of the transistors 1130, 1131 is connected to one of the main windings ι147 of the transformer 1148, and the source of each is also connected to the non-inverting input of the respective signal amplifiers 11 2 0, 1121 and to each Do not use current sensing resistors 丨丨丨6 and 1117. Similarly, the center tap 1149 of transformer 1149 and the power supply inputs of amplifiers 1120, 1121 are coupled to a single power supply 11 07 ' which may include, for example, a series of batteries or other DC power sources. Amplifier 1120 and transistor (1) 丨 together with amplifier 1121 and transistor 113 1 (Q2) form a push-pull amplifier that provides a defined current output defined by voltage waveforms 1112, 1113, such The voltage waveform is applied by sources 11 05 and 106. The current waveforms are fed to a transformer 1149' and then appear on the secondary windings 46 for rectification by the output stage (not shown in Figure a). In some configurations, the device of Figure 11A provides an advantage due to the availability of a unipolar power transistor device and the drive voltage can be monopolar and referenced to 149927. Doc •22· 201117544 Ground. To achieve optimum performance, the transistors 1130, 1131 can be configured according to conventional methods to conduct a permanent quiescent current to improve the linearity and speed of response at lower output current levels. However, this quiescent current reduces the overall efficiency of the power supply. The slightly modified operational configuration shown in Figure 11B reduces the amount of quiescent current. The basic structure of Figure 11B is similar to Figure 11A, but the waveforms supplied by signal generators 1105, 1106 are modified to improve the linearity and speed of response at low output power >>IL levels while minimizing overall efficiency reduce. The additional periodic waveforms 1197, 1198 shown below the main drive waveforms 1112, 1113 are amplitude-amplified views in each case where a common mode waveform is simultaneously added to the two halves of the push-pull amplifier. This common mode waveform causes the transistors 1130, 1131 to conduct quiescent current only around the region where the respective main waveforms m2, m3 are near zero; at all other cycles outside the conduction period, the transistors 1130, 1131 are biased OFF. The common mode current causes the electric crystal. The bodies 1130, 1131 enter their conduction regions shortly before they are required to operate, thereby reducing conduction distortion. The common mode current in each half of the output stage (on the secondary side) is cancelled in transformer 11 48 and therefore does not appear in the output from the duster secondary winding 1146. The period during which the common mode waveform causes the transistors 1130, 1131 to conduct may be different from the illustrated example. In this way, the average power loss due to the quiescent current can be significantly reduced compared to continuous conduction. The power amplifier configuration illustrated in Figures 5 and ΠΑ and 11B can generally be referred to as a linear transconductance amplifier' which has a nominal flat frequency response such that it accurately reproduces the complementary waveform fed to its input. The complementary waves 149927. Doc •23- 201117544 The shape is not sinusoidal and therefore usually requires a high gain bandwidth product from the amplifier to achieve optimum performance. In the case of the particular complementary waveforms shown in Figures 2A and 2B, this constraint can be relaxed by appropriately modifying the complementary waveforms such that the amplifiers can be configured as integrators. The closed loop response of an integrator typically decreases with frequency by 6 dB/octave, which allows for an amplifier with a lower open loop bandwidth. An example of this method that can be configured using one of the amplifiers is shown in Figure 2. In this embodiment, as in the designs of Figs. 11A and 11B, only the half of the main-stage side power supply corresponding to the circuit associated with one of the two transformers is illustrated. As with earlier designs, transformer 1248 in this example has a single secondary winding 1246 but two primary windings 1247. As just described, 'only the power supply circuit 丨2〇2 on the main stage side is shown, and the circuit on the sub-stage side of the half of the main stage side circuit will generally include a similar to, for example, FIG. 1 or FIG. The bridge circuit of the other half of the output stage. In this example, a pair of voltage sources 12〇5, 1206, respectively, produce output waveforms 1212 and 1213, which are shown in the accompanying drawings of proximity voltage sources 1205, 1206. The outputs of the voltage sources 1205, 1206 are supplied to the linear amplifiers 丨22〇, 丨221 via resistors 1270(R3) and 1271(R4), respectively, and the bulk 丨220, 1221 feeds the field effect transistor (FET) again. 123〇, 1231. Each of the transistors 1230, 1231 is coupled to one of the main windings 1247 of the transformer 1248, and the source of each of them is also coupled to current sense resistors 1216 and 1217, respectively, and to respective integrator capacitors 1272 ((:1) and 1274((:2), each of these integral electric grids consists of a resistor 1273 (R5) and 149927 respectively. Doc •24· 201117544 1275 (R6) riding across. The center tap 1249 of the transformer 1249 and the power supply input of the amplifiers 1220, 1221 are coupled to a separate power supply 1207' which may include, for example, a series of batteries or other DC power sources. In operation, the feedback from current sense resistors 1216 (R1) and 1217 (R2) is achieved by capacitors 1272 (C1) and 1273 (C2), including resistors i273 (R5) and 1274 (R6). ) to provide DC stability. The integrator action of capacitors 1272 and 1 73 forces the voltage across resistors 1216 (R1) and 1217 (R2) and thus the current through transistors 1230 (Q1) and 1231 (Q2) to become signal generators 1205 and 1206. The components of the output voltage (ie, voltages 1212 and 12 13). In order to match the current to the desired shape, the voltage waveforms 1212 and 1213 are selected to be differential waveforms of the waveform 203 (or the waveform 204 for the complementary section of the main-stage power supply circuit) depicted in FIG. 2A, and then Similar to FIG. 11A), waveforms 1212 and waveforms 1213 are only intercepted from waveform 203 every half cycle. Since waveform 1213 is applied to the negative winding of dual main stage transformer 1248, the waves are shown to be positive in nature. An alternative integrator configuration can be constructed by eliminating capacitors 1273 and 1274 ((:1 and C2) and replacing the current sense resistors 1216 and 1217 (R1 and R2) with inductors. In this case, through the inductor The current will be a component of its electrical voltage. • The use of an integrator for the power amplifier section is not limited to these specific examples. In a more general version of the power supply circuit of Figure 5, the amplifier 53〇 And 531 can be configured as a transconductance amplifier having an integrator characteristic that is fed with a modified voltage waveform instead of the waveforms 523 and 524 shown in Figure 5. The modified waveform for this purpose is shown as the waveform in Figure 13. 1312, i3i3, same as 149927. Doc •25· 201117544 The solid line shows the waveforms 1303, 1304 after the integration. The modified waveforms 13 12, 13 13 can be described as a sequence of sine or cosine waves, which are inverted at the end of each cycle. . 2A and 2B, the waveforms 13 12, 13 13 and the resulting integrated waveforms 〇3〇3, 丨3〇4 are identical in shape, but the phases are offset from each other. The goal of low static power can also be achieved in other ways, for example by using a feedforward technique to linearize the power amplifier. This method is illustrated in Figure 14. For simplicity, the circuit 14〇2 shown in FIG. 14 corresponds to one side of the power amplifier of the figure; a second set of similar components corresponding to the other half of the power amplifier of FIG. 11A will be provided to form a complete amplifier. And then, the entire set of circuits will be replicated again to provide complementary signals for rectification and combination on the other side of the power supply. In Fig. 4, amplifier 1420, transistor 1430 (Q1) and resistor 1416 (R1) form one of amplifiers A1 as in UA, but with a quiescent current as low as zero. The output 1432 of the transistor 1430 (Q1) is coupled to one of the main windings of a dual main stage transformer (similar to the transformer 1148 shown in Figure 11A). The Dc power supply 1407 supplies power to the amplifiers 420 and 1421, and the power supply is also connected to one of the transformer's center taps (similar to the DC source signal connected to the center tap of the transformer 1148 of Figure uA). Amplifier 1421, transistor 143 1 (Q2) and resistor 1417 (R2) form a low power error correction amplifier A2 that amplifies and regulates the input voltage (from signal generator 1405 output) and across resistor 1416 ( The difference between the output voltages of R1). One of the differential voltages is converted to a current through one of the transistors 1431 (Q2) to be added to the electricity from the transistor "(10)(1)") 149927. Doc •26· 201117544 Stream. This portion is achieved using a differentiator 1418 that receives a voltage signal from voltage source 1405 (V1) and subtracts the source between transistor ^(10)(1)丨) and sense resistor 1 4 16(R1). The voltage signal at the node. Amplifier A2 therefore adds a correction current that compensates for the error in A1 to the output. The correction current required from amplifier A2 is typically significantly less than the current output from amplifier A, and thus amplifier A2 can be a lower power amplifier than amplifier A1 and can also have a much smaller static power waste. The output 1432 of the transistor pair 1430, 1431 can be fed to one of the main windings of a transformer similar to the one of Figure 11A. Another similarly configured feedforward amplifier will be connected to the other main stage winding of the transformer as shown in Figure 11A. The signal generator (1405 and its peers) can be configured to produce signals similar to those of the other embodiments disclosed in Figure 11A or herein. The use of one of the feedforward correction alternatives as illustrated in Figure 14 applies both feedforward and feedback techniques in the configuration shown in the embodiment of Fig. 15. As in Figure 14, circuit 152 in Figure 15 corresponds to one side of the power amplifier of Figure 11A; a second set of similar components will correspond to the other half of the power amplifier of Figure A to form a complete amplifier; The entire set of circuits is then re-copied to provide complementary signals for rectification and combination on the other side of the power supply. In Fig. 15, amplifier 1520, transistor 1530 (Q1) and impedance element 1516 (Z4) form an amplifier A1 that is executed as in Fig. 11A, but has a quiescent current as low as zero. Amplifier ι52ι, transistor 1531 (Q2) and impedance element 1517 (Z3) form a low power correction amplifier. Another impedance element 1572 (Z2) is formed from the output of the amplifier 1520 to one of its inverting input feedback paths, and the impedance element 1571 (Z1) is coupled to the amplifier 149927. Doc •27· 201117544 The reverse of 1520 is input to the node between the transistor and the impedance element 1516 (Z4). If the relationship Ζ2·Ζ4=Ζ1·Ζ3 is satisfied, the distortion in the transistor i53〇(qi) can be freely eliminated by the output current formed by the sum of the currents of the transistors 153〇(Q1) and 1531((^2). The amplifier stage A1 can operate at a quiescent current as low as zero to achieve maximum efficiency. Further, if the impedance element 1 572 (Z2) is selected as a capacitor, the impedance element 1516 (Z4) is selected as an inductor, and The impedance elements 1571 (21) and 15 17 (Z3) are resistors that satisfy the balance equation while the output current is derived from the input voltage of the signal generator 1505. This allows the waveform shown in Figure 12 to be used. Other combinations of impedance elements Z1 to Z4 can also be used to achieve similar results, and the impedance element does not need to be an integral circuit component, but can be a network of components. For example, impedance component 1572 (Z2) can be a capacitor, impedance component 1571 (Z1) may be a series combination of a resistor and a capacitor, the impedance element 1516 (Z4) may be a resistor, and the impedance element 1517 (Z3) may be combined in parallel from one of the resistor and the electric grid. The waveform shown in Figure 12 is used as input. As another example, the impedance element 1 572 (Z2) can be a capacitor. The impedance element 1571 (Z1) can be a resistor, the impedance element 1516 (Z4) can also be a resistor, and the impedance element 1517 (Z3) can be A capacitor is used. In this case, the device can use the input waveform or other suitable waveform shown in Figure 11A. One other alternative is to combine the impedance component of one of Z3 with the input of the non-inverting input terminal to amplifier 1521. One of the choppers. The transfer function of the correction amplifier A2 can also be added by adding the feedback element 149927 as shown in FIG. Doc -28- 201117544 1675 (Z5) and 1676 (Z6) to change. For example, 'impedance element 1675 (Ζ5) can be a resistor, and impedance element 1676 (Ζ6) can be a capacitor. The transfer function of amplifier Α2 can be modified to make impedance element l6i7(z3) look like the same type of impedance element; for example, it can be expected to implement impedance element MiVZS) as a resistor, thus avoiding the use of a reactive element Impedance element 1617. In other respects, Figure 16 is the same as Figure 15, and component 16xx in Figure 16 generally corresponds to its peer component 1 5xx ° in Figure 15 although a feedforward error has been explained and illustrated in relation to a particular power amplifier configuration. Correction and feedforward plus feedback correction techniques, but they can also be applied to other power amplifiers and related designs. Figure 7 is a block diagram showing one embodiment of a power supply 7 使用 using a switched capacitor in accordance with the principles of the conceptual diagram of Figure 8. As with the other examples set forth herein, the power supply 7 can be supplied by a local power source (e.g., a battery) or by an external power source (e.g., a line source). In Figure 7, a waveform generator comprising (in this example) a pair of signal generators 7〇5, 715 produces a pair of complementary waveform signals 7〇6, 716, which are preferably of a nature (fourth) And typically have the characteristics previously described for 乂(8) and ^ - that is, they are shaped or selected to provide a constant sink output after level shifting, rectifying, and combining. Examples of such waveforms are shown as alternating J-inverted/non-inverted raised cosine signal waveforms and 717 (corresponding to waveform signals 706 and 716, respectively). Complementary periodic waveform signals 706, 716 may optionally be provided to a voltage controlled amplifier (VCA) (not shown) to receive a feedback signal 149927 based on the self output from DC output signal 785. Doc -29·201117544 (also not shown) adjusts the amplitude of the waveform signals 7〇6, 716. The waveform signal 706 is supplied to the transconductance amplifiers 731 and 75 I while the waveform signal 71 6 is supplied to the transconductance amplifiers 74 and 761. Transconductance amplifiers 731, 741, 751, and 761 output a current that is proportional to their input voltage and can therefore be considered a voltage controlled current source. The effects of transconductance amplifiers 73A and 741 substantially convert waveform signals 706, 716 to similarly shaped current waveforms 735, 745. The effects of the transconductance amplifiers 751 and 761 substantially convert the waveform signals 706, 7 16 to a similarly shaped but inversely inverted current waveform 755, 765 'the inverse of the nature due to the waveform signals 7〇6, 7 16 coupled to The fact that the transconductance amplifiers 751 and 761 are inverted inputs. The conversion to a current drive waveform as in the embodiment of Figure 5 can have advantages for downstream processing and can result in improved EMI characteristics. Transconductance amplifiers 731, 741, 751, and 761 can be configured similar to their previously described configurations. For the example illustrated in Figure 7, the current characteristics of signals 735 and 745 may be characterized by alternating inverted/non-inverted raised cosine waves (where the current waveforms of signals 73 5 and 745 are the same but offset from each other by 9 〇). Degrees, and the corresponding voltage waveforms associated with signals 73 5 and 745 are typically square waves having a constant positive voltage corresponding to one of the time periods of the unreversed raised cosine wave, and corresponding to the inverted rise A constant negative voltage for the time period of the cosine wave. Like the current waveforms of signals 735 and 745, the voltage waveforms are the same but offset by 90 degrees from each other. Similarly, the current and voltage characteristics of signals 755 and 765 are inverted from signals 735 and 745. Thus, the current characteristics of signals 755 and 765 for this example may be characterized by alternating unreversed/reversed raised cosine waves (where the current waveforms of signals 755 and 765 are the same but offset by 9 degrees from each other). With the letter 149927. Doc •30· 201117544 No. 755 and 765 related voltage waveforms are usually square waves, which have a constant positive voltage corresponding to one of the time periods of the unreversed raised cosine wave and correspond to the inverted raised cosine wave A constant negative voltage for the time period. Like the current waveforms of signals 755 and 765, the voltage waveforms are the same but offset by 90 degrees from each other. The outputs of transconductance amplifiers 73, 74i, 751, and 761 are each coupled to a similar component network that operates to boost (or step down) the input voltage level using, for example, a charge boost switched capacitor circuit and A level-converted output is provided as a constant DC source signal 785 to the load 77 〇. The output of the first transconductance amplifier 731 is coupled to a capacitor 732, the other of which is coupled to the input power supply rail 789. Transconductance amplifier 731 is used to periodically charge capacitor 732 in such a manner as to cause the level of the applied signal to boost (approximately double), thus producing a level-shifted signal 737. Diode 734 is used to rectify the boosted (or stepped down) signal 737. In a similar manner, transconductance amplifiers 741, 751, and 761 are coupled to capacitors 742, 75 2, and 762', respectively, each of which is consuming to the input power supply via diodes m3, 753, and 763, respectively. Track 789. Capacitors 742, 752, and 762 and associated diodes 743, 753, and 763 form switched capacitor circuits that boost (or step down) input signal levels, thereby producing level-shifted signals 747, 757, and 767 . Rectifier diodes 744, 754, and 764 are respectively used to rectify boosted (or step-down) signals 747, 757, and 767 in the same manner as for rectifier diode 734 with boosted (or stepped down) signal 737. The additive combination of the rectified signals obtained from the level-shifted signals 737 and 757 (for the example illustrated in Figure 7) is similar to the waveform 213 of Figure 2. Since 149927. Doc 31 201117544 The additive combination of the rectified signals obtained by the level-shifted signals 747 and 767 (for this same example) is similar to the waveform 214 in FIG. 2, ie, from the self-leveling signals 737 and 757 Acquire an additive combination of the rectified signals to produce a 90 degree offset version of the same waveform. As described above, the additive combination of waveforms 2 1 3 and 2 14 is a constant DC signal level. Thus, by combining all four rectified signals obtained from the level-shifted signals 737, 747, 757, and 767, the resulting result is substantially constant in strength, one of the boosted (or step-down) DC signals 785, Storage/smoothing capacitors are usually not required. In practice, a small amount of ripple may occur, which may be smoothed out by a relatively small smoothing capacitor 772, which may be provided in any convenient location, such as across a load 77 。. Thereby, a constant DC output supply signal is supplied to the load 77 。. The four-phase design also ensures that the current drawn from the supply 789 is substantially free of ripples. The example of Figure 7 illustrates a single voltage boost stage, but the same principles can be applied to a multi-stage boost converter.

在一項態樣中,圖7展示提供一單個增壓級(近似雙倍供 應電壓Vsupply)之使用電容器之一電壓增壓器。此方法可 藉由如(例如)圖17之實施例中所示添加其他整流器及電容 器以產生一其他增壓級來延伸。在圖17中,電壓波形…及 V2可與圖7之彼等電壓波形相同(亦即,類似於波形及 717)。圖π中標記為17χχ之組件大體對應於圖7中標記為 7χχ之其對等部分。另外,一第二升壓(或降壓)信號 1795提供於圖17中。使用圖7之相同原理,一額外輪出電 今态1772已添加至該電路,且以與經由圖7中所示之類似 二極體/電容器組態對其他充電電容器(1732、i742 ' PM 149927.doc -32· 201117544 及1762)進行週期性充電類似之一 1744,、1752'、1753,、 1732,、1733,、1743,、 方式,經由二極體 1762’及 1 763' 對充電電容器Π32,、1742,、17521及1762,進行週期性充 電。不需要其他功率放大器、級’但可視情況使用此一其他 功率放大該’且該裝置之輸出及輸人波紋仍係極低。'橫 跨跨導放大器輸出之電壓保持係一方形波,與圖7一樣, 因此’圖17之總放大器仍可以高效率運作。 如圖7及17中所圖解說明之用於正增壓之技術亦可藉由 改變整流器之極性及將充電整流器參照接地代替一正電壓 用於產生一經反轉電源供應器。以與雙增壓供應器方法可 組合一兩級增壓至一組功率放大器上相同之方法,正增壓 及反轉增壓器可同樣如此。圖18係展示具有正增壓器電 路及反轉增壓器電路之一組合之一電源供應器之一示意 圖。此處,該電路之上半部(亦即,一非反轉電力區段 1802)大體等效於圖17之電路,同時已添加一反轉電源供 應器區段1803。因此,在圖18中,標記為18χχ之組件大體 對應於圖7中標記為7χχ之其對等部分。在反轉電源供應器 區段1803中,以與充電電容器1832、1842、1852及1862類 似之方式經由二極體 1837、1838、1847、1848、1857、 1858、1867及1868對額外充電電容器1836、1846、1856及 1866週期性充電’但儘管使用相同輸入波形但具有相反極 性’因此結果係橫跨輸出電容器丨8 7 6之一負電源供應器輸 出電壓1896。以此方式,電源供應器可在同一裝置中提供 一正輸出電麼1885及一負輸出電壓1896兩者。 149927.doc -33- 201117544 圖6係可結合本文中所揭示各種實施例一起使用的用於 產生具有交替經反轉/未經反轉升餘弦波之一波形之一信 號產生器600之一項實例之一簡化方塊圖。如圖6中所示, 信號產生器600可包括一第一正弦曲線波形產生器6〇2,其 具有呈在土Vs處具有峰值之一正弦波形式之一輸出603。正 弦波信號603作為一輪入耦合至一求和器61〇。求和器610 之另一輸入係一 DC輸入信號608,該信號處於一固定+Vs 位準處》所得信號607係正弦波信號603之一 DC偏移版 本,其具有介於接地與+Vs之間的峰值。DC偏移正弦波信 號607分裂為兩個路徑’其中一個路徑係提供至一類比反 相器604,該類比反相器輸出峰值在接地與_Vs之間的De 偏移正弦波信號607之一相位反轉版本^ DC偏移正弦波信 號607及經反轉DC偏移正弦波信號6〇9可視情況提供至一 對放大器605、606以進行增益調整(若需要),其中兩個放 大器605、606之增益係相同。來自放大器6〇5、606之輸出 61 2、61 3係DC偏移正弦波,相對於彼此相位移位,此類 似於輸入信號607、609。切換器620在輸出612與613之間 父替’即在母當來自下部放大器6〇 6之正弦波達到上頂峰 時(此與來自上部放大器605之正弦波達到其下頂峰係相同 時間)在輸出612與613之間切換。結果係一輸出信號621, 其每半個循環在一「未經反轉」升餘弦波與一「經反轉」 升餘弦波之間交替,其中在未經反轉與經反轉升餘弦波之 間具有一平滑轉變’如圖6中由輸出V!所圖解說明。 一類似技術可用於產生輸出信號621之一 9〇度相位移位 149927.doc -34· 201117544 版本。信號產生器600可包括一第二正弦曲線波形產生器 622 ’其具有呈在土Vs處具有峰值之一正弦波形式之一輸出 623。信號623係信號603之一經反轉版本;因此,信號623 亦可藉由僅反轉信號603來產生。正弦波信號623作為一輸 入福合至一求和器630。求和器630之另一輸入係一 DC輸 入信號608 ’其處於一固定-Vs位準處。所得信號627係正 弦波彳5號623之一 DC偏移版本,具有介於接地與_vs之間 的峰值》DC偏移正弦波信號627分裂成兩個路徑,其中一 個路徑係提供至一類比反相器624 ’其輸出具有介於接地 與+Vs之間的峰值之DC偏移正弦波信號627之一相位反轉 版本。DC偏移正弦波信號627及經反轉DC偏移正弦波信號 629可視情況提供至一對放大器625、626以用於增益調整 (若需要)’其中兩個放大器625、626之增益係相同。來自 放大器625、626之輸出632、633係相對於彼此相位移位之 DC偏移正弦波,此類似於輸入信號627、629。切換器64〇 在輸出632與633之間交替,其在每當來自下部放大器626 之正弦波達到其上頂峰時(此與來自上部放大器625之正弦 波達到其下頂峰係相同時間)在其等之間切換。結果係一 輸出信號641,其每半個循環在一「未經反轉」升餘弦波 與一「經反轉」升餘弦波之間交替,其中在未經反轉與反 轉升餘弦波之間具有一平滑轉變,如圖6中由輸出%所圖 解說明。 輪出621及641—起可用作本文中所揭示基於變壓器之電 源供應器實施例中之輸入信號Vini&Vini。 149927.doc -35· 201117544 在實務應用中,來自信號產生器600之輸出信號可穿過 小電谷器或尚頻濾波器以移除任何殘餘D(:分量,該殘 餘DC分量可係在信號產生器6〇〇中因疏忽而形成。另外, 可根據此項技術中眾所周知之技術添加各種偏壓電流調整 及其他實施方案細節。 另一選擇為,可使用其他技術來產生週期交替波形。舉 例而言,可使用數位合成產生與上文所述之彼等波形類似 之波形。根據圖9中所圖解說明之一個此實施方案,一波 形產生器900以數位形式將波形資料儲存在一查找表 905(例如,一唯讀記憶體(R〇M)或其他非揮發性記憶體儲 存器件)中,且在一微控制器、微序列器、有限狀態機或 其他控制器控制下以適當序列將其讀出。可將該數位資料 提供至一對數位至類比轉換器(DAC)91〇、911,一者針對 一個波形。亦即’第一 DAC 910輸出一第一經轉換波形 914 ’且第一 DAC 911輸出一第二經轉換波形915,其與第 一經轉換波形914相同但自該第一經轉換波形偏移9〇度, 如先前所闡述。將經轉換波形914、915提供至滤波器 920、921以進行平滑。輸出930及931—起可用作本文中所 揭示基於變壓器之電源供應器實施例中之輸入信號乂丨…及 VlN2。 在其他實施例中,原理上類似於一輪轂式直流發電機 (hub dynamo)之一轉子式機械發電機(r〇t〇rized mechanical generator)可用於產生具有如先前所闡述且圖2中所圖解說 明之交替經反轉及未經反轉升餘弦波之特性之一波形。此 149927.doc -36- 201117544 一波形產生器可特別適於本文中所揭示本發明電源供應器 設計之較大瓦特數應用。一輪轂式直流發電機通常藉由一 軸上之一永久磁體之旋轉而運作,其中該磁體設置在一導 線線圈内。已觀察一輪數式直流發電機之輸出係具有交替 經反轉及未經反轉升餘弦波之一波形。可(例如)藉由在與 該第一磁體相同之軸上添加相對於該第一磁體垂直定向之 一第二永久磁體而產生互補波形,該第二永久磁體在與該 第一導線線圈分離之一第二導線線圈内。如兩個導線線圈 一樣,兩個永久磁體較佳地具有相同大小及物理特性,其 4可沿该轴之長度彼此橫向偏移。可藉由任何適合方法達 成该軸之旋轉,包含機動化技術、風動力或其他方法。更 一般而言,可使用一旋轉AC發電機產生適當波形,該發 電機具有相對於一個或多個磁場處於相對旋轉運動中之一 導線線圈β 在該電源供應器用於將一相對高DC電壓轉換至一較低 DC電壓之情形下,在一項態樣中,藉由一個或多個小的 變壓器(例如本文中所述各種實施例中所圖解說明)將自一 相對向電壓DC源產生之高頻率AC波形變壓至一較低電 壓。該電源供應器之設計可使避免需要大的儲存電容器來 在整流經變壓信號之後平滑來自該等變壓器之輸出電壓成 為可能。理論上可使電力轉換器之輸入及輸出兩者在所有 輸出位準下沒有波紋,以使得不需要額外磁性組件進行濾 波。消除輸出儲存需要及消除综合濾波相比於(例如)一習 用切換式供應器可減小大小及成本。 !49927^〇〇 •37- 201117544 如先前所述,在實務中,可需要某些小的輪出電容來減 小來自變壓器級或其他級之任何殘餘波紋。此輕微波紋可 係由放大器級中固有之電感引起。預期對於以25 Ku〇hertz 之週期波形運作之一 50瓦特電源供應器,近似3〇〇至6〇〇 nF之一電容將係充分的。此大小之電容顯著小於一習用切 換式電源供應器所需之電容。 用於減小輸出處之任何殘餘波紋可採用之另一技術係使 用一低壓降(LDO)線性穩壓器。一 lD〇線性穩壓器通常可 包含與輸出信號串聯設置之一功率FET。一差分放大器以 此一方式控制該功率FET以在LD〇線性穩壓器之輸入與輸 出之間維持一小的Dc電壓差。將該電壓差維持在高於整 流電路之輸出處之峰值間波紋電壓之一值處。該ld〇線性 穩壓Is經組態以藉助一濾波器除掉波紋電壓且防止該波紋 電壓出現在其輸出冑。由於在本文中所闡述及圖解說明之 實施例中通常預期殘餘波紋電壓係相當小,因此一 ld〇線 性穩壓器係用於減小或消除該殘餘波紋之一個選項-因此 減輕或消除對否則可期望在輸出處具有之小的平滑電容器 之需要’而不顯著損害效率。 本文中所揭示之某些電源供應器實施例可係使用兩個變 壓器構建。此等變㈣可製作成低輪廓且@此不顯著影響 電源供應器電子器件之總大小。舉例而言,對於用於一音 Λ系統之一2〇〇瓦特電源供應器而言,可使用一對環形變 壓益,其每一者大小近似丨"。結果係比類似瓦特數之一習 用切換式電源供應II更小型之電源供應器。 149927.doc -38- 201117544 本文中所述之電源供應器設計並不限於數百瓦特之功率 範圍,而亦可用於大得多的DC至DC轉換應用,其以千瓦 特計或更大。 本文中所揭示之一電源供應器之實施例與一習用切換式 電源供應器相比可具有顯著減小之EMI。在電壓波形呈現 為如圖2中之情形下,亦即,週期經反轉/未經反轉升餘弦 波,對應電流波形係—方形波,其自一 EMI觀點來看係較 不期望的。圖5之實施例藉由在經反轉/未經反轉升餘弦波 發送至變壓器級之前將其等變壓至電流波形而克服彼等問 題。此實施例中相對平滑的電流波形減輕EMI問題。儘管 對應的電壓波形變為一方形波,但由電壓方形波形成之靜 電發射比將由一電流方形波形成之電磁發射容易遮蔽及處 理。 儘官所述DC至DC轉換方法所產生iEMI可因較佳輸入 及輸出電壓及電流波形之低波紋性質而係極低,但可藉由 相關於時間調變互補波形之頻率來進一步減小有效 射。此類型之調變將致使殘餘干擾之光譜分量散佈在一較 寬光譜頻帶上,因此減小任何給定頻率下干擾之平均振 幅。調變波形性質上可係週期性或任意性(包含虛擬任意 性)。對一組經頻率調變互補波形丨〇3〇、〖〇3丨之一圖解說 明之一實例展示於圖10中。此特定實例係基於啁啾調變, 其中僅出於圖解說明之目的圖10中誇大波形1030、1031之 波長隨時間之偏離。 可結合本文中所述各種電源供應器實施例之變壓器級 149927.doc -39- 201117544 (130、430或530)使用各種不同變壓器設計及技術。該特定 變壓器設計可係根據所需應用選擇。舉例而言,該等變壓 益可採用雙線繞組,其中主級及副級導線在圍繞磁芯纏繞 之則絞繞在一起,此可具有減小洩露電感之效應。另一選 擇為,可使用同轴繞組,其中主級及副級導線以同軸方式 組合’此亦可顯著減小洩露電感。 就變壓器形狀及組態而言,變壓器可係環形,否則可係 平面(對於螺旋繞組而言)以達成一特別低的輪廓以及潛在 較簡單製造。另一選項係使用通過一系列空心立方體形磁 〜之繞組,例如,如在Herbert之美國專利4,665,357中所 大體闡述’該專利如同完全陳述於本文中-般以引用方式 4并々 由 又干。又一種可能性係將變壓器主級/副級繞組(如 同雙絞對或同軸對)中之一者嵌入在一已挖空槽中於具 有被劃分成方形的邊緣之一環形磁芯之側壁中,例如,如 在Meretsky等人之美國專利4,21〇,859中所大體闡述,該專 利如同凡全陳述於本文中一般以引用方式併入本文中。在In one aspect, Figure 7 shows one of the voltage boosters used to provide a single boost stage (approximately double supply voltage Vsupply). This method can be extended by adding other rectifiers and capacitors as shown, for example, in the embodiment of Figure 17, to create an additional boost stage. In Fig. 17, the voltage waveforms... and V2 can be the same as those of Fig. 7 (i.e., similar to the waveform and 717). The component labeled 17 in Figure π generally corresponds to its equivalent in Figure 7 labeled 7χχ. Additionally, a second boost (or buck) signal 1795 is provided in FIG. Using the same principle of Figure 7, an additional round-out state 1772 has been added to the circuit and to other charging capacitors (1732, i742 'PM 149927) in a similar diode/capacitor configuration as shown in Figure 7. .doc -32· 201117544 and 1762) performing periodic charging similar to one of 1744, 1752', 1753, 1732, 1733, 1743, mode, via diodes 1762' and 1 763' to charging capacitors Π32 , 1,742, 17521, and 1762, for periodic charging. No other power amplifier, stage 'required' but this other power amplification can be used as appropriate and the output and input ripple of the device is still extremely low. The voltage across the output of the transconductance amplifier is a square wave, as in Figure 7, so the total amplifier of Figure 17 can still operate with high efficiency. The technique for positive boosting as illustrated in Figures 7 and 17 can also be used to generate an inverted power supply by varying the polarity of the rectifier and replacing the charging rectifier with a reference to ground. The same method can be used to combine a two-stage boost to a set of power amplifiers with the dual booster supply method, as can the positive boost and reverse boosters. Figure 18 is a schematic illustration of one of the power supplies having one of a combination of a positive booster circuit and a reverse booster circuit. Here, the upper half of the circuit (i.e., a non-inverted power section 1802) is substantially equivalent to the circuit of Figure 17, while a reverse power supply section 1803 has been added. Thus, in Figure 18, the component labeled 18A generally corresponds to its peer portion labeled 7A in Figure 7. In the reverse power supply section 1803, the additional charging capacitor 1836 is coupled via diodes 1837, 1838, 1847, 1848, 1857, 1858, 1867, and 1868 in a manner similar to charging capacitors 1832, 1842, 1852, and 1862, 1846, 1856, and 1866 periodically charge 'but with the same input waveform but have opposite polarities', so the result is across one of the output capacitors 78 7 6 negative power supply output voltage 1896. In this manner, the power supply can provide both a positive output 1885 and a negative output voltage 1896 in the same device. 149927.doc -33- 201117544 FIG. 6 is an illustration of one of signal generators 600 for generating one of waveforms having alternating inverted/non-inverted raised cosine waves, which can be used in conjunction with the various embodiments disclosed herein. One of the examples simplifies the block diagram. As shown in Fig. 6, signal generator 600 can include a first sinusoidal waveform generator 〇2 having an output 603 in the form of a sine wave having one of the peaks at the soil Vs. The sine wave signal 603 is coupled as a round-in to a summer 61 〇. The other input of summer 610 is a DC input signal 608 at a fixed +Vs level. The resulting signal 607 is a DC offset version of the sine wave signal 603 having a ground and +Vs The peak between. The DC offset sine wave signal 607 is split into two paths 'one of which is provided to an analog inverter 604, which outputs one of the De offset sinusoidal signals 607 whose peak is between ground and _Vs. The phase inversion version ^ DC offset sine wave signal 607 and the inverted DC offset sine wave signal 6〇9 are optionally provided to a pair of amplifiers 605, 606 for gain adjustment (if needed), where two amplifiers 605, The gain of 606 is the same. Outputs from amplifiers 6〇5, 606 61 2, 61 3 are DC offset sine waves that are phase shifted relative to each other, and are analogous to input signals 607, 609. The switch 620 is between the outputs 612 and 613, that is, when the sine wave from the lower amplifier 6〇6 reaches the upper peak (this is the same time as the sine wave from the upper amplifier 605 reaches its lower peak) at the output. Switch between 612 and 613. The result is an output signal 621 that alternates between a "non-reversed" raised cosine wave and a "reversed" raised cosine wave every half cycle, where the unreversed and reversal raised cosine waves There is a smooth transition between 'as illustrated by the output V! in Figure 6. A similar technique can be used to generate one of the output signals 621 9 〇 phase shift 149927.doc -34· 201117544 version. The signal generator 600 can include a second sinusoidal waveform generator 622' having an output 623 in the form of a sine wave having one of the peaks at the soil Vs. Signal 623 is an inverted version of one of the signals 603; therefore, signal 623 can also be generated by only inverting signal 603. The sine wave signal 623 is passed as an input to a summer 630. The other input of summer 630 is a DC input signal 608' which is at a fixed -Vs level. The resulting signal 627 is a DC offset version of a sine wave 彳 5 623 having a peak between ground and _vs. The DC offset sine wave signal 627 splits into two paths, one of which provides an analogy Inverter 624' outputs a phase inverted version of one of the DC offset sine wave signals 627 having a peak between ground and +Vs. The DC offset sine wave signal 627 and the inverted DC offset sine wave signal 629 are optionally provided to a pair of amplifiers 625, 626 for gain adjustment (if needed) where the gains of the two amplifiers 625, 626 are the same. The outputs 632, 633 from amplifiers 625, 626 are DC offset sinusoids that are phase shifted relative to each other, similar to input signals 627, 629. Switch 64 is alternated between outputs 632 and 633, each time the sine wave from lower amplifier 626 reaches its upper peak (this is the same time as the sine wave from upper amplifier 625 reaches its lower peak) Switch between. The result is an output signal 641 that alternates between a "non-reversed" raised cosine wave and a "reversed" raised cosine wave every half cycle, where the unreversed and inverted raised cosine waves There is a smooth transition between them, as illustrated by the output % in Figure 6. The turns 621 and 641 can be used as the input signal Vini & Vini in the transformer based power supply embodiment disclosed herein. 149927.doc -35· 201117544 In practical applications, the output signal from signal generator 600 can pass through a small electric or past frequency filter to remove any residual D (: component, which can be tied to the signal generation Inadvertently formed. In addition, various bias current adjustments and other implementation details may be added in accordance with techniques well known in the art. Alternatively, other techniques may be used to generate periodic alternating waveforms. In other words, digital synthesis can be used to generate waveforms similar to those described above. According to one such embodiment illustrated in Figure 9, a waveform generator 900 stores the waveform data in a digital form in a lookup table 905. (eg, in a read-only memory (R〇M) or other non-volatile memory storage device) and in a proper sequence under the control of a microcontroller, microsequencer, finite state machine, or other controller Read out. The digital data can be provided to a pair of digital to analog converters (DACs) 91 〇, 911, one for one waveform, that is, 'the first DAC 910 outputs a first transit Waveform 914' and first DAC 911 outputs a second converted waveform 915 that is identical to first converted waveform 914 but offset from the first converted waveform by 9 degrees, as previously explained. Converted waveform 914 915 is provided to filters 920, 921 for smoothing. Outputs 930 and 931 can be used as input signals 乂丨... and VlN2 in the transformer-based power supply embodiment disclosed herein. In other embodiments, A rotor-type mechanical generator, which is similar in principle to a hub dynamo, can be used to generate alternating reversals having the same as illustrated in Figure 2 and illustrated in Figure 2 And one of the characteristics of the unreversed raised cosine wave. This 149927.doc -36- 201117544 a waveform generator may be particularly suitable for the larger wattage application of the power supply design of the present invention disclosed herein. A DC generator typically operates by rotation of a permanent magnet on a shaft, wherein the magnet is disposed within a wire coil. The output of a digital DC generator has been observed to have alternating transversals. And a waveform of one of the unreversed raised cosine waves. The complementary waveform can be generated, for example, by adding a second permanent magnet oriented perpendicular to the first magnet on the same axis as the first magnet. The second permanent magnet is in a second wire coil separate from the first wire coil. As with the two wire coils, the two permanent magnets preferably have the same size and physical properties, 4 of which can be along the length of the axis Lateral offset. The rotation of the shaft can be achieved by any suitable method, including motorization techniques, wind power or other methods. More generally, a rotating AC generator can be used to generate the appropriate waveform, the generator having a relative waveform Or one of a plurality of magnetic fields in a relative rotational motion, wherein the power supply is used to convert a relatively high DC voltage to a lower DC voltage, in one aspect, by one or more A small transformer, such as illustrated in the various embodiments described herein, transforms the high frequency AC waveform generated from a relatively voltage DC source to a lower voltage. The power supply is designed to avoid the need for large storage capacitors to smooth out the output voltage from the transformers after rectifying the transformed signals. It is theoretically possible to have both the input and output of the power converter without ripple at all output levels so that no additional magnetic components are required for filtering. Eliminating output storage needs and eliminating integrated filtering can reduce size and cost compared to, for example, a conventional switched-mode supply. !49927^〇〇 •37- 201117544 As mentioned previously, in practice, some small round-out capacitors may be required to reduce any residual ripple from the transformer stage or other stages. This slight ripple can be caused by the inductance inherent in the amplifier stage. It is expected that for a 50 watt power supply operating with a periodic waveform of 25 Ku〇hertz, a capacitor of approximately 3 〇〇 to 6 〇〇 nF will be sufficient. The capacitance of this size is significantly less than the capacitance required for a conventional switched power supply. Another technique that can be used to reduce any residual ripple at the output is to use a low dropout (LDO) linear regulator. An lD〇 linear regulator can typically include a power FET in series with the output signal. A differential amplifier controls the power FET in a manner to maintain a small Dc voltage difference between the input and output of the LD〇 linear regulator. The voltage difference is maintained at a value above the peak-to-peak ripple voltage at the output of the rectifier circuit. The ld〇 linear regulator Is is configured to remove the ripple voltage by means of a filter and prevent the ripple voltage from appearing at its output. Since the residual ripple voltage is generally expected to be relatively small in the embodiments illustrated and described herein, an ld〇 linear regulator is used to reduce or eliminate an option for the residual ripple - thus reducing or eliminating otherwise The need for a small smoothing capacitor at the output can be expected without significantly damaging efficiency. Some of the power supply embodiments disclosed herein may be constructed using two transformers. These variations (4) can be made into a low profile and @this does not significantly affect the total size of the power supply electronics. For example, for a 2 watt power supply for a one-tone system, a pair of toroidal transformers can be used, each of which is approximately 丨". The result is a smaller power supply than the one of the wattage-like switching power supply II. 149927.doc -38- 201117544 The power supply design described herein is not limited to a power range of hundreds of watts, but can also be used for much larger DC to DC conversion applications, in kilowatts or more. One embodiment of the power supply disclosed herein can have significantly reduced EMI compared to a conventional switched power supply. In the case where the voltage waveform appears as in Fig. 2, that is, the period reversed/uninverted raised cosine wave, the corresponding current waveform is a square wave, which is less desirable from an EMI point of view. The embodiment of Figure 5 overcomes these problems by transforming the inverted cosine waves to the current waveform before being sent to the transformer stage via the inverted/non-inverted. The relatively smooth current waveform in this embodiment mitigates EMI issues. Although the corresponding voltage waveform becomes a square wave, the electrostatic emission ratio formed by the voltage square wave is easily shielded and processed by the electromagnetic emission formed by a current square wave. The iEMI generated by the DC to DC conversion method can be extremely low due to the low ripple characteristics of the preferred input and output voltage and current waveforms, but can be further reduced by the frequency associated with the time-modulated complementary waveform. Shoot. This type of modulation will cause the spectral components of the residual interference to be spread over a wider spectral band, thus reducing the average amplitude of the interference at any given frequency. Modulated waveforms can be cyclical or arbitrary in nature (including virtual arbitrary). An example of one of the set of frequency modulated complementary waveforms 丨〇3〇, 〇3丨 is shown in Figure 10. This particular example is based on 啁啾 modulation, where the wavelength of the waveforms 1030, 1031 is exaggerated over time for illustration purposes only for purposes of illustration. A variety of different transformer designs and techniques can be used in conjunction with transformer stages 149927.doc-39-201117544 (130, 430 or 530) of the various power supply embodiments described herein. This particular transformer design can be selected based on the desired application. For example, the variable voltage can be a two-wire winding in which the primary and secondary conductors are wound together around the core, which can have the effect of reducing leakage inductance. Alternatively, a coaxial winding can be used in which the primary and secondary conductors are combined in a coaxial manner. This also significantly reduces leakage inductance. In terms of transformer shape and configuration, the transformer can be toroidal, otherwise it can be flat (for spiral windings) to achieve a particularly low profile and potentially simple manufacturing. Another option is to use a series of hollow cube-shaped magnetic windings, for example, as generally described in U.S. Patent 4,665,357, the entire disclosure of which is incorporated herein by reference. Yet another possibility is to embed one of the primary/secondary windings of the transformer (like a twisted pair or a coaxial pair) in a hollowed out slot in the side wall of one of the toroidal cores having an edge that is divided into squares , for example, as generally described in US Pat. in

iHj "fell Φ 5 O , 另一變化器主級/副級繞組重複地圍繞該磁芯 捲繞,類似於一習用環形變壓器,但其中主級/副級繞組 1雙奴對之同軸對。這樣提供正交但不互相作用之磁 昜且提供增加的能量密度。此設計允許兩個獨立變壓器 共用相同磁芯。 田d ,亦可利用其他變壓器設計。 中所述之電源供應器設計及技術可用於不同類型之 *' 匕3 本端電池電力供應’否則一線路供鹿, 149927.doc 201117544 其在轉換至一 DC輸出位準之前首先轉換至一輸入dc位 準。在使用一 AC線路電力供應之情形下,首先整流該線 路AC電壓以產生一高電壓dc。儘管然後可在相對高頻率 下進行DC至DC轉換過程,此不同於切換模式電力轉換 器’但用於此過程之AC波形具有極低等級之射頻分量且 因此電磁干擾不成為一問題。該AC波形(儘管平滑且具有 極低EMI)以此一方式使用以使得該供應器仍保持極高效 率’通常如一習用切換模式供應器一樣佳或比其更佳。 根據如本文中所述之某些實施例,再藉由一個或多個小 的變壓器將自高電壓DC產生之高頻率ACi形變壓至一較 低電壓《然而,特定設計潛在地避免對用以在整流之後平 滑輸出電壓之儲存電容器之需要。理論上可使轉換器之輸 入及輸出兩者在所有輸出位準下沒有波紋,且因此不需要 額外磁性組件來渡波。消除輸出儲存需要及消除综合渡波 相比於一切換式供應器通常減小大小及成本。 消除輸出儲存電容器帶來一進一步益處。根據本文中所 揭示實施例之-電源供應器可迅速回應於—控制信號且因 此可用作有效、高品質、低雜訊及低EMI音訊功率放大器 之-快速追蹤電源供應器。在已存在—Dc供應(來自電池 或來自-外部電源供應器)之情形下,則輸入整流及儲存 可免除且然後由於消除輸出儲存電容器可將該電源 製作成具有一極低輪廓。 鑲方法導致一有效供應 什任或存在最小鱼 EMI減小相關聯之損耗且沒有欲 /、 电刀裝置動態切換 149927.doc •41 · 201117544 損耗,且因此貫務中效率可超過90〇/0。 驅動變壓器之模式、消除切換假像及簡化控制架構相比 於一切換模式供應器可顯著簡化設計過程短上市時 間。 本文中所闡述及圖解說明之本發日月電源供應ϋ設計可用 於各種應用中,包含音訊裝置、可攜式電子設備(例如, 膝上型電腦 '蜂巢式電話或無線裝置等)、半事、航空電 子、醫療設備、太陽能轉換、電力分配等應用。 在各種實施你J中,才艮據上文所述實施例構建之一電源供 應器可特定用於(例如)汽車工#中作為用於一音訊放大器 之一車載電源供應器。如本文中所述實施例可產生一較 小、較輕及/或較薄電源供應器,其可係較不昂貴、高效 且具有較少主要組件,同時自ΕΜΙ觀點來看係相對良好。 由於該電源供應器設計及生產起來可係較簡單,因此可使 其更快速地上市,由此產生一較快產品設計循環。除此之 外,低發射減小用於證明之時間及成本。簡單設計過程' 低組件成本及低證明成本相比於現有電源供應器方法產生 一明顯成本節約。而且,低輪廓、低成本及重量及極低發 射允許在一車輛内之位置中使用本發明電源供應器,該等 位置當前係極難使用切換模式電源供應器設計來實現。 對於可攜式電池運轉之產品而言’該低輪廟能力提供當 前難以達成之形式因數。 對於更一般重負荷電力分配應用而言,能夠在不使用大 的能置:儲存組件之情形下產生一無波紋輸出相對於習用方 149927.doc •42· 201117544 法具有獨特之優點。 在各種實施例中’提供一低成本、輕便、有效、隔離 的、快速回應DC輸出電力轉換器,其具有一極低輸入及 輸出波紋及極低EMI發射。電力轉換器通常需要極小輸出 儲存容量’且因此可以極低輪廓組態實施。設計過程亦比 —習用切換模式轉換器簡單,此產生一快速設計過程。儘 官其有益地可用於音訊放大器,但該概念中所體現之一般 原理允許其應用於各種電力轉換應用中。 本文中所述之某些實施例藉由組合具有某些特性之兩個 經整流信號產生一 DC輸出信號。然而,相同原理可延伸 至具有經整流及加性組合之三個或更多個信號之組態(假 定選擇充足波形)。 儘管本文中已闡述本發明之較佳實施例,但可存在仍在 本發明之概念及範疇内之眾多變化型式。在熟悉此項技術 者檢查說明書及圖式之後將明瞭此等變化型式。因此,本 發明除了受限於任何隨附申請專利範圍之精神及範疇内之 外不受限制。 【圖式簡單說明】 圖1係如本文中所揭示使用一個或多個變壓器用於信號 位準轉換之一 DC輸出電源供應器之一概念方塊圖。 圖2係根據一項實例圖解說明圖1中所示電源供應器之作 業之一組波形圖。 圖3係根據另一實例圖解說明圖1中所示電源供應器之作 業之一組波形圖。 149927.doc -43- 201117544 圖4係展示所揭示的根據圖丨之概念方塊圖之一電壓控制 DC輸出電源供應器之一實施例之組件之一方塊圖。 圖5係展示所揭示的根據圖丨之概念方塊圖之一電流控制 DC輸出電源供應器之一實施例之組件之一方塊圖。 圖6係圖解說明可結合本文中所揭示各種實施例一起使 用之一信號產生器之一項實例之一方塊圖。 圖7係展示使用與圖i類似之一技術但藉助切換式電容器 電路實施之一電源供應器之一實施例之—示意圖。 圖8係本文中所揭示一 D C輸出電源供應器之一概念方塊 圖。 圖9係圖解說明可結合本文中所揭示各種實施例一起使 用之一信號產生器之一第二實例之一方塊圖。 圖10係圖解說明可由一信號產生器輪出之一對經頻率調 變信號之一實例之一波形圖。 圖11A及11B係根據圖1之原理操作的在每一情況下使用 不同輸入波形之一 DC電源供應器之一部分之示意圖。 圖12係具有組態為積分器之放大器之一 電源供應器 之一部分之一示意圖。 圖13係可結合具有具一積分器特性之跨導放大器之一 DC電源供應器一起使用之波形之一圖。 圖14係採用前饋技術來線性化功率放大器之一 電源 供應器之一部分之一示意圖。 圖15係採用前饋及回饋技術兩者之一 DC電源供應器之 一部分之一示意圖。 149927.doc •44- 201117544 圖16係採用前鶴 b 拉_ 月J饋及回饋技術兩者之一 DC電源供應器之 另一實施例之一示意圖。 圖17係使用切換式電容器電路來形成—多級電力轉換器 之一實施例之一示意圖。 圖18係展示具有正增壓器電路及反轉增壓器電路之-組 合之一切換式電容器電源供應器之一示意圖。 【主要元件符號說明】 100 DC輸出電源供應器 105 號源(波形)產生器 123 信號線路 124 信號線路 130 變壓器級 135 變壓器 136 變壓器 137 信號 138 信號 140 輸出級 160 第一整流器區塊 161 第二整流器區塊 166 經整流輸出信號 167 經整流輸出信號 170 信號組合器 185 DC輸出信號 400 電壓控制DC輸出電源供應器 149927.doc 201117544 405 信號產生器 412 互補波形信號 413 互補波形信號 415 電壓控制放大器 430 線性放大器 431 線性放大器 432 經放大信號 433 經放大信號 435 變壓器 436 變壓器 437 變壓器輸出信號 438 變壓器輸出信號 450 輸出級 460 整流器區塊 461 整流器區塊 470 負載 485 DC輸出信號 490 回饋感測放大器 491 回饋路徑 500 電源供應器 505 信號產生器 512 互補波形信號 513 互補波形信號 515 電壓控制放大器 149927.doc • 46- 201117544 530 線性跨導放大 531 線性跨導放大器 532 經放大信 533 經放大信 550 輸出級 560 整流器區塊 561 整流器區塊 570 負載 585 DC輸出信號 590 感測放大 591 回饋路徑 602 第一正弦曲線波形產生器 603 輸出 604 類比反相器 605 放大器 606 放大器 607 DC偏移正弦波信號 608 DC輸入信號 609 經反轉DC偏移正弦波信號 610 求和器 612 輸出 613 輸出 620 切換器 621 輸出信號 149927.doc •47- 201117544 622 第二正弦曲線波形產生器 623 輸出 624 類比反相器 625 放大器 626 放大器 627 DC偏移正弦波信號 629 經反轉DC偏移正弦波信號 630 求和器 632 輸出 633 輸出 640 切換器 641 輸出 705 信號產生器 706 互補波形信號 715 信號產生器 716 互補波形信號 731 跨導放大 732 電容器 734 整流二極體 735 電流波形 737 經位準轉換信號 741 跨導放大 742 電容器 743 二極體 149927.doc 48- 201117544 744 整流二極體 745 電流波形 747 經位準轉換信號 751 跨導放大器 752 電容器 753 二極體 754 整流二極體 755 電流波形 757 經位準轉換信號 761 跨導放大 762 電容器 763 二極體 764 整流二極體 765 電流波形 767 經位準轉換信號 772 平滑電容器 785 DC輸出信號 789 電源供應器軌道 805 信號源(波形)產生器 823 互補波形信號 824 互補波形信號 830 位準轉換級 835 位準轉換區塊 836 位準轉換區塊 149927.doc - 49 - 201117544 837 信號 838 信號 840 輸出級 860 第一整流器區塊 861 第二整流器區塊 866 經整流輸出信號 867 經整流輸出信號 870 信號組合器 885 DC輸出信號 905 查找表 910 數位至類比轉換器 911 數位至類比轉換器 914 第一經轉換波形 915 第二經轉換波形 920 滤波益 921 渡波器 930 輸出 931 輸出 1102 主級側上之電源供應器電路 1105 電壓源 1106 電壓源 1107 單獨電源供應器 1116 電流感測電阻器 1117 電流感測電阻器 149927.doc -50- 201117544 1120 線性放大器 1121 線性放大器 1130 電晶體 1131 電晶體 1146 副級繞組 1147 主級繞組 1148 變壓器 1149 中心分接頭 1202 主級側上之電源供應器電路 1205 電壓源 1206 電壓源 1207 單獨電源供應器 1216 電流感測電阻器 1217 電流感測電阻器 1220 放大器 1221 放大器 1230 場效應電晶體 1231 場效應電晶體 1246 副級繞組 1247 主級繞組 1248 變壓器 1249 中心分接頭 1270 電阻器 1271 電阻器 149927.doc -51 - 201117544 1272 積分電容 1273 電阻器 1274 積分電容 1275 電阻器 1402 電路 1405 信號產生 1407 DC電源 1416 電阻器 1417 電晶體 1418 差分器 1420 放大器 1421 放大器 1430 電晶體 1431 電晶體 1432 山 1502 電路 1505 信號產生 1516 阻抗元件 1517 阻抗元件 1520 放大器 1521 放大器 1530 電晶體 1531 電晶體 1571 阻抗元件 器 器 器 器 -52- 149927.doc 201117544 1572 1617 1675 1676 1732 1732' 1733' 1742 1742' 1743' 1744 1752 1752, 1753' 1762 1762' 1763' 1772' 1795 1802 1803 1832 1836 1837 阻抗元件 阻抗元件 回饋元件 回饋元件 充電電容器 充電電容器 二極體 充電電容器 充電電容器 二極體 二極體 充電電容器 充電電容器 二極體 充電電容器 充電電容器 二極體 額外輸出電容器 第二升壓(或降壓)DC信號 未經反轉電力區段 反轉電源供應器區段 充電電容器 充電電容器 二極體 149927.doc -53- 201117544 1838 1842 1846 1847 1848 1852 1856 1857 1858 1862 1866 1867 1868 1876 1885 1896 二極體 充電電容器 充電電容器 二極體 二極體 充電電容器 充電電容器 二極體 二極體 充電電容器 充電電容器 二極體 二極體 輸出電容器 正輸出電壓 負輸出電壓 149927.doc -54-iHj "fell Φ 5 O , another variator main/secondary winding is repeatedly wound around the core, similar to a conventional toroidal transformer, but in which the main/secondary winding 1 is a pair of slave pairs. This provides orthogonal but non-interactive magnetic enthalpy and provides increased energy density. This design allows two separate transformers to share the same core. Tian d can also use other transformer designs. The power supply design and technology described in the description can be used for different types of *' 匕3 local battery power supply 'other lines for deer, 149927.doc 201117544 which first switches to an input before switching to a DC output level Dc level. In the case of using an AC line power supply, the line AC voltage is first rectified to produce a high voltage dc. Although the DC to DC conversion process can then be performed at a relatively high frequency, which is different from the switching mode power converter', the AC waveform used for this process has a very low level of radio frequency component and thus electromagnetic interference does not become a problem. The AC waveform (although smooth and with very low EMI) is used in such a way that the supply remains extremely efficient' typically as good as or better than a conventional switching mode supply. According to some embodiments as described herein, the high frequency ACi generated from the high voltage DC is again transformed to a lower voltage by one or more small transformers. However, the specific design potentially avoids the use of The need for a storage capacitor that smoothes the output voltage after rectification. In theory, both the input and output of the converter can be free of ripple at all output levels, and therefore no additional magnetic components are needed to wave. Eliminating output storage needs and eliminating integrated ripples typically reduces size and cost compared to a switched supply. Eliminating the output storage capacitor brings a further benefit. According to embodiments disclosed herein, the power supply can respond quickly to the control signal and can therefore be used as a fast tracking power supply for efficient, high quality, low noise and low EMI audio power amplifiers. In the case where the existing -Dc supply (from the battery or from the external power supply) is present, the input rectification and storage can be dispensed with and then the power supply can be made to have a very low profile due to the elimination of the output storage capacitor. The mounting method results in an effective supply or there is a loss associated with the minimum fish EMI reduction and there is no desire/, the electrosurgical device dynamically switches 149927.doc •41 · 201117544 loss, and thus the efficiency in the transaction can exceed 90〇/0 . Driving the transformer mode, eliminating switching artifacts, and simplifying the control architecture significantly simplifies the short time to market for the design process compared to a switched mode supply. The power supply and quotation described and illustrated herein is designed for use in a variety of applications, including audio devices, portable electronic devices (eg, laptops, cellular phones, wireless devices, etc.) , avionics, medical equipment, solar energy conversion, power distribution and other applications. In various implementations, one of the power supplies constructed in accordance with the embodiments described above can be used, for example, as a vehicle power supply for an audio amplifier, for example, in Automaker #. Embodiments as described herein can produce a smaller, lighter, and/or thinner power supply that can be less expensive, more efficient, and have fewer major components, while being relatively good from a standpoint. Since the power supply is designed and manufactured to be simple, it can be launched more quickly, resulting in a faster product design cycle. In addition, low emissions reduce the time and cost for certification. The simple design process 'low component cost and low proof cost creates a significant cost savings compared to existing power supply methods. Moreover, low profile, low cost and weight and very low emissions allow the use of the power supply of the present invention in a location within a vehicle that is currently extremely difficult to implement using a switched mode power supply design. For portable battery-operated products, the low-wheel temple capability provides a form factor that is currently difficult to achieve. For more general heavy-duty power distribution applications, the ability to produce a ripple-free output without the use of a large energy storage: storage component has unique advantages over the conventional method of 149927.doc • 42· 201117544. In various embodiments, a low cost, lightweight, efficient, isolated, fast response DC output power converter having a very low input and output ripple and very low EMI emissions is provided. Power converters typically require very small output storage capacity' and can therefore be implemented with very low profile configurations. The design process is also simpler than the conventional switching mode converter, which produces a rapid design process. It is beneficially available for audio amplifiers, but the general principles embodied in this concept allow it to be used in a variety of power conversion applications. Certain embodiments described herein produce a DC output signal by combining two rectified signals having certain characteristics. However, the same principle can be extended to configurations with three or more signals that are rectified and additively combined (assuming sufficient waveforms are selected). Although the preferred embodiment of the invention has been described herein, numerous variations are possible within the spirit and scope of the invention. These variations will be apparent to those skilled in the art after reviewing the specification and drawings. Therefore, the invention is not limited except in the spirit and scope of any accompanying claims. BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is a conceptual block diagram of one of the DC output power supplies using one or more transformers for signal level conversion as disclosed herein. Figure 2 is a set of waveform diagrams illustrating the operation of the power supply of Figure 1 in accordance with an example. Figure 3 is a set of waveform diagrams illustrating the operation of the power supply of Figure 1 in accordance with another example. 149927.doc -43- 201117544 FIG. 4 is a block diagram showing one of the components of one embodiment of a voltage controlled DC output power supply according to the conceptual block diagram of the disclosure. 5 is a block diagram showing one of the components of one embodiment of a current controlled DC output power supply in accordance with the conceptual block diagram of the disclosure. 6 is a block diagram illustrating one example of a signal generator that can be used in conjunction with the various embodiments disclosed herein. Figure 7 is a schematic diagram showing one embodiment of a power supply implemented using a switching capacitor circuit using one of the techniques similar to Figure i. Figure 8 is a conceptual block diagram of a D C output power supply disclosed herein. 9 is a block diagram illustrating a second example of one of the signal generators that can be used in conjunction with the various embodiments disclosed herein. Figure 10 is a waveform diagram illustrating one example of a frequency modulated signal that can be rotated by a signal generator. Figures 11A and 11B are schematic illustrations of one portion of a DC power supply using one of the different input waveforms in each case operating in accordance with the principles of Figure 1. Figure 12 is a schematic illustration of one of a portion of a power supply having an amplifier configured as an integrator. Figure 13 is a diagram of a waveform that can be used in conjunction with a DC power supply having one of the transconductance amplifiers having an integrator characteristic. Figure 14 is a schematic diagram of one of the power supplies of one of the power amplifiers using feedforward techniques. Figure 15 is a schematic diagram of a portion of a DC power supply using either feedforward or feedback techniques. 149927.doc •44- 201117544 Figure 16 is a schematic diagram of another embodiment of a DC power supply using one of the front cranes b _ _ J feed and feedback technology. Figure 17 is a schematic diagram of one embodiment of a multi-stage power converter formed using a switched capacitor circuit. Figure 18 is a schematic diagram showing one of a combination of switched capacitor power supplies having a positive booster circuit and a reverse booster circuit. [Main component symbol description] 100 DC output power supply source 105 (waveform) generator 123 signal line 124 signal line 130 transformer stage 135 transformer 136 transformer 137 signal 138 signal 140 output stage 160 first rectifier block 161 second rectifier Block 166 Rectified Output Signal 167 Rectified Output Signal 170 Signal Combiner 185 DC Output Signal 400 Voltage Control DC Output Power Supply 149927.doc 201117544 405 Signal Generator 412 Complementary Waveform Signal 413 Complementary Waveform Signal 415 Voltage Control Amplifier 430 Linear Amplifier 431 linear amplifier 432 amplified signal 433 amplified signal 435 transformer 436 transformer 437 transformer output signal 438 transformer output signal 450 output stage 460 rectifier block 461 rectifier block 470 load 485 DC output signal 490 feedback sense amplifier 491 feedback path 500 Power Supply 505 Signal Generator 512 Complementary Waveform Signal 513 Complementary Waveform Signal 515 Voltage Control Amplifier 149927.doc • 46- 201117544 530 Linear Transconductance Amplification 531 Linear Transconductance Amplification 532 amplified signal 533 amplified signal 550 output stage 560 rectifier block 561 rectifier block 570 load 585 DC output signal 590 sense amplification 591 feedback path 602 first sinusoidal waveform generator 603 output 604 analog inverter 605 amplifier 606 Amplifier 607 DC Offset Sine Wave Signal 608 DC Input Signal 609 Inverted DC Offset Sine Wave Signal 610 Summer 612 Output 613 Output 620 Switch 621 Output Signal 149927.doc • 47- 201117544 622 Second Sinusoidal Waveform Generation 623 Output 624 Analog Inverter 625 Amplifier 626 Amplifier 627 DC Offset Sine Wave Signal 629 Inverted DC Offset Sine Wave Signal 630 Summer 632 Output 633 Output 640 Switch 641 Output 705 Signal Generator 706 Complementary Waveform Signal 715 Signal Generator 716 Complementary Waveform Signal 731 Transconductance Amplification 732 Capacitor 734 Rectifier Diode 735 Current Waveform 737 Post-Level Conversion Signal 741 Transconductance Amplification 742 Capacitor 743 Diode 149927.doc 48- 201117544 744 Rectifier Diode 745 Current waveform 747 Conversion signal 751 transconductance amplifier 752 capacitor 753 diode 754 rectifying diode 755 current waveform 757 via level conversion signal 761 transconductance amplification 762 capacitor 763 diode 764 rectifying diode 765 current waveform 767 level conversion signal 772 Smoothing Capacitor 785 DC Output Signal 789 Power Supply Rail 805 Signal Source (Waveform) Generator 823 Complementary Waveform Signal 824 Complementary Waveform Signal 830 Level Conversion Stage 835 Level Alignment Block 836 Level Quasi Conversion Block 149927.doc - 49 - 201117544 837 Signal 838 Signal 840 Output Stage 860 First Rectifier Block 861 Second Rectifier Block 866 Rectified Output Signal 867 Rectified Output Signal 870 Signal Combiner 885 DC Output Signal 905 Lookup Table 910 Digital to Analog Converter 911 Digital Analog to analog converter 914 first converted waveform 915 second converted waveform 920 filtered benefit 921 waver 930 output 931 output 1102 power supply circuit 1105 on the main stage side voltage source 1106 voltage source 1107 separate power supply 1116 current sense Measuring resistor 1117 Current Sensing Resistors 149927.doc -50- 201117544 1120 Linear Amplifier 1121 Linear Amplifier 1130 Transistor 1131 Transistor 1146 Secondary winding 1147 Main winding 1148 Transformer 1149 Central tap 1202 Power supply circuit 1205 on the main stage side Source 1206 Voltage Source 1207 Separate Power Supply 1216 Current Sense Resistor 1217 Current Sense Resistor 1220 Amplifier 1221 Amplifier 1230 Field Effect Transistor 1231 Field Effect Transistor 1246 Secondary Winding 1247 Main Stage Winding 1248 Transformer 1249 Center Tap 1270 Resistor 1271 Resistor 149927.doc -51 - 201117544 1272 Integral Capacitor 1273 Resistor 1274 Integral Capacitor 1275 Resistor 1402 Circuit 1405 Signal Generation 1407 DC Power Supply 1416 Resistor 1417 Transistor 1418 Divider 1420 Amplifier 1421 Amplifier 1430 Transistor 1431 Crystal 1432 Mountain 1502 Circuit 1505 Signal Generation 1516 Impedance Element 1517 Impedance Element 1520 Amplifier 1521 Amplifier 1530 Transistor 1531 Transistor 1571 Impedance Component Device -52- 149927.doc 201117544 1572 1617 1675 1676 1732 1732' 1733' 1742 1742' 1743' 1744 1752 1752, 1753' 1762 1762' 1763' 1772' 1795 1802 1803 1832 1836 1837 Impedance element impedance element feedback element feedback element charging capacitor charging capacitor diode charging Capacitor Charging Capacitor Diode Diode Charging Capacitor Charging Capacitor Diode Charging Capacitor Charging Capacitor Diode Extra Output Capacitor Second Boost (or Buck) DC Signal Unreversed Power Section Inverting Power Supply Area Segment charging capacitor charging capacitor diode 149927.doc -53- 201117544 1838 1842 1846 1847 1848 1852 1856 1857 1858 1862 1866 1867 1868 1876 1885 1896 Diode charging capacitor charging capacitor diode diode charging capacitor charging capacitor diode Body diode charging capacitor charging capacitor diode diode output capacitor positive output voltage negative output voltage 149927.doc -54-

Claims (1)

201117544 七、申請專利範圍: 1 _ 一種電源供應器,其包括: 一波形產生器,其輸出一第一波形及一第二波形; 一第一整流橋’其耦合至該第一波形,該第一整流橋 輸出一第一經整流信號; 一第二整流橋’其耦合至該第二波形’該第二整流橋 輸出—第二經整流信號;及 一 DC輸出信號,其係藉由連續加性組合該第一經整流 信號與該第二經整流信號而形成。 2 ·如請求項1之電源供應器,其進一步包括内插於該波形 產生器與該第一整流橋及該第二整流橋之間的一位準轉 換電路,該位準轉換信號輸出該第一波形之經位準移位 版本及s亥第二波形之經位準移位版本。 3. 如請求項2之電源供應器,其中該位準轉換電路包括: 一第一變壓器’其輸出對應於該第一波形之該經位準移 位版本之該第一輸出;及一第二變壓器,其輸出對應於 該第二波形之該經位準移位版本之該第二輸出。 4. 如請求項3之電源供應器,其中該第一整流橋包括一第 一全波整流器,該其中該第二整流橋包括—第二全波整 流器。 / 5. 如請求項2之電源供應器,其中該位準轉換電路包括, -第-對切換式電容器電路’其等輸出對應於該J 一波 形之該經位準移位版本之該第一輸出; / ^ ^ 第^一對切換 式電谷器電路’其等輸出對應於該第二浊 收形之該經位準 149927.doc 201117544 移位版本之該第二輸出。 6. 如請求項5之電源供應器,其中該第一整流橋包括一第 '對整流器’該第-對整流器別連接在該第—對切換式 電容器電路與該DC輸出信號之間,且其中該第二整流橋 包括-第二對整流器,該第二對整流器分別連接在該第 一對切換式電容器電路與該DC輸出信號之間,其中該第 一對及第二對二極體中之每—者之陰極連接至該dc輸出 信號。 7. 如請求項!之電源供應器,纟中該第一波形及該第二波 形各自包括未經反轉波與經反轉波之一交替週期序列, 該第與第二波形係相同但彼此偏移90度。 8. 如請求項6之電源供應器,其中該第一波形及第二該波 形各自包括未經反轉升餘弦波與經反轉升餘弦波之一交 替週期序列》 9. 如請求項}之電源供應器,其中該第一波形及該第二波 形經選擇以使得在經整流及加性組合之後,該第一波形 及該第二波形之加性組合形成該D c輸出信號之一恆定電 壓位準,而不具有顯著波紋。 10. 如凊求項9之電源供應器,其中該DC輸出信號之該悝定 電/1位準係在不具有一健存電容器之情形下而產生。 η.如請求項1之電源供應器,纟中該第一經整流信號及該 第一經整流信號分別包括一餘弦波形及正弦波形。 12_如凊求項1之電源供應器,其中該波形產生器包括一旋 轉AC發電機,其具有相對於—個或多個磁場處於相對旋 149927.doc 201117544 轉運動中之一導線線圈。 13. —種電源供應器,其包括: 一波形產生器’其輸出一第一波形及一第二波形; 一第一變壓器,其接收該第一波形作為一輸入; . 一第二變壓器,其接收該第二波形作為一輸入; • 一第一整流橋,其耦合至該第一變壓器之一輸出,該 第一整流橋輸出一第一經整流信號; 一第二整流橋’其耦合至該第二變壓器之一輸出,該 第二整流橋輸出一第二經整流信號;及 一 DC輸出信號’其係藉由連續加性組合該第一經整流 信號與該第二經整流信號而形成。 14.如請求項13之電源供應器,其中該第一波形及該第二波 形各自包括未經反轉升餘弦波及經反轉升餘弦波之一交 替週期序列,該第一與波形該第二波形係相同但彼此偏 移90度。 15·如請求項14之電源供應器,其中該第一經整流信號及該 第一經整流信號分別包括—餘弦波形及正弦波形。 士凊求項13之電源供應器,其進一步包括自該DC輸出信 唬獲取之一回饋信號,該回饋信號係提供至該波形產生 - 器。 1 7.如吻求項丨3之電源供應器,其中該波形產生器包括具有 耦0至一電壓控制放大器之輸出信號之一信號產生器。 18.如請求項13之電源供應器,其進一步包括定位在該第一 艾壓器之前用於放大该第一週期波形之一第一放大器及 149927.doc 201117544 定位在該第二變壓器之前用於放大該第二週期波形之一 第二放大器。 19. 如請求項is之電源供應器,其中該第一放大器及該第二 放大器係跨導放大器。 20. 如請求項13之電源供應器,其中該第一變壓器及該第二 變壓器共用一共同磁芯。 21. 如請求項13之電源供應器,其中該第一整流橋係包括一 第一組四個二極體之一全波整流器,且其中該第二整流 橋係包括一第二組四個二極體之一全波整流器。 22. —種用於電力轉換之方法,其包括: 產生一第一交替波形及一第二交替波形; 整流經位準轉換之第一交替波形及第二交替波形以分 別產生一第一經整流信號及一第二經整流信號;及 藉由連續加性組合該第一經整流信號與該第二經整流 信號而形成一DC輸出信號。 2 3 _如請求項2 2之方法,其進一步包括在整流該第—交替波 形及該第二交替波形之前將該第一交替波形及該第二交 替波形轉換至一經升壓或經降壓位準之步驟。 24.如請求項23之方法,其中該將該第一交替波形及該第二 交替波形轉換至該經升壓或經降壓位準之步驟包括:在 一第一變壓器處接收該第一交替波形並從該第一變壓器 處輸出一第一經位準轉換之交替波形;及在一第二變壓 器處接收該第二交替波形並從該第二變壓器輪出—第二 經位準轉換之波形。 149927.doc -4- 201117544 25. 如請求項24之方法’其中該整流該經位準轉換之第一交 替波形及該經位準轉換之第二交替波形以分別產生該第 一經整流信號及該第二經整流信號之步驟包括:將該第 一經位準轉換之交替波形施加至一第一全波整流器以產 生該第一經整流信號;及將該第二經位準轉換之交替波 形施加至一第一全波整流益以產生該第二經整流信號。 26. 如清求項23之方法’其中該將該第一交替波形及該第_ 父替波形轉換至该經升壓或經降壓位準之步驟包括.將 該第一交替波形施加至一第一對切換式電容器電路,該 第一對切換式電容器電路輸出一第一經位準轉換之交替 波形,及將該第二交替波形施加至之一第二對切換式電 容器電路,該第二對切換式電容器電路輸出一第二經位 準轉換之交替波形。 27.如請求項26之方法,其進一步包括:將一第一對整流器 耦合在該第一對切換式電容器電路與該DC輸出信號之 間,以執行對該第一經位準轉才奐之交替波形之該整流; 及將-第二對整流器耦合在該第二對切換式電容器電路 與該DC輸出信號之間’以執行對該第二經位準轉換之交 替波形之該整流。 28.如請求項22之方法’其中該第一交替波形及該第二交替 波形各自包括未經反轉波與經反轉波之一交替週期序 列該帛x帛波形及該第二交替波形係相同但彼此 移90度。 29.如請求項28之方法 其中該第一交替波形及該第二交替 149927.doc 201117544 波形各自包括未經反轉升餘弦波與經反轉升餘弦波之— 交替週期序列。 30.如請求項29之方法,其中該第一經整流信號及該第二經 整流信號分別包括一餘弦波形及正弦波形。 3 1 _如請求項22之方法,其中選擇該第一交替波形及該第二 父替波形以使得在經整流及加性組合之後,該第一交替 波形及該第二交替波形之加性組合形成該DC輪出信號之 一恆定電壓位準,而不具有顯著波紋。 32.如請求項3丨之方法,其中在不具有一儲存電容器之情形 下產生該DC輸出信號之該恆定電壓位準。 3 3.如請求項22之方法,其中使用一旋轉ac發電機產生該第 一交替波形及該第二交替波形,該發電機具有相對於一 個或多個磁場處於相對旋轉運動中之一導線線圈。 149927.doc201117544 VII. Patent application scope: 1 _ A power supply device comprising: a waveform generator outputting a first waveform and a second waveform; a first rectifier bridge coupled to the first waveform, the first a rectifier bridge outputs a first rectified signal; a second rectifier bridge 'coupled to the second waveform 'the second rectifier bridge output - a second rectified signal; and a DC output signal, which is continuously added The first rectified signal is combined with the second rectified signal. 2. The power supply of claim 1, further comprising a one-bit conversion circuit interposed between the waveform generator and the first rectifier bridge and the second rectifier bridge, the level conversion signal outputting the first A level shifted version of a waveform and a level shifted version of the second waveform of s. 3. The power supply of claim 2, wherein the level conversion circuit comprises: a first transformer 'the output corresponding to the first output of the level shifted version of the first waveform; and a second A transformer having an output corresponding to the second output of the level shifted version of the second waveform. 4. The power supply of claim 3, wherein the first rectifier bridge comprises a first full wave rectifier, wherein the second rectifier bridge comprises a second full wave rectifier. 5. The power supply of claim 2, wherein the level conversion circuit comprises: - the first-to-switch capacitor circuit 'their output corresponding to the first shifted version of the J-waveform Output; / ^ ^ The second pair of switched-type electric grid circuit 'their output corresponds to the second output of the second turbid shape of the level 149927.doc 201117544 shifted version. 6. The power supply of claim 5, wherein the first rectifier bridge comprises a 'pair of rectifiers', the first pair of rectifiers are connected between the first pair of switched capacitor circuits and the DC output signal, and wherein The second rectifier bridge includes a second pair of rectifiers respectively connected between the first pair of switched capacitor circuits and the DC output signal, wherein the first pair and the second pair of diodes are Each of the cathodes is connected to the dc output signal. 7. As requested! The power supply unit, wherein the first waveform and the second waveform each comprise an alternating periodic sequence of one of the unreversed wave and the inverted wave, the second and second waveforms being the same but offset from each other by 90 degrees. 8. The power supply of claim 6, wherein the first waveform and the second waveform each comprise an alternating periodic sequence of one of the unreared raised cosine wave and the inverted raised cosine wave. 9. If the request item is a power supply, wherein the first waveform and the second waveform are selected such that after rectification and additive combination, the additive combination of the first waveform and the second waveform form a constant voltage of the D c output signal Level without significant ripples. 10. The power supply of claim 9, wherein the predetermined power/1 level of the DC output signal is generated without a load capacitor. η. The power supply of claim 1, wherein the first rectified signal and the first rectified signal comprise a cosine waveform and a sinusoidal waveform, respectively. 12) The power supply of claim 1, wherein the waveform generator comprises a rotating AC generator having one of the wire coils in a relative rotation with respect to one or more magnetic fields. 13. A power supply, comprising: a waveform generator that outputs a first waveform and a second waveform; a first transformer that receives the first waveform as an input; a second transformer Receiving the second waveform as an input; • a first rectifier bridge coupled to one of the outputs of the first transformer, the first rectifier bridge outputting a first rectified signal; a second rectifier bridge coupled to the One of the second transformer outputs, the second rectifier bridge outputs a second rectified signal; and a DC output signal 'which is formed by continuously additively combining the first rectified signal with the second rectified signal. 14. The power supply of claim 13, wherein the first waveform and the second waveform each comprise an alternating periodic sequence of unreversed raised cosine waves and inverted raised cosine waves, the first and second waveforms The waveforms are the same but offset by 90 degrees from each other. 15. The power supply of claim 14, wherein the first rectified signal and the first rectified signal comprise a cosine waveform and a sinusoidal waveform, respectively. The power supply of claim 13, further comprising obtaining a feedback signal from the DC output signal, the feedback signal being provided to the waveform generator. 1 7. The power supply of claim 3, wherein the waveform generator comprises a signal generator having an output signal coupled from 0 to a voltage controlled amplifier. 18. The power supply of claim 13, further comprising a first amplifier positioned to amplify the first periodic waveform prior to the first voltage press and 149927.doc 201117544 positioned prior to the second transformer Amplifying the second amplifier of one of the second periodic waveforms. 19. The power supply of claim 1, wherein the first amplifier and the second amplifier are transconductance amplifiers. 20. The power supply of claim 13, wherein the first transformer and the second transformer share a common core. 21. The power supply of claim 13, wherein the first rectifier bridge comprises a first set of four diodes full-wave rectifier, and wherein the second rectifier bridge comprises a second set of four One of the polar body full-wave rectifiers. 22. A method for power conversion, comprising: generating a first alternating waveform and a second alternating waveform; rectifying the first alternating waveform and the second alternating waveform by level conversion to respectively generate a first rectified a signal and a second rectified signal; and forming a DC output signal by continuously combining the first rectified signal and the second rectified signal. The method of claim 2, further comprising converting the first alternating waveform and the second alternating waveform to a boosted or stepped bit before rectifying the first alternating waveform and the second alternating waveform The exact steps. 24. The method of claim 23, wherein the step of converting the first alternating waveform and the second alternating waveform to the boosted or stepped-down level comprises receiving the first alternating at a first transformer And outputting an alternating waveform of a first level-converted waveform from the first transformer; and receiving the second alternating waveform at a second transformer and rotating from the second transformer--a second level-converted waveform . 149927.doc -4- 201117544 25. The method of claim 24, wherein the first alternating waveform of the level-converted and the second alternating waveform of the level-converted are rectified to generate the first rectified signal and The step of rectifying the second rectified signal includes: applying the first alternately converted alternating waveform to a first full-wave rectifier to generate the first rectified signal; and alternating the second level-converted alternating waveform Applying to a first full-wave rectification gain to generate the second rectified signal. 26. The method of claim 23, wherein the step of converting the first alternating waveform and the first parent waveform to the boosted or stepped down step comprises applying the first alternating waveform to a a first pair of switched capacitor circuits, the first pair of switched capacitor circuits outputting a first alternating waveform of the level conversion, and applying the second alternating waveform to a second pair of switched capacitor circuits, the second An alternate waveform of the second level-converted output is output to the switched capacitor circuit. 27. The method of claim 26, further comprising: coupling a first pair of rectifiers between the first pair of switched capacitor circuits and the DC output signal to perform the first level of turn The rectification of the alternating waveforms; and coupling a second pair of rectifiers between the second pair of switched capacitor circuits and the DC output signal to perform the rectification of the alternating waveforms for the second leveled conversion. 28. The method of claim 22, wherein the first alternating waveform and the second alternating waveform each comprise an alternating periodic sequence of one of an unreversed wave and an inverted wave and the second alternating waveform Same but shifted 90 degrees to each other. 29. The method of claim 28 wherein the first alternating waveform and the second alternating 149927.doc 201117544 waveform each comprise an alternating periodic sequence of unreversed raised cosine waves and inverted raised cosine waves. The method of claim 29, wherein the first rectified signal and the second rectified signal comprise a cosine waveform and a sinusoidal waveform, respectively. The method of claim 22, wherein the first alternating waveform and the second parent waveform are selected such that after the rectifying and additive combination, the additive combination of the first alternating waveform and the second alternating waveform A constant voltage level of one of the DC turn-off signals is formed without significant ripple. 32. The method of claim 3, wherein the constant voltage level of the DC output signal is generated without a storage capacitor. 3. The method of claim 22, wherein the first alternating waveform and the second alternating waveform are generated using a rotating ac generator having a wire coil in relative rotational motion relative to one or more magnetic fields . 149927.doc
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US10872640B2 (en) 2018-08-31 2020-12-22 Micron Technology, Inc. Capacitive voltage dividers coupled to voltage regulators
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US11335384B2 (en) 2018-08-31 2022-05-17 Micron Technology, Inc. Capacitive voltage dividers coupled to voltage regulators
US10911883B1 (en) 2019-10-23 2021-02-02 Beijing Xiaomi Mobile Software Co., Ltd. Stereo audio device of mobile terminal
EP3813257A1 (en) * 2019-10-23 2021-04-28 Beijing Xiaomi Mobile Software Co., Ltd. Stereo audio device of mobile terminal
TWI825533B (en) * 2021-01-05 2023-12-11 美商茂力科技股份有限公司 Trans-inductor voltage regulator

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