TW201114139A - Apparatus and method for quick output short protection at primary side in a quasi-resonance converter - Google Patents

Abstract

An apparatus for quick output short protection at primary side in a quasi-resonance converter detects the voltage valley on a power switch to determine whether the output of the quasi-resonance converter is short circuit. When the voltage valley is not detected for a delay time duration, the apparatus determines that the quasi-resonance converter suffers short circuit at output and asserts a fault signal to shutdown the quasi-resonance converter.

Description

201114139 VI. Description of the Invention: [Technical Field] The present invention relates to a semi-resonant converter, and more particularly to a fast output short-circuit protection device and method applied to the primary side of a semi-resonant converter. [Prior Art] Fig. 1 is a conventional semi-resonant flyback converter in which a transformer Ti has a primary side coil Lp connected between a power source Vin and a power switch S1, and a secondary side coil Ls connected to an output via a diode Do. The terminal v〇 and the auxiliary coil Laux are connected to the capacitor Caux via the diode Daux, and the optical coupler 12 monitors the output voltage V〇 to provide the feedback signal Vfb to the pulse width modulation (PWM) controller 10 The feedback terminal FB' and the PWM controller ι provide a control signal Vgs via the output Gate to switch the power switch s 1 to convert the input voltage Vin into an output voltage Vo, and the detected terminal vdet monitors the voltage on the auxiliary coil Laux Vaiix . When the output of the semi-resonant flyback converter is short-circuited, the transformer T1 will be saturated, which causes the power switch S1 to withstand very large current and voltage stresses. In the conventional PWM controller 10, the output voltage Vo is not directly detected from the secondary side. F knows that the short A secret system is achieved by wire protection or feedback open protection. However, these methods require a long anti-spike time to avoid errors during load transients. trigger. 2 is a conventional output short circuit protection circuit including a comparator and a delay circuit 16. The comparator 14 compares the feedback signal vfb with the reference voltage to generate a comparison signal Sc to the delay circuit 16. When the 201114139 output terminal Vo of the semi-resonant flyback converter is short-circuited, the feedback signal Vfb rises, and when the feedback signal Vfb is greater than the reference voltage Vref, the comparator 14 outputs the high-level comparison signal Sc. Since the feedback signal Vfb may also be larger than the reference signal during the load transient

Therefore, in order to avoid false triggering, the delay circuit 16 only has a feedback signal.

Vfb continues to be greater than the reference voltage Vref - the fault signal is triggered after a period of time

Fault to turn off the PWM controller 1〇. This delay exceeds 3 milliseconds (ms), which not only causes the output short-circuit protection to slow down, but also causes more power to fail. Therefore, a fast output short circuit protection device and method are the key points. SUMMARY OF THE INVENTION One object of the present invention is to provide a fast output short circuit protection device and method. One of the objects of the present invention is to provide a fast output short circuit protection device and method applied to the primary side of a semi-resonant converter. According to the present invention, a fast output short-circuit protection device that is thin on the H-th power side of the semi-resonant conversion includes a valley value of a valley gamma-detector-power switch to generate a valley signal, and an output short-circuit judging circuit The fault signal is sent when the valley signal is not received for a delay time. According to the present invention, the fast output short-circuit protection method applied to the semi-resonant conversion II-sub-side includes a New Valley value on the _ God switch and a fault signal is sent when the voltage valley value is not detected for a lapse of a delay time. . The present invention achieves output short circuit protection by the voltage valley on the side switch. When the semi-resonant converter is in load transient, the voltage of 201114139 on the power switch is not affected, so there is no need to set a long delay time to avoid false triggering due to load transient, so the semi-resonant converter occurs. Quick response when the output is shorted. [Embodiment] FIG. 3 is a waveform diagram of a semi-resonant flyback converter of FIG. 1 operating in a discontinuous current mode (DCM), wherein waveform 2 is a voltage vds on the power switch S1, and waveform 22 is The control signal Vgs, the waveform 24 is the voltage Vaux on the auxiliary coil Laux, the waveform 26 is the current Ids passing through the power switch S1, and the waveform 28 is the current Ij) through the diode Do. Referring to FIGS. 1 and 3, during time t1 to t2, as shown by waveform 22, the control signal Vgs is at a high level and turns on the power switch si' so that the voltage Vds on the power switch S1 is 0'. The current ids of switch S1 rises as shown by waveforms 20 and 26. Assuming that the turns ratio between the primary side coil Lp, the secondary side coil Ls, and the auxiliary coil Laux of the transformer T1 is Np : Ns : Naux, the voltage on the auxiliary coil Laux during this period can be obtained.

Vaux = _VinxNaux/Np. Equation 1 At time t2, the control signal Vgs turns to the low level and turns off (^Posing the power switch S1 'At this time, the current Ids becomes 0' and the current I_Do is generated on the secondary side coil ls through the diode Do ' At the same time, the voltage formula 2 on the auxiliary coil Laux

Vaux = (Vo+Vf)xNaux/Ns» 201114139 " Forward bias of body D〇. When the current I Do drops to.睥 As shown by time β, when the power is on the power switch S1, the sense Lrn and the discrete capacitor c are indicated by the excitation power. The sine wave is excited, such as the waveform 20. Figure 4 illustrates the fast-output output short-circuit protection method of the present day and month, which is the output voltage V. Waveform 32 is the magnetic induction current LLm, waveform; 4=

==Valley signal S, 38 is the fault signal: Then the stomach map 1 is co-sewn-back type. In normal operation, the voltage Vds on the power switch si has a sine wave oscillation, because

The valley of Vds is obtained as a valley signal such as wave (4). In the = semi-resonance screaming, the output is scaled, and the light % is changed to 0' as shown by waveform 30. Due to the reset voltage of transformer T1

Vro * Np/Nsx(V〇+Vf)»

Therefore, when the semi-coupling transition is short, the reset voltage W will also become very small, almost Q, which causes the magnetic induction current I_Lm to not be reset to 〇' as shown by waveform 32. That is to say, when the semi-resonant flyback machine generates a transmission (four) _, the semi-resonant flyback converter will enter the continuous current mode (C〇ntinuous Currem M〇de; CCM). It can be seen from the waveform 34 of FIG. 4 that after the output short circuit occurs in the semi-resonant surface type, the voltage Vds on the power switch S1 no longer generates the sine wave vibration, so the valley value of the voltage Ws cannot be measured, and this phenomenon can be Achieve output short 201114139 road protection. As shown by waveform 38, when the valley of voltage Vds is not detected for a delay time Tfauit, the fault signal Fauu is sent to turn off the PWM controller 1〇, and the delay time Tfault can be several cycles of the control signal Vgs.

Figure 5 is a fast output short circuit protection device of the present invention comprising a bottom value detector 4A and an output short circuit determination circuit 42. The valley detector 4 is the valley of the voltage Vds on the power switch S1. There are many methods for the valley value of the side voltage Vds. In this embodiment, the valley value of the electric dust Vds is determined by detecting the voltage Va^ on the auxiliary coil Laux, thereby generating the grain health number. The technique of the valley of the voltage Vaux on the side auxiliary coil Laux is quite mature, so the detailed circuit of the valley detector 4〇 will not be described here. The output short circuit judging circuit uses the control signal Vgs to calculate the time. When the number is in the middle of the period and the period of the period is (4), when the value is Sva, the power-off circuit U determines that the semi-coupling type is the output of the hoof, and the signal F is sent to close the controller 10. In this embodiment, the output short circuit judging circuit 42 includes four flip-flops 44, 46, 48, and 50 connected in series. The first-stage flip-flop 44 has a data terminal m, a clock receiving control signal, a clearing terminal C1 receiving a valley signal Sva, a positive phase output terminal Q1, and an inverting output terminal_==m. The stage flip-flop 46 has a data terminal, a clock terminal _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ The third-stage flip-flop 48 has a data terminal D3, the clock terminal dk3 is connected to the previous one, the inverting output terminal QN2 of the flip-flop 46, the clear terminal C3 receives the valley signal positive phase output terminal Q3, and the inverting output terminal QN3 is connected. Data terminal D3. The most 201114139 post-stage flip-flop 50 has the data terminal D4, the inverting output terminal of the clock-end d-reactor 48 〇1^3, the home team interface, and the positive n ^ division (10) the sturdy number Sva, the positive phase The output terminal Q4 and the inverting output terminal _ are connected to the data terminal w. 6 illustrates the operation of the output short circuit determination circuit 42 of FIG. 5, where 6〇 is the control signal Vgs, and the waveform 62 A τ c «« 1 < + is Μ on the inversion wheel terminal QN1 of s 4 , and the waveform 64 is The inverting output of the flip-flop 46 is _ the number of the wave is the inverting output of the flip-flop 48. 68 is the fault signal. See Figure W where the flip-flops ^ 48 and %t are in the initial state. The logic states of the phase output terminals Φ, Q2, Q3 and Q4 are "〇", while the inverting output terminals, QN2, QN3 and QN4 =; ΓΤ,. Assume that at time t5, the semi-common _ valley (four) detector 4G thus no longer sends out the valley signal ^ to > month division (four), (3) port and to reset the flip-flop (four) (four) and the time has elapsed 'control signal Vgs low The level is changed to a high level, as the waveform 6 is not, so the logic of the inverting output _ of the flip-flop 44 can be represented by "仏" G, as shown by the wave (4). At time t6; the bit transitions to a high level, causing the inverted output of the flip-flop 44 to change from "〇" to Τ' so that the state of the inverted output terminal QN2 of the flip-flop 46 is changed from τ ", as shown by the wave. At time ρ, the logic on the inversion wheel end qn1 of the anti-theft 44 is again changed to "1", so that the inverting output terminal QN2 of the flip-flop 46 The logic on the upper side is 2 = '', so the logic on the inverting wheel end QN3 of the flip-flop 48 changes from 1 to "〇" as shown by waveform 66. At time t8, the state of the surface on the inverting terminal QN2 of the positive and negative sign 46 is again changed from,,,,, to, 卞, 201114139 The logic state on the inverting output terminal QN3 of the flip-flop 48 is, 〇,, becomes "j", so the logic state of the fault signal Fault changes from ", 0," to "1", as shown by waveform 68. Referring to Figure 6, in this embodiment, the fast output short circuit protection device The time Tfault of the output short-circuit to the short-circuit signal fault is the seven cycles of the control signal Vgs, which is only about 1〇〇jis, which is much smaller than the reaction time of the conventional output short-circuit protection circuit (3〇ms or more). Therefore, the wheel short circuit protection device of the present invention can react more quickly in the event of an output short circuit to avoid generating a very large stress on the power switch S1, and when the semi-resonant flyback converter is in hiccup protection Power loss can also be reduced in mode. The number of flip-flops in the output short circuit judging circuit 42 can be increased or decreased as required, thereby changing the length of the time Tfault. The above description of the preferred embodiments of the present invention is intended to be illustrative, and is not intended to limit the scope of the invention to the disclosed embodiments. It is possible to make modifications or variations based on the above teachings or learning from the embodiments of the present invention. The embodiment is an explanation of the present invention. The general idea of the present invention is based on various embodiments of the invention. The technical idea of the present invention is intended to be the scope of the following patent application and its equalization. To decide. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a conventional semi-resonant flyback converter; FIG. 2 is a conventional output short circuit protection circuit; FIG. 3 is a waveform of a semi-resonant jump converter operated by Sun Figure 1 at dcm Figure 9, 9 201114139 Figure 4 illustrates the fast output short circuit protection method of the present invention; Figure 5 is a fast output short circuit protection device of the present invention; and Figure 6 illustrates the operation of the output short circuit determination circuit of Figure 5. [Main component symbol description]

10 PWM controller 12 optical shank 14 comparator 16 delay circuit 20 voltage Vds waveform 22 control signal Vgs waveform 24 voltage Vaux waveform 26 current Ids waveform 28 current I_Do waveform 30 output voltage Vo waveform 32 magnetic induction current Waveform of I_Lm 34 Waveform of voltage Vds 36 Waveform of wave trough S S wave 38 Waveform of fault signal Fault 40 Valley detector 42 Output short circuit judgment circuit 44 Forward and reverse device 46 Forward and reverse device 48 Forward and reverse device 201114139 50 Forward and reverse device 60 Control signal Vgs waveform 62 Inverting output QN1 signal waveform 64 Inverting output QN2 signal waveform 66 Inverting output QN3 signal waveform 68 Fault signal Fault waveform

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Claims (1)

201114139 The patent application scope is applied to the fast output short-circuit proof spectrum of the primary side of the semi-resonant converter. The semi-resonant converter includes a power switch controlled by a control signal. ^ The fast output short-circuit protection device includes: ' μ valley value The detector is connected to the power switch to detect a voltage valley value on the power switch to generate a valley signal; and an output short circuit determining circuit is connected to the valley detector, and the valley signal is not received for a delay time When the fault signal is sent. 2. The fast output short circuit protection device of claim 1, wherein the delay period comprises a number of cycles of the control signal. 3. The fast output short circuit protection device of claim 2, wherein the output short circuit breaker comprises a plurality of serially connected flip-flops, each of the flip-flops having a positive phase output terminal: an inverting output terminal, and a data terminal connection The inverting output end and the clearing end are configured to receive the bottom value signal, and the clock end is configured to receive the control signal or connect to the inverting output end of the primary and secondary flip-flops, and the fault signal is formed by the positive phase of the plurality of positive and final stages The output is provided. . 4. Strictly, the fast output short circuit protection side of the primary side of the semi-resonant converter quickly includes the power switch switched by a control signal, and the method of the short output protection of the speed output includes the following steps: detecting the voltage valley value on the power switch; And when the valley value is not detected during the continuous-segment delay time, the fault signal is sent. . 5. A fast output short circuit protection method, wherein the delay time comprises a number of cycles of the control signal. Your door 匕 12