TW201105047A - Encoder, decoder and access system with Reed-Solomon error correction mechanism - Google Patents
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201105047 六、發明說明: 【發明所屬之技術領域】 本發明是有關於一種存取技術,特別是指一種具有李 德所羅門(RS,Reed-Solomon)糾錯機制的編碼器、解碼器及 存取系統。 【先前技術】 隨著電腦應用的發展,為了高速存取龐大的資料量, 現有處理器平行化地將資料分散給數顆磁碟同時處理,以 縮短等待存取的時間。而這樣的多磁碟組合,即為「磁碟 陣列(RAID,Redundant Array of Independent Disks)」。 參閱圖1,習知一種RAID架構8包含一控制器81和 m個磁碟82。當處理器9發出(m-Ι)筆資料,控制器81會 將每一資料寫到其中一個磁碟82,並且會根據同位檢測 (parity check)方式計算出對應這些資料的一檢驗資訊,以寫 到剩下的那一個磁碟82。 等到處理器9要取回這(m-Ι)筆資料時,控制器81才又 讀出存放在該等磁碟82的資料與檢驗資訊,並經過適當的 互斥或(XOR)邏輯判斷來還原,使逼近原先處理器9發出的 (m-Ι)筆資料。但是,同位檢測的錯誤更正能力不佳,在多 顆磁碟82失效時無法做有效還原。 而習知另一種RAID架構則是選用Even-Odd碼來加強 錯誤更正能力,其必須在一完整矩陣的基礎上來編解碼, 且矩陣大小會隨著磁碟數量的平方遽增。因而,這個架構 的暫存(buffer)空間需求大,延遲(latency)時間也長,反倒忽 201105047 略了高速系統強調的即時性a 此外,在這些資料與檢驗資訊存到該等磁碟82後,處 理器9可能會想要更改其中一筆資料。這時,控制器81不 僅需要從該等磁碟82讀出這些資料,還要結合該筆更改資 料來重新計算出一檢驗資訊,最後再將該筆更改資料和重 算的檢驗資訊填回到對應磁碟82。也就是所謂的零星更新 (smaU write),如果處理器9頻繁地要求零星更新,那麼 RAID架構8的存取速度勢必大打折扣。 【發明内容】 因此,本發明之目的’即在提供一種具有李德所羅門 (RS)糾錯機制的編碼器、解碼器及存取系統,可以在較小暫 存空間且較短延遲時間的前提下,實現高度的錯誤更正能 力並提升存取速度。 於疋’本發明具有李德所羅門(RS)糾錯機制的存取系统 ,適用於接收來自一資料處理器的一第一處理信號,該存 取糸統包含:一存取控制器,電連接一記憶模組,以讀寫 該記憶模組;-編碼器,根據該第—處理信號進行Μ編碼 ’來得到-已編碼碼字1供該錄控㈣將該已編碼碼 子寫到該記憶模組;及-解碼器,接收-對應於該已編碼 碼字的待解碼碼字,且該待解科字是㈣ 該記憶模組所讀出,該解^會板據該待解碼碼字進行^ π編碼器㈣解碼,來得到-對應該第-處理信號的 第一處理㈣,以發送給該資料處理器。 201105047 而本發明具有李德所羅門(RS)糾錯機制的編媽器,適用 於接收-具有複數符元的第一處理信號且藉由一存取护 制器將-已編碼碼字寫到一記憶模組;該編竭工 工器’以及分別與該多^電連接的—碼字編碼單元和: 零星編碼單元,且該多工器會接收—顯示正常模式或零星 更新模x切模式命令;當該模式命令顯示正常模式,該多 工器會將該第-處理錢的其中k Μ送往㈣字編 兀,該碼字編碼單元會據以利用—生成多項式進行rs編碼 來產生該已編碼碼字,且該已編碼碼字會具有η符元,其 中(n-k)符元是相關於該k符元的檢驗資訊,每該 模式命令顯示零星更_式,該多工时將該第—處= 號的其中-符元送往該零星編碼單元,該零星編碼單元視 該其中-符元為一待更新符元’並據以零新更新該記憶模 組中相關於該符元的已編碼碼字;其中,該零星編碼單元 是促使該存取控制器從該記憶模組中,讀出該相關已編褐201105047 VI. Description of the Invention: [Technical Field] The present invention relates to an access technology, and more particularly to an encoder, decoder and access having an error correction mechanism of Reed-Solomon (RS) system. [Prior Art] With the development of computer applications, in order to access a large amount of data at a high speed, the existing processor parallelizes the data to several disks for simultaneous processing, thereby shortening the waiting time. Such a multi-disk combination is called "Redundant Array of Independent Disks" (RAID). Referring to Figure 1, a RAID architecture 8 includes a controller 81 and m disks 82. When the processor 9 issues (m-Ι) pen data, the controller 81 writes each data to one of the disks 82, and calculates a test information corresponding to the data according to the parity check method. Write to the remaining disk 82. When the processor 9 wants to retrieve the (m-Ι) pen data, the controller 81 reads the data and the inspection information stored in the disk 82 again, and performs appropriate mutual exclusion or (XOR) logic judgment. Restore to approximate (m-Ι) pen data sent by the original processor 9. However, the error correction of the parity detection is not good, and it cannot be effectively restored when multiple disks 82 fail. Another RAID architecture is to use the Even-Odd code to enhance the error correction capability. It must be coded on a complete matrix basis, and the matrix size will increase with the square of the number of disks. Therefore, the buffer space requirement of this architecture is large, and the latency time is also long. On the contrary, 201105047 ignores the immediacy of the high-speed system. In addition, after the data and inspection information are stored in the disk 82, Processor 9 may want to change one of the materials. At this time, the controller 81 not only needs to read the data from the disks 82, but also recalculates a test information in conjunction with the pen change data, and finally fills in the corresponding change information and the recalculated test information. Disk 82. Also known as smaU write, if processor 9 frequently requests sporadic updates, the access speed of RAID architecture 8 is bound to be greatly reduced. SUMMARY OF THE INVENTION Accordingly, it is an object of the present invention to provide an encoder, decoder and access system having a Reed Solomon (RS) error correction mechanism that can be used in a small temporary storage space with a short delay time. Underneath, achieve high error correction capabilities and increase access speed. The invention has an access system with a Lie Solomon (RS) error correction mechanism, which is adapted to receive a first processing signal from a data processor, the access system comprising: an access controller, an electrical connection a memory module for reading and writing the memory module; an encoder that performs Μ encoding according to the first processed signal to obtain an encoded codeword 1 for the recording control (4) writing the encoded code to the memory a module; and - a decoder, receiving - a codeword to be decoded corresponding to the encoded codeword, and the word to be solved is (4) read by the memory module, and the solution board is based on the codeword to be decoded The ^ π encoder (4) is decoded to obtain a first process (four) corresponding to the first processed signal for transmission to the data processor. 201105047 The present invention has a Ryder Solomon (RS) error correction mechanism, which is adapted to receive a first processed signal having a complex symbol and write the encoded codeword to an address by an access guard. a memory module; the editing engineer' and the codeword encoding unit and the sporadic encoding unit respectively connected to the multi-electrode, and the multiplexer receives - displays a normal mode or a sporadic update mode x-cut mode command When the mode command displays the normal mode, the multiplexer sends the k-th of the first processing money to the (four) word encoding, and the code word encoding unit uses the generating polynomial for rs encoding to generate the Encoding a codeword, and the encoded codeword will have an n-symbol, wherein the (nk) symbol is test information related to the k-symbol, and each mode command displays a sporadic _-type, and the multi-work time will be the first- Where the symbol of the number = is sent to the sporadic coding unit, the sporadic coding unit regards the symbol as a symbol to be updated and updates the memory module related to the symbol according to zero new update Coded codeword; wherein the sporadic coding unit is The access controller from the memory module is read out of the correlation Provision Brown
碼字的㈣檢驗資訊,並讀出對應該待更新符元的符元, 以根據這些讀出的符元來零星更新。 且本發明具有李德所羅mRS)糾錯機制的解碼器,適用 於接收來自-記憶模組的—待解碼碼字該待解碼竭字具 有多個符兀’且該記憶模組包括多個用以分別存放其中一 符元的儲存單元;該解碼器包括—多工器,以及分別電連 接該多工器的-未知錯更正單元與—已知錯更正單元並 且該多卫H會接收-顯示—般狀態或失效狀㈣磁碟狀態 訊息;當該磁碟狀態訊息顯示一般狀態,該多工器會將該 201105047 據RS解碼為二該未知錯更正單元,該未知錯更正單元根 進而利用生成多項式的每—個根值產生-癥狀信號, 到干卜2癥狀”㈣存放於哪—财單元的符元受 干擾並解碼出一且古夕An λ/* fr 磁碟狀態訊*顯1 元的第二處理信號;當該 送往 一 π㈣11,該多工11會將該待解碼碼字 廷在ό亥已知錯爭下留- 壯早兀,该已知錯更正單元會根據該磁碟 知哪—個或哪二個儲存單元失效,並根據以解 項式的每—個根值產生一録信號,進而利 狀4號解碼出該第二處理信號的該等符元。 【實施方式】 有關本發明之則述及其他技術内容、特點與功效,在 :下配合參考圖式之—個較佳實施例的詳細說明中,將可 清楚的呈現。 /閱圖2’本發明具有李德所羅門(rs)糾錯機制的存! 盘,100之較佳實施例適用於電連接在一資料處理器% 「、—包括η個儲存單元41的記憶模組4間,包含一編碼言 …解碼器2及·'存取控制器3。編碼器i和解碼器2〜 1連接到存取㈣器3,且存取控制器3會與記憶模組 接。較佳地,本例的記憶模組4是一磁碟陣列(議 模組,該等儲存單元41是指磁碟。 當資料處理器200 X 地 ^ 要傳入一第一處理信號到記憶模組4 時’編碼器1會先斜第_虚 了弟處理仏號進行RS編碼,再由存取 控制器3接收編碼後的—踽宝 便刃碼予(codeword),並將該碼字寫到 201105047 記憶模組4中。 而當資料處理器200要從記憶模組4取出 信號時,存取控制器3會先t 處理 ,具出記憶減4㈣對應碼字 再由解碼器2對該碼字進行匹配於編碼器^rs f 一第''處理信號,才送往資料處理器200。較佳地: 器2會使第二處理錢逼近於第-處理信號。 化的是’假若記憶模組4所包括的磁碟41因老 二:=因素而損壞,那麼存取控制器3讀出的碼字很 組Γ前,寫入的碼字。所以’本發明在填寫記憶模 雜訊处力\進仃^編碼’讓編碼後的碼字具有較佳的抗 …此&樣,再從記憶模組4讀出碼 Μ解碼來糾錯並盡量還原,以降低磁碟41損壞的=使用 紐^下來’進-步介紹本實施例的編碼器!和解碼器2。 當t閱圖3’編碼器1適用於接收來自資料處理器的 處判ΓΗ和一模式命令,這個模式命令會反映出資料 ㈢想要以「正常模式」或「零星更新㈣心細e) 、二」’來填寫記憶模組4。該編碼器1包括一多工器n 別與多工器11電連接的一碼字編碼單元12和一零星 發、.:几」3。且多工器11會基於模式命令,將第-處理信 &达< 碼子編碼單元12或零星編碼單元13。 理42器U得知模式命令為「正常模式」,會將第-處 ^號具有W符元(symbol)送往竭字編碼單元Η。接著, 201105047 編竭以—生成多項式g(x)來處理 n符元的已編碼碼字,n>k> 1。之 n個符元分別寫到記憶模組4包 瑪字編碼單元12根據Rs 這些符.元,而產生一具有 後,存取控制器3再將這 括的η個磁碟41中。 牛例來說’假設碼字編碼單元12所採用的rs編石馬具 有曰誤更正此力U1 ’那麼當第一處理信號具有符 元^、叫…^,已編碼碼字就會有^符元m 〇 i,且會分別存放到第Xg、Xi、X2 I個磁碟4ι。其^ C2 = ni2, 〇3 = Πΐ3 ..., Cn i=m ,工 W叫-1而4、4則是關於叫〜叫-丨的檢 驗貢訊。 再者,由於Rs編碼是相當絲的技術,且為本發明技 術領域具有通常知識者所熟知,故本文料加說明碼字編 碼單元12的組成與作動。 而田多工11得知模式命令為「零星更新模式」,會將 第一處理信號具有的—符元送往零星編碼單元13。並且 此時的模式命令還會通知是要更新存放在記憶模組4的哪 一碼字,且是要更新該碼字中哪一位置的符元。 參閱圖4’為方便說明,接下來擬在前述碼字編碼單元 12之範例的基礎下,說明零星編碼單S 和存取控制器3 的作動。 步驟71 :零星編碼單元13根據模式命令,得知 理器200想要更改哪-碼字的哪一位置符元(本例是指第二 位置,l<j<n),並促使存取控制器3從第χ〇、&、义個磁』 201105047 碟41中’讀出該碼字的已儲存符元r。、^、^。 ^主意’為區隔符元是否受到磁碟41干擾,本文是以 從磁碟41讀出的符元,其會對應於e_。例如 • Γ〇 對應 C()。 ㈣H星編碼單元13純_非零元素_並接收 4 一處理信號具有的-個符元,即··待更新符元 一-中非零7〇素α疋生成多項式g⑴的一根值而基於 丽述範例’可視該待更新符元mj,為ej,,㈣取代已儲存符 元rj。 步驟73:零星編碼單元13基於非零元素^第』位置 、更改前後的符元rj、Cj’,計算一第一檢驗偏差△。和一第二 檢驗偏差,如式(1)、(2)。The (four) test information of the codeword, and read the symbols corresponding to the symbols to be updated, to be sporadicly updated according to the symbols read. And the decoder having the error correction mechanism of the Reed Solo mRS) is adapted to receive the codeword to be decoded from the memory module, the word to be decoded has a plurality of symbols ′ and the memory module includes multiple a storage unit for respectively storing one of the symbols; the decoder includes a multiplexer, and an -uncorrecting correction unit and a known error correction unit respectively electrically connected to the multiplexer and the multi-homing H will receive - Displaying the general state or the invalid state (4) disk state message; when the disk state message shows the general state, the multiplexer decodes the 201105047 according to the RS into two unknown error correction units, and the unknown correction unit root utilizes Each root value of the generated polynomial produces a - symptom signal, to the symptoms of the dry 2 2" (4) where the symbol is stored - the symbol of the financial unit is disturbed and decoded, and the ancient cels An λ / * fr disk status message * display 1 The second processing signal of the element; when sent to a π(four)11, the multiplex 11 will leave the codeword to be decoded under the known misunderstanding of the ό海, the early error 单元, the known error correction unit will be based on the magnetic Disc know which one or two storage units are invalid, And generating a record signal according to each root value of the solution term, and then decoding the symbols of the second processed signal by the fourth shape. [Embodiment] The present invention relates to other technical contents, The features and functions will be clearly shown in the detailed description of a preferred embodiment with reference to the following drawings. / Figure 2' The present invention has the operation of the Lie Solomon (rs) error correction mechanism! The preferred embodiment of the present invention is adapted to be electrically connected between a data processor %, a memory module 4 including n storage units 41, and an encoder (decoder 2) and an access controller 3. The encoder i and the decoder 2~1 are connected to the access (4) device 3, and the access controller 3 is connected to the memory module. Preferably, the memory module 4 of the present example is a disk array (the negotiation module) The storage unit 41 refers to the disk. When the data processor 200 X is to pass a first processing signal to the memory module 4, the encoder 1 will first slant the first _ virtual brother to process the nickname for RS Encoding, and then the encoded controller 3 receives the encoded codeword and writes the codeword. 201105047 Memory module 4. When the data processor 200 wants to take out the signal from the memory module 4, the access controller 3 will first process t, with the memory minus 4 (four) corresponding codeword and then the decoder 2 for the codeword The matching signal is matched to the encoder ^rs f and sent to the data processor 200. Preferably, the device 2 causes the second processing money to be approximated to the first processing signal. 4 The included disk 41 is damaged due to the second child: = factor, then the code word read by the access controller 3 is a group of code words written before. Therefore, the present invention fills in the memory mode noise. \进仃^Encoding 'Let the encoded codeword have better anti-...this & like, then read the codec decoding from the memory module 4 to correct the error and restore as much as possible to reduce the damage of the disk 41 = use The following is an introduction of the encoder! and decoder 2 of this embodiment. When reading Figure 3' Encoder 1 is suitable for receiving the judgment from the data processor and a mode command, this mode command will reflect the data (3) want to "normal mode" or "single update (four) heart e), two "To fill in the memory module 4." The encoder 1 includes a multiplexer n and a codeword encoding unit 12 electrically connected to the multiplexer 11, and a zero-spot, . And the multiplexer 11 will, based on the mode command, the first-processing letter &< code sub-coding unit 12 or sporadic encoding unit 13. The device U knows that the mode command is "normal mode", and sends the first -where ^ sign with a W symbol (symbol) to the exhaust code unit. Next, 201105047 compiles the encoded codeword of n symbols with the generator polynomial g(x), n>k> 1. The n symbols are written to the memory module 4, and the gram code unit 12 generates one of the flops 41 according to Rs, and then the access controller 3 re-encloses the n disks 41. For example, it is assumed that the rs-coded horse used by the code-word coding unit 12 has a delay to correct this force U1'. Then when the first processed signal has the symbol ^, called ...^, the encoded code word will have the ^ character The element m 〇i will be stored in the Xg, Xi, X2 I disks 4ι. Its ^ C2 = ni2, 〇 3 = Πΐ 3 ..., Cn i = m , work W is called -1 and 4, 4 is about the call to call ~ call - 贡. Moreover, since Rs coding is a fairly straightforward technique and is well known to those of ordinary skill in the art, the composition and operation of codeword coding unit 12 is described herein. When Tian Dugong 11 knows that the mode command is "single update mode", the symbol having the first processed signal is sent to the sporadic coding unit 13. And the mode command at this time also informs which codeword stored in the memory module 4 is to be updated, and which symbol in the codeword is to be updated. Referring to Fig. 4' for convenience of explanation, the operation of the sporadic code list S and the access controller 3 will be described next on the basis of the above example of the code word encoding unit 12. Step 71: The sporadic encoding unit 13 knows according to the mode command, which position symbol of the codeword is to be changed by the processor 200 (in this example, refers to the second position, l<j<n), and causes access control The device 3 reads the stored symbol r of the code word from the third, &, a magnetic "201105047" 41. , ^, ^. The "idea" is whether or not the segment symbol is interfered by the disk 41. This is a symbol read from the disk 41, which corresponds to e_. For example • 对应 corresponds to C(). (4) The H-star coding unit 13 is pure _ non-zero element _ and receives 4 - a symbol of the processing signal, that is, a value to be updated - a non-zero 7 〇 疋 α 疋 疋 疋 疋 疋 g g g g g g The Liz's example 'can be used to view the to-be-updated symbol mj, which is ej, and (d) replaces the stored symbol rj. Step 73: The sporadic encoding unit 13 calculates a first check deviation Δ based on the non-zero element ^ position and the symbols rj, Cj' before and after the change. And a second test deviation, such as equations (1), (2).
Aj = (cy -ry. \aJ + a2j )a229 Δ〇 = (cj ~rj \aJ + (aj + a2j )a230) ⑴ (2) 睛注意,當Cj’取代rj後,檢驗資訊<=% + Δ。, c/q+士。這裡’不使用^CA+M〇y<A〇,是因為只能拿 存放在記憶模組4的符元α來參考。至於、、匀如何推導, 稍後會做說明。 步驟74:零星編碼單元13使&加上、,且使q加上 △1,來得到檢驗資訊的更新值Cq,、Ci,。 步驟75:存取控制器3將c〇,、Ci,與Cj,填寫到對應磁 碟41 ’以分別更新Γ()、Γι與,來實現零星更新。 201105047 因此,從以上流程可看出:本實施例只要從記憶模組4 申取出待更新符元mj,所相關碼字的符元Γ〇、Γι、 > &曰 j 就迠進 仃I星更新,明顯較習知減少許多存取動作。 而步驟73計算之檢驗偏差^、的推導方式如下, 首先,因為錯誤更正能力t=1,所以存在二個非零元素“、 Θ使生成多項式g(x)等於〇 ,也使一碼字多項式匸㈤等 於〇 ’ J'這個碼字多項紅W的係數能反映已編碼石馬字 的符元c〇〜值(如式(3)、(4))。倘若進一步分離其中 的 c0、Cl ' Cj,可得式(5)、(6)。 c(a)=J>‘ai=〇 |=0φ2)=%α2ί=〇 £=0 (3)(4) 卜1 c0a +clQr =Cj^+ i=2,i 关 y c〇oru + cxaL = Cja2j + ^2« i=2Mj (5)(6)Aj = (cy -ry. \aJ + a2j )a229 Δ〇= (cj ~rj \aJ + (aj + a2j )a230) (1) (2) Note that when Cj' replaces rj, the test information <=% + Δ. , c/q+士. Here, '^CA+M〇y<A〇 is not used because it can only be referred to by the symbol α stored in the memory module 4. As for how to derive and even, we will explain later. Step 74: The sporadic encoding unit 13 adds & and adds q to Δ1 to obtain updated values Cq, Ci of the inspection information. Step 75: The access controller 3 fills in the corresponding disks 41' by c〇,, Ci, and Cj to update Γ(), Γι, respectively, to implement sporadic update. 201105047 Therefore, it can be seen from the above process that in this embodiment, as long as the symbol mj to be updated is retrieved from the memory module 4, the symbols Γ〇, Γι, >& Star updates significantly reduce many access actions than conventional. The derivation of the test deviation ^, calculated in step 73 is as follows. First, because the error correction ability t=1, there are two non-zero elements ", so that the generator polynomial g(x) is equal to 〇, and a codeword polynomial is also made.匸 (5) is equal to 〇 'J' This code word multiple red W coefficient can reflect the symbol of the encoded stone horse c〇 ~ value (such as formula (3), (4)). If further separation of c0, Cl ' Cj, available equations (5), (6). c(a)=J>'ai=〇|=0φ2)=%α2ί=〇£=0 (3)(4) Bu 1 c0a +clQr =Cj^ + i=2,i off yc〇oru + cxaL = Cja2j + ^2« i=2Mj (5)(6)
接著,將Cj更新成Cj,= r , Λ al ^ 7且對應地更S 〜’則可改寫式(5)、⑹如下:(…。㈣+△仏匕 (V。)以+他如·^ ί=2,iV j c〇’=r〇+厶。、 ⑺⑻ 10 201105047 ‘然後,從式(7)扣掉式(5) ’從式(8)扣掉式(6)’可整理出: • △〆 + △〆=△〆 (9) △〇〇r0+ △〆=△〆 (10) 之後,在△广Cj’-rj、α、α2與j都為已知的基礎下,可以解 聯立方程式來獲取△〇、Δ1 :Then, Cj is updated to Cj, = r , Λ al ^ 7 and correspondingly S 〜 ', then the equations (5) and (6) can be rewritten as follows: (.... (4) + △ 仏匕 (V.) to + he as ^ ί=2,iV jc〇'=r〇+厶., (7)(8) 10 201105047 'Then, the formula (7) is deducted (5) 'from the formula (8) deducted (6)' can be sorted out: • △〆+ △〆=△〆(9) △〇〇r0+ △〆=△〆(10) After the △G Cj'-rj, α, α2 and j are known, the equation can be solved. To get △ 〇, Δ1 :
a2j]oc 01) (12) 最後,基於所有運算都是建立在加洛瓦體GF(2y)=GF(28)的 基礎上,就可以推導出如式(1)和式(2)的△〇、△!。其中 ,y代表每一符元所具有的位元數目,且本例較佳地是 取 y=8 〇A2j]oc 01) (12) Finally, based on the fact that all operations are based on Galois GF(2y)=GF(28), we can derive △ as in equations (1) and (2). 〇, △!. Where y represents the number of bits each symbol has, and in this case it is preferably y=8 〇
值得注意的是,在該等磁碟41的運作過程中,其實損 壞機率極小,也就是今钱山认 疋况"貝出的r〇、ri、rj基本上會等同於先 前寫入的C〇It is worth noting that during the operation of these disks 41, the probability of damage is extremely small, that is, today's Qianshan recognizes that the r〇, ri, rj of the shell are basically equivalent to the previously written C. 〇
Cj ’而符合式(3)和(4)的要求。所以,本 實施例能精由一已儲在级—a 嗜存碼予中的少數符元,就能實現檢驗 資訊的更新’明顯優於習知技術。 解碼器 參閱圖5,解碼5| 9 35 2適用於透過該存取控制器3接收一 具有π符元r〇〜的灶 •待解碼碼字,並根據RS解碼來轉換成 201105047 具有k符元的該第二處理信號。•這個待解碼碼 子是從記憶模組4讀出,所以可視為受到該等磁碟 變 後的碼字。 ^曰 解碼器2更適用於接收一磁碟狀態訊息,包括一多工 ,以及分別電連接該多工器21的_未知錯&叫更正 單元22與一已知錯(erasure)更正單元23。 熟知本技藝者都知道,未知錯的定義是:還不知道存 放於哪—磁碟41的符元發生錯誤,通常指因磁碟41的某 些磁區或磁軌受損,所造成的資料錯誤。已知錯則是已經 =道存放於哪-磁碟41的符元發生錯誤,例如無法從一特 定的「失效」磁碟41讀出資料。 所以,當磁碟狀態訊息顯示「一般」狀態,多工器21 會將待解碼碼字送往未知錯更正單元22。#磁碟狀態訊息 顯不「失效」狀態’多卫器21會將待解碼碼字送往已知錯 更正單元23。 曰 在詳細說明各更正單A 22、23前,本例進—步定義幾 種多項式來表示碼宇的符元内容: 馬子夕項式C(x):編碼器j產生的「已編碼碼字」; 擾; 干擾多項式e(x):該等磁碟41對「已編碼碼字」的干 字」。 接收多項式R(x) : R(x)=c⑴+e⑴,能反映「待解碼竭 12 201105047 如果解竭器2具有匹配的錯誤更正能力 錯更正單兀22最多可以更正t=l個未知錯 更正單元23最多可以更正2t=2個已知錯。 t=l ’代表未知 也代表已知錯 由於α、α2是碼字多項式cW = k的根,所以當 於第 xu 磁碟 41 M /=0 砰41的付兀發生錯誤(error),〇$„<„,未知笋 更正單元22使: 曰Cj' meets the requirements of equations (3) and (4). Therefore, the present embodiment can achieve an update of the inspection information by a few symbols that have been stored in the level-a memory code, which is significantly better than the conventional technique. Decoder Referring to FIG. 5, the decoding 5|9 35 2 is adapted to receive a focus code to be decoded by the access controller 3 having a π symbol r〇~, and convert it into 201105047 with a k symbol according to the RS decoding. The second processed signal. • This code to be decoded is read from the memory module 4, so it can be regarded as a code word changed by the disk. The 曰 decoder 2 is more suitable for receiving a disk state message, including a multiplex, and an _unknown error & correcting unit 22 and an erasure correction unit 23 electrically connected to the multiplexer 21, respectively. . It is well known to those skilled in the art that the definition of an unknown is that it is not known where it is stored - the error of the disk 41 is an error, usually refers to the data caused by the damage of some magnetic regions or tracks of the disk 41. error. The known error is that where the track is stored - the disk 41 has an error, such as the inability to read data from a particular "failed" disk 41. Therefore, when the disk status message shows a "normal" state, the multiplexer 21 sends the codeword to be decoded to the error correction unit 22. #Disk status message No "failed" status. The multi-guard 21 sends the codeword to be decoded to the known error correction unit 23.前 Before describing each correction list A 22, 23 in detail, this example further defines several polynomials to represent the symbol content of the code: Ma Zi Xi Xiang C(x): Encoded codeword generated by encoder j Interference polynomial e(x): the dry words of the "encoded codewords" of the disks 41. Receive polynomial R(x): R(x)=c(1)+e(1), which can reflect “to be decoded 12 201105047 If the destructor 2 has a matching error correction capability error correction single 兀 22 can correct more t=l unknown corrections Unit 23 can correct up to 2t=2 known errors at most. t=l ' represents unknown and also represents known error. Since α and α2 are the roots of the codeword polynomial cW = k, so on the xu disk 41 M /=0砰41's payment error (error), 〇$„<„, unknown bamboo shooter correction unit 22 makes: 曰
第癥狀信號為+ = ;及 第一癥狀仏號為 S2=/?(a2)=0+e(or2)=eu.a2tt = y .X 2。 ’、 仪代表存放在第xu個磁碟41的符元受到干擾 且干擾大小〜可表示為Yu。因此,可輕易求出 ’ κ%。 ' ^未知錯更正單元22會根據符元ru,解碼出該第 處理L號的帛du=ru+Yu,並令其他符元為 。〜,w=2 3,,㈣但w如。 單元 當磁碟狀態訊息顯示「失效」,磁碟狀態訊息還會通知 已知錯更正單元23 :哪—個或哪二個磁碟41發生損壞而失 致,即通知:最多二個發生已知錯的位置Xu=y、Χργ, 〇a<w且Mv<w。假設位置Xu的干擾值為Yu,位置Xv的 干擾值為Yv,那麼已知錯更正單元23會將癥狀信號Si、& 表示如下: 13 201105047The first symptom signal is + = ; and the first symptom nickname is S2=/?(a2)=0+e(or2)=eu.a2tt = y .X 2 . The instrument represents that the symbol stored in the xuth disk 41 is disturbed and the interference size ~ can be expressed as Yu. Therefore, 'κ% can be easily obtained. The 'unknown error correction unit 22 decodes the 帛du=ru+Yu of the first processed L number according to the symbol ru, and causes other symbols to be . ~, w=2 3,, (4) but w as. When the disk status message shows "Fail", the disk status message will also notify the known error correction unit 23: Which one or two disks 41 are damaged and lost, that is, the notification: up to two occurrences are known. The wrong position is Xu=y, Χργ, 〇a<w and Mv<w. Assuming that the interference value of the position Xu is Yu and the interference value of the position Xv is Yv, then the known error correction unit 23 will express the symptom signals Si, & as follows: 13 201105047
si=Yu^u-hrv.aV (13) (14) 對式(13)和(14)_Si=Yu^u-hrv.aV (13) (14) For equations (13) and (14)_
^式,可求得干擾值H OS) (16) 然後,已知錯更足留一 處理信號的第"元Γ23便根據符元ru解碼出該第二 二處理信號的第¥符广’並根據符元…出該第^, can obtain the interference value H OS) (16) Then, the known error is more than a left to process a signal of the "quote" 23 will be decoded according to the symbol ru the second two processing signal of the first symbol And according to the symbol...
H Q 70 dv=rv+Yv,且令其他(k-2)符元 A dw=rw,W=2,3,...,(n-1)但 W9tu,v。 )符7"為 值传 >主意的是,戈3 ,右疋磁碟狀態訊息只通知一個發生已 知錯的位置Xu,那麼已 個發生已 入_Λ 蹄旯正早兀23可以令Υν=〇,且 二’就能以上述方式得到第二處理信號具有的k符元 ,但:二錯誤更正能力t=i為例來進行說明 接井可以選用其他具有較大值的卜來 麩升存取糸統100的錯誤更正能力。 方4 J來說’ § t=2時,碼字編碼單元12可依習知編碼 :’將第-處理信號的k=(n_4)符元編碼成具有n個符元 、’扁碼碼子,域碼字的其中2t=4個符元為檢驗資訊。 14 201105047 而令星編碼單元13能 .^ b根據2t=4個非零元素,循類似前述對 步驟73的說明,而在 _ 令生更新付元時,也更新該2t=4個格 驗資訊。 现H Q 70 dv=rv+Yv, and let other (k-2) symbols A dw=rw, W=2,3,...,(n-1) but W9tu,v. ) 7" For Value> The idea is that Ge 3, right-hand disk status message only informs a location where a known error occurs, then the occurrence has been entered _ Λ 旯 旯 is early 23 can make Υ ν =〇, and two' can get the k-symbol of the second processed signal in the above manner, but: the second error correction ability t=i is used as an example to illustrate that other well-valued Bulai liters can be selected for the well. Access to the error correction capability of the system 100. In the case of § t=2, the codeword encoding unit 12 can encode according to the conventional code: ' encode the k=(n_4) symbol of the first processed signal into n symbols, 'flat code code 2t=4 symbols of the domain codeword are test information. 14 201105047 The star coding unit 13 can ^b = 4 t=4 non-zero elements, follow the description of step 73 as described above, and update the 2t=4 pieces of information when the _ is updated. . Now
另方面,未知錯更正單元22則會基於該4個非零元 、生4個癥狀#號’並據以求出哪2個位置的符元受到 干擾’且干擾值為何。而已知錯更正單元23會就受到干擾 、個已知位置,產生相關於該等非零元素的4個瘛狀信 號’進而解聯立方程式得到各位置的干擾值。 ° 同理,可類推得其他具有較大t值的情形。 : 相較於$知採用矩陣式的Even-Odd編碼,本例 、,扁碼器1疋採用RS編碼方式來處理—列資料(即k個符元) ,所以碼字編碼單元12和零星編碼單元13所需使用到的 暫存空間並不多,當岐遲時間也不長。相對地,解褐器2 也存在同樣的優勢。 值得注意的是,以上實施例中的編碼器丨和解碼器 可獨立出於本發明存取系統100。 从山供組氷貫現記憶模 ’記憶模組4也能是指一網路空間,例如 件(E-mail)空間。 RS編解碼的 15 201105047 星更新時,也只要從記憶模組4讀出檢驗資訊Γ〇、Γι與符元 ij,不會過度拖累存取速度,故確實能達成本發明之目的。 惟以上所述者,僅為本發明之較佳實施例而已,當不 能以此限定本發明實施之範圍,即大凡依本發明申請:利 範圍及發明說明内容所作之簡單的等效變化與修飾,皆仍 屬本發明專利涵蓋之範圍内。 【圖式簡單說明】 之實施例; 器; 星編碼單元和存On the other hand, the error correction unit 22 determines which of the two positions are disturbed based on the four non-zero elements and the four symptom ##'s, and the interference value. The known error correction unit 23 will be disturbed, a known position, and generate four 瘛-like signals associated with the non-zero elements, and then uncouple the equations to obtain the interference values of the respective positions. ° Similarly, other cases with larger t values can be analogized. Compared with the known Even-Odd encoding of the matrix, in this example, the flat coder 1 is processed by the RS encoding method—the column data (ie, k symbols), so the codeword encoding unit 12 and the sporadic encoding The temporary storage space required by unit 13 is not much, and the delay time is not long. In contrast, the browning device 2 also has the same advantages. It is to be noted that the encoder 解码 and decoder in the above embodiments can be independently accessed by the present invention. The memory module 4 can also be referred to as a network space, such as an e-mail space. When the RS code is updated, the inspection information Γ〇, Γι, and symbol ij are read from the memory module 4, and the access speed is not excessively dragged, so that the object of the present invention can be achieved. However, the above is only the preferred embodiment of the present invention, and the scope of the present invention is not limited thereto, that is, the simple equivalent changes and modifications made by the present invention in the scope of the invention and the description of the invention. All remain within the scope of the invention patent. [Simplified illustration of the embodiment]; device; star coding unit and memory
圖1是習知一種RAID架構的一方塊圖 圖2是一方塊圖,說明本發明存取系統 圖3是一方塊圖,說明本實施例的編碣 圖4是一流程圖,說明本實施例之零 取控制器的作動;及 圖5是一方塊圖,說明本實施例的解碼器1 is a block diagram of a conventional RAID architecture. FIG. 2 is a block diagram showing the access system of the present invention. FIG. 3 is a block diagram showing the editing of the embodiment. FIG. 4 is a flowchart illustrating the embodiment. The operation of the zero take controller; and FIG. 5 is a block diagram illustrating the decoder of the embodiment
16 201105047 【主要元件符號說明】 100… •…存取系統 71… …··得知更改哪一位 200… …·資料處理器 置符元的步驟 1…… 72 ……接收非零元素和 11 .… …多工器 待更新符元的步 12…… •---碼子編碼早元 驟 13… •…零星編碼單元 73…. .....§t算檢驗偏差的 2 ....... •…解碼器 步驟 21…… •…多工器 74.…. 22…… •…未知錯更正單元 步驟 23…… ….已知錯更正單元 75…·. …··填寫更新後之檢 3 ....... •…存取控制器 驗資訊和符元的 4…… •…記憶模組 步驟 41…… •…儲存單元16 201105047 [Description of main component symbols] 100... •...Access system 71.........·························································· .... ...the multiplexer to update the symbol step 12... •---code subcode early element 13... •... sporadic coding unit 73......... §t calculation test deviation 2 ... .... •...Decoder Step 21... •...Multiplexer 74..... 22... •...Unknown Error Correction Unit Step 23... .... Known Error Correction Unit 75...·. Post-check 3 ....... • Access controller information and symbols 4... • Memory module step 41... • Storage unit
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