201034383 55-TW 30501twf.doc/n 六、發明說明： 【發明所屬之技術領域】 本發明是有關於一種信號發送器，且特別是有關於一 種降低電磁干擾的信號發送器。 【先前技術】 近年來，電子產品的應用日益廣泛，需求日益增加， ... 〇 各種電子產品的電路設計越東越複雜。隨著電子設備為了 符合南性能及高反應度的要求，數位資料傳輸速度越來越 快’而電晶體電晶體邏輯(transistor-transistor logic，TTL) 訊號於印刷電路板（Printed circuit board，PCB )上傳輸的 頻率極限僅約為50MHz。在高速傳輸時，電晶體電晶體邏 輯訊號要達到全擺幅(Full swing)的上升時間(Rising time) 時間太長，因此無法用電晶體電晶體邏輯的方式去傳送訊 號。若要以更高的頻率來傳送訊號，可以將資料訊號轉換 ❹ 成差動小訊號的方式去傳送，差動小訊號所需的上升時間 較短’可以滿足高速傳輸的需求。 雖然差動小訊號可以減少轉態的時間以達到更快的操 作頻率’但在傳送的過程中往往都會遇到電磁干擾 (Electromagnetic Interference，EMI)的問題。電磁干擾主要 可分為輻射性(Radiated)與傳導性(Conducted)電磁干擾。輕 射性電磁干擾是直接經由開放空間傳遞，不須要經由任何 傳輸介質’故一般僅能以遮蔽(Shielding)、接地(Gr_ding) 等方式來解決。而傳導性EMI是經由電源導線來傳遞雜 201034383 >5-TW 30501twf.doc/n 訊。因此’連接在同-個系統的電子裝置所產生的電磁干 擾會經由電祕*彼此相互干擾，造成在雜訊號過程中 訊號判讀錯誤，使得產品輸出功能不正常，或是壽命因此 減短。 【發明内容】 本發明提供-種^號發送H及其操作^法’可降低信 ❹ 號傳輪時發生的電磁干擾。 ，發明提出-種信號發送器，包括第—開關、第二開 關、第二開關 '第四開關、第—受控缓衝單元以及第二受 控緩衝單元。第一開關的第一_接至第-電壓，而其第 -立而輕接至#號發送器之第—輸出端。第二開關的第一端 耗接，第-開關之第二端，而第二開關之第二端減至第 -¾壓。第三開關的第一端耦接至第一電壓，而第二端耦 5至k號發送器之第二輸出端。第四開關的第—端麵接至 —開關之第二端，而第四開關之第二端耦接至第二電 第文控緩衝單元接收第一資料信號而驅動第一開關 〃第四開關。第二受控緩衝單元接收第二資料信號而驅動 第開，與第三開關。其中，第一受控缓衝單元與第二受 緩衝單元依據控制彳§號而改變擺動速率rate)。 本發明提出一種如上述信號發送器的操作方法，包括 信號發送器操作於高頻環境中時，藉由該控 、使弟义控緩衝單元與第二受控缓衝單元增加其輸 的擺動速率。當信號發送器操作於低頻環境中時，藉由 5 201034383 55-TW 30501twf.doc/n 受控緩衝單元與第二受控缓衝單元降低 在本發明之一實施例中，上述之 括多個緩衝器以及一開關單元。這些緩=二=早疋包 成-缓衝器串，其中該些緩衝器不j互串聯而形 觀比。開關單元依據該控制信號之控制:選擇外 缓衝器中的其中一個緩衝器之輪出 ❹ 衝單元的輸出端。#文控緩 括第之第:上述之第—受控緩衝單元包 内部電晶體具有第一通道外觀比，其中該第:的 入端接收第-資料信號。第二緩衝器的輪 二通道外觀比(大於第一通道外觀)，：=::有第 入端耦接至第-緩衝器的輸出端，而第二緩輪 耦接至第一受控緩衝單元的輸出端。二出端 信號之控制而選擇性地將第一緩衝器二輸===制 缓衝器的輸出端。接至第一 基於上述’本發明藉由調整第一與第 ===贼罐送器啸出端因= 換&成電壓過衝(〇vershoot)及下衝(undersh〇〇t)所產生 壓突波，進而減低電磁干擾。 、 為讓本發明之上述特徵和優點能更明顯易懂，下 舉實施例，並配合所附圖式作詳細說明如下。 6 30501twf.doc/n 201034383 55-xw 【實施方式】 圖1是依照本發明-實施例說明信號發送器的電路示 意圖。請參照圖卜信號發送器觸的第一輪出端〇im 及第二輸出端OUT2叙接至負載刚。在此謹以負載ι〇4 所示2效電路表示信號發送器廳的下級電路(例如信號 接收器）以及信號傳輸通道(例如印刷電路板）。因此，負載 ❹201034383 55-TW 30501twf.doc/n VI. Description of the Invention: [Technical Field] The present invention relates to a signal transmitter, and more particularly to a signal transmitter for reducing electromagnetic interference. [Prior Art] In recent years, the application of electronic products has become increasingly widespread, and the demand is increasing. ... 电路 The circuit design of various electronic products is more and more complicated. As electronic devices meet the requirements of South performance and high responsiveness, digital data transmission speed is getting faster and faster, and transistor-transistor logic (TTL) signals are printed on printed circuit boards (PCBs). The frequency limit of the upper transmission is only about 50 MHz. At high speeds, the transistor logic signal must reach the full swing time (Rising time) for too long, so the transistor logic cannot be used to transmit the signal. In order to transmit signals at a higher frequency, the data signals can be converted into differential small signals for transmission. The shorter rise time required for the differential small signals can meet the requirements of high-speed transmission. Although the small differential signal can reduce the transition time to achieve a faster operating frequency', the problem of electromagnetic interference (EMI) is often encountered during transmission. Electromagnetic interference can be mainly divided into radiated (radiated) and conducted (conducted) electromagnetic interference. Light-emitting electromagnetic interference is transmitted directly through the open space, and does not need to be transmitted through any transmission medium, so it can only be solved by Shielding, Gr_ding or the like. Conductive EMI is transmitted via the power supply line. 201034383 >5-TW 30501twf.doc/n. Therefore, the electromagnetic interference generated by the electronic devices connected to the same system interferes with each other via the electric secret*, causing signal interpretation errors during the noise signal, which makes the output function of the product abnormal or the life is shortened. SUMMARY OF THE INVENTION The present invention provides a type H transmission H and its operation method to reduce electromagnetic interference occurring when the signal transmission wheel is transmitted. The invention proposes a signal transmitter comprising a first switch, a second switch, a second switch 'fourth switch, a first controlled buffer unit and a second controlled buffer unit. The first switch of the first switch is connected to the first voltage, and the first switch is connected to the first output of the ## transmitter. The first end of the second switch is consuming, the second end of the first switch, and the second end of the second switch is reduced to the -3⁄4 voltage. The first end of the third switch is coupled to the first voltage, and the second end is coupled to the second output of the transmitter of number k to k. The first end of the fourth switch is connected to the second end of the switch, and the second end of the fourth switch is coupled to the second electric text buffer unit to receive the first data signal to drive the first switch and the fourth switch . The second controlled buffer unit receives the second data signal to drive the first open and the third switch. The first controlled buffer unit and the second buffered unit change the swing rate rate according to the control number. The present invention provides a method for operating a signal transmitter as described above, comprising: when the signal transmitter operates in a high frequency environment, by using the control, the control buffer unit and the second controlled buffer unit increase the swing rate of the transmission. . When the signal transmitter operates in a low frequency environment, it is reduced by 5 201034383 55-TW 30501 twf.doc/n controlled buffer unit and second controlled buffer unit. In one embodiment of the present invention, the foregoing plurality A buffer and a switching unit. These buffer = two = early packet-buffer strings, wherein the buffers are not j-connected in series and form a ratio. The switching unit is controlled by the control signal: the output of the one-out buffer unit of one of the buffers is selected. #文控缓的第第第: The above-mentioned - controlled buffer unit package The internal transistor has a first channel appearance ratio, wherein the first: input receives the first-data signal. The second buffer appearance ratio of the second buffer (greater than the appearance of the first channel), :=:: the first input end is coupled to the output end of the first buffer, and the second slow wheel is coupled to the first controlled buffer The output of the unit. The output of the second output buffer selectively controls the output of the first buffer 2 === buffer. Connected to the first based on the above-mentioned 'by the invention by adjusting the first and the first === thief tanker screaming out = change & voltage overshoot (〇vershoot) and undershoot (undersh〇〇t) Pressure surges, which in turn reduce electromagnetic interference. The above described features and advantages of the present invention will be more apparent from the following description. 6 30501twf.doc/n 201034383 55-xw [Embodiment] FIG. 1 is a circuit diagram illustrating a signal transmitter in accordance with an embodiment of the present invention. Please refer to the first round of output 〇im and the second output end OUT2 touched by the diagram signal transmitter to connect to the load just. Here, the 2-way circuit shown in the load 〇4 indicates the lower-level circuits of the signal transmitter hall (such as signal receivers) and signal transmission channels (such as printed circuit boards). Therefore, the load ❹
104可以電阻R、電容C1及電容C2來表示信號傳輸通道 以及下級電路的等效電路。 一信號發送器100包括第一開關8霄卜第二開關812、 第三開關SW3、第四開關SW4、第—受控緩衝單元11〇 及第二受控緩衝單元120。開關SW1之第一端耦接第一電 壓VS1，其弟一端輕接至信號發送器的第一輸出端 OUT1。開關SW2之第一端耦接至開關SW1之第二端，其 弟一接至第一電壓VS2。開關SW3之第一端輕接電壓 VS1，其第一端耗接至信號發送器的第二輸出端 OUT2。開關SW4之第一端耦接至開關SW3之第二端，其 第二端耦接至電壓VS2。 上述第一電壓VS1與第二電壓VS2可以表示任意的 不同電壓準位。在本實施例中，電壓VS1可為系統電源的 電壓準位，電壓VS2可為接地電壓準位。上述開關 SW1〜SW4可以用任何方式實現之，例如用N通道金屬氡 化物半導體（N-channel metal oxide semiconductor，NMOS ) 電晶體來實現開關SW1〜SW4。 7 201034383,5-tw 30501twf.doc/n 第一受控缓衝單元110接收第一資料信號Dl而驅動 第一開關SW1與第四開關SW4。第二受控緩衝單元12〇 接收第二資料信號D2而驅動第二開關SW2與第三開關 SW3。其中’第一受控缓衝單元110與第二受控緩衝單元 120受控制信號之控制而可以動態地改變其輪出信號的擺 動速率(slew rate)。 圖2是依照本發明實施例說明圖1中各個資料信號的 ❹ 時序示意圖。在此係將資料信號D1與D 2為高準位之狀態 定義為「致能」，而將資料信號D1與D2為低準位之狀態 定義為「失能」，但本發明不以此為限。第—受控緩衝單 元110於第一資料信號01為致能(enable)之期間驅動開關 swi與SW4使其導通，而在第一資料信號Di為失能 (disable)之期間驅動開關swi與SW4使其斷開。相類似 地，第二受控緩衝單元120於第二資料信號D2為致能之 期間驅動開關SW2與SW3為導通，而在第二資料信號D2 為失此之期間驅動開關SW2與SW3使其斷開。因此’信 號發送器100便可以將全擺幅(full swing)資料訊號D1與 轉為差動訊號(differentiai signai)，並透過輸出端〇UT1 與〇UT2將此差動訊號輸出給負載104。 、所屬技術領域中具有通常知識者可以視其設計需求而 以任何方式實現第一受控緩衝單元110與第二受控緩衝單 =^20。以下僅以第—受控緩衝單元n〇做為說明例，第 二受控緩衝單元120之實施方式亦可以參照第一受控缓衝 單元110的相關說明。 201034383,,TW 30501twf.doc/n 圖3是依照本發明實施例說明圖丨中第一受柝 元1㈣電路示意圖。第-受控緩衝單元11〇包^多= 衝器m-卜m-2、...、112-n以及開關單元 im、112-2、...、m_n相互串聯而形成一緩衝器串。： 中’緩衝器、112_2、...、112、n具有不同的電ς 道外觀比，因此各自具有不同的輪出驅動能力。於 例中，此緩衝器串是以逐級增加輪出驅動能方= 、···'_，也就是說緩衝 Φ 的電晶體通道外觀比是此緩衝器串中最小者，缓衝哭 的電晶體通道外觀比大於緩衝器lm，而緩衝^ 的電晶體通道外觀比是此緩衝器串中最大者'’。°° n 開關單元m耦接至緩衝器1124、112 2 的輸出端。開關單元m依據控制 狄' ·&、112_n 出端引接至第-受控緩衝單元u沾二—個缓衝器之輸 舞m，給開關sw=:。的輸出端，^ 當信號發送器100操作於高頻環境 依據控制信號之控制而選擇將具曰 的緩衝器(例如緩衝H U2_n、· 衡單元110的輪出端，以增加第二二弓:接^第-受控缓 出擺動速率。圖2說明了 “緩^ 衝單元110的輸 _速率輸出資料信號mD = U0與120以較大 琥發送器、100操作於高頻環境中，本每=圖。因此’當信 儐號使受控緩衝單元110 丰2例可以藉由控制 、120增加錢“擺動速率。 9 201034383 55-TW 30501twf.doc/i ^可以献額定猶轉的前提下，本實關可 可能地，小受控緩衝單元11〇與12〇的輪出擺動速率，以 減缓在信號發送11⑽的輪出端OUT1與〇UT2因開 SW1〜SW4的切換造成電壓過衝（overshoot)及下衝 (undershoot)所產生的電壓突波，進而減低電磁干擾。因 ❹ 此’開關單元111可以選擇將具有較小電晶體通道外觀比 的，衝器（例如緩衝器112_2)的輸出端引接至第一受控緩 衝單元110的輸出端，以減小第一受控緩衝單元110的輸 出，動速率。圖4是依照本發明實施例說明圖1中受控緩 衝單元110與120以較小擺動速率輸出資料信號D1，與d2, 的波形示意圖。 虽該仏號發送器操作於一低頻環境中時，開關單元 111依據控制信號之控制而選擇將具有較小電晶體通道外 觀比的緩衝器（例如緩衝器112-1)的輸出端引接至第一受 控缓衝單兀110的輸出端，以減小第一受控緩衝單元110 的輸出擺動速率。因此，當信號發送器100操作於低頻環 ❹ 境中’本實施例可以藉由控制信號使受控緩衝單元110與 120降低其輸出的擺動逮率。 第一受控緩衝單元110並不限於圖3所示的實現方 式。例如’圖5為依照本發明另一實施例說明圖1中第一 受控緩衝單元110的電路示意圖。請參照圖5，第一受控 缓衝單元110包括第—反閘5〇1、第二反閘5〇2、第三反閘 503、第四反閘504以及開關單元U1。第一反閘5〇1的輸 入端接收第一資料信號D1。第二反閘502的輸入端耦接至 201034383. 55-TW 30501twf.doc/n 第一反閘501的輸出端，而第二反閘502的輸出端輕接至 第三反閘503的輸入端。第四反閘504的輸入端耦接至第 三反閘503的輸出端，而第四反閘5〇4的輪出端轉接至第 一受控缓衝單元11〇的輸出端，以便輸出資料訊號D1，給 開關 SW1 與 SW4。 ~ 第一反閘501的内部電晶體具有第—通道外觀比，而 第二反閘502的内部電晶體具有第二通道外觀比，其中第 ❹ 二通道外觀比大於第一通道外觀比，因此第二反閘的 輸出驅動能力大於第一反閘5〇1。以此類推，第三反閘5〇3 的内部電晶體的第三通道外觀比大於第二通道外觀比，而 第四反閘504的内部電晶體的第四通道外觀比大於 道外觀比。 開關單元111可以依據控制信號之控制而選擇性地將 第二反閘502之輸出端引接至第四反閘504的輸出端，以. 二反閉502所輸出之資料訊號Dl，傳送給開關SW1 =開關單元lu為斷開狀態，則第四反閑谢所 輸出之貧料訊號m，會被傳送給開關SW1 * SW4 而動態地 ㈣緩Ϊ單元110亦可參照圖6實施之。圖6為 貫施例說明圖1中第-受控緩衝單元110 參照圖6 ’第—受控緩衝單元包括 第-緩魅m] 以及開，元111。 的輸入编接收弟一資料信號D1。第二緩 11 201034383 -55-TW 3050 ltwf.doc/n 衝器112-2的輸入端耦接至第一缓衝器112-1的輸出端， 而第二緩衝器112-2的輪出端耦接至第一受控緩衝單元 U〇的輸出端。第一緩衝器112-1的内部電晶體具有第〆 通道外觀比，而第二缓衝器112-2内部電晶體的第二通道 外觀比大於第一通道外觀比。 開關單元111可以依據控制信號之控制而選擇性地將 弟一緩衝器112-1之輸出端引接至第二緩衝器112_2的輸 m 出端，以便將第一緩衝器mi所輸出之資料訊號D1，傳 ，給開關SW1與SW4。若開關單元U1為斷開狀態，則 第二緩衝器112-2所輸出之資料訊號D1，會被傳送給開關 SW1與SW4。因此，第一受控緩衝單元11〇可以依據控制 偽號之控制而動態地改變其輸出信號的擺動速率。 值得注意的是，為了減緩因開關SW1〜SW4的切換造 成電壓過衝(overshoot)及下衝(undersh〇〇t^電壓突波而調 小党控缓衝單元110與120的輪出擺動速率，會降低信號 發送器1〇0的最大操作頻率。在滿足額定電磁干擾的前提 下’5又计者可以使用低臨界電壓(i〇w thresh〇id voltage)電晶 體(臨界電壓低於0.6V的電晶體)來實現第一開關SW1、第 二開關SW2、第三開關SW3與第四開關SW4。由於降低 了開關SW1〜SW4的臨界電壓，在開關切換的過程中能夠 使開關SW1〜SW4提早導通，因此可以提升信號發送器1〇〇 的最大操作頻率。 ^在本發明的另一實施例中，信號發送器可以更包括緩 衝單元與電流料元件。圖7是依照本發明另—實施例說 12 55-TW 30501twf.doc/n 明信號發送器700的電路示意圖。信號發送器7〇〇的實現 方式可以參照圖1及相關說明’故相同部份便不再贅述。 請參照圖7 ’本實施例之信號發送器7〇〇除了具有圖i之 信號發送器100的元件外，更包括第—電流源A1及第二 電流源A2。電流源A1耦接於第一電壓VS1與第一開關 swi的弟一端之間，以及柄接於第一電壓VSi與第三開關 SW3的第端之間。電流源A2麵接於第二電壓vs]盘第 -開關SW2的第二端之間’以及耗接於第二電壓與 第四開關SW4的第二端之間。 電/’il源A1提供電流II至開關sW1與sW3的第一端， 而電流源A2則用以自開關SW2與SW4的第二端吸汲電 流12。本發明所屬技術領域中具有通常知識者可以視其設 計需求而任意決定前述電流n與12之值，例如可以將電 流源士1與A2的電流II與12之值均設定為j (1為實數）。 ’示上所述，上述诸貫施例藉由調整受控緩衝單元110 與120的輪出擺動速率，以減緩在信號發送器1〇〇(或7⑻) ❹與電源端關關切換造成電壓過衝(_此〇()〇及 下衝(UndefShGGt)所產㈣t壓纽，目此可稍低電磁干 擾。 雖然本發明已以實施例揭露如上，然其並非用以限定 月，任何所屬技術領域中具有通常知識者，在不脫離 明之精神和範_，當可作些狀更動與潤飾，故本 '、蒦範圍當視後附之申請專利範圍所界定者為準。 13 201034383 55-TW 30501twf.doc/n 【圖式簡單說明】 圖1是依照本發明一實施例說明信號發送器的電路示 意圖。 圖2是依照本發明實施例說明圖1中各個資料信號的 時序不意圖。 圖3是依照本發明實施例說明圖1中第一受控緩衝單 元的電路示意圖。 圖4是依照本發明實施例說明圖1中受控缓衝單元以 ^ 較小擺動速率輸出資料信號的波形示意圖。 圖5為依照本發明另一實施例說明圖1中第一受控緩 衝單元的電路示意圖。 圖6為依照本發明再一實施例說明圖1中第一受控缓 衝單元的電路示意圖。 圖7是依照本發明另一實施例說明信號發送器的電路 示意圖。 ❿ 【主要元件符號說明】. 100、700 :信號發送器 104 :負載 110、120 :受控緩衝單元 111 :開關單元 112-1、112-2、112-n :缓衝器 501、502、503、504 :反閘104 can represent the signal transmission channel and the equivalent circuit of the lower circuit by the resistor R, the capacitor C1 and the capacitor C2. A signal transmitter 100 includes a first switch 8 and a second switch 812, a third switch SW3, a fourth switch SW4, a first controlled buffer unit 11A, and a second controlled buffer unit 120. The first end of the switch SW1 is coupled to the first voltage VS1, and the other end of the switch SW1 is coupled to the first output terminal OUT1 of the signal transmitter. The first end of the switch SW2 is coupled to the second end of the switch SW1, and the first end of the switch SW2 is coupled to the first voltage VS2. The first end of the switch SW3 is connected to the voltage VS1, and the first end of the switch SW3 is connected to the second output terminal OUT2 of the signal transmitter. The first end of the switch SW4 is coupled to the second end of the switch SW3, and the second end of the switch SW4 is coupled to the voltage VS2. The first voltage VS1 and the second voltage VS2 may represent any different voltage levels. In this embodiment, the voltage VS1 can be the voltage level of the system power supply, and the voltage VS2 can be the ground voltage level. The above switches SW1 to SW4 can be realized in any manner, for example, by using N-channel metal oxide semiconductor (NMOS) transistors to realize the switches SW1 to SW4. 7 201034383, 5-tw 30501twf.doc/n The first controlled buffer unit 110 receives the first data signal D1 and drives the first switch SW1 and the fourth switch SW4. The second controlled buffer unit 12 receives the second data signal D2 to drive the second switch SW2 and the third switch SW3. Wherein the first controlled buffer unit 110 and the second controlled buffer unit 120 are controlled by the control signal to dynamically change the slew rate of their turn-off signals. FIG. 2 is a timing diagram showing the ❹ timing of each data signal in FIG. 1 according to an embodiment of the present invention. Here, the state in which the data signals D1 and D2 are at a high level is defined as "enable", and the state in which the data signals D1 and D2 are at a low level is defined as "disabled", but the present invention does not limit. The first controlled buffer unit 110 drives the switches swi and SW4 to be turned on during the enable of the first data signal 01, and drives the switches swi and SW4 during the period when the first data signal Di is disabled. Make it disconnected. Similarly, the second controlled buffer unit 120 drives the switches SW2 and SW3 to be turned on during the enable of the second data signal D2, and drives the switches SW2 and SW3 to be turned off during the second data signal D2. open. Therefore, the 'signal transmitter 100' can convert the full swing data signal D1 into a differential signal (differentiai signai) and output the differential signal to the load 104 through the output terminals 〇1 and UT2. Those having ordinary skill in the art can implement the first controlled buffer unit 110 and the second controlled buffer unit = ^20 in any manner according to their design requirements. In the following, only the first controlled buffer unit n is used as an example. The second controlled buffer unit 120 can also refer to the related description of the first controlled buffer unit 110. 201034383, TW 30501twf.doc/n FIG. 3 is a schematic diagram showing the circuit of the first element 1 (4) in the figure in accordance with an embodiment of the present invention. The first-controlled buffer unit 11 includes a plurality of buffers m-b m-2, ..., 112-n and switch units im, 112-2, ..., m_n connected in series to form a buffer string. . The mid-buffers, 112_2, ..., 112, n have different electrical channel appearance ratios and therefore each have different wheel-out drive capabilities. In the example, the buffer string is increased by stepwise driving power =, ···'_, that is, the appearance of the transistor channel of the buffer Φ is the smallest of the buffer strings, and the buffer is crying. The transistor channel appearance ratio is greater than the buffer lm, and the transistor channel appearance ratio of the buffer ^ is the largest of the buffer strings ''. The switch unit m is coupled to the outputs of the buffers 1124, 112 2 . The switch unit m is connected to the first-controlled buffer unit u according to the control Di's &, 112_n, and the switch is sw=:. The output terminal, when the signal transmitter 100 operates in a high frequency environment, selects a buffer that has a defect according to the control of the control signal (for example, buffering the wheel end of the H U2_n, the balance unit 110 to increase the second two bows: The first-controlled slow-moving swing rate is shown in Fig. 2. The "transmission-rate output data signal mD = U0 and 120 of the buffer unit 110 is operated in a high-frequency environment, and the high-frequency environment is used. = Fig. Therefore, 'When the letter nickname makes the controlled buffer unit 110 abundance 2 cases can be increased by the control, 120 "swing rate. 9 201034383 55-TW 30501twf.doc / i ^ can be rated under the premise, In this case, it is possible that the small controlled buffer unit 11 〇 and 12 轮 turn-out swing rate to slow the voltage overshoot caused by the switching of the turn-out terminals OUT1 and 〇UT2 of the signal transmission 11 (10) due to the switching of SW1 to SW4 ( Overshoot) and undershoot the resulting voltage surge, which in turn reduces electromagnetic interference. Because the 'switch unit 111 can choose the output of the punch (such as the buffer 112_2) with a smaller transistor channel appearance ratio. The terminal is connected to the output of the first controlled buffer unit 110 To reduce the output rate of the first controlled buffer unit 110. FIG. 4 is a diagram illustrating the controlled buffer units 110 and 120 of FIG. 1 outputting the data signals D1 and d2 at a small swing rate according to an embodiment of the present invention. Waveform diagram. Although the nickname transmitter operates in a low frequency environment, the switching unit 111 selects an output of a buffer (e.g., buffer 112-1) having a smaller transistor channel appearance ratio according to control of the control signal. Leading to the output of the first controlled buffer unit 110 to reduce the output swing rate of the first controlled buffer unit 110. Therefore, when the signal transmitter 100 operates in a low frequency loop environment, the present embodiment can borrow The control buffers cause the controlled buffer units 110 and 120 to reduce the swing capture rate of their outputs. The first controlled buffer unit 110 is not limited to the implementation shown in Figure 3. For example, Figure 5 illustrates another embodiment of the present invention. 1 is a schematic circuit diagram of the first controlled buffer unit 110. Referring to FIG. 5, the first controlled buffer unit 110 includes a first-reverse gate 5〇1, a second reverse gate 5〇2, and a third reverse gate 503. Fourth reverse gate 504 and switch unit U1 The input end of the first reverse gate 5〇1 receives the first data signal D1. The input end of the second reverse gate 502 is coupled to 201034383. 55-TW 30501twf.doc/n the output of the first reverse gate 501, and the second The output end of the reverse gate 502 is lightly connected to the input end of the third reverse gate 503. The input end of the fourth reverse gate 504 is coupled to the output end of the third reverse gate 503, and the round output end of the fourth reverse gate 5〇4 It is switched to the output of the first controlled buffer unit 11A to output the data signal D1 to the switches SW1 and SW4. ~ The internal transistor of the first reverse gate 501 has a first channel appearance ratio, and the internal transistor of the second reverse gate 502 has a second channel appearance ratio, wherein the second channel appearance ratio is greater than the first channel appearance ratio, thus the first The output drive capability of the second reverse gate is greater than the first reverse gate 5〇1. By analogy, the third channel appearance ratio of the internal transistor of the third reverse gate 5〇3 is greater than the second channel appearance ratio, and the fourth channel appearance ratio of the internal transistor of the fourth reverse gate 504 is greater than the channel appearance ratio. The switch unit 111 can selectively connect the output end of the second reverse gate 502 to the output end of the fourth reverse gate 504 according to the control of the control signal, and transmit the data signal D1 outputted by the second closed loop 502 to the switch SW1. If the switch unit lu is in the off state, the lean signal m outputted by the fourth anti-free feedback is transmitted to the switch SW1 * SW4 and dynamically (4) the buffer unit 110 can also be implemented with reference to FIG. Fig. 6 is a cross-sectional view showing the first controlled buffer unit 110 of Fig. 1 with reference to Fig. 6 'the first controlled buffer unit including the first and second enchant m' and the open, element 111. The input code receives the data signal D1 of the younger brother. The second input 11 201034383 -55-TW 3050 ltwf.doc / n the input end of the buffer 112-2 is coupled to the output of the first buffer 112-1, and the second output of the second buffer 112-2 The output is coupled to the output of the first controlled buffer unit U〇. The internal transistor of the first buffer 112-1 has a second channel appearance ratio, and the second channel appearance ratio of the internal transistor of the second buffer 112-2 is larger than the first channel appearance ratio. The switch unit 111 can selectively connect the output end of the buffer 112-1 to the output end of the second buffer 112_2 according to the control of the control signal, so as to output the data signal D1 of the first buffer mi. , pass, give switches SW1 and SW4. If the switch unit U1 is in the off state, the data signal D1 outputted by the second buffer 112-2 is transmitted to the switches SW1 and SW4. Therefore, the first controlled buffer unit 11 can dynamically change the swing rate of its output signal in accordance with the control of the control pseudo number. It is worth noting that in order to slow down the voltage overshoot and undershoot due to the switching of the switches SW1 SWSW4, the turn-off swing rate of the party-controlled buffer units 110 and 120 is reduced. It will reduce the maximum operating frequency of the signal transmitter 1〇0. Under the premise of meeting the rated electromagnetic interference, the lower threshold voltage can be used (the threshold voltage is lower than 0.6V). The first switch SW1, the second switch SW2, the third switch SW3 and the fourth switch SW4 are realized by the transistor. Since the threshold voltages of the switches SW1 SWSW4 are lowered, the switches SW1 SWSW4 can be turned on early during the switching process. Therefore, the maximum operating frequency of the signal transmitter 1 可以 can be increased. ^ In another embodiment of the invention, the signal transmitter can further include a buffer unit and a current material element. Figure 7 is a further embodiment of the invention. 12 55-TW 30501twf.doc/n The circuit diagram of the signal transmitter 700. The implementation of the signal transmitter 7〇〇 can refer to FIG. 1 and the related descriptions, so the same parts will not be described again. Please refer to FIG. 7 Implementation The signal transmitter 7 includes a first current source A1 and a second current source A2 in addition to the components of the signal transmitter 100 of FIG. 1. The current source A1 is coupled to the first voltage VS1 and the first switch swi. Between one end of the younger brother, and the handle is connected between the first voltage VSi and the first end of the third switch SW3. The current source A2 is connected between the second voltage vs. the second end of the disk-switch SW2' and the connection Between the second voltage and the second end of the fourth switch SW4. The electric/'il source A1 supplies the current II to the first ends of the switches sW1 and sW3, and the current source A2 is used to the second of the switches SW2 and SW4. The terminal sinks the current 12. The person having ordinary knowledge in the art can arbitrarily determine the values of the currents n and 12 according to the design requirements. For example, the values of the currents II and 12 of the current source 1 and A2 can be set. For j (1 is a real number). As indicated above, the above-described embodiments are used to adjust the rotation rate of the controlled buffer units 110 and 120 to slow down the signal transmitter 1 (or 7 (8)). The power supply is switched off to cause voltage overshoot (_ this 〇()〇 and undershoot (UndefShGGt) (4) t pressure button, mesh Although the present invention has been disclosed in the above embodiments, it is not intended to limit the month, and any person having ordinary knowledge in the technical field can make some changes and refinements without departing from the spirit and scope of the present invention. Therefore, the scope of this application is subject to the definition of the patent application scope. 13 201034383 55-TW 30501twf.doc/n [Simplified Schematic] FIG. 1 is a diagram illustrating a signal transmitter according to an embodiment of the invention. Circuit diagram. Figure 2 is a timing diagram showing the timing of the various data signals of Figure 1 in accordance with an embodiment of the present invention. 3 is a circuit diagram showing the first controlled buffer unit of FIG. 1 in accordance with an embodiment of the present invention. 4 is a waveform diagram showing the output of a data signal by the controlled buffer unit of FIG. 1 at a small swing rate in accordance with an embodiment of the present invention. FIG. 5 is a circuit diagram showing the first controlled buffer unit of FIG. 1 according to another embodiment of the present invention. FIG. 6 is a circuit diagram showing the first controlled buffer unit of FIG. 1 according to still another embodiment of the present invention. Figure 7 is a circuit diagram showing a signal transmitter in accordance with another embodiment of the present invention. ❿ [Main component symbol description]. 100, 700: Signal transmitter 104: Load 110, 120: Controlled buffer unit 111: Switching units 112-1, 112-2, 112-n: Buffers 501, 502, 503 , 504: reverse gate
Al、A2 :電流源 14 20 1 0343 83…55-TW 30501twf.doc/nAl, A2: current source 14 20 1 0343 83...55-TW 30501twf.doc/n
Cl、C2 :負載電容 m、D2、Dl，、D2,：資料信號 II、12 :電流 OUT1、OUT2 :信號發送器100的輸出端 R :負載電阻 SW1、SW2、SW3、SW4 :開關 VS1 :第一電壓 VS2 ··第二電壓Cl, C2: load capacitance m, D2, Dl, D2,: data signal II, 12: current OUT1, OUT2: output terminal of signal transmitter 100 R: load resistance SW1, SW2, SW3, SW4: switch VS1: a voltage VS2 · · second voltage
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