TW201030172A - Method for depositing silicon nitride film, computer-readable storage medium, and plasma cvd device - Google Patents

Method for depositing silicon nitride film, computer-readable storage medium, and plasma cvd device Download PDF

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TW201030172A
TW201030172A TW098133188A TW98133188A TW201030172A TW 201030172 A TW201030172 A TW 201030172A TW 098133188 A TW098133188 A TW 098133188A TW 98133188 A TW98133188 A TW 98133188A TW 201030172 A TW201030172 A TW 201030172A
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Taiwan
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gas
film
nitride film
plasma cvd
processed
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TW098133188A
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Chinese (zh)
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Shuichiro Ohtao
Minoru Honda
Masayuki Kohno
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Tokyo Electron Ltd
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    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
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    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
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    • C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
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    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
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    • C23C16/511—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges using microwave discharges
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Abstract

To provide a method for manufacturing a silicon nitride film, which can be used as a charge storage layer with multiple traps, by a plasma CVD method. A plasma CVD equipment 100 introduces a microwave into a treatment container 1 by a flat antenna 31 having multiple pores, wherein a pressure within the treatment container 1 is set within the limits of ≥ 10 Pa and ≤ 133.3 Pa, a high-frequency electric power is supplied from a high-frequency power source 9 to an electrode 7 of a placement table 2 for placing a wafer W with a power density within a range of ≥ 0.009 W/cm<SP>2</SP>and ≤ 0.64 W/cm<SP>2</SP>per area of the wafer W, and plasma CVD is performed using a silicon-containing compound gas and a film-forming gas containing a nitrogen gas while applying a radio frequency (RF) bias to the wafer W.

Description

201030172 六、發明說明： 【發明所屬之技術領域】 本發明係關於氮化矽膜之成膜方法、該方法所使用之 電腦可讀取之記憶媒體以及電漿CVD裝置。 【先前技術】 現在，就以能夠執行電性重寫動作之 EEPROM ( ⑩ Electrically Erasable and Programmable ROM )等所代表 之非揮發性半導體記憶體裝置而言，有被稱爲SONOS( Silicon-Oxide-Nitride-Oxide-Silicon )型或 MONOS ( Metal-Oxide-Nitride-Oxide-Silicon)型之叠層構造。在該 些類型之非揮發性半導體記憶裝置中，係將被夾於二氧化 矽膜（Oxide)之1層以上之氮化矽膜（Nitride)當作電 荷蓄積區域而執行資訊之保持。即是，在上述非揮發性半 導體記憶裝置中，係藉由對半導體基板（Silicon)和控制 φ 閘極電極（Silicon或Metal )之間施加電壓，對電荷蓄積 區域之氮化矽膜注入電子而保存資料，或除去蓄積於氮化 矽膜之電子，執行資料保存和消去之重寫。在上述非揮發 性半導體記億裝置中，可想像資料寫入特性與電子朝向電 荷蓄積區域之氮化矽膜注入之容易度具有關係，尤其與存 在於氮化膜中之電荷捕獲中心（trap )具有關係。 就以與非揮發性半導體記憶裝置有關之技術而言，在 專利文獻1中，記載有以增加氮化矽膜和上部氧化膜之界 面的陷阱密度之目的，在該些膜之中間部分設置有多含有 -5- 201030172201030172 SUMMARY OF THE INVENTION [Technical Field] The present invention relates to a film forming method of a tantalum nitride film, a computer readable memory medium and a plasma CVD apparatus used in the method. [Prior Art] Now, a non-volatile semiconductor memory device represented by an EEPROM (10 Electrically Erasable and Programmable ROM) capable of performing an electrical rewrite operation is called SONOS (Silicon-Oxide-Nitride). -Oxide-Silicon type or MONOS (Metal-Oxide-Nitride-Oxide-Silicon) type laminated structure. In these types of non-volatile semiconductor memory devices, Nitride, which is sandwiched between one or more layers of a ruthenium dioxide film (Oxide), is used as a charge accumulating region to perform information retention. That is, in the above nonvolatile semiconductor memory device, electrons are injected into the tantalum nitride film of the charge storage region by applying a voltage between the semiconductor substrate (Silicon) and the control φ gate electrode (Silicon or Metal). The data is saved, or the electrons accumulated in the tantalum nitride film are removed, and the data is saved and erased. In the above nonvolatile semiconductor device, it is conceivable that the data writing characteristic has a relationship with the ease of electron beam implantation into the charge storage region, in particular, the charge trapping center (trap) existing in the nitride film. Have a relationship. In the technique related to the nonvolatile semiconductor memory device, Patent Document 1 describes the purpose of increasing the trap density at the interface between the tantalum nitride film and the upper oxide film, and is provided in the middle portion of the film. More containing -5 - 201030172

Si之遷移層。 〔先行技術文獻〕 〔專利文獻〕 專利文獻1:日本特開平5-145078號公報（例如段落 0015 等） 【發明內容】 (發明所欲解決之課題） 近年來隨著半導體裝置之高積體化，非揮發性半導體 記憶裝置之元件構造也急速發展微細化。爲了使非揮發性 半導體記憶裝置微細化，在各個非揮發性半導體記憶裝置 中，必須增加屬於電荷蓄積層之氮化矽膜之陷阱數，提高 資料寫入性能。 但是，在藉由減壓CVD法或熱CVD法之成膜方法中 ，要在氮化矽膜之形成過程中控制膜中之陷阱形成在技術 上則有困難。再者，在電漿CVD法中，大多係以當作蝕 刻之硬遮罩或阻止膜使用，形成緻密且缺陷少之氮化砂膜 爲目標。原本在電漿CVD法中，可想像藉由將處理容器 內之處理壓力設爲高真空狀態（例如，3Pa以下）增強電 獎之離子性，則可在所形成之氮化砂膜中形成多量陷(J并。 但是，爲了將處理容器內維持高真空狀態，則有需要高性 能之排氣裝置，或需要能耐高真空狀態之真空密封技術、 耐壓容器等，而增加裝置負荷，提高成本之缺點。再者， 在高真空狀態下，因電漿能量變高，故對處理容器內之零 -6- 201030172 件等之濺鍍作用變強，增加因微粒等所產生之污染危險性 ，或降低氮化矽膜中之覆蓋域性能等，即使在製程的視點 上也有問題。並且，以以往之電漿CVD法所成膜之氮化 矽膜因陷阱分布不均勻，故無法當作電荷蓄積層使用。 本發明係鑑於上述情形而所硏究出，其第1目的在於 提供藉由電漿CVD法形成可當作電荷蓄積層利用之存在 多數陷阱之氮化矽膜的方法。再者，本發明之第2目的在 φ 於提供藉由電漿CVD法積層各個氮化矽膜之陷阱數不同 之氮化矽膜而成膜之方法。 (用以解決課題之手段） 本發明之氮化矽膜之成膜方法係使用藉由具有多數孔 之平面天線將微波導入至處理容器內使產生電漿之電漿 CVD裝置，並藉由電漿CVD法在被處理體上形成氮化矽 膜，其特徵爲具備有將上述處理容器內之壓力設定在10P a Φ 以上133.3Pa以下之範圍內，一面以被處理體之單位面積 0.00 9 W/cm2以上0.64 W/cm2以下之範圍內之輸出密度供給 高頻電力至載置被處理體之載置台的電極，並對被處理體 施加高頻偏壓，一面使用包含含矽化合物氣體和氮氣之成 膜氣體而執行電漿CVD，依此形成氮化矽膜之工程。 再者，本發明之氮化矽膜之成膜方法係使用藉由具有 多數孔之平面天線將微波導入至處理容器內使產生電漿之 電漿CVD裝置，並藉由電漿CVD法在被處理體上積層形 成氮化矽膜，其特徵爲具備有將上述處理容器內之壓力設 201030172 定在10Pa以上133.3Pa以下之範圍內，一面以被處理體 之單位面積〇.〇〇9W/cm2以上0.64W/cm2以下之範圍內之 輸出密度供給高頻電力至載置被處理體之載置台的電極， 並對被處理體施加高頻偏壓，一面使用包含含矽化合物氣 體和氮氣之成膜氣體而執行電漿CVD，依此形成氮化矽膜 之第1工程；和 在與上述第1工程相同之設定壓力下，不供給高頻電 力至上述載置台之電極，或以與上述第1工程不同之輸出 密度供給高頻電力而對被處理體施加高頻偏壓，使用包含 含矽化合物氣體和氮氣之成膜氣體而執行電漿CVD，依此 形成比在上述第1工程所形成之氮化矽膜陷阱（trap )存 在數少之氮化矽膜的第2工程。 本發明之氮化矽膜積層體之製造方法係以重複執行上 述第1 CVD工程和上述第2CVD工程爲佳。 本發明所涉及之電腦可讀取之記憶媒體，係記憶有在 電腦上動作之控制程式，其特徵爲： 上述控制程式於實行時係在使用藉由具有多數孔之平 面天線將微波導入至處理容器內使產生電漿之電漿CVD 裝置，並藉由電漿CVD法在被處理體上形成氮化矽膜之 時，係以在l〇Pa以上133.3Pa以下之範圍內之處理壓力 ，一面以被處理體之單位面積〇.〇〇9W/cm2以上〇.64W/cm2 以下之範圍內之輸出密度供給高頻電力至載置被處理體之 載置台的電極，並對被處理體施加高頻偏壓，一面使用包 含含矽化合物氣體和氮氣之成膜氣體而執行電漿CVD之 201030172 方式，使電腦控制上述電漿CVD裝置。 再者，本發明所涉及之電漿CVD裝置係藉由電漿 CVD法在被處理體上形成氮化矽膜，其特徵爲：具備 處理容器，在收容被處理體之上部具有開口； 載置台，被配置在上述處理容器內，載置被處理體； 電極，被設置在上述載置台內，對被處理體施加高頻 電力； φ 高頻電源，係連接於上述電極； 介電體構件，用以塞住上述處理容器之上述開口； 平面天線，被設置在上述介電體構件之上部，具有用 以將微波導入至上述處理容器內之多數孔； 氣體導入部，連接用以將包含含矽化合物氣體和含氮 氣體之成膜氣體供給至上述處理容器內之氣體供給機構； 排氣機構，用以減壓排氣上述處理容器內；和 控制部，用以控制成一面以被處理體之單位面積 φ 0.009W/cm2以上0.64W/cm2以下之範圍內之輸出密度由上 述高頻電源供給高頻電力至上述電極而對被處理體施加高 頻偏壓，一面自連接於上述氣體供給機構之氣體導入部將 包含上述含矽化合物氣體和上述氮氣之成膜氣體供給至上 述處理容器內，依此在上述處理容器中，以l〇Pa以上 133.3Pa以下之範圍內之處理壓力執行電漿CVD。 〔發明效果〕 若藉由本發明之氮化矽膜之成膜方法’藉由使用藉由 -9 - 201030172 具有多數孔之平面天線將微波導入至處理容器內而生成電 漿之電漿CVD裝置，一面對載置被處理體之載置台施加 高頻電力，一面以l〇Pa以上133.3Pa以下之處理壓力執 行電漿CVD，則可以形成陷阱之存在數多的氮化矽膜。本 發明之方法比起在3Pa以下之高真空狀態下成膜’可以減 輕裝置負荷或污染（contamination )之危險性’並且亦可 以維持氮化矽膜形成中的良好覆蓋域性能。再者’以本發 明方法所成膜之氮化矽膜，由於陷阱之分布均勻’故適用 於當作電荷蓄積層使用。 再者，若藉由本發明之氮化矽膜之成膜方法時，利用 僅切換施加至載置台之高頻電力之開啓/關閉之操作，能 夠容易交互積層陷阱存在數不同之氮化矽膜，能夠應用於 資料寫入特性優良之半導體記憶裝置。 【實施方式】 〔第1實施型態〕 以下，針對本發明之實施型態，參照圖面予以詳細說 明。第1圖爲模式性表示可利用於本發明之氮化矽膜之製 造方法的電漿CVD裝置100之槪略構成之剖面圖。 電漿CVD裝置100係以藉由具有多數細縫狀之孔的 平面天線，尤其利用 RLSA ( Radial Line Slot Antenna : 徑向開槽天線）將微波導入至處理容器內使產生電漿，而 能夠產生高密度且低電子溫度之微波激勵電漿的RLSA微 波電漿處理裝置所構成。電漿CVD裝置100，係能夠藉由 -10- 201030172 具有 1χ101ΰ〜5xl012/cm3之電漿密度，並且 0.7〜2eV之 低電子溫度的電漿進行處理。因此，電漿CVD裝置100 可以適用在各種半導體裝置之製造過程中，於藉由電漿 CVD執行氮氧化矽膜之成膜處理之目的。 電漿CVD裝置100主要構成係具備有被構成氣密之 處理容器1，和經氣體導入管22而被接線於將氣體供給至 處理容器1內之氣體供給機構18的氣體導入部14、15, φ 和包含用以減壓排氣處理容器1內之排氣裝置24的排氣 機構，和被設置在處理容器1之上部，將微波導入至處理 容器1內之微波導入機構27，和控制該些電漿CVD裝置 1〇〇之各構成部的控制部50。 氣體供給裝置18即使使用外部之氣體供給裝置亦可 〇 處理容器1係藉由被接地之略圓筒狀之容器而形成。 並且，處理容器1即使藉由角筒形狀之容器而形成亦可。 φ 處理容器1具有由鋁等之材質所構成之底壁la和側壁lb 〇 在處理容器1內設置有用以水平支撐屬於被處理體之 矽晶圓（以下單稱「晶圓」）w之載置台2。載置台2係 藉由熱傳導性高之材質例如A1N等之陶瓷所構成。該載置 台2係藉由從排氣室11之底部中央延伸至上方之圓筒狀 之支撐構件3所支撐’固定於底部。支撐構件3係藉由例 如A1N等之陶瓷所構成。 再者，在載置台2設置有覆蓋其外緣部，用以引導晶 -11 - 201030172 圓W之導環4。該導環4爲利用例如石英、AIN、Al2〇3、The migration layer of Si. [Patent Document] [Patent Document 1] Japanese Laid-Open Patent Publication No. H5-145078 (for example, paragraph 0015, etc.) [Problems to be Solved by the Invention] In recent years, the semiconductor device has been highly integrated. The component structure of the non-volatile semiconductor memory device is also rapidly developing and miniaturizing. In order to refine the nonvolatile semiconductor memory device, it is necessary to increase the number of traps of the tantalum nitride film belonging to the charge accumulation layer in each of the nonvolatile semiconductor memory devices, thereby improving the data writing performance. However, in the film formation method by the reduced pressure CVD method or the thermal CVD method, it is technically difficult to control the formation of traps in the film during the formation of the tantalum nitride film. Further, in the plasma CVD method, a hard mask or a resist film which is used as an etching is often used, and a nitrided film having a small density and few defects is formed. Originally, in the plasma CVD method, it is conceivable that the ionic property of the electric prize is enhanced by setting the processing pressure in the processing container to a high vacuum state (for example, 3 Pa or less), and a large amount can be formed in the formed nitrided sand film. However, in order to maintain a high vacuum state in the processing container, there is a need for a high-performance exhaust device, or a vacuum sealing technique capable of withstanding a high vacuum state, a pressure vessel, etc., thereby increasing device load and increasing cost. Disadvantages. In addition, in the high vacuum state, since the plasma energy becomes high, the sputtering effect of zero--201030172 parts in the processing container becomes strong, and the risk of contamination due to particles or the like is increased. Or reducing the coverage of the tantalum nitride film, etc., even if there is a problem in the viewpoint of the process. Moreover, the tantalum nitride film formed by the conventional plasma CVD method is not uniform because of the trap distribution, so it cannot be regarded as a charge. The present invention has been made in view of the above circumstances, and a first object thereof is to provide a method for forming a tantalum nitride film which can be used as a charge storage layer and which has a plurality of traps by a plasma CVD method. A second object of the present invention is to provide a method for forming a film of a tantalum nitride film having a different number of traps for laminating each tantalum nitride film by a plasma CVD method. The film formation method of the tantalum nitride film is a plasma CVD apparatus which uses a planar antenna having a plurality of holes to introduce microwaves into a processing container to generate a plasma, and forms a nitride on the object to be processed by a plasma CVD method. The ruthenium film is characterized in that the pressure in the processing container is set to be in the range of 10 P a Φ or more and 133.3 Pa or less, and the unit area of the object to be processed is in the range of 0.009 W/cm 2 or more and 0.64 W/cm 2 or less. The output density is supplied to the electrode on which the substrate to be processed is placed, and a high-frequency bias is applied to the object to be processed, and plasma CVD is performed using a film-forming gas containing a ruthenium-containing compound gas and nitrogen gas. The method of forming a tantalum nitride film is further characterized in that the film forming method of the tantalum nitride film of the present invention is a plasma CVD apparatus which uses a planar antenna having a plurality of holes to introduce microwaves into a processing container to generate plasma. And by electricity The CVD method is formed by laminating a tantalum nitride film on the object to be processed, and is characterized in that the pressure in the processing container is set to be in the range of 10 Pa or more and 133.3 Pa or less, and the unit area of the object to be processed is 〇. The output density in the range of W9W/cm2 or more and 0.64 W/cm2 or less is supplied to the electrode of the stage on which the object to be processed is placed, and a high-frequency bias is applied to the object to be processed, and a gas containing a ruthenium-containing compound is used. Performing plasma CVD with a nitrogen film forming gas to form a first process of a tantalum nitride film; and, at a set pressure similar to the first process, not supplying high frequency power to the electrodes of the mounting table, or A high-frequency electric power is applied to the object to be processed by supplying high-frequency power at an output density different from the above-described first project, and plasma CVD is performed using a film-forming gas containing a ruthenium-containing compound gas and nitrogen gas, thereby forming a ratio according to the above The second project of the tantalum nitride film with a small number of tantalum nitride film traps formed by the project. The method for producing a tantalum nitride film laminate according to the present invention is preferably performed by repeating the first CVD process and the second CVD process described above. The computer readable memory medium according to the present invention is a control program for memorizing the operation on a computer, wherein the control program is implemented by using a planar antenna having a plurality of holes to introduce microwaves into the processing. When a plasma CVD apparatus for generating plasma is formed in a container and a tantalum nitride film is formed on the object to be processed by a plasma CVD method, the processing pressure in the range of 13 ÅPa or more and 133.3 Pa or less is used. The high-frequency power is supplied to the electrode on the mounting table on which the object to be processed is placed at an output density in a range of 64.〇〇9 W/cm 2 or more and 64.64 W/cm 2 or less, and the object to be processed is applied high. The frequency bias is applied to the plasma CVD apparatus by a computer using a 201030172 method of performing plasma CVD using a film-forming gas containing a ruthenium-containing compound gas and nitrogen. Further, the plasma CVD apparatus according to the present invention forms a tantalum nitride film on a target object by a plasma CVD method, and is characterized in that it has a processing container and has an opening in an upper portion of the object to be processed; And disposed in the processing container to mount the object to be processed; the electrode is disposed in the mounting table, and applies high frequency power to the object to be processed; φ high frequency power source is connected to the electrode; dielectric member, The opening for plugging the processing container; the planar antenna is disposed on the upper portion of the dielectric member, and has a plurality of holes for introducing microwaves into the processing container; and a gas introduction portion for connecting a gas supply mechanism for supplying a ruthenium compound gas and a nitrogen-containing gas to the processing container; an exhaust mechanism for decompressing the inside of the processing container; and a control unit for controlling the object to be processed The output density in the range of φ 0.009 W/cm 2 or more and 0.64 W/cm 2 or less per unit area is supplied to the electrode by the high-frequency power source to apply high-frequency power to the electrode, and a high frequency is applied to the object to be processed. The gas introduction portion connected to the gas supply means supplies the film-forming gas containing the ruthenium-containing compound gas and the nitrogen gas to the processing container, and accordingly, in the processing container, 133.3 Pa or more Plasma CVD is performed at a processing pressure within the range below. [Effect of the Invention] The plasma CVD apparatus for producing a plasma by introducing a microwave into a processing container by a planar antenna having a plurality of holes by -9 - 201030172 by the film forming method of the tantalum nitride film of the present invention, When the plasma CVD is performed at a processing pressure of 1 〇 Pa or more and 133.3 Pa or less by applying high-frequency power to the mounting table on which the object to be processed is placed, a tantalum nitride film having a large number of traps can be formed. The method of the present invention can reduce the risk of device loading or contamination compared to film formation under high vacuum conditions of 3 Pa or less and can also maintain good coverage performance in the formation of tantalum nitride film. Further, the tantalum nitride film formed by the method of the present invention is suitable for use as a charge storage layer because of uniform distribution of traps. Further, according to the film forming method of the tantalum nitride film of the present invention, it is possible to easily alternately form a tantalum nitride film having a different number of traps by switching the ON/OFF operation of the high frequency power applied to the mounting table. It can be applied to semiconductor memory devices with excellent data writing characteristics. [Embodiment] [First embodiment] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Fig. 1 is a schematic cross-sectional view showing the schematic configuration of a plasma CVD apparatus 100 which can be used in the method for producing a tantalum nitride film of the present invention. The plasma CVD apparatus 100 is capable of generating a plasma by introducing a microwave into a processing container by using a planar antenna having a plurality of slit-like holes, in particular, using RLSA (radiial line Slot Antenna) to generate plasma. A RLSA microwave plasma processing apparatus for microwave-excited plasma of high density and low electron temperature. The plasma CVD apparatus 100 can be processed by a plasma having a plasma density of 1χ101ΰ to 5xl012/cm3 and a low electron temperature of 0.7 to 2eV by -10-201030172. Therefore, the plasma CVD apparatus 100 can be applied to the film forming process of the ruthenium oxynitride film by plasma CVD in the manufacturing process of various semiconductor devices. The plasma CVD apparatus 100 is mainly configured to include a processing container 1 that is configured to be airtight, and a gas introduction unit 14 and 15 that are connected to a gas supply unit 18 that supplies gas to the processing container 1 via a gas introduction tube 22. φ and an exhaust mechanism for decompressing the exhaust device 24 in the exhaust gas treatment container 1, and a microwave introduction mechanism 27 provided in the upper portion of the processing container 1, introducing microwaves into the processing container 1, and controlling the The control unit 50 of each of the constituent parts of the plasma CVD apparatus 1 is used. The gas supply device 18 can be formed by a container having a substantially cylindrical shape that is grounded even if an external gas supply device is used. Further, the processing container 1 may be formed by a container having a rectangular tube shape. The φ processing container 1 has a bottom wall 1a and a side wall lb 构成 made of a material such as aluminum, and is provided in the processing container 1 to horizontally support a wafer (hereinafter referred to as "wafer") w belonging to the object to be processed. Set 2. The mounting table 2 is made of a material having a high thermal conductivity such as A1N or the like. The mounting table 2 is fixed to the bottom by a cylindrical support member 3 extending from the center of the bottom of the exhaust chamber 11 to the upper side. The support member 3 is made of a ceramic such as A1N. Further, the mounting table 2 is provided with a guide ring 4 covering the outer edge portion thereof for guiding the crystal -11 - 201030172 circle W. The guide ring 4 is made of, for example, quartz, AIN, Al2〇3,

SiN等之材質所構成之環狀構件。 再者，在載置台2埋入有當作溫度調節機構之電阻加 熱型之加熱器5。該加熱器5係藉由自加熱器電源5a供電 ，加熱載置台2,以其熱均勻加熱屬於被處理基板之晶圓 W。並且，雖然省略圖示，但是設置有於自加熱器電源5a 將電力供給至加熱器5而予以溫度控制之時，去除因被供 給至電極7之高頻電力所引起之高頻雜波的噴嘴過濾器。 @ 再者，在載置台2裝備有熱電偶（TC) 6。藉由該熱 電偶6，執行溫度測量，依此可將晶圓W之加熱溫度控制 在例如室溫至900°C之範圍。 再者，在載置台2具有用以支撐晶圓W而予以升降 之晶圓支撐銷（無圖示）。各晶圓支撐銷係被設置成可對 載置台2之表面突出縮進。 再者，在載置台2之表面側埋設有電極7。該電極7 係被配置在加熱器5和載置台2表面之間。在該電極7， Q 藉由供電線7a經匹配箱（M.B. ) 8連接偏壓施加用之高頻 電源9。成爲藉由高頻電波9對電極7供給高頻電力，而 可以對屬於基板之晶圓W施加高頻偏壓（RF偏壓）之構 成。作爲電極7之材質，係以具有與載置台2之材質的 A1N等之陶瓷相同之熱膨脹係數的材質爲佳，例如以使用 鉬、鎢等之導電性材料爲佳。電極7係被形成例如網眼狀 、格子狀、螺旋狀等之形狀。電極7之尺寸係以形成至少 與被處理體相同，或更大爲佳。 -12- 201030172 在處理容器1之底壁la之略中央部形成有圓形之開 口部10。在底壁la連設有與此開口部10連通，朝下方突 出之排氣室11。在該排氣室11連接有排氣管12，經該排 氣管12被連接於排氣裝置24。 在形成處理容器1之側壁lb之上端，配置有具有當 作開關處理容器1之蓋體（頂板）之功能的環狀平板13。 平板13之內周下部係朝向內側（處理容器內空間）突出 φ ，形成有環狀之支撐部13a » 在平板13配置有氣體導入部40，氣體導入部40設置 有具有第1氣體導入孔之第1氣體導入部14。再者，在處 理容器1之側壁lb，設置具有第2氣體導入孔之第2氣體 導入部16。即是，第1氣體導入部14及第2氣體導入部 15被設置成上下兩段。第1氣體導入部14及第2氣體導 入部15被連接於供給成膜原料氣體或電漿激勵用氣體之 氣體供給機構18。並且，第1氣體導入部14及第2氣體 〇 導入部15即使被設置成噴嘴狀或噴淋頭狀亦可。再者， 即使將第1氣體導入部14和第2氣體導入部15設置成單 一噴淋頭亦可。並且，即使將第1氣體導入部14和第2 氣體導入部15皆設置在處理容器1之側壁lb亦可。 再者，在處理容器1之側壁lb，設置有電漿CVD裝 置100、在與此鄰接之搬運室（無圖示）之間，用以執行 晶圓W之搬入搬出的搬入搬出口 16，和開關該搬入搬出 口 1 6之閘閥1 7。 氣體供給機構18具有於當作成膜氣體之含氮氣體（ -13- 201030172 含N氣體）供給源i9a、含矽化合物氣體（含Si氣體）供 給源19b、電漿生成用氣體之惰性氣體供給源19c以及於 洗淨處理容器1內之時所使用之洗淨氣體供給源19d。含 氮氣體供給源19a連接於第1氣體導入部14。再者，含矽 氣體供給源1 9b、惰性氣體供給源1 9c以及洗淨氣體供給 源19d被連接於第2氣體導入部15。並且，氣體供給機構 18即使另外具有置換例如處理容器內氛圍之時所使用之清 除氣體供給源等以當作例如上述以外無圖示之氣體供給源 φ 亦可。即使將惰性氣體供給源19c當作清除氣體供給源使 用亦可。 本發明係使用氮氣（N2)當作成膜原料氣體之含氮氣 體。再者，作爲其他成膜原料氣體之含矽化合物氣體，可 以使用例如矽烷（SiH4 )、二矽烷（Si2H6 )、三矽烷（A ring member made of a material such as SiN. Further, a heater 5 having a resistance heating type as a temperature adjustment mechanism is embedded in the mounting table 2. The heater 5 is supplied with power from the heater power source 5a, and the stage 2 is heated to uniformly heat the wafer W belonging to the substrate to be processed. Further, although not shown, a nozzle for removing high-frequency noise due to high-frequency power supplied to the electrode 7 when the power is supplied from the heater power supply 5a to the heater 5 is controlled. filter. @ Further, the mounting table 2 is equipped with a thermocouple (TC) 6. By the thermocouple 6, temperature measurement is performed, whereby the heating temperature of the wafer W can be controlled, for example, in the range of room temperature to 900 °C. Further, the mounting table 2 has a wafer supporting pin (not shown) for supporting and lifting the wafer W. Each of the wafer support pins is provided to protrude inwardly from the surface of the stage 2. Further, an electrode 7 is buried on the surface side of the mounting table 2. This electrode 7 is disposed between the heater 5 and the surface of the mounting table 2. At the electrodes 7, Q, a high frequency power supply 9 for bias application is connected via a supply box 7a via a matching box (M.B.) 8. By supplying high-frequency power to the electrode 7 by the high-frequency radio wave 9, it is possible to apply a high-frequency bias (RF bias) to the wafer W belonging to the substrate. The material of the electrode 7 is preferably a material having a thermal expansion coefficient similar to that of a ceramic such as A1N of the material of the mounting table 2. For example, a conductive material such as molybdenum or tungsten is preferably used. The electrode 7 is formed into a shape such as a mesh shape, a lattice shape, a spiral shape or the like. The size of the electrode 7 is formed to be at least the same as the object to be processed, or more preferably. -12- 201030172 A circular opening portion 10 is formed at a substantially central portion of the bottom wall la of the processing container 1. An exhaust chamber 11 that communicates with the opening 10 and protrudes downward is connected to the bottom wall la. An exhaust pipe 12 is connected to the exhaust chamber 11, and is connected to the exhaust device 24 via the exhaust pipe 12. At the upper end of the side wall lb forming the processing container 1, an annular flat plate 13 having a function as a lid (top plate) of the switch processing container 1 is disposed. The lower part of the inner periphery of the flat plate 13 protrudes toward the inner side (the space inside the processing container) to form an annular support portion 13a. The gas introduction portion 40 is disposed on the flat plate 13, and the gas introduction portion 40 is provided with the first gas introduction hole. The first gas introduction unit 14 is provided. Further, the second gas introduction portion 16 having the second gas introduction hole is provided in the side wall 1b of the container 1. In other words, the first gas introduction portion 14 and the second gas introduction portion 15 are provided in two stages. The first gas introduction portion 14 and the second gas introduction portion 15 are connected to a gas supply mechanism 18 that supplies a film formation source gas or a plasma excitation gas. Further, the first gas introduction portion 14 and the second gas 导入 introduction portion 15 may be provided in a nozzle shape or a shower head shape. Further, the first gas introduction portion 14 and the second gas introduction portion 15 may be provided as a single shower head. Further, even the first gas introduction portion 14 and the second gas introduction portion 15 may be provided on the side wall 1b of the processing container 1. Further, the side wall 1b of the processing container 1 is provided with a plasma CVD apparatus 100, and a loading/unloading port 16 for performing loading and unloading of the wafer W between the adjacent transfer chambers (not shown), and The gate valve 17 of the loading and unloading port 16 is opened and closed. The gas supply mechanism 18 has a nitrogen-containing gas (-13-201030172 N-containing gas) supply source i9a as a film formation gas, a ruthenium-containing compound gas (including Si gas) supply source 19b, and an inert gas supply source for a plasma generation gas. 19c and a cleaning gas supply source 19d used when washing the inside of the processing container 1. The nitrogen-containing gas supply source 19a is connected to the first gas introduction portion 14. Further, the helium-containing gas supply source 19b, the inert gas supply source 19c, and the cleaning gas supply source 19d are connected to the second gas introduction portion 15. In addition, the gas supply means 18 may have a purge gas supply source or the like which is used when replacing the atmosphere in the processing container, for example, and may be, for example, a gas supply source φ (not shown). The inert gas supply source 19c can be used as a purge gas supply source. The present invention uses nitrogen (N2) as a nitrogen-containing gas as a film forming material gas. Further, as the ruthenium-containing compound gas of another film forming material gas, for example, decane (SiH4), dioxane (Si2H6), or trioxane (for example,

Si3H8 )等之 SinH2n + 2、TSA ( Trisilylamine :三甲桂垸基 氨）等。在該中，也特別以二矽烷（Si2H6 )爲佳。即是 ，在控制氮化矽膜之陷阱之數量的目的，係以使用氮氣和 @ 二矽烷之組合以作爲成膜原料氣體爲佳。並且，作爲惰性 氣體可以使用例如N2氣體或稀有氣體等。稀有氣體有助 於生成安定之電漿以作爲電漿激勵用氣體，例如可以使用 例如Ar氣體、Kr氣體、Xe氣體、He氣體等。再者，作 爲洗淨氣體可以例示CIF3、NF3、HC1、F2氣體等。在該 些中，以NF3氣體爲佳。 含氮氣體（NO係從氣體供給機構18之含氮氣體供 給源19a經氣體管線20而到達至第1氣體導入部14，自 -14- 201030172 第1氣體導入部14被導入至處理容器1內。另外，含矽 化合物氣體、惰性氣體及洗淨氣體係自含矽化合物氣體供 給源19b、惰性氣體供給源19c、洗淨氣體供給源I9d，分 別經氣體管線20而到達至第2氣體導入部15，自第2氣 體導入部15被導入至處理容器1內。在連接於各氣體供 給源之各個氣體管線20設置有質量流量控制器21以及前 後之開關閥22。藉由如此之氣體供給機構18之構成，成 φ 爲可以控制所供給之氣體之切換或流量等。並且，Ar等 之電漿激發用之惰性氣體爲任意氣體，不一定要與成膜原 料氣體同時供給。 當作排氣機構之排氣裝置24具備有渦輪分子泵等之 高速真空泵。如上述般，排氣裝置24經排氣管12被連接 於處理容器1之排氣室11»藉由使該排氣裝置24動作， 處理容器1內之氣體係均勻流入至排氣室11內之空間11a ，並且自空間1 1 a經排氣管1 2而排出至外部。依此，能 φ 夠將處理容器1內高速減壓至例如〇.133Pa。 接著，針對微波導入機構27之構成予以說明。微波 導入機構27主要構成係具備透過板28、平面天線31、慢 波材33、蓋體34、導波管37以及微波產生裝置39。 作爲介電體構件之透過板28係在平板13被配備在突 出至內周側之支撐部13a上。透過板28係由透過微波之 介電體，例如石英或Al2〇3 ' A1N等之陶瓷所構成。尤其 當作電漿CVD裝置使用之時，則以A1203、A1N等之陶瓷 爲佳。該透過板28和支撐部1 3a之間經密封構件29被氣 -15- 201030172 密密封。因此，處理容器1內被保持氣密。 平面天線31係在透過板28之上方，被設置成與載置 台2對向。平面天線31構成圓板狀。並且，平面天線31 之形狀並不限定於圓板狀，例如即使爲四角板狀亦可。該 平面天線31被卡止在平板13之上端。 平面天線31係由例如表面被鍍金或鍍銀之銅板、鎳 板、SUS板或鋁板所構成。平面天線31具有放射微波之 多數槽狀之微波放射孔32。微波放射孔32係以特定圖案 _ 貫通平面天線31而形成。 各個微波放射孔32係如第2圖所示般，構成細長長 方形狀（槽狀），且鄰接之兩個微波放射孔構成對。然後 ，典型上鄰接之微波放射孔32配置成「L」字狀。再者， 如此一來組合成特定形狀（例如L字狀）而被配置之微波 放射孔32又被配置成全體成同心圓狀。 微波放射孔32之長度或配列間隔係因應微波之波長 (Ag)而被決定。例如，微波放射孔32之間隔係被配置 Q 成從Ag/4成爲Ag。在第2圖中，以Δγ表示形成同心圓 狀之鄰接的微波放射孔32彼此之間隔。並且，微波放射 孔32之形狀即使爲圓形狀、圓弧狀等之其他形狀亦可。 並且，微波放射孔32之配置形態並不特別限定，除同心 圓狀之外，例如亦可以配置成螺旋狀、放射狀等。 在平面天線31之上面設置有具有大於真空之介電率 ，例如石英、Α12〇3、Α1Ν、樹脂等的慢波材33。該慢波 材33由於在真空中微波之波長變長，故具有縮短微波之 -16 - 201030172 波長而調整電漿之功能。 並且，在平面天線31和透過板28之間’再者慢波材 3 3和平面天線31之間’即使分別接觸或間隔開亦可’但 以接觸爲佳。 在處理容器13之上部，以覆蓋該些平面天線31及慢 波材33之方式，設置有蓋構件34。蓋構件34係由例如銘 或不鏽鋼等之金屬材料所形成。平板13和蓋構件34係藉 φ 由密封構件35被密封。在蓋構件34之內部形成有冷卻水 流路3 4 a。藉由使冷卻水流通該冷卻水流路3 4 a ’則可以 冷卻蓋體34、慢波材33、平面天線31及透過板28。並且 ，蓋構件34被接地。 在蓋構件34之上壁（天井部）之中央，形成有開口 部36，在該開口部36連接有導波管37。導波管37之另 一端側經匹配電路38連接有產生微波之微波產生裝置39 〇 φ 導波管37具有從上述蓋構件34之開口部36延伸至 上方之剖面圓形狀之同軸導波管37a，和連接於該同軸導 波管37a之上端部之延伸於水平方向之矩形導波管37b。 同軸導波管3 7a之中心延伸存在有內導體41。在該內 導體41係在其下端部連接固定於平面天線31之中心。藉 由如此之構造，微波係經同軸導波管37a之內導體41而 有效率均勻地呈放射狀傳播至平面天線31» 藉由上述般之構成的微波導入機構27,在微波產生裝 置39所產生之微波經導波管37而被搬運至平面天線31， -17- 201030172 並且經透過板28被導入至處理容器1內。並且，微波之 頻率以使用例如2.45 GHa爲佳，其他亦可以使用8.35GHz 、1.98GHz。 電漿CVD裝置100之各構成部成爲被連接於控制部 50而被控制之構成。控制部50具有電腦，例如第3圖所 示般，具備有擁有CPU之製程控制器51、連接於該製程 控制器51之使用者介面52及記億部53。製程控制器51 係在電漿CVD裝置100中，統籌控制與例如溫度、壓力 、氣體流量、微波輸出、偏壓施加用之高頻輸出等之製程 條件有關之各構成部（例如，加熱器電源5a、高頻電源9 '氣體供給機構18、排氣裝置24、微波產生裝置39等） 之控制手段。 使用者介面52具有工程管理者爲了管理電漿CVD裝 置100執行指令輸入操作之鍵盤，或使電漿CVD裝置100 之運轉狀況可觀視而所顯示之顯示器等。再者，在記憶部 53係保存有製程配方，該製程配方記錄有用以在製程控制 Q 器51之控制下實現在電漿CVD裝置100所實行之各種處 理之控制程式（軟體），或處理條件資料等。 然後，因應所需，以來自使用者介面52之指示等自 記億部53叫出任意製程配方，使製程控制器51實行，依 此，在製程控制器51之控制下，在電漿CVD裝置100之 處理容器1內執行所欲處理。再者，上述控制程式或處理 條件資料等之製程配方亦可以利用儲存於電腦可讀取之記 憶媒體，或利用儲存在例如CD-ROM、硬碟、軟碟、快閃 -18- 201030172 記憶體、DVD、藍光光碟等之狀態者，或是亦可自其他裝 置經例如專用迴線隨時傳送而在線上利用。 接著，針對依據使用RLSA方式之電漿CVD裝置1〇〇 之電漿CVD法的氮化矽膜之堆積處理予以說明。首先， 首先打開閘閥17，將晶圓W自搬入搬出口 16搬入至處理 容器1內，載置於載置台2上。接著，一面減壓排氣處理 容器1內，一面自氣體供給機構18之含氮氣體供給源19a φ 、含矽化合物氣體供給源1 9b以及惰性氣體供給源1 9c以 特定流量將含氮氣體、含矽化合物氣體以及惰性氣體分別 經第1氣體導入部14及第2氣體導入部15而導入至處理 容器1內。然後，將處理容器1內調節至特定壓力。 接著，將在微波產生裝置39所產生之特定頻率例如 2.45GHz之微波經匹配電路38引導至導波管37。被引導 至導波管37之微波係依序通過矩形導波管3 7b以及同軸 導波管37a，經內導體41而被供給至平面天線31。即是 ❿ ，微波係在同軸導波管3 7a內朝向平面天線31傳播。然 後，微波係從平面天線31之槽狀之微波放射孔32經透過 板28而被放射至處理容器1內中之晶圓W之上方空間。 此時之微波輸出係將微波透過之區域的透過板28之單位 面積之輸出密度設在0.25〜2.56W/cm2之範圍內爲佳。微 波輸出係可以自例如500〜5000W之範圍內，以因應目的 而成爲上述範圍內之輸出密度之方式，予以選擇。 藉由從平面天線31經過透過板28被放射至處理容器 1之微波，在處理容器1內形成電磁場，含氮氣體、含矽 -19- 201030172 化合物氣體分別電漿化。然後，在電漿中原料氣體之分解 有效率地進行，藉由SipHq、SiHq、NHq、N (在此，p、q 係指任意之數量）等之活性種之反應，堆積氮化矽（SiN )之薄膜。在基板形成氮化矽膜之後’附著於腔室內之氮 化矽膜將當作洗淨氣體之C1F3氣體供給至腔室內，藉由 100〜500 °C，最佳爲200〜300 °C之熱洗淨除去。再者，於 使用NF3當作洗淨氣體之時，在室溫〜300 °C生成電漿執 行。 © 再者，於執行電漿CVD處理之期間，自高頻電源9 供給特定頻率及大小之高頻電力至載置台2之電極7，將 RF偏壓施加至晶圓W。在電漿CVD裝置100中，因可以 將電漿之電子溫度維持低溫，故不會對膜產生傷害，而且 由於高密度電漿，成膜氣體之分子容易分解，故促進反應 。再者，在適當範圍施加RF偏壓，因作用成將電漿中之 離子拉進晶圓W，故提高氮化矽膜之緻密性，並且作用成 增加膜中之陷阱。 0 自高頻電源9所供給之RF偏壓之頻率係在例如 400kHz以上60MHz以下之範圍內爲佳，以450kHz以上 2 0MHz以下之範圍內爲更佳。RF 偏壓係在例如 0.009W/cm2以上0.64W/Cm2以下之範圍內作爲晶圓W之 單位面積之輸出密度施加爲佳，在 0.01 6W/cm2以上 0.095W/cni2以下之範圍內施加爲更佳。再者，rf偏壓功 率係以3W以上200W以下爲佳，更佳爲從5w以上20W 以下之範圍內供給電極使成爲上述輸出密度，而可以施加 -20- 201030172 RF偏壓。 以上之條件係當作製程配方被保存在控制 憶部53。然後，藉由製程控制器51讀出其製 控制訊號發送至電漿CVD裝置100之各構成 供給機構18、排氣裝置24、微波產生裝置39 5a、高頻電源9等，在所欲之條件下實現電漿 φ 再者，在具有上述構成之電漿CVD裝置 成膜氮化矽膜之時之電漿CVD處理之壓力條 ，藉由在 〇_〇〇9W/cm2以上 0.64W/cm2以下之 範圍內供給自高頻電源9供給至載置台2之電 偏壓功率，則可以控制成使存在所形成之氮化 阱之存在數均勻增加之方向。 第4圖爲表示在電漿CVD裝置100中所 化矽膜之製造工程的工程圖。如第4圖（a) 任意之基底層（例如，Si基板或二氧化矽膜） 用N2/Si2H6電漿執行電漿CVD處理。在該電髮 中，係將處理壓力設定在l〇Pa以上133.3Pa 內，最佳爲在20Pa以上60Pa以下之範圍內設 然後，自高頻電源9供給0.009W/cm2以上0. 範圍內之RF功率供給至載置台2之電極7。依 圖（b )所示般，可以形成氮化矽膜70。藉由垄 施加RF偏壓，比起不施加RF偏壓之時，可 氮化矽膜70之陷阱數。 部5 0之記 程配方，將 部例如氣體 、加熱電源 CVD處理 100中，使 件成爲一定 輸出密度之 極7的RF 砂膜中之陷 執行之氮氧 所示般，在 60上，使 【CVD處理 以下之範圍 定成一定。 64W/cm2 之 此，如第4 寸基底層60 以均勻增加 -21 - 201030172 接著’舉出成爲本發明之基礎的實驗資料，針對電漿 CVD處理之最佳條件予以說明。在此，含氮氣體使用N2 、含矽化合物氣體使用Si2 Η 6氣體、電漿生成用氣體使用 Ar氣體，在電漿CVD裝置100中，以下述電漿CVD條件 實施電漿CVD，形成單膜之氮化矽膜。針對以各條件所成 膜之氮化矽膜，測量折射率、濕蝕刻率以及平能帶電位（Si3H8), etc. SinH2n + 2, TSA (Trisilylamine: Trimethyl sulphate). Among them, dioxane (Si2H6) is particularly preferred. That is, the purpose of controlling the number of traps of the tantalum nitride film is preferably to use a combination of nitrogen gas and @dioxane as a film forming material gas. Further, as the inert gas, for example, an N 2 gas or a rare gas can be used. The rare gas contributes to the formation of a stable plasma as a plasma excitation gas, and for example, Ar gas, Kr gas, Xe gas, He gas or the like can be used. Further, as the cleaning gas, CIF3, NF3, HC1, F2 gas or the like can be exemplified. Among these, NF3 gas is preferred. The nitrogen-containing gas (NO) is supplied from the nitrogen-containing gas supply source 19a of the gas supply mechanism 18 to the first gas introduction unit 14 via the gas line 20, and is introduced into the processing container 1 from the first gas introduction unit 14 from -14 to 201030172. Further, the ruthenium-containing compound gas, the inert gas, and the purge gas system are supplied from the ruthenium-containing compound gas supply source 19b, the inert gas supply source 19c, and the cleaning gas supply source I9d to the second gas introduction portion via the gas line 20, respectively. 15. The second gas introduction unit 15 is introduced into the processing container 1. The mass flow controller 21 and the front and rear switching valves 22 are provided in each gas line 20 connected to each gas supply source. By such a gas supply mechanism In the configuration of 18, it is possible to control the switching or flow rate of the supplied gas, etc. Further, the inert gas for excitation of plasma such as Ar is an arbitrary gas, and is not necessarily supplied simultaneously with the film forming material gas. The exhaust device 24 of the mechanism is provided with a high-speed vacuum pump such as a turbo molecular pump. As described above, the exhaust device 24 is connected to the exhaust chamber 11 of the processing container 1 via the exhaust pipe 12 by using the exhaust gas When the operation 24 is performed, the gas system in the processing container 1 uniformly flows into the space 11a in the exhaust chamber 11, and is discharged from the space 11a through the exhaust pipe 12 to the outside. Accordingly, the processing container 1 can be φ The high-speed internal pressure reduction is performed, for example, to 133 Pa. Next, the configuration of the microwave introduction mechanism 27 will be described. The microwave introduction mechanism 27 mainly includes a transmission plate 28, a planar antenna 31, a slow wave material 33, a cover 34, and a waveguide. 37. The microwave generating device 39. The transmissive plate 28 as a dielectric member is provided on the flat plate 13 on the support portion 13a projecting to the inner peripheral side. The transmissive plate 28 is made of a dielectric material that transmits microwaves, such as quartz or Al2. 〇3 'A1N or other ceramics. Especially when used as a plasma CVD device, it is preferable to use ceramics such as A1203, A1N, etc. The transmissive plate 28 and the support portion 13a are ventilated via the sealing member 29 - 15-201030172 Sealed. Therefore, the inside of the processing container 1 is kept airtight. The planar antenna 31 is disposed above the transmissive plate 28 and opposed to the mounting table 2. The planar antenna 31 is formed in a disk shape. The shape of 31 is not limited to a circular plate shape. For example, the planar antenna 31 is locked at the upper end of the flat plate 13. The planar antenna 31 is composed of, for example, a copper plate or a silver plated surface, a nickel plate, a SUS plate or an aluminum plate. The microwave radiation hole 32 having a plurality of grooves in the form of a microwave is formed. The microwave radiation hole 32 is formed by passing through the planar antenna 31 in a specific pattern. Each of the microwave radiation holes 32 is formed in an elongated rectangular shape as shown in FIG. And the two adjacent microwave radiation holes are paired. Then, the microwave radiation holes 32 that are typically adjacent to each other are arranged in an "L" shape. Further, the microwave radiation holes 32 arranged in such a manner as to be combined into a specific shape (e.g., L-shaped) are arranged in a concentric shape as a whole. The length or arrangement interval of the microwave radiation holes 32 is determined in accordance with the wavelength (Ag) of the microwave. For example, the interval between the microwave radiation holes 32 is arranged such that Q becomes Ag from Ag/4. In Fig. 2, the distance between the adjacent microwave radiation holes 32 forming concentric circles is indicated by Δγ. Further, the shape of the microwave radiation hole 32 may be other shapes such as a circular shape or an arc shape. Further, the arrangement of the microwave radiation holes 32 is not particularly limited, and may be arranged in a spiral shape or a radial shape, for example, in addition to the concentric shape. On the upper surface of the planar antenna 31, a slow wave material 33 having a dielectric constant greater than vacuum, such as quartz, Α12〇3, Α1Ν, resin, or the like, is disposed. Since the slow wave material 33 has a long wavelength of microwaves in a vacuum, it has a function of shortening the wavelength of the microwave -16 - 201030172 and adjusting the plasma. Further, between the planar antenna 31 and the transmissive plate 28, 'between the slow wave material 3 3 and the planar antenna 31' may be contacted or spaced apart, respectively, but contact is preferred. A cover member 34 is provided on the upper portion of the processing container 13 so as to cover the planar antenna 31 and the slow-wave material 33. The cover member 34 is formed of a metal material such as Ming or stainless steel. The flat plate 13 and the cover member 34 are sealed by the sealing member 35 by φ. A cooling water flow path 34a is formed inside the cover member 34. The cover body 34, the slow wave material 33, the planar antenna 31, and the transmission plate 28 can be cooled by circulating cooling water through the cooling water flow path 3 4 a '. And, the cover member 34 is grounded. An opening portion 36 is formed in the center of the upper wall (panel portion) of the lid member 34, and a waveguide 37 is connected to the opening portion 36. The other end side of the waveguide 37 is connected to a microwave generating device 39 for generating a microwave via a matching circuit 38. The 导φ waveguide 37 has a coaxial waveguide 37a having a circular cross section extending from the opening 36 of the cover member 34 to the upper side. And a rectangular waveguide 37b extending in the horizontal direction connected to the upper end portion of the coaxial waveguide 37a. An inner conductor 41 extends in the center of the coaxial waveguide 37a. The inner conductor 41 is connected and fixed to the center of the planar antenna 31 at its lower end portion. With such a configuration, the microwave system is efficiently and uniformly propagated radially to the planar antenna 31 through the inner conductor 41 of the coaxial waveguide 37a. The microwave introducing means 27 constructed as described above is used in the microwave generating means 39. The generated microwaves are transported to the planar antenna 31, -17-201030172 via the waveguide 37, and are introduced into the processing container 1 via the transmission plate 28. Further, the frequency of the microwave is preferably used, for example, 2.45 GHa, and the others can also be used at 8.35 GHz and 1.98 GHz. Each component of the plasma CVD apparatus 100 is configured to be connected to the control unit 50 and controlled. The control unit 50 has a computer, for example, as shown in Fig. 3, and includes a process controller 51 having a CPU, a user interface 52 connected to the process controller 51, and a memory unit 53. The process controller 51 is integrated in the plasma CVD apparatus 100, and controls various components related to process conditions such as temperature, pressure, gas flow rate, microwave output, and high-frequency output for bias application (for example, heater power supply). 5a, a control means for the high-frequency power source 9' gas supply mechanism 18, the exhaust device 24, the microwave generating device 39, and the like. The user interface 52 has a keyboard for the engineer to perform an instruction input operation for managing the plasma CVD apparatus 100, or a display for displaying the operation state of the plasma CVD apparatus 100. Further, the memory unit 53 stores a process recipe for recording a control program (software) for realizing various processes performed by the plasma CVD apparatus 100 under the control of the process control Q 51, or processing conditions. Information, etc. Then, in response to the instruction from the user interface 52, the self-reporting unit 53 calls out any process recipe to cause the process controller 51 to be executed. Accordingly, under the control of the process controller 51, the plasma CVD apparatus 100 The desired processing is performed in the processing container 1. Furthermore, the process recipes of the above control program or processing condition data may also be stored in a computer readable memory medium or stored in, for example, a CD-ROM, a hard disk, a floppy disk, a flash -18-201030172 memory. The status of the DVD, Blu-ray Disc, etc., or may be used on-line from other devices via, for example, a dedicated return line. Next, a deposition process of a tantalum nitride film by a plasma CVD method using a plasma CVD apparatus 1A of the RLSA method will be described. First, the gate valve 17 is first opened, and the wafer W is carried into the processing container 1 from the loading/unloading port 16 and placed on the mounting table 2. Then, while the inside of the exhaust gas treatment container 1 is decompressed, the nitrogen-containing gas supply source 19a φ, the ruthenium-containing compound gas supply source 19b, and the inert gas supply source 19c are supplied from the gas supply mechanism 18 at a specific flow rate. The ruthenium-containing compound gas and the inert gas are introduced into the processing container 1 through the first gas introduction unit 14 and the second gas introduction unit 15, respectively. Then, the inside of the processing container 1 is adjusted to a specific pressure. Next, the microwave of a specific frequency generated by the microwave generating device 39, for example, 2.45 GHz, is guided to the waveguide 37 via the matching circuit 38. The microwaves guided to the waveguide 37 are sequentially supplied to the planar antenna 31 via the inner conductor 41 through the rectangular waveguide 37b and the coaxial waveguide 37a. That is, 微波, the microwave system propagates toward the planar antenna 31 in the coaxial waveguide 37a. Then, the microwave system is radiated from the groove-shaped microwave radiation holes 32 of the planar antenna 31 to the space above the wafer W in the processing container 1 via the transmission plate 28. The microwave output at this time is preferably such that the output density per unit area of the transmission plate 28 in the region through which the microwaves are transmitted is in the range of 0.25 to 2.56 W/cm2. The microwave output system can be selected from the range of, for example, 500 to 5000 W, and the output density within the above range in accordance with the purpose. An electromagnetic field is formed in the processing container 1 by the microwave radiated from the planar antenna 31 through the transmission plate 28 to the processing container 1, and the nitrogen-containing gas and the compound gas containing 矽-19-201030172 are respectively plasmad. Then, the decomposition of the material gas in the plasma is efficiently performed, and the tantalum nitride (SiN) is deposited by the reaction of active species such as SipHq, SiHq, NHq, N (here, p, q means any number). ) film. After the tantalum nitride film is formed on the substrate, the tantalum nitride film attached to the chamber is supplied with C1F3 gas as a cleaning gas into the chamber by 100 to 500 ° C, preferably 200 to 300 ° C. Wash and remove. Further, when NF3 is used as the cleaning gas, plasma is generated at room temperature to 300 °C. Further, during the plasma CVD process, high-frequency power of a specific frequency and magnitude is supplied from the high-frequency power source 9 to the electrode 7 of the mounting table 2, and an RF bias is applied to the wafer W. In the plasma CVD apparatus 100, since the electron temperature of the plasma can be kept low, damage to the film is not caused, and since the molecules of the film forming gas are easily decomposed by the high-density plasma, the reaction is promoted. Further, by applying an RF bias in an appropriate range, since it acts to pull ions in the plasma into the wafer W, the compactness of the tantalum nitride film is improved and acts to increase the trap in the film. The frequency of the RF bias supplied from the high-frequency power source 9 is preferably in the range of, for example, 400 kHz or more and 60 MHz or less, and more preferably in the range of 450 kHz or more and 20 MHz or less. The RF bias is preferably applied as an output density per unit area of the wafer W in a range of, for example, 0.009 W/cm 2 or more and 0.64 W/cm 2 or less, and is applied in a range of 0.016 W/cm 2 or more and 0.095 W/cni 2 or less. good. Further, the rf bias power is preferably 3 W or more and 200 W or less, and more preferably the electrode is supplied from the range of 5 W or more and 20 W or less to have the above output density, and the RF bias of -20 - 201030172 can be applied. The above conditions are stored in the control memory section 53 as process recipes. Then, the process controller 51 reads out the control signals transmitted from the control unit 51 to the respective constituent supply mechanisms 18, the exhaust unit 24, the microwave generating unit 39a, the high frequency power source 9, etc. of the plasma CVD apparatus 100, under the desired conditions. The plasma CVD treatment is performed under the plasma CVD apparatus having the above-described structure, and the pressure plasm of the plasma CVD treatment is performed at 〇_〇〇9W/cm2 or more and 0.64 W/cm2 or less. Within the range, the electric bias power supplied from the high-frequency power source 9 to the stage 2 can be controlled so as to have a direction in which the number of formed nitride wells is uniformly increased. Fig. 4 is a drawing showing the manufacturing process of the ruthenium film in the plasma CVD apparatus 100. The base layer (for example, Si substrate or ruthenium dioxide film) as shown in Fig. 4(a) is subjected to plasma CVD treatment using N2/Si2H6 plasma. In the electric hair, the treatment pressure is set to be within a range of from 10 ÅPa to 133.3 Pa, preferably within a range of from 20 Pa to 60 Pa, and then supplied from the high-frequency power source 9 to a thickness of 0.99 W/cm 2 or more. The RF power is supplied to the electrode 7 of the mounting table 2. As shown in (b), a tantalum nitride film 70 can be formed. By applying an RF bias to the ridge, the number of traps of the tantalum film 70 can be nitrided compared to when the RF bias is not applied. The formulation of the part 50 is set in a CVD process 100 such as a gas or a heating power source, and the NOx is performed in the RF sand film of the pole 7 of a certain output density. The following range of CVD treatment is fixed. 64W/cm2, for example, the 4th base layer 60 is uniformly increased -21 - 201030172. Next, the experimental data which is the basis of the present invention will be described, and the optimum conditions for the plasma CVD treatment will be described. Here, N2 is used as the nitrogen-containing gas, Si2Η6 gas is used as the ruthenium-containing compound gas, and Ar gas is used as the gas for plasma generation. In the plasma CVD apparatus 100, plasma CVD is performed by the following plasma CVD conditions to form a single film. The tantalum nitride film. The refractive index, the wet etching rate, and the flat band potential were measured for the tantalum nitride film formed under various conditions (

Vfb )之磁滯。並且，Vfb之磁滯係利用以下之眾知技術 之Hg探針法進行測量。首先，製作第5圖（a)所示之電 @ 容器構造之試驗用裝置。第5圖（a)中，符號91爲矽基 板，符號93爲以電漿CVD所形成之氮化矽膜（閘極絕緣 膜），符號95爲水銀閘極電極。然後，將矽基板91設爲 接地電位，將電壓從-20V變化至10V而施加至水銀閘極 電極95 (正向）後，逆向從10V變化至-20V而予以施加 (反向）。測量該往復之電壓施加過程中之電容，從正向 和反向之各CV曲線（磁滯曲線），如第5圖（b)所示般 ，求出Vfb磁滯。在往復的電壓施加中CV曲線變化係藉 ❹ 由施加電壓電洞（Hole )被氮化矽膜中捕獲之結果，爲了 取消其電荷，產生電壓變化，表示Vfb磁滞越大，氮化矽 膜中陷阱也多。 〔電漿CVD條件〕Vfb) hysteresis. Further, the hysteresis of Vfb is measured by the Hg probe method of the following known technique. First, a test device for the electric @container structure shown in Fig. 5(a) was produced. In Fig. 5(a), reference numeral 91 denotes a ruthenium substrate, reference numeral 93 denotes a tantalum nitride film (gate insulating film) formed by plasma CVD, and reference numeral 95 denotes a mercury gate electrode. Then, the germanium substrate 91 was set to the ground potential, and the voltage was applied from the -20 V to 10 V to be applied to the mercury gate electrode 95 (forward), and then reversed from 10 V to -20 V to be applied (reverse). The capacitance during the application of the reciprocating voltage was measured, and the Vfb hysteresis was obtained from the respective forward and reverse CV curves (hysteresis curves) as shown in Fig. 5(b). In the reciprocating voltage application, the CV curve is changed by the application of a voltage hole (Hole) by the tantalum nitride film. In order to cancel the charge, a voltage change is generated, indicating that the Vfb hysteresis is larger, the tantalum nitride film There are also many traps. [plasma CVD conditions]

處理溫度（載置台）：400°C 微波功率：2kW (輸出密度1.023W/cm2 :透過板之單 位面積） -22- 201030172 處理壓力·_ 2.7Pa ' 26.6Pa ' 40Pa Ar 氣體流量：600mL/min(sccm) N2 氣體流量：400mL/min ( seem) S i 2 Η 6 氣體流量：2 m L / m i η ( s c c m ) RF偏壓頻率：1 3.56MHz RF偏壓之功率：〇W、5W (輸出密度0.016W/cm2)、 l〇W (輸出密度 0.032W/cm2 ) 、50W (輸出密度 φ 0.1 6W/cm2 ) 第6圖（a)表示氮化矽膜之折射率和被供給於載置 台2之RF偏壓功率之關係。第6圖（b)表示使用希氟酸 之氮化矽膜之濕蝕刻率和被供給至載置台2之RF偏壓功 率之關係。第6圖（c )表示氮化矽膜之Vfb測量中之磁 滯大小和被供給至載置台2之RF偏壓功率之關係。從第 6 圖（a)可知 RF 偏壓在 0.16W/cm2，貝[J 以 2.7Pa、26.6Pa 以及40.0Pa之處理壓力，折射率高爲1.85以上爲佳，由 φ 其以2.7Pa之處理壓力，折射率高爲1.95以上爲更佳。並 且，在 RF 偏壓在 0.016W/cm2，則以 2.7Pa、26.6Pa 及 4 0.0Pa之處理壓力，折射率約高爲1.90以上爲佳。 從第6圖（a)〜（c)可知，26.6Pa及40Pa之處理 壓力中，輸出密度藉由施加大約 〇.〇16W/cm2〜 0.03 2 W/cm2左右之RF偏壓，折射率變高，濕蝕刻率變低 ，再者Vfb磁滯變高。折射率上升、濕鈾刻率下降、Vfb 磁滯上升於RF偏壓爲0.016W/cm2以上〇.〇32W/cm2以下 之範圍之輸出密度之時，對於不施加RF偏壓之時的變化 -23- 201030172 量爲最大，在〇. 16 W/cm2之輸出密度施加RF偏壓之時， 同變化量縮小。由以上之結果，表示由於以〇.〇 16W/cm2〜 0.032W/cm2左右之輸出密度施加RF偏壓，成爲（折射率 高，蝕刻率低）緻密，可以形成膜中之陷阱多的氮化矽膜 〇 第6圖（a)〜（c)所示之資料係表示藉由以適當之 範圍的輸出密度，施加RF偏壓，提升氮化矽膜之緻密性 ，並且能夠均勻增加膜中之陷阱。乍看之下相反的上述資 料藉由下述般解釋能夠取得合理的說明。電漿CVD係藉 由對晶圓W施加RF偏壓，電漿中之離子被引進至晶圓W 之傾向變強。但是，在本案所使用之微波電漿，即使施加 RF偏壓，因亦可以維持低電子溫度（0.7〜2eV )，故即 使在例如26.6Pa〜40Pa之低壓力條件亦維持低電子溫度 。其結果，因抑制對膜造成損傷而形成緻密之膜，同時藉 由RF偏壓，控制離子之拉進，故應以在膜中均勻分布適 當之量的陷阱而形成。 另外，由第6圖（a )及（b )所示之折射率以及濕蝕 刻率之結果，判明即使在26.6Pa以及40Pa之壓力條件， 在RF偏壓之功率過大之時（例如，0.16W/cm2之輸出密 度），膜之緻密性降低。再者，依據電漿CVD之氮化矽 膜，原本爲緻密性高之膜，但是當提高壓力時緻密性則降 低。但是，於施加微小之 RF偏壓（例如，0.016〜 0.03 2W/cm2左右之輸出密度）時，則可以提高其緻密性。 此時，推測邊保持膜之緻密性，邊形成多量之陷阱。但是 -24- 201030172 ，當將RF偏壓設爲0.16W/ cm2之輸出密度時，因膜本 之緻密性降低，故Si未鍵結鍵容易成爲終端，如第6 (b ) 、（ c )所示般，應測量鈾刻率之增大、Vfb磁滯 下降（即是，減少陷阱）。 由上述結果，表示在使用電漿CVD裝置100之電 CVD法中，以0.016〜0.032 W/cm2之範圍內之輸出密度 加RF偏壓，並且將處理壓力設定在40Pa以下（例如 φ 〜4〇Pa)之範圍內，依此可以形成陷阱數量多，並且陷 之分布被控制成均勻之氮化矽膜。再者，比起將處理壓 設定成3Pa以下之高真空條件而執行電漿CVD處理之 ’則有不需要渦輪分子泵等之高性能之排氣裝置，或可 緩和處理容器1之耐壓設計基準等，減輕裝置負荷，亦 以降低成本之優點。再者，在3Pa以下之高真空狀態下 藉由離子之濺鍍，雖然有因爲微粒等增加晶圓W之污 危險性，或在氮化矽膜形成降低覆蓋率性能等之製程性 φ 問題’但是即使針對該些問題，亦可以藉由將處理壓力 定在高範圍而迴避。 接著，於在電漿CVD裝置100對被處理體施加RF 壓而形成氮化矽膜之時，針對ΑΓ流量比率對氮化矽膜 Vfb磁滯所造成之影響進行硏究。以下述條件使Ar流 變化而執行電漿CVD，並藉由與上述相同之方法，測 Vfb磁滯。 〔電漿CVD條件〕 身 圖 之 漿 施 10 阱 力 時 以 可 ， 染 的 設 偏 之 量 量 -25- 201030172 :透過板之單 處理溫度（載置台）：400°C 微波功率：2kW (輸出密度1.023W/ 位面積） 處理壓力：26.6Pa 、600mL/min (Processing temperature (mounting table): 400 °C Microwave power: 2 kW (output density 1.023 W/cm2: per unit area of the permeated plate) -22- 201030172 Treatment pressure · _ 2.7 Pa ' 26.6 Pa ' 40 Pa Ar Gas flow rate: 600 mL/min (sccm) N2 gas flow: 400mL/min (see) S i 2 Η 6 gas flow rate: 2 m L / mi η ( sccm ) RF bias frequency: 1 3.56MHz RF bias power: 〇W, 5W (output Density 0.016 W/cm 2 ), l 〇 W (output density 0.032 W/cm 2 ), 50 W (output density φ 0.1 6 W/cm 2 ) Fig. 6 (a) shows the refractive index of the tantalum nitride film and is supplied to the stage 2 The relationship between RF bias power. Fig. 6(b) shows the relationship between the wet etching rate of the tantalum nitride film using heopic acid and the RF bias power supplied to the mounting table 2. Fig. 6(c) shows the relationship between the magnitude of the hysteresis in the Vfb measurement of the tantalum nitride film and the RF bias power supplied to the stage 2. It can be seen from Fig. 6(a) that the RF bias voltage is 0.16 W/cm2, and the shell [J is treated at 2.7 Pa, 26.6 Pa, and 40.0 Pa, and the refractive index is preferably 1.85 or higher, which is treated by φ at 2.7 Pa. The pressure and the high refractive index of 1.95 or more are more preferable. Further, when the RF bias voltage is 0.016 W/cm2, the processing pressure is 2.7 Pa, 26.6 Pa, and 4 0.0 Pa, and the refractive index is preferably about 1.90 or more. As can be seen from Fig. 6 (a) to (c), in the processing pressures of 26.6 Pa and 40 Pa, the output density is increased by applying an RF bias of about 〇16 / 16 W/cm 2 to 0.03 2 W/cm 2 or so. The wet etching rate becomes lower, and the Vfb hysteresis becomes higher. When the refractive index rises, the wet uranium engraving rate decreases, and the Vfb hysteresis rises at an output density in the range of an RF bias of 0.016 W/cm 2 or more and 〇 32 W/cm 2 or less, a change when no RF bias is applied - The amount of 23-201030172 is the largest, and when the RF bias is applied at an output density of W16 W/cm2, the amount of change is reduced. From the above results, it is shown that the RF bias is applied at an output density of about 16 W/cm 2 to 0.032 W/cm 2 to obtain a high refractive index (low refractive index and low etching rate), and it is possible to form a nitride having a large number of traps in the film. The data shown in Fig. 6 (a) to (c) of the enamel film indicates that the density of the tantalum nitride film is improved by applying an RF bias with an appropriate range of output density, and the film can be uniformly increased. trap. At first glance, the opposite of the above information can be reasonably explained by the following explanation. In plasma CVD, by applying an RF bias to the wafer W, the tendency of ions in the plasma to be introduced to the wafer W becomes stronger. However, in the microwave plasma used in the present invention, even if an RF bias is applied, the low electron temperature (0.7 to 2 eV) can be maintained, so that the low electron temperature is maintained even under low pressure conditions of, for example, 26.6 Pa to 40 Pa. As a result, a dense film is formed by suppressing damage to the film, and the ion is pulled in by the RF bias, so that a proper amount of traps are uniformly distributed in the film. Further, as a result of the refractive index and the wet etching rate shown in Figs. 6(a) and (b), it was found that even under the pressure conditions of 26.6 Pa and 40 Pa, when the power of the RF bias is excessive (for example, 0.16 W) /cm2 output density), the compactness of the film is reduced. Further, the tantalum nitride film according to the plasma CVD is originally a film having high density, but the denseness is lowered when the pressure is increased. However, when a slight RF bias is applied (for example, an output density of about 0.016 to 0.03 2 W/cm2), the compactness can be improved. At this time, it is presumed that while maintaining the compactness of the film, a large amount of traps are formed. However, when -24-201030172, when the RF bias voltage is set to an output density of 0.16 W/cm2, since the compactness of the film is lowered, the Si unbonded bond is likely to become a terminal, as in the sixth (b), (c). As shown, the increase in uranium engraving rate and the decrease in Vfb hysteresis (ie, reduction of traps) should be measured. From the above results, it is shown that in the electro-CVD method using the plasma CVD apparatus 100, the RF bias is applied at an output density in the range of 0.016 to 0.032 W/cm2, and the processing pressure is set to 40 Pa or less (for example, φ 〜4 〇). Within the range of Pa), the number of traps can be formed as a whole, and the distribution of the trap is controlled to a uniform tantalum nitride film. Further, the plasma CVD treatment is performed to set the treatment pressure to a high vacuum condition of 3 Pa or less, and there is a high-performance exhaust device that does not require a turbo molecular pump or the like, or the pressure-resistant design of the processing container 1 can be alleviated. Benchmarks, etc., reduce the load on the device and also reduce the cost. Further, in the high vacuum state of 3 Pa or less, by ion sputtering, there is a problem that the contamination of the wafer W is increased by the particles or the like, or the processability φ problem of reducing the coverage performance in the tantalum nitride film is formed. But even for these problems, it is possible to avoid by setting the processing pressure to a high range. Next, when the plasma CVD apparatus 100 applies RF pressure to the object to be processed to form a tantalum nitride film, the influence of the rhodium flow rate ratio on the hysteresis of the tantalum nitride film Vfb is examined. The plasma CVD was performed by changing the Ar flow under the following conditions, and the Vfb hysteresis was measured by the same method as described above. [plasma CVD conditions] When the slurry of the figure is applied with 10 trap force, the amount of dyeing can be set to -25- 201030172: single processing temperature of the plate (mounting table): 400 °C microwave power: 2 kW (output Density 1.023W / bit area) Processing pressure: 26.6Pa, 600mL / min (

Ar 氣體流量：100mL/min ( seem ) seem ) 、1 1 OOmL/min ( seem) N2 氣體流量：400mL/min ( seem)Ar gas flow rate: 100mL/min ( seem ) seem ) , 1 1 OOmL / min ( seem ) N2 gas flow rate : 400mL / min ( seem )

Si2H6 氣體流量：2mL/min ( seem) RF偏壓頻率：1 3.56MHz RF偏壓之功率：5W (輸出密度〇.〇l6WVcm2) 如第7圖所示般，以0.01 6W/cm2 —定施加RF偏壓功 率之時，在 Ar 流量爲 100mL/min ( seem ) 以及 6OOmL/min ( seem )觀察到Vfb磁滯爲高。再者，Ar流量 在11 〇〇mL/min ( seem)觀察到 Vfd磁滯爲低。因此，從 增大Vfb磁滯之觀點來看，Ar氣體之流量應設在50〜 100mL/min ( seem ) 之範圍內爲佳，以設爲 100〜 800mL/min(sccm)之範圍內爲更佳。 再者，Ar氣體對N2氣體之流量比（Ar/N2)以在0.1 以上3以下之範圍內爲佳，以增加陷阱數之觀點來看， Ar/N2從2以下（例如，0.2以上2以下）之範圍內選擇爲 佳。當Ar之流量比變多時，因電漿中之Ar離子變多，故 Vfb磁滯變小，陷阱數變少。再者，Si2H6氣體和Ar氣體 之流量比（Si2H6/A〇係從0.005以上0.01以下之範圍內 選擇爲佳。並且，N2氣體之流量可從100〜1 000mL/min ( -26- 201030172 seem)之範圍內，最佳爲 100〜500mL/min(sccm)之範 圍內，Si2H6氣體之流量可從0_5〜40mL/min(sccm)之範 圍內，最佳爲0.5〜10mL/min(sccm)之範圍，設定成分 別成爲上述流量比。 再者，電漿CVD處理之處理溫度係將載置台2之溫 度設定在300°C以上600°C以下，最若設定在400°C以上 60(TC以下之範圍內爲更佳。 再者，電漿CVD處理中之微波之輸出密度以設定在 微波透過之透過板之單位面積〇.25W/cm2以上2.56W/cm2 以下之範圍內爲佳。 如上述般，本發明之氮化矽膜之製造方法，係藉由選 擇RF偏壓功率和處理壓力而執行電漿CVD，可以在晶圓 W上，簡單製造具有所需量之陷阱之氮化矽膜。如此所形 成之陷阱數多之氮化矽膜可以有效當作例如MOS型半導 體記憶裝置之電荷蓄積層而予以利用。 〔第2實施型態〕 接著，針對疊層本發明之第2實施型態所涉及之氮化 矽膜之成膜方法予以說明。如同在上述第1實施型態中所 說明般，在電漿CVD裝置100中，藉由適當設定形成氮 化矽膜之時之電漿CVD處理之條件，尤其從高頻電源9 供給至載置台2之電極7的RF偏壓功率之大小，和處理 壓力，則可以在所形成之氮化砂膜以均勻分布形成多數陷 讲。利用該特徵，藉由切換對基板施加RF偏壓之開啓/關 -27- 201030172 閉’或使RF偏壓功率變化，則可以在例如鄰接之氮化矽 膜疊層陷阱數不同之氮化矽膜而成膜。 第8圖爲表示疊層在電漿CVD裝置1〇〇中所執行之 氮氧化矽膜而形成之成膜工程的工程圖。首先，如第8圖 (a)所示般，以例如l〇pa以上i33.3Pa以下之範圍內之 壓力，在任意之基底層（例如，Si基板或二氧化矽膜）60 上’ 一面以 0.009〜0.64W/cm2之範圍內之輸出密度施加 RF偏壓（RF偏壓/ON)，一面使用N2氣體和Si2H6氣體 之混合氣體電漿而執行電漿CVD處理，如第8圖（b )所 示般，形成第1氮化矽膜70。該氮化矽膜70爲在膜中具 有多數陷阱。 接著，如第 8圖（c )所示般，以例如l〇Pa以上 133.3Pa以下之範圍內之壓力，在第1氮化矽膜70上，不 施加RF偏壓（RF偏壓/OFF )，而使用N2氣體和Si2H6 氣體之混合氣體電漿執行電漿CVD處理。其結果，如第8 圖（d)所示般，形成具有第2能帶隙之第2氮化矽膜71 。該第2氮化矽膜71比起第1氮化矽膜70，爲膜中之陷 阱少之氮化矽膜。藉由以上之工程，如第8圖（e)所示 般，可以形成由兩層之氮化矽膜所構成之氮化矽膜積層體 80 ° 接著，因應所需，如第8圖（e )所示般，以例如 l〇Pa以上133.3Pa以下之範圍內之壓力，在第2氮化矽膜 71上，以0.009〜0.64W/cm2之輸出密度施加RF偏壓（ RF偏壓/ON)，而使用N2氣體和Si2H6氣體之混合氣體 201030172 電漿執行電漿CVD處理。其結果，如第8圖（f)所示般 ，形成第3氮化矽膜72。此時，第3氮化矽膜72之陷阱 數即使與第1氮化矽膜70相同亦可，即使與第1氮化矽 膜70不同亦可。第3氮化矽膜72之陷阱數藉由施加之 RF偏壓之大小，可以控制。 以後，藉由以所需之次數重複執行電漿CVD處理， 則可以形成具有所期待之層構造的氮化矽膜積層體80。 # 如上述般，積層本實施型態之氮化矽膜的成膜方法， 係可以在將處理壓力設定成一定之狀態下，藉由RF偏壓 之開/關（ΟΝ/OFF )使基底層變化第1氮化矽膜70、第2 氮化矽膜7 1以及第3氮化矽膜72之陷阱數。如此一來， 使用包含含矽化合物氣體和氮氣之成膜氣體，切換RF偏 壓之ON/OFF，再者藉由在該微小偏壓之範圍，改變RF偏 壓之大小，可以在晶圓W上交互堆積陷阱數不同之氮化 矽膜而積層形成氮化矽膜。尤其，積層本實施型態之氮化 φ 矽膜之成膜方法，由於將處理壓力設爲一定而僅藉由依據 微少RF偏壓的控制，可以均勻控制各氮化矽膜之陷阱數 和其分佈，故於形成具有不同陷阱數之氮化矽膜之積層體 之時，能夠在相同處理容器內於維持真空狀態下連續成膜 ，製程效率非常優良。因此，藉由將本發明方法適用於例 如當作MOS型半導體記憶裝置之電荷蓄積區域的氮化矽 膜之積層形成，則可以製造具備具備有優良資料寫入特性 的MOS型半導體記憶裝置。 -29 - 201030172 〔半導體記億裝置之製造的適用例〕 接著，一面參照第9圖，一面針對將本實施型態所涉 及之氮化矽膜之製造方法適用於半導體記憶裝置之製造過 程之例予以說明。第9圖爲表示MOS型半導體記億裝置 201之槪略構成的剖面圖。MOS型半導體記憶裝置201具 有當作半導體層之p型之矽基板101，和被疊層形成在該 p型之矽基板101上的陷阱數不同的多數絕緣膜，和又被 形成其上方之閘極電極103。在矽基板101和閘極電極 103之間，設置有第1絕緣膜111、第2絕緣膜112、第3 絕緣膜113、第4絕緣膜114，和第5絕緣膜115。其中， 第2絕緣膜112、第3絕緣膜113以及第4絕緣膜114中 之任一者皆爲氮化矽膜，形成有積層氮化矽膜l〇2a。 再者，在矽基板101，以位於閘極電極之兩側的 方式，從表面以特定深度形成屬於η型擴散層之第1源極 •汲極104以及第2源極.汲極105，在兩者之間成爲通 道形成區域106。並且，即使MOS型半導體記憶裝置201 被形成在形成於半導體基板內之Ρ阱或Ρ型矽層亦可。再 者，本實施型態雖然以η通道MOS裝置爲例進行說明， 但是即使以Ρ通道MOS裝置實施亦可。因此’以下所記 載之本實施型態之內容，可以適用於所有η通道MOS裝 置，以及Ρ通道MOS裝置。 第1絕緣膜1 1 1爲藉由例如藉由熱氧化法氧化矽基板 101表面而所形成之二氧化矽膜（Si 02膜）。第1絕緣膜 1 1 1之膜厚以例如0.5nm〜20nm之範圍內爲佳’以Inm〜 -30- 201030172 3 nm之範圍內爲更佳。 構成積層氮化矽膜102a之第2絕緣膜112係被形成 在第1絕緣膜1 1 1之表面的氮化矽膜（SiN膜：在此Si和 N之組成比不一定以化學計量來決定，取依成膜條件而不 同之値。以下’爲相同）。第2絕緣膜1 1 2之膜厚以例如 2nm〜2 0nm之範圍內爲佳，以3nm〜5nm之範圍內爲更佳 φ 第3絕緣膜1 1 3爲被形成在第2絕緣膜1 1 2上之氮化 矽膜（SiN膜）。第3絕緣膜1 13之膜厚以例如2nm〜 30nm之範圍內爲佳，以4nm〜10nm之範圍內爲更佳。 第4絕緣膜114爲被形成在第3絕緣膜113上之氮化 矽膜（SiN膜）。該第4絕緣膜114具有與例如第2絕緣 膜1 1 2相同之陷阱數及膜厚。 第5絕緣膜115爲藉由例如CVD法堆積在第4絕緣 膜114上之二氧化矽膜（Si 02膜）。該第5絕緣膜115係 φ 在電極和第4絕緣膜114之間當作區塊層（阻障層） 而發揮功能。第5絕緣膜115之膜厚以例如2nm〜30nm 之範圍內爲佳，以5nm〜8nm之範圍內爲更佳。 並且，即使在第1絕緣膜111和第2絕緣膜112之間 ，設爲形成有當作浮閘電極之多晶矽層的構成亦可。 閘極電極1 03係由藉由例如CVD法而成膜之多晶矽 膜所構成，當作控制閘極（CG )電極而發揮功能。再者， 閘極電極103即使爲包含例如W、Ti、Ta、Cu、Al、Au、 Pt等之金屬的層亦可。閘極電極103並不限於單層，若目 -31 - 201030172 的在於降低閘極電極103之比電阻，使MOS型半導體記 億裝置20 1之動作速度高速化，亦可以設爲包含例如鎢、 鉬、鉬、鈦、鉑該些矽化物、氮化物、合金等的疊層構造 。閘極電極103連接於無圖示之配線層。 再者，在MOS型半導體記憶裝置20 1，藉由第2絕緣 膜112、第3絕緣膜113及第4絕緣膜114所構成之積層 氮化矽膜102a主要爲蓄積電荷之電荷蓄積區域。因此， 於第2絕緣膜112、第3絕緣膜113以及第4絕緣膜114 之形成時，適用本發明之第1實施型態所涉及之氮化矽膜 之成膜方法，藉由控制各膜之陷阱數和其分佈，可以調節 MOS型半導體記億裝置201之資料寫入性能或資料保持性 能。再者，亦可以適用本發明之第2實施型態所涉及之積 層氮化矽膜之成膜方法，在電漿CVD裝置100中將處理 壓力設爲一定，藉由切換RF偏壓之ON/OFF，或藉由使其 大小變化，在相同處理容器連續性製造第2絕緣膜112、 第3絕緣膜113以及第4絕緣膜114。 在此，舉出代表性之順序，針對將本發明方法適用於 MOS型半導體記憶裝置201之製造的例執行說明。首先， 準備以 LOCOS ( Local Oxidation of Silicon )法或 s ΤΙ ( Shallow Trench Isolation)法等之手法形成元件分離膜（ 無圖示）之矽基板101，在其表面藉由例如熱氧化法形成 當作第1絕緣膜1 Π。 接著，在第1絕緣膜111上，使用電漿CVD裝置1〇〇 藉由電漿CVD法，依序形成第2絕緣膜112、第3絕緣膜 201030172 113及第4絕緣膜114。 於形成第2絕緣膜112時，將處理壓力設爲1 OP a以 上 133.3Pa以下之範圍內，以晶圓 W之單位面積 0.009W/Cm2以上〇.64W/cm2以下之範圍內之輸出密度，對 載置台2之電極7供給RF功率。如此一來，對矽基板 101施加RF偏壓，以均勻分佈形成多陷阱之方式，執行 成膜。當形成第3絕緣膜113之時，不對矽基板101施加 φ RF偏壓，而係執行電漿CVD，使成爲較第2絕緣膜112 減少膜中之陷阱。於形成第4絕緣膜114之時，藉由與形 成第3絕緣膜1 1 3之成膜條件不同之成膜條件（例如，將 與形成第2絕緣膜112之時相同之RF偏壓施加至矽基板 101)而執行電漿CVD，使膜中之陷阱數較第3絕緣膜 113多。各膜之陷阱之數量如上述般，藉由將電漿CVD處 理之處理壓力設爲一定，切換RF偏壓施加之ΟΝ/OFF或 使其大小變化，而可以控制。 φ 接著，在第4絕緣膜114上形成第5絕緣膜115。該 第5絕緣膜1 1 5可以藉由例如CVD法形成。並且，在第5 絕緣膜1 15上，形成藉由例如CVD法成膜多晶矽層或金 屬層或者金屬砍化物層等而成爲閘極電極103等的金屬膜 〇 接著，使用光微影技術，將圖案形成之光阻當作光罩 ，蝕刻上述金屬膜、第5絕緣膜115〜第1絕緣膜U1， 依此取得具有被圖案形成之閘極電極103和多數絕緣膜的 閘極積層構造體。接著，將η型雜質高濃度離子注入至鄰 -33- 201030172 接於閘極積層構造體兩側之矽表面，形成第1源極、汲極 104以及第2源極、汲極105。如此一來，可以製造第9 圖所示之構造的MOS型半導體記憶裝置201。 並且，在上述例中，比起積層氮化矽膜102a中之第3 絕緣膜113之陷阱數，雖然使第2絕緣膜112及第4絕緣 膜114之陷阱數變多，但是即使比起第2絕緣膜112及第 4絕緣膜114之陷阱數，增多第3絕緣膜113之陷阱數亦 可。再者，並不需要使第2絕緣膜112和第4絕緣膜114 之陷阱數相同。 並且，在第9圖中，作爲積層氮化矽膜l〇2a，雖然舉 出以具有由第2絕緣膜112〜第4絕緣膜114所構成之3 層之時爲例，但是本發明方法亦可以適用於製造具有積層 2層或4層以上氮化矽膜之積層氮化矽膜之MOS型半導體 記憶裝置之時。 以上，雖然敘述本發明之實施型態，但是本發明並非 限定於上述實施型態，當然可作各種之變形。例如，在以 上所舉出之各時施型態中，雖然舉出以使用氮氣和二矽烷 作爲成膜原料氣體之時爲例予以說明，但是除氮氣之外， 亦可以使用例如氨、聯氨、單聯氨等，再者亦可以使用其 他的含矽化合物氣體，例如矽烷、三矽烷、三甲硅烷基胺 等’藉由同樣對基板施加RF偏壓，亦可以均勻控制氮化 矽膜中之陷阱之數量和其分佈。 【圖式簡單說明】 -34- 201030172 第1圖爲適用於氮化矽膜之形成之電漿CVD裝置之 一例的槪略剖面圖。 第2圖爲平面天線之構造的圖面。 第3圖爲表示控制部之構成之說明圖。 第4圖爲表示第1實施型態所涉及之氮化矽膜之成膜 方法之工程例的圖面。 第5圖爲說明Vfb磁滯之測量方法的圖面，（a )爲 0 測量所使用之電容器之槪略說明圖，（b )爲表示CV曲線 之圖面。 第6圖爲表示氮化矽膜形成時之RF偏壓功率和膜之 折射率、濕蝕刻率及Vfb磁滯之測量結果的曲線圖面。 第7圖爲表示氮化矽膜形成時之Ar流量和膜之Vfb 磁滯之測量結果的曲線圖面。 第8圖爲表示第2實施型態所涉及之氮化矽膜積層體 之製造方法之工程例的圖面。 φ 第9圖爲表示可以適用本發明方法之MOS型半導體 記憶裝置之槪略構成的說明圖。 【主要元件符號說明】 1 :處理容器 2 :載置台 3 :支撐構件 5 =加熱器 9 :高頻電源 -35- 201030172 1 2 :排氣管 14 :第1氣體導入部 15 :第2氣體導入部 16 :搬入搬出口 1 7 :聞閥 1 8 :氣體供給機構 19a :含氮氣體供給源 1 9 b 含S i化合物氣體供給源 0 19c :惰性氣體供給源 19d :洗淨氣體供給源 24 :排氣裝置 27 :微波導入機構 28 :透過板 29 :密封構件 3 1 :平面天線 3 2 :微波放射孔 ^ 37 :導波管 39 :微波產生裝置 5 0 :控制部 1 00 :電漿CVD裝置 1 〇 1 :矽基板 102a:積層氮化矽膜 1 〇 3 :閘極電極 1 〇 4 :第1源極·汲極 -36- 201030172 105 :第2源極.汲極 1 1 1 :第1絕緣膜 1 1 2 :第2絕緣膜 1 1 3 :第3絕緣膜 1 1 4 :第4絕緣膜 1 1 5 :第5絕緣膜 201 : MOS型半導體記憶裝置 W :矽晶圓（基板）Si2H6 gas flow rate: 2mL/min (see) RF bias frequency: 1 3.56MHz RF bias power: 5W (output density 〇.〇6WVcm2) As shown in Fig. 7, RF is applied at 0.01 6W/cm2 At the time of bias power, Vfb hysteresis was observed to be high at Ar flow rates of 100 mL/min (see) and 6OO mL/min ( seem ). Furthermore, the Ar flow rate was observed to be low at V d hysteresis at 11 〇〇 mL/min (see). Therefore, from the viewpoint of increasing the Vfb hysteresis, the flow rate of the Ar gas should be set in the range of 50 to 100 mL/min (see), preferably in the range of 100 to 800 mL/min (sccm). good. Further, the flow ratio (Ar/N2) of the Ar gas to the N2 gas is preferably in the range of 0.1 or more and 3 or less, and from the viewpoint of increasing the number of traps, Ar/N2 is 2 or less (for example, 0.2 or more and 2 or less). The choice within the range is preferred. When the flow ratio of Ar increases, the amount of Ar ions in the plasma increases, so that the Vfb hysteresis becomes small and the number of traps decreases. Further, the flow ratio of Si2H6 gas and Ar gas (Si2H6/A 〇 is preferably selected from the range of 0.005 or more and 0.01 or less. Further, the flow rate of the N2 gas may be from 100 to 1 000 mL/min ( -26 - 201030172 seem) Within the range of 100 to 500 mL/min (sccm), the flow rate of the Si2H6 gas may be in the range of 0-5 to 40 mL/min (sccm), preferably 0.5 to 10 mL/min (sccm). In addition, the processing temperature of the plasma CVD treatment is set to a temperature of 300 ° C to 600 ° C or less, and most preferably 400 ° C or higher and 60 (TC or less). Further, it is preferable that the output density of the microwave in the plasma CVD treatment is set within a range of 25.25 W/cm 2 or more and 2.56 W/cm 2 or less per unit area of the transmission plate through which the microwave is transmitted. In the method for producing a tantalum nitride film of the present invention, plasma CVD is performed by selecting an RF bias power and a processing pressure, and a tantalum nitride film having a desired amount of trap can be easily fabricated on the wafer W. The tantalum nitride film having a large number of traps thus formed can be effectively regarded as, for example, a MOS type semiconductor [Second Embodiment] Next, a method of forming a tantalum nitride film according to a second embodiment of the present invention will be described. In the plasma CVD apparatus 100, the conditions of the plasma CVD process at the time of forming the tantalum nitride film, in particular, the RF supplied from the high-frequency power source 9 to the electrode 7 of the stage 2 are appropriately set. The magnitude of the bias power, and the processing pressure, can form a majority of traps in the formed nitride sand film. With this feature, the RF bias is applied to the substrate to turn on/off -27- 201030172. 'Or the RF bias power can be changed, for example, a tantalum nitride film having a different number of traps in the adjacent tantalum nitride film stack can be formed. Fig. 8 is a view showing the lamination in the plasma CVD apparatus. A drawing of a film forming process formed by the ruthenium oxynitride film is performed. First, as shown in Fig. 8 (a), for example, a pressure in the range of l〇pa or more and i33.3 Pa or less is applied to any of the base layers. (for example, Si substrate or ruthenium dioxide film) 60 on one side with 0.0 Applying RF bias (RF bias / ON) to the output density in the range of 09 to 0.64 W/cm 2 , performing plasma CVD treatment using a mixed gas plasma of N 2 gas and Si 2 H 6 gas, as shown in Fig. 8 (b) As shown, the first tantalum nitride film 70 is formed. The tantalum nitride film 70 has a large number of traps in the film. Next, as shown in Fig. 8(c), for example, l〇Pa or more and 133.3 Pa or less are used. The pressure in the range is not subjected to RF bias (RF bias/OFF) on the first tantalum nitride film 70, and plasma CVD treatment is performed using a mixed gas plasma of N2 gas and Si2H6 gas. As a result, as shown in Fig. 8(d), the second tantalum nitride film 71 having the second energy band gap is formed. The second tantalum nitride film 71 is a tantalum nitride film having less traps in the film than the first tantalum nitride film 70. With the above engineering, as shown in Fig. 8(e), a tantalum nitride film laminate composed of two layers of tantalum nitride film can be formed 80°, and then, as required, as shown in Fig. 8 (e) As shown in the figure, an RF bias is applied to the second tantalum nitride film 71 at an output density of 0.009 to 0.64 W/cm 2 at a pressure in a range of, for example, 10 ÅPa or more and 133.3 Pa or less (RF bias/ON). And plasma CVD treatment is performed using a mixed gas of 20102172 of N2 gas and Si2H6 gas. As a result, as shown in Fig. 8(f), the third tantalum nitride film 72 is formed. In this case, the number of traps of the third tantalum nitride film 72 may be the same as that of the first tantalum nitride film 70, and may be different from the first tantalum nitride film 70. The number of traps of the third tantalum nitride film 72 can be controlled by the magnitude of the applied RF bias. Thereafter, by repeating the plasma CVD treatment as many times as necessary, the tantalum nitride film laminate 80 having the desired layer structure can be formed. # As described above, the film formation method of the tantalum nitride film of the present embodiment can be carried out by setting the processing pressure to a certain level, and the base layer can be opened/closed by the RF bias (?/OFF). The number of traps of the first tantalum nitride film 70, the second tantalum nitride film 7 1 and the third tantalum nitride film 72 is changed. In this way, the film-forming gas containing the ruthenium-containing compound gas and nitrogen gas is used to switch the ON/OFF of the RF bias, and by changing the RF bias voltage within the range of the micro-bias, the wafer W can be used. A tantalum nitride film having a different number of traps is alternately stacked to form a tantalum nitride film. In particular, the film forming method of the nitrided φ 矽 film of the present embodiment can uniformly control the number of traps of each tantalum nitride film and the like by controlling the micro RF bias only by setting the processing pressure constant. Since it is distributed, when a laminate of tantalum nitride films having different trap numbers is formed, continuous film formation can be maintained in a vacuum state in the same processing container, and the process efficiency is extremely excellent. Therefore, by applying the method of the present invention to a laminate of a tantalum nitride film which is, for example, a charge storage region of a MOS type semiconductor memory device, it is possible to manufacture a MOS type semiconductor memory device having excellent data writing characteristics. -29 - 201030172 [Application example of the manufacture of the semiconductor memory device] Next, the manufacturing method of the tantalum nitride film according to the present embodiment is applied to the manufacturing process of the semiconductor memory device with reference to FIG. Explain. Fig. 9 is a cross-sectional view showing a schematic configuration of a MOS type semiconductor device 201. The MOS type semiconductor memory device 201 has a p-type germanium substrate 101 as a semiconductor layer, and a plurality of insulating films different in the number of traps formed on the p-type germanium substrate 101, and a gate formed thereon. Polar electrode 103. Between the ruthenium substrate 101 and the gate electrode 103, a first insulating film 111, a second insulating film 112, a third insulating film 113, a fourth insulating film 114, and a fifth insulating film 115 are provided. Among them, any of the second insulating film 112, the third insulating film 113, and the fourth insulating film 114 is a tantalum nitride film, and a laminated tantalum nitride film 10a is formed. Further, in the tantalum substrate 101, the first source/drain 104 and the second source/drain 105 which are the n-type diffusion layers are formed at a specific depth from the surface so as to be located on both sides of the gate electrode. The channel forming region 106 is formed between the two. Further, even the MOS type semiconductor memory device 201 may be formed in a germanium or germanium layer formed in the semiconductor substrate. Further, in the present embodiment, the n-channel MOS device will be described as an example, but it may be implemented by a meandering channel MOS device. Therefore, the contents of this embodiment described below can be applied to all n-channel MOS devices and germanium channel MOS devices. The first insulating film 141 is a ruthenium dioxide film (Si 02 film) formed by, for example, oxidizing the surface of the ruthenium substrate 101 by thermal oxidation. The film thickness of the first insulating film 1 1 1 is preferably in the range of, for example, 0.5 nm to 20 nm, and more preferably in the range of Inm -30 - 201030172 3 nm. The second insulating film 112 constituting the laminated tantalum nitride film 102a is a tantalum nitride film formed on the surface of the first insulating film 11 1 (SiN film: the composition ratio of Si and N is not necessarily determined by stoichiometry) , depending on the film forming conditions, the following are the same. The film thickness of the second insulating film 1 1 2 is preferably in the range of, for example, 2 nm to 20 nm, and more preferably in the range of 3 nm to 5 nm. The third insulating film 1 1 3 is formed on the second insulating film 1 1 . A tantalum nitride film (SiN film) on 2. The film thickness of the third insulating film 1 13 is preferably in the range of, for example, 2 nm to 30 nm, more preferably in the range of 4 nm to 10 nm. The fourth insulating film 114 is a tantalum nitride film (SiN film) formed on the third insulating film 113. The fourth insulating film 114 has the same number of traps and film thickness as the second insulating film 1 1 2, for example. The fifth insulating film 115 is a hafnium oxide film (Si 02 film) deposited on the fourth insulating film 114 by, for example, a CVD method. The fifth insulating film 115 φ functions as a block layer (barrier layer) between the electrode and the fourth insulating film 114. The film thickness of the fifth insulating film 115 is preferably in the range of, for example, 2 nm to 30 nm, and more preferably in the range of 5 nm to 8 nm. Further, even between the first insulating film 111 and the second insulating film 112, a polycrystalline germanium layer as a floating gate electrode may be formed. The gate electrode 103 is composed of a polysilicon film formed by, for example, a CVD method, and functions as a gate electrode (CG) electrode. Further, the gate electrode 103 may be a layer containing a metal such as W, Ti, Ta, Cu, Al, Au, Pt or the like. The gate electrode 103 is not limited to a single layer. If the specific resistance of the gate electrode 103 is lowered, the operation speed of the MOS type semiconductor device 20 1 is increased, and it is also possible to include, for example, tungsten. A laminated structure of molybdenum, molybdenum, titanium, or platinum such as a telluride, a nitride, or an alloy. The gate electrode 103 is connected to a wiring layer (not shown). Further, in the MOS type semiconductor memory device 20, the laminated tantalum nitride film 102a composed of the second insulating film 112, the third insulating film 113, and the fourth insulating film 114 is mainly a charge storage region in which charges are accumulated. Therefore, when the second insulating film 112, the third insulating film 113, and the fourth insulating film 114 are formed, the film forming method of the tantalum nitride film according to the first embodiment of the present invention is applied, and each film is controlled. The number of traps and their distribution can adjust the data writing performance or data retention performance of the MOS type semiconductor device 201. In addition, the film formation method of the laminated tantalum nitride film according to the second embodiment of the present invention can be applied. In the plasma CVD apparatus 100, the processing pressure is constant, and the RF bias is switched ON/ OFF, or by changing the size thereof, the second insulating film 112, the third insulating film 113, and the fourth insulating film 114 are continuously formed in the same processing container. Here, a description will be given of an example in which the method of the present invention is applied to the manufacture of the MOS type semiconductor memory device 201, in a representative order. First, a substrate 101 in which an element separation film (not shown) is formed by a method such as the LOCOS (Local Oxidation of Silicon) method or the s ΤΙ (Shallow Trench Isolation) method is prepared, and the surface thereof is formed by, for example, thermal oxidation. The first insulating film 1 is Π. Next, on the first insulating film 111, the second insulating film 112, the third insulating film 201030172 113, and the fourth insulating film 114 are sequentially formed by a plasma CVD method using a plasma CVD apparatus. When the second insulating film 112 is formed, the processing pressure is set to be in the range of 1 OP a or more and 133.3 Pa or less, and the output density in the range of 0.009 W/cm 2 or more and 64 64 W/cm 2 or less per unit area of the wafer W is RF power is supplied to the electrode 7 of the mounting table 2. As a result, an RF bias is applied to the substrate 101 to form a film in such a manner that a plurality of traps are uniformly distributed. When the third insulating film 113 is formed, the φ RF bias is not applied to the germanium substrate 101, and plasma CVD is performed to reduce the trap in the film from the second insulating film 112. When the fourth insulating film 114 is formed, a film forming condition different from the film forming condition for forming the third insulating film 112 (for example, the same RF bias as when the second insulating film 112 is formed) is applied to Plasma CVD is performed on the substrate 101) so that the number of traps in the film is larger than that of the third insulating film 113. As described above, the number of traps of each film can be controlled by setting the processing pressure of the plasma CVD process to be constant, switching the 偏压/OFF of the RF bias application or changing the magnitude thereof. φ Next, the fifth insulating film 115 is formed on the fourth insulating film 114. The fifth insulating film 1 15 can be formed by, for example, a CVD method. Further, on the fifth insulating film 115, a metal film such as a gate electrode 103 is formed by forming a polysilicon layer, a metal layer, a metal cleavage layer or the like by, for example, a CVD method, and then using a photolithography technique. The photoresist formed by the pattern is used as a photomask, and the metal film and the fifth insulating film 115 to the first insulating film U1 are etched, whereby a gate laminated structure having the patterned gate electrode 103 and a plurality of insulating films is obtained. Next, a high concentration of n-type impurity ions is implanted into the surface of the crucible on both sides of the gate laminated structure, and the first source, the drain 104, the second source, and the drain 105 are formed. In this way, the MOS type semiconductor memory device 201 having the structure shown in Fig. 9 can be manufactured. Further, in the above-described example, the number of traps of the third insulating film 113 in the laminated tantalum nitride film 102a is increased, and the number of traps of the second insulating film 112 and the fourth insulating film 114 is increased. The number of traps of the insulating film 112 and the fourth insulating film 114 may increase the number of traps of the third insulating film 113. Further, it is not necessary to make the number of traps of the second insulating film 112 and the fourth insulating film 114 the same. In addition, in the ninth embodiment, as the laminated tantalum nitride film 10a, a case in which three layers including the second insulating film 112 to the fourth insulating film 114 are provided is exemplified, but the method of the present invention is also It can be suitably used in the case of manufacturing a MOS type semiconductor memory device having a laminated tantalum nitride film having two or more layers of tantalum nitride film. The embodiments of the present invention have been described above, but the present invention is not limited to the above-described embodiments, and various modifications can of course be made. For example, in each of the above-described embodiments, the case where nitrogen gas and dioxane are used as the film forming material gas will be described as an example, but in addition to nitrogen, for example, ammonia or hydrazine may be used. Monoamine, etc., and other ruthenium-containing compound gases such as decane, trioxane, trimethylsilylamine, etc. can be used to uniformly control the ruthenium nitride film by applying an RF bias to the substrate. The number of traps and their distribution. BRIEF DESCRIPTION OF THE DRAWINGS -34- 201030172 Fig. 1 is a schematic cross-sectional view showing an example of a plasma CVD apparatus suitable for forming a tantalum nitride film. Figure 2 is a diagram showing the construction of a planar antenna. Fig. 3 is an explanatory view showing the configuration of a control unit. Fig. 4 is a view showing a construction example of a method of forming a tantalum nitride film according to the first embodiment. Fig. 5 is a view for explaining a method of measuring Vfb hysteresis, (a) is a schematic diagram of a capacitor used for measurement, and (b) is a plane showing a CV curve. Fig. 6 is a graph showing the measurement results of the RF bias power at the time of formation of the tantalum nitride film, the refractive index of the film, the wet etching rate, and the Vfb hysteresis. Fig. 7 is a graph showing the measurement results of the Ar flow rate at the time of formation of the tantalum nitride film and the Vfb hysteresis of the film. Fig. 8 is a view showing an example of the construction of a method for producing a tantalum nitride film laminate according to the second embodiment. Fig. 9 is an explanatory view showing a schematic configuration of a MOS type semiconductor memory device to which the method of the present invention can be applied. [Description of main component symbols] 1 : Processing container 2 : Mounting table 3 : Support member 5 = Heater 9 : High-frequency power supply - 35 - 201030172 1 2 : Exhaust pipe 14 : First gas introduction portion 15 : Second gas introduction Part 16: Loading and unloading port 1 7 : smelling valve 1 8 : gas supply mechanism 19a : nitrogen-containing gas supply source 1 9 b containing S i compound gas supply source 0 19c : inert gas supply source 19d : cleaning gas supply source 24 : Exhaust device 27: Microwave introduction mechanism 28: Transmissive plate 29: Sealing member 3 1 : Planar antenna 3 2 : Microwave radiation hole 37: Waveguide 39: Microwave generating device 50: Control unit 1 00: Plasma CVD device 1 〇1 : 矽 substrate 102a: laminated ruthenium nitride film 1 〇 3 : gate electrode 1 〇 4 : first source · drain - 36 - 201030172 105 : second source. drain 1 1 1 : first Insulating film 1 1 2 : second insulating film 1 1 3 : third insulating film 1 1 4 : fourth insulating film 1 1 5 : fifth insulating film 201 : MOS type semiconductor memory device W : germanium wafer (substrate)

-37--37-

Claims (1)

201030172 七、申請專利範圍： 1· 一種氮化矽膜之成膜方法，使用藉由具有多數孔 之平面天線將微波導入至處理容器內而生成電漿之電漿 CVD裝置，在被處理體上藉由電漿CVD法而形成氮化矽 膜，其特徵爲： 具備有將上述處理容器內之壓力設定成lOPa以上 13 3.3 Pa以下之範圍內，一面以被處理體之單位面積 0.00 9W/cm2以上〇.6 4W/cm2以下之範圍內之輸出密度供給 高頻電力至載置被處理體之載置台的電極而對被處理體施 加高頻偏壓，一面使用包含含矽化合物氣體和氮氣之成膜 氣體而執行電漿CVD，依此形成氮化矽膜的工程。 2.—種氮化矽膜之成膜方法，使用藉由具有多數孔 之平面天線將微波導入至處理容器內而生成電漿之電漿 CVD裝置，藉由電漿CVD法在被處理體上疊層形成氮化 矽膜，其特徵爲： 具備有將上述處理容器內之壓力設定成l〇Pa以上 133.3Pa以下之範圍內，一面以被處理體之單位面積 0.009W/cm2以上0.64W/cm2以下之範圍內之輸出密度供給 高頻電力至載置被處理體之載置台的電極而對被處理體施 加高頻偏壓，一面使用包含含矽化合物氣體和氮氣之成膜 氣體而執行電漿CVD，依此形成氮化矽膜的第1工程；和 在與上述第1工程相同之設定壓力下，不供給高頻電 力至上述載置台之電極，或以與上述第1工程不同之輸出 密度供給高頻電力而對被處理體施加高頻偏壓，使用包含 -38- 201030172 含矽化合物氣體和氮氣之成膜氣體而執行電漿CVD，依此 形成比在上述第1工程所形成之氮化矽膜陷阱（trap)之 存在數少之氮化矽膜的第2工程。 3. 如申請專利範圍第2項所記載之氮化矽膜之成膜 方法，其中， 重複執行上述第1CVD工程和上述第2CVD工程。 4. 一種電腦可讀取之記憶媒體，記憶有在電腦上動 φ 作之控制程式，其特徵爲： 上述控制程式於實行時係在使用藉由具有多數孔之平 面天線將微波導入至處理容器內使產生電漿之電漿CVD 裝置，並藉由電漿CVD法在被處理體上形成氮化矽膜之 時，係以在l〇Pa以上133.3Pa以下之範圍內之處理壓力 ，一面以被處理體之單位面積〇.〇〇9W/cm2以上0.64W/cm2 以下之範圍內之輸出密度供給高頻電力至載置被處理體之 載置台的電極，並對被處理體施加高頻偏壓，一面使用包 φ 含含矽化合物氣體和氮氣之成膜氣體而執行電漿CVD之 方式，使電腦控制上述電槳CVD裝置。 5. —種電槳CVD裝置，藉由電漿CVD法在被處理 體上形成氮化矽膜，其特徵爲：具備 處理容器，在收容被處理體之上部具有開口； 載置台，被配置在上述處理容器內，載置被處理體； 電極，被設置在上述載置台內，對被處理體施加高頻 電力； 高頻電源，係連接於上述電極； -39 - 201030172 介電體構件’用以塞住上述處理容器之上述開口； 平面天線，被設置在上述介電體構件之上部，具有用 以將微波導入至上述處理容器內之多數孔； 氣體導入部，連接用以將包含含矽化合物氣體和含氮 氣體之成膜氣體供給至上述處理容器內之氣體供給機構； 排氣機構，用以減壓排氣上述處理容器內；和 控制部，用以控制成一面以被處理體之單位面積 0.009W/cm2以上0.6 4W/cm2以下之範圍內之輸出密度由上 述高頻電源供給高頻電力至上述電極而對被處理體施加高 頻偏壓，一面自連接於上述氣體供給機構之氣體導入部將 包含上述含矽化合物氣體和上述氮氣之成膜氣體供給至上 述處理容器內，依此在上述處理容器中，以l〇Pa以上 133.3Pa以下之範圍內之處理壓力執行電漿CVD。201030172 VII. Patent application scope: 1. A film forming method of a tantalum nitride film, which uses a plasma CVD apparatus which generates a plasma by introducing microwave into a processing container by a planar antenna having a plurality of holes, on the object to be processed A tantalum nitride film is formed by a plasma CVD method, and is characterized in that the pressure in the processing container is set to be in the range of 13 Pa Pa or more and 13 3.3 Pa or less, and the unit area of the object to be processed is 0.00 9 W/cm 2 . The output density in the range of 46 to 4 W/cm2 or less is supplied to the electrode on the stage on which the object to be processed is placed, and a high-frequency bias is applied to the object to be processed, and a gas containing a ruthenium-containing compound and nitrogen is used. A film forming gas is used to perform plasma CVD, thereby forming a tantalum nitride film. 2. A method for forming a tantalum nitride film, using a plasma CVD apparatus for introducing a microwave into a processing container by a planar antenna having a plurality of holes to form a plasma, by plasma CVD on the object to be processed A tantalum nitride film is formed by laminating, and the pressure in the processing container is set to be in the range of 10 〇 Pa or more and 133.3 Pa or less, and the unit area of the object to be processed is 0.009 W/cm 2 or more and 0.64 W/ The output density in the range of cm2 or less is supplied to the electrode of the mounting table on which the object to be processed is placed, and a high-frequency bias is applied to the object to be processed, and the film-forming gas containing the cerium-containing compound gas and nitrogen gas is used to perform electricity. The first process of forming a tantalum nitride film by slurry CVD; and the supply of high-frequency power to the electrode of the mounting table or the output different from the first project under the same set pressure as the first project The high-frequency power is supplied to the high-frequency power, and a high-frequency bias is applied to the object to be processed, and plasma-CVD is performed using a film-forming gas containing -38 to 201030172 containing a ruthenium compound gas and nitrogen gas, thereby forming a ratio of the first project. Silicon film of the traps (Trap) The presence of a small number of the second silicon nitride film engineering. 3. The method of forming a tantalum nitride film according to the second aspect of the invention, wherein the first CVD process and the second CVD process are repeatedly performed. 4. A computer readable memory medium having a control program for moving on a computer, wherein: the control program is implemented by using a planar antenna having a plurality of holes to introduce microwaves into the processing container. When a plasma CVD apparatus for generating plasma is formed and a tantalum nitride film is formed on the object to be processed by a plasma CVD method, the processing pressure in a range of 13 ÅPa or more and 133.3 Pa or less is used. The output density in the range of 被.〇〇9W/cm2 or more and 0.64W/cm2 or less of the object to be processed is supplied to the electrode of the stage on which the object to be processed is placed, and a high frequency bias is applied to the object to be processed. The plasma is controlled by a plasma CVD method using a film φ containing a ruthenium-containing compound gas and a nitrogen-containing film forming gas. 5. An electric paddle CVD apparatus for forming a tantalum nitride film on a target object by a plasma CVD method, comprising: a processing container having an opening in an upper portion of the object to be processed; and a mounting table disposed on the substrate The object to be processed is placed in the processing container; the electrode is placed in the mounting table, and high-frequency power is applied to the object to be processed; the high-frequency power source is connected to the electrode; -39 - 201030172 for the dielectric member Blocking the opening of the processing container; the planar antenna is disposed on the upper portion of the dielectric member, and has a plurality of holes for introducing microwaves into the processing container; and a gas introduction portion for connecting to contain a flaw a gas supply means for supplying a compound gas and a nitrogen-containing gas to the gas supply means in the processing container; an exhausting means for decompressing the inside of the processing container; and a control portion for controlling the object to be processed The output density in the range of 0.009 W/cm 2 or more and 0.6 4 W/cm 2 or less per unit area is supplied to the electrode by the high-frequency power source to apply high-frequency power to the electrode to apply a high frequency to the object to be processed. The gas introduction portion connected to the gas supply means supplies the film-forming gas containing the ruthenium-containing compound gas and the nitrogen gas to the processing container, and accordingly, in the processing container, 133.3 Pa or more Plasma CVD is performed at a processing pressure within the range below.
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