TW201027552A - Sense amplifier, memory device and sensing method - Google Patents

Sense amplifier, memory device and sensing method Download PDF

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Publication number
TW201027552A
TW201027552A TW98101180A TW98101180A TW201027552A TW 201027552 A TW201027552 A TW 201027552A TW 98101180 A TW98101180 A TW 98101180A TW 98101180 A TW98101180 A TW 98101180A TW 201027552 A TW201027552 A TW 201027552A
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Taiwan
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voltage
output data
bit line
memory
reference voltage
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TW98101180A
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Chinese (zh)
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TWI404075B (en
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Jui-Lung Chen
Wei-Shung Chen
Yi-Hsun Chung
Chia-Chiuan Chang
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Vanguard Int Semiconduct Corp
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Abstract

A sense amplifier for a read only memory (ROM) is provided. The sense amplifier includes a comparator and a selecting unit. The comparator compares a bit-line voltage and a reference voltage to obtain an output data. The selecting unit selects either a first voltage or a second voltage as the reference voltage according to the output data.

Description

201027552 六、發明說明:201027552 VI. Description of invention:

(T 【發明所屬之技術領域】 本發明係有關於一種感測放大器,特別是有關於一種 唯讀記憶體(Read Only Memory,ROM)之感測放大器。 【先前技術】BACKGROUND OF THE INVENTION 1. Field of the Invention This invention relates to a sense amplifier, and more particularly to a sense amplifier for a read only memory (ROM).

唯讀記憶體是一種常見的半導體儲存裝置,其為一種 只能讀取資料的記憶體。因此,一旦資料被儲存在唯讀記 憶體内就無法輕易將資料改變或刪除。一般而言,唯讀記 憶體常被使用於電子裝置或電腦系統中,以避免電源關閉 而造成儲存資料的消失。Read-only memory is a common semiconductor storage device that is a type of memory that can only read data. Therefore, once the data is stored in the vocabulary memory, the data cannot be easily changed or deleted. In general, read-only memory is often used in electronic devices or computer systems to avoid the loss of stored data due to power off.

第1圖係顯示一種唯讀記憶體之示 ,一 、,· ^ ^ ^ Pp 丄 丫 , .己隱單元MG及記憶單元Ml係位於同_位元線此上 =己係由字元線WL0所控制,而記憶單元M; 係由子元線WL1所控制。一舻丄.^ _ 資料時,必須檢測所丄二/’在讀取唯讀記憶體之 記憶單元Μ心己憶早元的狀態為開路狀態(如 示卜此外,隨著唯如記憶單元励所顯 机之記憶單元的數量也會跟^加的增加’連接於位辑 二憶==體進行讀取時,可使用感測放大 圖係顯示一種傳統得到電壓〜。第2 比較器210以及銷大器200。感測放大器200包括 VBL以及參考電壓目器latdl) 22G。比較器210可對電壓 接著,鎖相器220舍 比較’並得到其比較結果A 會根據信號sLateh鎖住比較結果Dc ;cmp 97023/0516-A41906twf cmp 201027552 並提供對應於比較結果Dcmp的輸出資料D〇ut至輸出缓衝 器。然而’當位元線BL上記憶單元的數量增加時,位元 線BL上的寄生電容也會跟著增加。因此,對位元線bl而 言’其容易受到電源端或接地端之·雜訊的干擾,例如電源/ 接地彈跳(power/ground bounce )問題。對具有低操作電 壓功能之唯讀記憶體而言,雜訊干擾的問題會明顯更嚴 重。參考第3圖,當讀取唯讀記憶體時,由於雜訊對電源 端或接地端的干擾,感測放大器200可能會從唯讀記憶體 • 的位元線BL上得到具有彈跳現象的電壓Vbl。接著,比較 器210會將該電壓Vbl與參考電壓Vref進行比較。然後, 鎖相器220會根據信號sLatch將錯誤的比較結果鎖 住,並提供錯誤的輸出資料Dout至輸出緩衝器。因此:一 旦錯誤的資料被鎖定時,感測放大器2〇〇無法將錯誤之資 料回復成正確的資料’並提供至輸出緩衝器。 【發明内容】 本發明提供一種感測放大器,適用於一唯讀記憶體。 ⑩上述感測放大器包括:一比較器,用以比較一位元線電壓 以及一參考電壓,以得到一輸出資料;以及,一選擇單元, 用以根據上述輪出資料而選擇一第一電壓以及一第二電壓 之一者以作為上述參考電壓。 再者’本發明提供一種記憶體裝置,包括:—唯讀吃 憶體,具有複數記憶單元配置於一位元線上;以及,—感 測放大器。上述感測放大器包括:一轉換單元,用以將上 述位元線之一電流轉換成一位元線電壓;一比較器,用以 97023/0516-A41906twf 4 201027552 比較上述位元線電麗以及一參考電壓,以得到一輸出資 料,以及一選擇單元,用以根據上述輸出資料而選擇一第 一電壓以及一第二電壓之一者以作為上述參考電壓,其中 上述第一電壓係大於上述第二電壓。 再者,本發明提供一種感測方法,用以從一唯讀記憶 體之一位元線感測出一輸出資料。上述感測方法包括:將 上述位元線之一電流轉換成一位元線電壓;根據上述輸出 資料,選擇一第一電壓以及一第二電壓之一者以作為一參 考電壓;以及,將上述位元線電壓以及上述參考電壓進行 比較,以得到上述輸出資料。 【實施方式】 為讓本發明之上述和其他目的、特徵、和優點能更明 顯易懂,下文特舉出較佳實施例,並配合所附圖式,作詳 細說明如下: 實施例: 第4圖係顯示根據本發明一實施例所述之感測放大器 400。感測放大器400包括轉換單元41〇、比較器420以及 選擇單兀430。當對唯讀記憶體進行讀取時,轉換單元41〇 可將唯讀記憶體中位元線上的電流&轉換成位元線電座 VBL。比权器420可對位元線電壓Vbl以及參考電壓& 進行比較’以產生輸出資料Dw。在此實施例中,當位元 線電壓VBL大於參考電壓1時,輸出資料D⑽為高電壓 位準。反之’ #參考電壓vref大於位元線電壓Vbl時,輸 97023/0516-A41906twf 201027552 出資料Dout為低電壓位準。選擇單元43〇可根據輸出資料 U比較器420的負輸人端耦接於電壓VL或是電壓Vh, 其中電壓vH大於電壓Vl。因此,根據輸出資料D ^ 擇單元430可選擇將電壓VH當作為參考電麼vref,=是二 電壓VL當作為參考電壓Vref。在此實施财,當輸出資料 〇_為高電壓位準時,選擇單元430會將比較器42〇的負 輸入端耦接於電壓vL,以便將電壓Vl當作為參考電壓 Vref。當輸出資料D〇m為低電壓位準時,選擇單元43〇會將 • 比較器420的負輸入端耦接於電壓νΗ,以便將電壓Vh當 作為參考電壓\^ef。 w 參考第5圖,第5圖係顯示第4圖中感測放大器内部 信號的波形圖。在週期T1以及週期Τ2内,位元線BL受 到電源端或是接地端上雜訊(例如輸出緩衝器動作時所產 生之雜訊)的干擾,因此造成電流Ibl有彈跳(b〇unce)或 震盪的現象出現。經由轉換單元41〇,電流Ibl被轉換成位 元線電壓vBL。同時’電流Ibl上的彈跳現象亦被放大,使 ❿得位元線電壓Vbl上的彈跳現象更加明顯。在週期τΐ的期 間内,由於輸出資料Dout為低電壓位準,所以選擇單元43〇 會將電壓VH當作為參考電壓Vref。因此,比較器42〇會將 位元線電壓VBL與電壓乂11進行比較,而非電壓Vl。由於 位元線電壓vBL上的彈跳電壓並不會高於電壓Vh,所以感 測放大器所提供之輸出資料D〇ut並不會被位元線BL上的 雜訊所干擾’即輸出資料D〇ut不會在週期τΐ的期間内變為 高電壓位準。相同地,在週期T2的期間内,由於輸出資料 Dout為高電壓位準,所以選擇單元43()會將電壓Vl當作為 97023/0516-A41906twf 201027552 參考電壓Vref。因此,比較器420會·將位元線電壓Vbl與 電壓vL進行比較,而非電麗vH。由於位元線電壓vBL上 的彈跳電壓並不會低於電壓vL,所以感測放大器所提供之 輸·出資料Dout&不會被位元線BL上的所干擾,即輪出資 料DQUt不會在週期T2的期間内變為低電壓位準。 在一實施例中,本發明之感測放大器可設置於積體電 路内。對積體電路而言,隨著晶片尺寸以及應用複雜度的 增加,其電源端以及接地端上的雜訊千擾亦會跟著增加。 ❹ 因此,在積體電路中,一種包含本發明之感測放大器以及 唯讀記憶體(例如光罩式唯讀記憶體(MaskROM))的記 憶體裝置可降低雜訊干擾對唯讀記憶體之輸出資料的影 響。此外,如果輸出資料的初始值有錯誤時’記憶體裝置 亦可將錯誤之輸出資料修正為正確的輸出資料。 第6圖係顯示根據本發明一實施例所述之感測方法, 用以從唯讀記憶體之位元線BL感測出輸出資料D〇ut。首 先’在步驟S602,將位元線BL上的電流IBL轉換成位元線 參電壓Vbl。接著,在步驟S604,可根據輸出資料Dcut選擇 電壓vH以及電壓Vl之一者,以作為參考電壓vref。舉例 來說’當輸出資料〇灿為高電壓位準時,可將電壓vl當作 為參考電壓Vref。反之,當輸出資料為低電壓位準時, 可將電壓vH當作為參考電壓Vref。接著,在步驟S6〇6,將 位元線電壓VBL與參考電壓Vref進行比較,以得到正確的 輸出資料Dout。例如’當位元線電壓vBL大於參考電壓v ^ 時,可得到輸出資料Dout為高電壓位準,以及當參考電^Figure 1 shows a read-only memory, one, , · ^ ^ ^ Pp 丄丫, . The hidden cell MG and the memory cell Ml are located on the same _ bit line = this is the word line WL0 Controlled, and the memory unit M; is controlled by the sub-element WL1. When a .^ _ data is used, it must be detected that the state of the memory unit in the read-only memory is open state (such as the display, in addition to the memory unit The number of memory cells of the display device will also be increased with the addition of 'additional' to the bit-coded two-review == body for reading, and the sensed amplification system can be used to display a conventionally obtained voltage ~. The second comparator 210 and The pin amplifier 200. The sense amplifier 200 includes a VBL and a reference voltage source latdl) 22G. The comparator 210 can compare the voltage and then the phase locker 220 and obtain a comparison result A. The comparison result Dc is locked according to the signal slateh; cmp 97023/0516-A41906twf cmp 201027552 and the output data D corresponding to the comparison result Dcmp is provided. 〇ut to the output buffer. However, when the number of memory cells on the bit line BL increases, the parasitic capacitance on the bit line BL also increases. Therefore, for the bit line bl, it is susceptible to interference from noise at the power supply or ground, such as a power/ground bounce problem. For read-only memory with low operating voltage capability, the problem of noise interference is significantly more severe. Referring to FIG. 3, when reading the read-only memory, the sense amplifier 200 may obtain a bounce voltage Vbl from the bit line BL of the read-only memory due to interference of the noise on the power supply terminal or the ground terminal. . Next, the comparator 210 compares the voltage Vbl with the reference voltage Vref. Then, the phase locker 220 locks the erroneous comparison result according to the signal slatch and provides the erroneous output data Dout to the output buffer. Therefore, once the wrong data is locked, the sense amplifier 2 cannot return the error data to the correct data' and provide it to the output buffer. SUMMARY OF THE INVENTION The present invention provides a sense amplifier suitable for use in a read only memory. The above-mentioned sense amplifier includes: a comparator for comparing a bit line voltage and a reference voltage to obtain an output data; and a selection unit for selecting a first voltage according to the rounded data and One of the second voltages is used as the above reference voltage. Furthermore, the present invention provides a memory device comprising: a read-only memory having a plurality of memory cells arranged on a single bit line; and, a sense amplifier. The sense amplifier includes: a conversion unit for converting a current of one of the bit lines into a one-bit line voltage; and a comparator for the reference of the above-mentioned bit line and a reference for the 97023/0516-A41906twf 4 201027552 a voltage for obtaining an output data, and a selecting unit for selecting one of a first voltage and a second voltage as the reference voltage according to the output data, wherein the first voltage is greater than the second voltage . Furthermore, the present invention provides a sensing method for sensing an output data from a bit line of a read-only memory. The sensing method includes: converting one of the bit lines into a bit line voltage; selecting one of the first voltage and the second voltage as a reference voltage according to the output data; and, the bit The line voltage and the above reference voltage are compared to obtain the above output data. The above and other objects, features and advantages of the present invention will become more apparent and understood from The figure shows a sense amplifier 400 in accordance with an embodiment of the present invention. The sense amplifier 400 includes a conversion unit 41A, a comparator 420, and a selection unit 430. When the read-only memory is read, the conversion unit 41〇 converts the current & on the bit line in the read-only memory into the bit line pad VBL. The comparator 420 can compare the bit line voltage Vbl and the reference voltage & to produce an output data Dw. In this embodiment, when the bit line voltage VBL is greater than the reference voltage 1, the output data D(10) is at a high voltage level. On the other hand, when the reference voltage vref is greater than the bit line voltage Vbl, the output 97023/0516-A41906twf 201027552 indicates that the data Dout is a low voltage level. The selection unit 43A can be coupled to the voltage VL or the voltage Vh according to the negative input end of the output data U comparator 420, wherein the voltage vH is greater than the voltage V1. Therefore, the voltage VH can be selected as the reference voltage vref according to the output data D^, and = the second voltage VL is taken as the reference voltage Vref. In this implementation, when the output data 〇_ is a high voltage level, the selection unit 430 couples the negative input terminal of the comparator 42A to the voltage vL to use the voltage V1 as the reference voltage Vref. When the output data D〇m is a low voltage level, the selection unit 43〇 couples the negative input terminal of the comparator 420 to the voltage νΗ to use the voltage Vh as the reference voltage \^ef. w Refer to Figure 5, which shows the waveform of the internal signal of the sense amplifier in Figure 4. During the period T1 and the period Τ2, the bit line BL is interfered by the noise on the power supply terminal or the ground terminal (for example, the noise generated when the output buffer operates), thereby causing the current Ibl to bounce (b〇unce) or The phenomenon of shock appears. Via the conversion unit 41, the current Ib1 is converted into the bit line voltage vBL. At the same time, the bounce phenomenon on the current Ibl is also amplified, so that the bounce phenomenon on the bit line voltage Vbl is more pronounced. During the period τ , , since the output data Dout is at a low voltage level, the selection unit 43 当 takes the voltage VH as the reference voltage Vref. Therefore, the comparator 42 比较 compares the bit line voltage VBL with the voltage 乂 11 instead of the voltage V1. Since the bounce voltage on the bit line voltage vBL is not higher than the voltage Vh, the output data D〇ut provided by the sense amplifier is not interfered by the noise on the bit line BL, that is, the output data D〇 Ut does not become a high voltage level during the period τΐ. Similarly, during the period of period T2, since the output data Dout is at a high voltage level, the selection unit 43() regards the voltage V1 as the reference voltage Vref of 97023/0516-A41906twf 201027552. Therefore, the comparator 420 compares the bit line voltage Vbl with the voltage vL instead of the voltage vH. Since the bounce voltage on the bit line voltage vBL is not lower than the voltage vL, the input and output data Dout& provided by the sense amplifier will not be disturbed by the bit line BL, that is, the wheel data DQUt will not It becomes a low voltage level during the period of period T2. In one embodiment, the sense amplifier of the present invention can be placed in an integrated circuit. As for the integrated circuit, as the size of the chip and the complexity of the application increase, the noise interference at the power supply terminal and the ground terminal also increases. ❹ Therefore, in an integrated circuit, a memory device including the sense amplifier of the present invention and a read-only memory (for example, a mask-type read-only memory (MaskROM)) can reduce noise interference to read-only memory. The impact of the output data. In addition, if the initial value of the output data is incorrect, the memory device can also correct the error output data to the correct output data. Figure 6 is a diagram showing a sensing method according to an embodiment of the present invention for sensing output data D〇ut from a bit line BL of a read-only memory. First, in step S602, the current IBL on the bit line BL is converted into the bit line voltage Vbl. Next, in step S604, one of the voltage vH and the voltage V1 may be selected as the reference voltage vref according to the output data Dcut. For example, when the output data is high voltage level, the voltage vl can be regarded as the reference voltage Vref. Conversely, when the output data is at a low voltage level, the voltage vH can be taken as the reference voltage Vref. Next, in step S6, the bit line voltage VBL is compared with the reference voltage Vref to obtain the correct output data Dout. For example, when the bit line voltage vBL is greater than the reference voltage v ^ , the output data Dout can be obtained as a high voltage level, and when the reference voltage is ^

Vref大於位元線電壓VBL時,可得到輸出資料〇邮為低電 97023/0516-A41906twf 7 201027552 .. 壓位準。 【圖式簡單說明】 第1圖係顯示一種唯讀記憶體之示意圖; 第2圖係顯示一種傳統感測放大器; i 第3圖係顯示顯示第2圖中感測放大器内部信號的波 形圖; 第4圖係顯示根據本發明一實施例所述之感測放大器; 第5圖係顯示第4圖中感測放大器内部信號的波形 • 圖;以及 第6圖係顯示根據本發明一實施例所述之感測方法。 【主要元件符號說明】 210、420〜比較器; 410〜轉換單元; BL〜位元線; Μ卜M2〜記憶單元; Dcmp〜比較結果; SLateh〜信號; Vh、Vl〜電壓, WL0、WL1〜字元線。 200、400〜感測放大器; 220〜鎖相器; 430〜選擇單元;When Vref is greater than the bit line voltage VBL, the output data can be obtained as low power. 97023/0516-A41906twf 7 201027552 .. Pressure level. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic diagram showing a read only memory; Fig. 2 is a conventional sense amplifier; i Fig. 3 is a waveform diagram showing the internal signal of the sense amplifier in Fig. 2; 4 is a view showing a sense amplifier according to an embodiment of the present invention; FIG. 5 is a view showing a waveform of a signal inside the sense amplifier in FIG. 4; and FIG. 6 is a view showing an embodiment according to an embodiment of the present invention. The sensing method described. [Major component symbol description] 210, 420~ comparator; 410~ conversion unit; BL~bit line; MM2~ memory unit; Dcmp~ comparison result; SLateh~ signal; Vh, Vl~ voltage, WL0, WL1~ Word line. 200, 400~ sense amplifier; 220~ phase locker; 430~ select unit;

Dout〜輸出資料;Dout~ output data;

Ibl〜電流; S602-S606〜步驟; VBL〜位元線電壓;Ibl~ current; S602-S606~ step; VBL~bit line voltage;

Vref〜參考電壓;以及 97023/0516-A41906twf 8Vref~reference voltage; and 97023/0516-A41906twf 8

Claims (1)

201027552 七、申請專利範圍: » 1. 一種感測放大器,適用於一唯讀記憶體,包括: 一比較器,用以比較一位元線電壓以及一參考電壓, 以得到一輸出·資料;以及 一選擇單元,用以根據上述輸出資料而選擇一第一電 壓以及一第二電壓之一者以作為上述參考電壓。 2. 如申請專利範圍第1項所述之感測放大器,更包括: 一轉換單元,用以將上述唯讀記憶體之一位元線上之 φ 一電流轉換成上述位元線電壓。 3. 如申請專利範圍第1項所述之感測放大器,其中上述 第一電壓係大於上述第二電壓。 4. 如申請專利範圍第3項所述之感測放大器,其中當上 述輸出資料為高電壓位準時,上述選擇單元選擇上述第二 電壓以作為上述參考電壓,以及當上述輸出資料為低電壓 位準時,上述選擇單元選擇上述第一電壓以作為上述參考 電壓。 鲁 5.如申請專利範圍第4項所述之感測放大器,其中上述 比較器具有一正輸入端用以接收上述位元線電壓,以及一 負輸入端用以接收上述參考電壓。 6. 如申請專利範圍第1項所述之感測放大器,其中上述 唯讀記憶體係設置於一積體電路内。 7. 如申請專利範圍第1項所述之感測放大器,其中上述 唯讀記憶體係一光罩式唯讀記憶體。 8. —種記憶體裝置,包括: 一唯讀記憶體,具有複數記憶單元配置於一位元線 97023/0516-A41906twf 9 201027552 上;以及 ·· 一感測放大器,包括: 一轉換單元,用以將上述位元線之一電流轉換成 一位元線電壓; 一比較器,用以比較上述位元線電壓以及一參考 電壓,以得到一輸出資料;以及 一選擇單元,用以根據上述輸出資料而選擇一第 一電壓以及一第二電壓之一者以作為上述參考電壓, • 其中上述第一電壓係大於上述第二電壓。 9. 如申請專利範圍第8項所述之記憶體裝置,其中當上 述輸出資料為高電壓位準時,上述選擇單元選擇上述第二 電壓以作為上述參考電壓,以及當上述輸出資料為低電壓 位準時,上述選擇單元選擇上述第一電壓以作為上述參考 電壓。 10. 如申請專利範圍第9項所述之記憶體裝置,其中上 述比較器具有一正輸入端用以接收上述位元線電壓,以及 ❹一負輸入端用以接收上述參考電壓。 11. 如申請專利範圍第8項所述之記憶體裝置,其中上 述唯讀記憶體係一光罩式唯讀記憶體。 12. —種感測方法,用以從一唯讀記憶體之一位元線感 測出一輸出資料,包括: 將上述位元線之一電流轉換成一位元線電壓; 根據上述輸出資料,選擇一第一電壓以及一第二電壓 之一者以作為一參考電壓;以及 將上述位元線電壓以及上述參考電壓進行比較,以得 97023/0516-A41906twf 10 201027552 到上述輸出資料。 13. 如申請專利範圍第12項所述之感測方法,其中上述 第一電壓係大於上述第二電壓。 14. 如申請專利範r第13項所述之感測方法,其中上述 選擇步驟包括: 當上述輸出資料為高電壓位準時,選擇上述第二電壓 以作為上述參考電壓;以及 當上述輸出資料為低電壓位準時,選擇上述第一電壓 • 以作為上述參考電壓。 15. 如申請專利範圍第14項所述之感測方法,其中當上 述位元線電壓大於上述參考電壓時,上述輸出資料為高電 壓位準,以及當上述參考電壓大於上述位元線電壓時,上 述輸出資料為低電壓位準。 16. 如申請專利範圍第12項所述之感測方法,其中上述 唯讀記憶體係設置於一積體電路内。 17. 如申請專利範圍第12項所述之感測方法,其中上述 ® 唯讀記憶體係一光罩式唯讀記憶體。 97023/0516-A41906twf 11201027552 VII. Patent Application Range: » 1. A sense amplifier for a read-only memory, comprising: a comparator for comparing a bit line voltage and a reference voltage to obtain an output data; And a selecting unit, configured to select one of the first voltage and the second voltage as the reference voltage according to the output data. 2. The sense amplifier of claim 1, further comprising: a conversion unit for converting a current of φ on a bit line of the read-only memory to the bit line voltage. 3. The sense amplifier of claim 1, wherein the first voltage system is greater than the second voltage. 4. The sense amplifier of claim 3, wherein when the output data is a high voltage level, the selection unit selects the second voltage as the reference voltage, and when the output data is a low voltage level On time, the selection unit selects the first voltage as the reference voltage. 5. The sense amplifier of claim 4, wherein the comparator has a positive input for receiving the bit line voltage and a negative input for receiving the reference voltage. 6. The sense amplifier of claim 1, wherein the above-mentioned read-only memory system is disposed in an integrated circuit. 7. The sense amplifier of claim 1, wherein the above-mentioned read-only memory system is a reticle type read only memory. 8. A memory device comprising: a read only memory having a plurality of memory cells disposed on a bit line 97023/0516-A41906twf 9 201027552; and a sense amplifier comprising: a conversion unit for Converting a current of one of the bit lines into a bit line voltage; a comparator for comparing the bit line voltage and a reference voltage to obtain an output data; and a selecting unit for outputting the data according to the output And selecting one of the first voltage and the second voltage as the reference voltage, wherein the first voltage is greater than the second voltage. 9. The memory device of claim 8, wherein the selection unit selects the second voltage as the reference voltage when the output data is at a high voltage level, and when the output data is a low voltage level On time, the selection unit selects the first voltage as the reference voltage. 10. The memory device of claim 9, wherein the comparator has a positive input for receiving the bit line voltage and a negative input for receiving the reference voltage. 11. The memory device of claim 8, wherein the readable memory system is a reticle type read only memory. 12. A sensing method for sensing an output data from a bit line of a read-only memory, comprising: converting a current of one of the bit lines into a bit line voltage; and according to the output data, Selecting one of a first voltage and a second voltage as a reference voltage; and comparing the bit line voltage and the reference voltage to obtain 97023/0516-A41906twf 10 201027552 to the above output data. 13. The sensing method of claim 12, wherein the first voltage system is greater than the second voltage. 14. The sensing method of claim 13, wherein the selecting step comprises: selecting the second voltage as the reference voltage when the output data is at a high voltage level; and when the output data is At the low voltage level, the above first voltage is selected as the above reference voltage. 15. The sensing method according to claim 14, wherein when the bit line voltage is greater than the reference voltage, the output data is a high voltage level, and when the reference voltage is greater than the bit line voltage The above output data is a low voltage level. 16. The sensing method of claim 12, wherein the read-only memory system is disposed in an integrated circuit. 17. The sensing method according to claim 12, wherein the above-mentioned ® read-only memory system is a reticle type read only memory. 97023/0516-A41906twf 11
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