201025421 六、發明說明： 【發明所屬之技術領域】 本發明是有關於一種光電元件的製造方法，特別是指 一種磊晶用基板的製造方法。 【先前技術】 、 在磊晶製作發光二極體時，經常使用晶格常數較為匹 配且價格較合理的藍寶石作為磊晶用基材。但因藍寶石散 熱能力不佳且不導電的特性，將使得發光二極體元件在使 • 肖上有諸多限制。 ^為了改善元件效能，一般在磊晶完成—半導體磊晶臈 後會將藍寶石基材移除或置換為散熱基板。以下將敘述— 種利用濕式姓刻-央置於藍寶石基材與該半導體遙晶膜間 的犧牲膜，來移除藍寶石基材的方式。 例如在美國專利US2008/0038857A1所揭露的製法即是 • 利用濕式蝕刻犧牲膜以移除藍寶石基材。但由於該犧牲膜 • 《呈敏密膜層態樣夾置於藍寶石基材與該半導體蟲晶膜間 ，造成該犧牲膜與外界蝕刻劑接觸面積甚小，僅有最外圍 的周圍面積使得姓刻速率極為緩慢，在餘刻步驟中耗費 過多工時。 為了增加改善蝕刻速率，美國專利US5〇7323〇所揭露 的方式是增加該犧牲膜與該钱刻劍的接觸面積。是自該半 導體蟲曰曰膜向下形成複數穿達該犧牲媒的银刻孔洞，該等 敍刻孔满用於後續钱刻時，敍刻劍得以經由該等钱刻孔洞 通入該犧牲膜’減少工時成本。 3 201025421 但前揭專利在孔洞與孔洞間的犧牲膜仍是緻密膜層態 樣’使得蝕刻劑在此等區域仍受到該犧牲膜自身態樣的影 響，而無法有效地加快蚀刻速度。 由上述可知，該犧牲膜有助於移除藍寶石基材，但前 揭專利的犧牲膜的緻密型態皆有不利蝕刻劑有效進入的缺 點。為此，一種適用於發光二極體元件製作，且易於快速 移除的犧牲膜態樣，一直是業界與學界所關注的研發重點 【發明内容】 因此，本發明之目的，即在提供一種可以提高蝕刻犧 牲膜速率的磊晶用基板的製造方法。 於是，本發明磊晶用基板的製造方法是包含以下步驟 〇 首先，製備一磊晶用的基材。 接著，自該基材利用沉積法形成一圖樣化的犧牲臈。 該犧牲膜包括複數第—通道及複數由該等第—通道界定的 膜區’該等膜區分別是由一奈米材料所構成，且具有複數 形成於該奈米材料中且平均寬度小於料第—通道並 連通的第二通道。 诗最後，自該犧牲膜磊晶成長一第_半導體磊晶膜，且 U牲膜對該第-半導體悬晶媒的姓刻選擇比是大於10 由在於利用沉積法形成圖樣化犧牲膜，。藉 加該奈米材料構成的該等第二通道，坤 “犧牲膜與濕式蚀刻劑反應面積’使得該犧牲膜得以： 201025421 速被蝕刻移除。 【實施方式】 有關本發明之前述及其他技術内容、特點與功效’在 以下配合參考圖式之三個較佳實施例的詳細說明中，將可 清楚的呈現。 在本發明被詳細描述之前，要注意的是，在以下的s兒 明内容中，類似的元件是以相同的編號來表示。201025421 VI. Description of the Invention: [Technical Field] The present invention relates to a method of manufacturing a photovoltaic element, and more particularly to a method of manufacturing a substrate for epitaxy. [Prior Art] In the case of epitaxial fabrication of a light-emitting diode, sapphire having a relatively good lattice constant and a reasonable price is often used as a substrate for epitaxy. However, due to the poor heat dissipation capability of sapphire and its non-conductivity, the LED components have many limitations. In order to improve component performance, the sapphire substrate is typically removed or replaced by a heat sink substrate after epitaxial completion-semiconductor epitaxy. Hereinafter, a method of removing a sapphire substrate by using a wet-type sacrificial film between the sapphire substrate and the semiconductor crystal film will be described. For example, the method disclosed in U.S. Patent No. 2008/0038857 A1 is to use a wet etching sacrificial film to remove a sapphire substrate. However, due to the sacrificial film, "the dense film layer is sandwiched between the sapphire substrate and the semiconductor insect film, the contact area of the sacrificial film with the external etchant is very small, and only the outermost peripheral area makes the surname The engraving rate is extremely slow, and it takes too much man-hours in the remaining steps. In order to increase the etch rate, the method disclosed in U.S. Patent No. 5,732,323 is to increase the contact area of the sacrificial film with the sword. The silver engraved hole that penetrates the sacrificial medium from the semiconductor worm film downwards, and when the quotation holes are used for the subsequent money engraving, the sculpt sword can be passed into the sacrificial film through the holes. 'Reducing working hours costs. 3 201025421 However, in the prior patent, the sacrificial film between the hole and the hole is still in a dense film layer state, so that the etchant is still affected by the sacrificial film itself in these regions, and the etching speed cannot be effectively accelerated. As can be seen from the above, the sacrificial film contributes to the removal of the sapphire substrate, but the dense form of the sacrificial film of the prior patent has the disadvantage that the etchant is effectively entered. Therefore, a sacrificial film aspect suitable for the fabrication of light-emitting diode elements and easy to remove quickly has been the focus of research and development in the industry and the academic community. [Inventive content] Therefore, the object of the present invention is to provide a A method of manufacturing an epitaxial substrate for increasing the rate of etching a sacrificial film. Thus, the method for producing an epitaxial substrate of the present invention comprises the following steps. First, a substrate for epitaxy is prepared. Next, a patterned sacrificial crucible is formed from the substrate by deposition. The sacrificial film includes a plurality of first passages and a plurality of membrane regions defined by the first passages. The membrane regions are respectively composed of a nanometer material, and have plural numbers formed in the nanometer material and the average width is smaller than the material. The second channel in which the first channel is connected. Finally, from the sacrificial film epitaxial growth, a semiconductor epitaxial film is grown, and the U-film has a surrogate ratio of greater than 10 to the first semiconductor suspension crystal in that a patterned sacrificial film is formed by a deposition method. By adding the second channels formed by the nano material, the "sacrificial film and wet etchant reaction area" enables the sacrificial film to be removed by etching at 201025421. [Embodiment] The foregoing and other aspects of the present invention The technical content, features, and utilities will be apparent from the following detailed description of the preferred embodiments of the reference drawings. Before the invention is described in detail, it is noted that In the content, similar elements are denoted by the same reference numerals.
本發明磊晶用基板的製造方法的一較佳實施例包含以 下步驟。 參閱圖1，首先，製備一磊晶用且呈六方晶系的單晶基 材1 〇. 接著，先自該基材1形成一圖樣化的誘發膜2，自該誘 發膜2利用有機金屬化學氣相沉積法（]^〇(：¥〇，；^^&1-organic Chemical Vapor Dep〇siti〇n)，形成一呈六方晶系且 圖樣化的犧牲膜3。 在本較佳實施例中，該誘發膜2為金屬材質製成，』 厚度在lnm〜30nm間。 參閱圖2與圖3’值得一提的是，該犧牲膜3也可為; 自該基材1湘有機金屬化學氣相沉積法形成尚未圖樣i 的犧牲膜3，再利用微電子製程透過—光阻4將該犧牲膜 圖樣化，或是直接利用雷射製程將該犧牲胰3 附件2所示）。 固像化（4 該犧牲膜3包括複數第-通道31及複數由該等第— 道31界定的膜區32,該等膜區32分别是由 201025421 321所構成’且具有複數形成於該奈讀料321中且平均縫 隙寬度小於該等第—通道31並互相連通的第二通道322。 、參閱圖4’在本較佳實施例中，該等第—通道η是互 相連通’且寬度是介於1μιη〜1〇μηι，曰，，高度是介於 0·5μηι〜5μπι 間。 當該等第-通道31寬度小於i帅時將降低姓刻劑流 動速率進而料_速率，相反地，若寬度大S Η) _則 該第-半導㈣晶冑5會無法有效地形成二維結構 態樣。 右該等第-通道31高度小於〇.5μηι會造成該等第一通 道31被該第-半導體蟲晶膜5填滿’而無法讓㈣劑通過 ’反之’若該等第-通道31的高度大於5 μιη會造成用料 成本的提升。磊晶成長該第一半導體磊晶冑5與蝕刻製程 將於下依序詳述。 參閱圖5’值得-提的是，該等第—通道31也可為互 不連通態樣，同樣可以達到讓钱刻劑快速滲人晶圓的功效 〇 參閱圖6’該等第一通道31除了直線形狀外，也可為 曲線形狀。值得-提的是，該等[通道31也可為鑛齒形 狀、螺旋形狀、樹枝形狀（圖皆未示）等等，惟此等圖案 變化為本領域中具有普通知識並了解本發明㈣者可輕易 改變，故不再贅述。 該犧牲膜3每-膜區32的奈米材料321是選自複數相 鄰設置且為-維結構的奈米(rGd)、奈米針Ueedie)、 201025421 奈米管（tube )，如附件一所示。在本較佳實施例中，該奈 米材料321的直徑是介於5nm〜5〇〇nm間，而該等第二通道 322的平均縫隙寬度是介於5nm 〜500nm間。 右該奈米材料321的直徑小於5 nm，將造成後續成長 該第-半導體蟲晶冑5時，該第—半導體蟲晶冑5無法有 效附著於該犧牲膜3上，反之，若該奈米材料321的直徑 大於500 nm，則會造成該等第二通道322變窄且數量減少 ，因而對蝕刻劑的滲入有不良影響。該等第二通道322的 平均縫隙寬度小於該等第一通道31，且該等第二通道322 彼此互相連通，有利於後續蝕刻劑的滲入。 該等第二通道322平均縫隙寬度若小於5 nm則會影響 蝕刻劑透過的速率，反之，若平均縫隙寬度大於5〇〇nm則 會使得後續蟲晶該第-半導體蟲晶膜5時，無法有效地形 成二維結構的膜層態樣。 參閱圖7 ’接續地’自該等膜區32蟲晶成長_第一半 導體蟲晶帛5’且該第-光電半導體材料層*填於該等第一 通道31中。 在磊晶形成該第一半導體磊晶膜 第一通道31形成的毫米結構， 日日膜5時’藉由該等膜區A preferred embodiment of the method for producing an epitaxial substrate of the present invention comprises the following steps. Referring to FIG. 1, first, a single crystal substrate of epitaxial crystal and having a hexagonal crystal system is prepared. Next, a patterned induced film 2 is formed from the substrate 1, and an organometallic chemistry is utilized from the evoked film 2. A vapor deposition method (?) (:: 〇,; ^^ & 1-organic Chemical Vapor Dep〇siti〇n) forms a hexagonal crystallized and patterned sacrificial film 3. In the preferred embodiment The inducing film 2 is made of a metal material, and has a thickness of between 1 nm and 30 nm. Referring to FIG. 2 and FIG. 3, it is worth mentioning that the sacrificial film 3 can also be; The sacrificial film 3 of the unpatterned i is formed by vapor deposition, and the sacrificial film is patterned by the microelectronic process through the photoresist 4, or the sacrificial pancreas 3 is directly attached by the laser process. Fixation (4) The sacrificial film 3 includes a plurality of first channels 31 and a plurality of film regions 32 defined by the first channels 31, which are respectively formed by 201025421 321 'and have complex numbers formed in the nano The second channel 322 of the reading material 321 and having an average slit width smaller than the first channel 31 and communicating with each other. Referring to FIG. 4', in the preferred embodiment, the first channels η are connected to each other and the width is Between 1μιη~1〇μηι, 曰, the height is between 0·5μηι~5μπι. When the width of the first channel 31 is smaller than i, the flow rate of the surname will be lowered and then the rate will be decreased. The width of the large S Η) _ then the first semi-conductive (four) wafer 5 will not be able to effectively form a two-dimensional structural aspect. The height of the first-channel 31 on the right side is less than 〇.5μηι, which causes the first channels 31 to be filled by the first-semiconductor film 5, and the (four) agent cannot pass the 'or vice-' if the height of the first-channels 31 More than 5 μηη will result in an increase in the cost of materials. Epitaxial growth of the first semiconductor epitaxial germanium 5 and etching process will be described in detail below. Referring to FIG. 5', it is worth mentioning that the first channel 31 can also be a non-connected state, and the effect of allowing the money agent to rapidly infiltrate the wafer can also be achieved. Referring to FIG. 6 'the first channel 31 In addition to the linear shape, it can also be a curved shape. It is worth mentioning that the [channel 31 can also be a mineral tooth shape, a spiral shape, a branch shape (not shown), etc., but such pattern changes are common knowledge in the art and understand the invention (four) Can be easily changed, so no longer repeat them. The nano-material 321 of the sacrificial film 3 per-membrane region 32 is selected from a plurality of nano-adjacent (rGd), nano-doped Ueedie, and 201025421 nanotubes, as shown in Annex 1. Shown. In the preferred embodiment, the diameter of the nanomaterial 321 is between 5 nm and 5 nm, and the average width of the second channels 322 is between 5 nm and 500 nm. If the diameter of the nano material 321 is less than 5 nm, the first semiconductor worm 5 may not be effectively attached to the sacrificial film 3, and vice versa. The diameter of the material 321 is greater than 500 nm, which causes the second channels 322 to be narrowed and reduced in number, thereby adversely affecting the penetration of the etchant. The second channel 322 has an average slit width smaller than the first channels 31, and the second channels 322 communicate with each other to facilitate the infiltration of the subsequent etchant. If the average slit width of the second channel 322 is less than 5 nm, the rate of etchant permeation may be affected. Conversely, if the average slit width is greater than 5 〇〇 nm, the subsequent smear of the first-semiconductor film 5 may not be The film layer state of the two-dimensional structure is effectively formed. Referring to Fig. 7, 'continuously' grows from the film regions 32 to the first semiconductor germanium wafer 5' and the first photo-semiconductor material layer* is filled in the first channels 31. Forming a millimeter structure formed by the first semiconductor epitaxial film first channel 31 in the epitaxial crystal, by using the film regions
少貫穿式差排密度， ，即可視為圖案化均有助於側向磊晶。With less penetrating density, it can be considered that patterning contributes to lateral epitaxy.
等第 7 201025421 磊晶成二維結構的該第一半導體磊晶膜5。且當該等膜區 32的南度小於〇.5μπι會無側向蟲晶以降低差排缺陷的效果 〇 進一步說明的是，在側向蟲晶形成該第一半導體屢晶 膜5時，除了由該犧牲膜3頂面蟲晶成長之外，或許會在 λ等第通道31中留下些許遙晶材料，但所殘留的材料並 不阻塞該等第-通道31，並不影響該等第一通道Μ用於提- 昇該犧牲膜3勉刻速率的功效，故在本第一較佳實施例中 ’仍視為該第-半導體蠢晶膜5是不填滿阻塞該等第一通❹ 道3 1。（圖皆未示） 參閱圖8，而後，自該第-半導體磊晶膜5上，磊晶成 長一具有Ρ-Ν介面的第二半導體蟲曰曰曰膜6，即該第二半導體 磊晶膜6具有Ν型氮化鎵61 (N_GaN)、多重量子井α ( MQW)與P型氮化鎵63 (p_GaN)，此項製程為本技術領域 中具有普通知識的技術人員所熟悉，故在此不再對此多做- 贅述。 參閱圖9’接著’在該第二半導體蟲晶膜6上形成一第© 一基板。 在本較佳實施例中，該第一基板為散熱基板7,是先沉 積一導電薄膜8於該第二半導體磊晶膜6p_GaN上，該導電 薄膜8為例如鎳金（Ni/Au)、氧化銦錫（IT〇)等材料，並 放於500 C〜60〇t的氮氣内約1〇分鐘，完成高溫退火以形 成歐姆接觸。接著沉積該第—基板，該第一基板為例如Etc. 7, 201025421 Epitaxially crystallized into the first semiconductor epitaxial film 5. And when the south degree of the film regions 32 is less than 〇.5μπι, there is no lateral insect crystal to reduce the effect of the poor discharge defects. Further, when the first semiconductor film 5 is formed by the lateral crystallites, In addition to the growth of the top surface of the sacrificial film 3, a slight crystal material may be left in the channel 31 of the λ, etc., but the remaining material does not block the first channel 31, and does not affect the first One channel is used to lift the effect of the sacrificial film 3, so in the first preferred embodiment, it is still considered that the first-semiconductor film 5 is not filled with the first pass. 3 Road 3 1. (not shown) Referring to FIG. 8, then, from the first-semiconductor epitaxial film 5, epitaxial growth of a second semiconductor germanium film 6 having a Ρ-Ν interface, that is, the second semiconductor epitaxial The film 6 has Ν-type gallium nitride 61 (N_GaN), multiple quantum well α ( MQW) and P-type gallium nitride 63 (p_GaN), which is familiar to those skilled in the art, so This is no longer to do this - repeat. Referring to Fig. 9', then a first substrate is formed on the second semiconductor crystal film 6. In the preferred embodiment, the first substrate is a heat dissipation substrate 7, and a conductive film 8 is deposited on the second semiconductor epitaxial film 6p_GaN. The conductive film 8 is, for example, nickel gold (Ni/Au), oxidized. A material such as indium tin (IT〇) is placed in a nitrogen gas of 500 C to 60 〇t for about 1 minute to complete high temperature annealing to form an ohmic contact. Depositing the first substrate, the first substrate is for example
Ιμιη厚的Au、50nm厚的Cr與矽基板，並在350°C〜450°C 8 201025421 间溫及高壓下貼合於該導電薄膜8上，其中，可加入一 Π:薄膜(圖皆未示)於該導電薄媒8上。前‘程: 相關領域中具普通知識的技術人員所熟知，故不再詳述。 參_在完成上述製程後，利用濕式_:犧牲 、以將該基材1與該第一半導體蟲晶膜5分離。 其中，該犧牲媒3對該第一半導體蟲晶膜5的姓刻選 擇比是大於10,更佳地，該犧牲们對該第一半導體蟲晶 膜5的姓刻選擇比是大於5〇。 猫曰曰 ^該犧牲膜2材料為氧化辞，該半導縣晶膜3的材 化鎵’當在室温下選用HF作為_劑時，對於該犧 的飯刻率為Ι5μηι/Π1ίη，而對該半導體蟲晶膜3的姓 亥：為nrWmin;當在室溫下選用Ηα作為蝕刻劑時 曰膜=犧牲媒2祕刻率為5—/min，而對該半導體蟲 日日膜3的钱刻速率為1〇_5μιη/ιηίη以下。 在_該犧牲膜3以移除該基材i時，是 式 刻該犧牲臈3，酸性蝕刻劑辟由兮輩笛、3$ 夂㈣藉由該專第-通道31得以快速 遍佈整片晶圓’並且在該等第二通道322的輔助下，增加 蝕刻面積以加快蝕刻該奈米材料321的速率。 、其中，酸性蝕刻劑是選用HF (適用溫度為室溫〜7〇。〇 H24S〇4 (室溫〜200°C )、η3ρο4 (室溫〜2〇(rc )、 /皿20〇c )、B0E (室溫〜7(rc )，及其稀釋液或混合液。且 在本較佳實施例中，濕式㈣包含了蒸氣姓刻。 :閲® U’最後’藉由微電子製程即完成垂直式導通 的發光二極體。 201025421 在二=，在移除該犧牲膜3後，該奈米材㈣ ίΓ二 5上留下，表面51，而該粗縫 :!二Γ助於發光二極體表面的出光效率，以增加外部 的篁于效益。 又’在钱刻該犧牲膜3後所分離出的該基材i可以重 不用，即用於進行另一次發光二極體製程，節省用料成 本。 進-步說明的是，每__膜區32面積與單—發光二極體 面積間，無特別的限定關係，即當每一膜區32的面積較大 時，亦無影響於後續發光二極體的微電子製程。當每一媒 =32的面積較大時，該等第一通道3ι的數目變少，能夠 P省圖樣化該犧牲膜3的雷射製程，在不影響餘刻該犧牲 膜3速率的條件下能縮減施做工時。 參閱圖12,本發明蠢晶用基板的製造方法的第二較佳 實施例與該第-較佳實施例的實施步驟大致相同，不同之 〇 處在於該第二較佳實施财，在形成該第二半導體蟲晶膜6 後’接續地藉由微電子製程完成水平式導通的發光二極體 〇 而該第-基板是一貼合於該第二半導體磊晶膜6的暫 時基板9’冑該第一基板貼合於該第二半導體蟲晶膜6後， 再進行姓刻該犧牲膜3以移除該基材1，並形成-散熱基板 7於該第一半導體磊晶膜5上。 參閱圖13,本發明磊晶用基板的製造方法的第三較佳 實施例與該第一較佳實施例的實施步驟大致相同，不同之 10 201025421 處在於該第三較佳實施例中 於該等第一通道31中。 該第一半導體磊晶膜5是填 即’該第-半導體蟲晶旗5是自裸露於該等第一通道 31的基材1及該等膜區32磊晶成長。 參閱圖13、圖14與圖15,該第一半導體蟲晶膜5填 入的樣式可略分為三種：完全填滿、部分填人、部分填入 且不相連。Ιμιη thick Au, 50nm thick Cr and ruthenium substrate, and attached to the conductive film 8 under the temperature and high pressure between 350 ° C ~ 450 ° C 8 201025421, wherein a film: film can be added Shown on the conductive thin medium 8. The former 'process: is well known to those skilled in the relevant art and will not be described in detail. After the completion of the above process, the substrate 1 is separated from the first semiconductor crystal film 5 by wet _: sacrificial. Wherein, the sacrificial medium 3 has a surrogate ratio of the first semiconductor crystal film 5 of more than 10, and more preferably, the sacrificial selection ratio of the first semiconductor insect film 5 is greater than 5 Å. Cat 曰曰 ^ The material of the sacrificial film 2 is oxidized, and the galvanized material of the film 3 of the semi-conducting county is Ι5μηι/Π1ίη when the HF is used as the agent at room temperature, and The semiconductor film 3 has a surname of: nrWmin; when Ηα is used as an etchant at room temperature, the 曰 film = sacrificial medium 2 has a secret rate of 5 Å/min, and the semiconductor worm has a money of 3 The engraving rate is 1〇_5μιη/ιηίη or less. When the sacrificial film 3 is removed to remove the substrate i, the sacrificial crucible 3 is engraved, and the acidic etchant is rapidly spread over the whole crystal by the scorpion flute and 3$ 夂 (4) by the poly-channel 31. The circle 'and with the aid of the second channels 322, the etched area is increased to speed up the rate at which the nanomaterial 321 is etched. Among them, the acidic etchant is HF (applicable temperature is room temperature ~ 7 〇. 〇 H24S 〇 4 (room temperature ~ 200 ° C), η3ρο4 (room temperature ~ 2 〇 (rc), / dish 20 〇 c), B0E (room temperature ~7 (rc), and its diluent or mixture. And in the preferred embodiment, the wet type (iv) contains the vapor surname.: Read® U'finally' is completed by microelectronics process Vertically-conducting light-emitting diode. 201025421 In the second =, after removing the sacrificial film 3, the nano-material (4) is left on the surface of the 5th, the surface 51, and the rough seam: the second aid to the light-emitting two The light-emitting efficiency of the surface of the polar body is increased to the benefit of the external. In addition, the substrate i separated after the sacrifice of the sacrificial film 3 can be reused, that is, used for another light-emitting diode process, saving The cost of the material. The step-by-step description shows that there is no special relationship between the area of the __membrane area and the area of the single-light-emitting diode, that is, when the area of each membrane area 32 is large, there is no influence. In the microelectronic process of the subsequent light-emitting diodes, when the area of each medium=32 is large, the number of the first channels 3ι is reduced, and the pattern can be saved. The laser process of the sacrificial film 3 can reduce the man-hours under the condition that the rate of the sacrificial film 3 is not affected. Referring to FIG. 12, a second preferred embodiment of the method for manufacturing the substrate for a matte crystal of the present invention is The implementation steps of the first preferred embodiment are substantially the same, except that in the second preferred embodiment, after the formation of the second semiconductor crystal film 6, the horizontal conduction is completed by the microelectronic process. The first substrate is a temporary substrate 9 ′ attached to the second semiconductor epitaxial film 6 , and the first substrate is attached to the second semiconductor crystal film 6 The sacrificial film 3 is used to remove the substrate 1 and form a heat dissipating substrate 7 on the first semiconductor epitaxial film 5. Referring to Figure 13, a third preferred embodiment of the method for fabricating an epitaxial substrate of the present invention The steps of the first preferred embodiment are substantially the same, except that 10 201025421 is in the first channel 31 in the third preferred embodiment. The first semiconductor epitaxial film 5 is filled with the 'the first- The semiconductor insect crystal flag 5 is a substrate 1 exposed from the first channels 31 and the like The film region 32 is epitaxially grown. Referring to FIG. 13, FIG. 14, and FIG. 15, the pattern of the first semiconductor film 5 can be slightly divided into three types: completely filled, partially filled, partially filled, and unconnected. .
、/閱_ 15進一步說明的是，當側向磊晶形成該第一 半導㈣晶膜5時’將會部分填人該等第—通道Η，、留下 許多磊晶材料且所殘留的材料將阻塞該等第一通道31，勢 必影響該等第-通道31提昇_速率的功效，因此在本第 二較佳實施例中，視為該第一半導體磊晶冑5是阻塞於該 等第一通道31中。 參閱圖16，首先，將該等第一通道31中貼近該基材i 的第一半導體磊晶膜5，利用雷射汽化並產生氮氣，形成複 數分別位於該第一半導體磊晶膜5與該基材丨間，且位於 該等第一通道3 1中的間隙33。 中所使用的雷射為使用氪氟（Krypton-Fluoride，KrF )的準分子雷射（Excimer Laser)，波長為248nm，能量為 5〇〇〜1500 mj/cm2。除此之外’也可利用波長193nm的ArF 、308nm 的 XeCl、351nm 的 XeF、222nm 的 KrC卜 282nm 的XeBr，或是利用Nd : YAG固體雷射的三倍頻355nm、 四倍頻266nm ’皆可達到相同功效。 在本較佳實施例中，該等第一通道31的寬度是介於 11 201025421 1μιη~50μιη間，高度是介於〇 5μιη〜3μιη間。 當該等第一通道31的寬度大於50μπι時，則該第—半 導體磊晶膜5無法有效地形成二維結構的膜層態樣。 當該等第一通道31的高度小於0.5μιη時，會讓該等第 一通道31太快被該第一半導體磊晶膜5填滿，而無法展現 橫向蟲晶減少差排密度的優點。 s亥等間隙33的高度是介於〇 5 μπι〜3 μιη間，若高产小. 於〇·5 μιη會造成蝕刻劑無法通過，反之，若該等間隙 度大於3 μΐη無明顯助於㈣速率，卻會造成用料成本的:〇 參閱圖17’本發明遙晶用基板的第四較佳實施例與該 第-較佳實施例大致相同，不同之處在於該第四較佳實施 例中’該犧㈣3更包括複數分㈣成於該物！1 32與該 第-半導㈣晶膜5間的平坦部34，由於該等平坦部34= 現平坦緻密膜層態樣，相較於奈米結構的料㈣W，处 ^导該第-半導體蟲晶冑5屋晶成長時得到較佳的= 質。 Q uu <具體實驗例> 皤寻紫本材料 取扠馮彔米柱時 ，製程環境參數為壓力1G如、溫度為·t —入氣體與流量分別為：8〇sec…Ezn二 seem 的 〇2。 υυ 為兩階段成長方 通入氣體與流量 若欲將該奈米材料211成長為奈米針 式’首先是10 Torr、溫度450。(：、5 m· 12 201025421 分別為：10 seem的DEZn與200 seem的〇2 ;接下來是溫 度650°C、60 min，通入氣體與流量分別為：60 seem的 DEZn 與 600 seem 的·〇2。 另外，若欲將該奈米材料211成長為奈米管，為三階段 成長方式，首先是10 Torr、溫度450°C、15 min，通入氣體 與流量分別為：5 seem的DEZn與200 seem的、〇2 ;接下來 是溫度650 °C、30 min，通入氣體與流量分別為：3 0 seem 的 DEZn 與 600 seem 的 〇2 ;最後是溫度 450°C、90 min， ^ 通入氣體與流量分別為：30 seem的DEZn與600 seem的 〇2。 利用化學氣相沉積法成長材.料為氮化鎵的半導體磊晶 膜3時，製程溫度為1040°C，通入氣體與流量分別為：300 slm 的 NH3、10 slm 的 N2 與 65 seem 的 TMGa。 當晶圓大小為2吋，該等膜區21的大小為lxl mm 2的 • 正方形圖案，該犧牲膜2的厚度為Ιμπι，使用鹽酸作為蝕 - 刻劑時，姓刻時間約為150 min，而速率約為3.3pm/min。 在相同厚度時，當該等膜區21的面積縮小為0.3x0.3 mm 2的 正方形圖案，钮刻時間約為6 min，而速率約為6μην/πήη。 由這兩組數據可得知，當該等膜區21的面積越小，即增加 第一通道31的數量時，能夠有效提昇移除速率。 綜上所述，無論是製造垂直或水平式導通的發光二極 體，在將該基材1移除時，蝕刻劑皆能藉由該圖樣化犧牲 膜3的該等第一通道31快速地遍佈晶圓，並藉著由該奈米 材料321形成的該等第二通道322增加蝕刻劑反應面積， 13 201025421 有效加速移除該基材1的速率，進而使整個發光二極體製 程更加省時，故確實能達成本發明之目的。 惟以上所述者，僅為本發明之較佳實施例而已，當不 能以此限定本發明實施之範圍，即大凡依本發明申請專利 範圍及發明說明内容所作之簡單的等效變化與修飾，皆仍 屬本發明專利涵蓋之範圍内。 【圖式簡單說明】 - 圖1是一流程示意圖，說明本發明磊晶用基板的製造-方法的一第一較佳實施例； ❹ 圖2是一類似於圖丨的流程圖’說明該第一較佳實施 例的一圖樣化犧牲膜的製造方法； 圖3是一類似於圖丨的流程圖，說明該第一較佳實施 例的該犧牲膜的另一種製造方法； 圖4是-頂視示意圖，說明該第一較佳實施例的該犧 牲膜的複數第一通道彼此連通； . 圖5是一類似於圖4的視圖，說明該第一較佳實施例 的該犧牲膜的該等:第一通道互不連通； 0 圖6是—類似於圖4的視圖’說明本較佳實施例的該 等第一通道呈曲線彎曲； 圖7是-侧視示意圖，說明該第—較佳實施例的蟲晶 用基板， 圖8是-類似於圖7的視圖，說明該第一較佳實施例 用於成長一第二半導體磊晶膜； 圖9是一類似於圖7的視圖，說明該第一較佳實施例 14 201025421 貼合一散熱基板； 圖10是一類似於圖1的流程圖，說明該第—較佳實施 例的一基材的移除方法； 圖11是一類似於圖7的視圖，說明該第一較佳實施例 用於製造垂直式導通的發光二極體； 圖12是一類似於圖1的流程圖，說明本發明磊晶用基 板的製造方法的一第二較佳實施例用於製造水平式導通的 發光二極體；Further, it is further explained that when the first semi-conductive (four) crystal film 5 is laterally epitaxially formed, the first-channel enthalpy will be partially filled, leaving a lot of epitaxial materials and remaining. The material will block the first channels 31, which will inevitably affect the efficiency of the first channel 31, so in the second preferred embodiment, the first semiconductor epitaxial layer 5 is considered to be blocked. In the first channel 31. Referring to FIG. 16, first, the first semiconductor epitaxial film 5 of the first channel 31 adjacent to the substrate i is vaporized by a laser and generates nitrogen gas to form a plurality of the first semiconductor epitaxial film 5 respectively. The substrate is inter-turned and located in the gap 33 in the first channels 31. The laser used in the experiment is an excimer laser using Krypton-Fluoride (KrF) with a wavelength of 248 nm and an energy of 5 〇〇 to 1500 mj/cm 2 . In addition, 'ArF with a wavelength of 193 nm, XeCl at 308 nm, XeF at 351 nm, KrC at 222 nm, XeBr at 282 nm, or three-times 355 nm with a Nd:YAG solid-state laser, 266 nm at all times can be used. Can achieve the same effect. In the preferred embodiment, the width of the first channels 31 is between 11 201025421 1 μιη and 50 μιη, and the height is between 〇 5 μιη and 3 μιη. When the width of the first channels 31 is larger than 50 μm, the first semiconductor epitaxial film 5 cannot effectively form a film layer state of the two-dimensional structure. When the height of the first channels 31 is less than 0.5 μm, the first channels 31 are filled too quickly by the first semiconductor epitaxial film 5, and the lateral crystallites are not able to exhibit the advantage of reducing the differential density. The height of the gap 33 such as shai is between 〇5 μπι~3 μιη, and if the high yield is small, the etchant may not pass through at 〇·5 μιη, and vice versa if the gap is greater than 3 μΐη. However, the cost of the material is caused by: Referring to FIG. 17', the fourth preferred embodiment of the substrate for remote crystal of the present invention is substantially the same as the first preferred embodiment, except that in the fourth preferred embodiment 'The sacrifice (four) 3 includes multiple points (four) into the object! The flat portion 34 between the 1 32 and the first semi-conductive (four) crystal film 5, because the flat portion 34 = the flat and dense film layer state, compared to the material (4) W of the nanostructure, the first semiconductor is controlled Insect crystals 5 house crystals grow better when they grow. Q uu <specific experimental examples> When searching for the purple material, the process environment parameters are pressure 1G, temperature is ·t - the gas and flow rate are: 8〇sec...Ezn two seem 〇 2.通 For two-stage growth, the gas and the flow rate are required. If the nanomaterial 211 is to be grown into a nano-needle, the first is 10 Torr and the temperature is 450. (:, 5 m· 12 201025421 are: 10 seem DEZn and 200 seem 〇 2; then the temperature is 650 ° C, 60 min, the gas and flow are: 60 seem DEZn and 600 seem · 〇 2. In addition, if the nanomaterial 211 is to be grown into a nanotube, the three-stage growth mode is first 10 Torr, temperature 450 ° C, 15 min, and the gas and flow rates are: 5 seem DEZn With 200 seem, 〇2; followed by temperature 650 °C, 30 min, the gas and flow rate are: 3 0 seem DEZn and 600 seem 〇2; finally temperature 450 ° C, 90 min, ^ The gas and flow rate are: 30 seem DEZn and 600 seem 〇2. When growing by chemical vapor deposition, the material is a gallium nitride semiconductor epitaxial film 3, the process temperature is 1040 ° C, access The gas and flow rates are: 300 slm of NH3, 10 slm of N2 and 65 seem of TMGa. When the wafer size is 2吋, the size of the membrane 21 is lxl mm 2 • square pattern, the sacrificial membrane 2 The thickness is Ιμπι, when hydrochloric acid is used as the etchant, the last time is about 150 min, and the rate is about 3.3p. m/min. At the same thickness, when the area of the film regions 21 is reduced to a square pattern of 0.3x0.3 mm 2 , the buttoning time is about 6 min, and the rate is about 6 μην/πήη. It can be known that when the area of the film regions 21 is smaller, that is, the number of the first channels 31 is increased, the removal rate can be effectively improved. In summary, whether manufacturing vertical or horizontal conduction light-emitting diodes When the substrate 1 is removed, the etchant can rapidly spread across the wafer by the first channels 31 of the patterned sacrificial film 3, and by the surface formed by the nano material 321 The second channel 322 increases the etchant reaction area, and 13 201025421 effectively accelerates the rate of removal of the substrate 1, thereby making the entire illuminating diode process more time-saving, so that the object of the present invention can be achieved. The present invention is not limited by the scope of the invention, and the simple equivalent changes and modifications made by the scope of the invention and the description of the invention are still covered by the invention. Within the scope of BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a flow chart illustrating a first preferred embodiment of a method for fabricating an epitaxial substrate of the present invention; FIG. 2 is a flow chart similar to that of FIG. FIG. 3 is a flow chart similar to that of FIG. 3, illustrating another manufacturing method of the sacrificial film of the first preferred embodiment; FIG. 4 is a top plan view. The plurality of first channels of the sacrificial film of the first preferred embodiment are connected to each other; and FIG. 5 is a view similar to FIG. 4 illustrating the first of the sacrificial film of the first preferred embodiment: first The channels are not connected to each other; 0 Figure 6 is a view similar to the view of Figure 4 illustrating the first channel of the preferred embodiment in a curved curve; Figure 7 is a side elevational view of the first preferred embodiment The substrate for insect crystals, FIG. 8 is a view similar to FIG. 7, illustrating the first preferred embodiment for growing a second semiconductor epitaxial film; FIG. 9 is a view similar to FIG. Preferred Embodiment 14 201025421 is attached to a heat dissipating substrate; FIG. 10 is similar to FIG. A flow chart illustrating a method of removing a substrate of the first preferred embodiment; FIG. 11 is a view similar to FIG. 7 illustrating the first preferred embodiment for fabricating a vertically conductive light emitting diode Figure 12 is a flow chart similar to Figure 1 illustrating a second preferred embodiment of the method for fabricating an epitaxial substrate of the present invention for fabricating a horizontally-conducting light-emitting diode;
圖13是一類似於圖7的視圖，說明本發明磊晶用基板 的製造方法的一第三較佳實施例； 圖14是一類似於圖7的視圖，說明該第三較佳實施例 的°亥等第一通道被一第一半導體磊晶膜部分填滿； 圖15疋一類似於圖7的視圖，說明該第三較佳實施例 的該第一半導體磊晶膜部分填入該等第一通道且不相連； (圖16是一類似於圖7的視圖，說明該第三較佳實施例 利用雷射汽化該第一半導體蟲晶膜以形成複數間隙；及 止圖17是一側視示意圖，說明本發明磊晶用基板的製造 /的一第四較佳實施例。 :件-說明本發明的-奈米材料的奈錄 及奈米管三種態樣。 附件二：說明本發明中的該犧牲層藉由雷射汽化。 15 201025421 【主要元件符號說明】 1 ......基材 2 ·………誘發膜 3……·…犧牲膜 31………第一通道 32·，.…·"膜區 321 ·……奈米材料 3 22 .......第二通道 3 3………間隙 3 4 —"…平坦部 4 *.....μ，* 光)¾. 5……—第一半導體蠢晶 膜 51………粗链表面 6"........第二半導體蠢晶 膜 61………N型氣化錄 62 —…"多重量子井 63………P型氮化鎵 7……—散熱基板 8 ..........導電薄膜 ® 9 · · · * ......暫時基板 ◎ 16Figure 13 is a view similar to Figure 7, illustrating a third preferred embodiment of the method of fabricating the substrate for epitaxy of the present invention; Figure 14 is a view similar to Figure 7, illustrating the third preferred embodiment The first channel such as °H is partially filled with a first semiconductor epitaxial film; FIG. 15 is similar to the view of FIG. 7, illustrating that the first semiconductor epitaxial film portion of the third preferred embodiment is filled with such The first channel is not connected; (FIG. 16 is a view similar to FIG. 7, illustrating that the third preferred embodiment utilizes a laser to vaporize the first semiconductor crystal film to form a plurality of gaps; and FIG. 17 is a side A fourth preferred embodiment of the manufacture of the epitaxial substrate of the present invention will be described with reference to the accompanying drawings: - Description - The three aspects of the nano-material and the nanotube of the present invention are described. The sacrificial layer is vaporized by laser. 15 201025421 [Description of main component symbols] 1 ... substrate 2 ·.........Inducing film 3...·...sacrificial film 31......first channel 32 ·,....·" Membrane area 321 ·...Nano material 3 22 .......Second channel 3 3.........Gap 3 4 —"...flat 4 *.....μ,* light) 3⁄4. 5...—first semiconductor stupid film 51.........thick chain surface 6"........ Two semiconductor stupid film 61.........N type gasification record 62-..."Multiple quantum well 63......P-type gallium nitride 7...-heat-dissipating substrate 8 ..... conductive film ® 9 · · · * ...... Temporary substrate ◎ 16