TW201017828A - Fabrication method of non-volatile memories with layers of molybdenum-based nano-crystals - Google Patents

Abstract

This present invention is a manufacturing method of nonvolatile memories with Molybdenum-based nano-crystals. The manufacturing method includes the steps of forming a tunneling barrier oxide on the substrate, forming a Mo-Si thin film with Molybdenum-based nano-crystals, forming a control dielectric, and forming two electrodes on the surfaces of the substrate and the control dielectric, respectively. The formed Molybdenum-based nano-crystals could be Molybdenum or Molybdenum silicides. The Molybdenum-based nano-crystals are used as charge storage in the nonvolatile memories.

Description

201017828 IX. Description of the Invention: [Technical Field] The present invention relates to a method for producing a nanocrystal, in particular, β, a non-volatile memory element having molybdenum nanocrystals. [Prior Art] '° ❹

Whether the memory is affected by the "power supply" depends on whether the data is stored. It is divided into two categories: volatile memory (Vo丨at丨丨e mem〇ry) and non-volatile ^Nong-^ (Nlon-vo丨atUe memory). The so-called volatile memory β refers to the memory (4) (4) depends on the continuous power supply to maintain and: Yes; relatively, non-volatile memory even if the power supply is interrupted, ' ° internal memory data can still be kept Long time. The internal dynamic random access memory (dram) and static random access memory (SRAM) of computers commonly used in daily life belong to volatile memory, other images; read memory Zhao (ROM), programmable read only Memory (EpR〇M) and Flash Memory are non-volatile memories. ° Heart Please refer to the eleventh figure. The principle of flash memory (9〇) is to use the floating gate (F丨.ating Gate) (91) of polycrystalline stone as the charge storage unit. = After the electron is stored in the channel (92) and stored in the floating gate (91), the component critical voltage will change. The M-call of non-volatile memory logic is defined by different critical electrical waste. Although the traditional flash memory _ components have been widely commercially available in mass production, there are still many inevitable limitations in terms of features to be faced. One of the most important limitations is the reduction in size reduction of its vertically stacked structure, especially in recent years, as the wear-and-see oxide layer faced on component sizes has shrunk. Due to the floating stop (4) 201017828, the bismuth dioxide (93) energy barrier between the transistor channels is very thin, so the ##石石(93) f is a good product to break the good floating gate. ^Key, unfortunately 'due to structural imperfections and atomic bonding.: Inevitable material problems, the leakage current of these defective materials = the charge originally stored in the floating terminal (91) Follow the path to enter a common solution to increase the thickness of the insulation barrier to avoid leakage and thicker leakage charge energy barriers, but slow down the transmission of electrons into the number of turns, resulting in the secondary speed of electronic writing and erasing , wear =. To improve the writing and erasing of the floating-stop closed-pole (91) component, the thickness of the layer must be reduced, which must be less than 2.5 nm. Under the volts, there are people who write and protect the data: the wearer must provide better information to ensure the correctness of the data:: Durable' and when the external disturbance is still thin, the information is wide. as long as. When the thickness of the tunneling oxide layer is fixed, it will be improved, but it will be attenuated. When the thickness is increased, between the absolute degree and the reliability, the second == will be reduced by 1. This trade-off is faster. The thickness is not text: controlled between 8~11 nm. Straight can't be improved. A / '°, voltage and memory speed will be - in order to overcome the traditional flash flash improvement method is proposed, ~ V (nitrogen == salty limit 'two kinds of non-volatile memory elements::=:(_ 2. Two hundred million body components (95) when wearing good data with oxygen two meters to save ... reduce power consumption.): resistance == 6 201017828 is a very important reliability parameter of non-volatile memory. Because of the non-volatile endurance Ge (enduranGe), after repeated periodic writing, it is still clear that 32 has the discriminative possession of the data; and the preservative (four) η), the shell J & The ability to store data and recover data at a specific temperature after a write. #. For the nanocrystal memory (95), the charge loss caused by the side path can be suppressed by the oxidized insulating layer (953) around the nanocrystal (952), compared to the conventional floating gate memory element. The component exhibits better = load storage characteristics. Because the charge in the nanocrystal (952) is stored in a decentralized manner, all stored charges are not lost due to a small number of leakage paths, which can improve the size limitations of conventional flash memory components while still retaining the basic memory characteristics. Replaced by decentralized charge storage. A typical study is to use a semiconductor (Silver or yttrium) nanocrystal (952) to reduce the thickness of the pass-through oxide layer without losing its reliability and also to reduce the operating voltage. The nanocrystals are non-volatile, and the first-time introduction of the nano-crystals was in the 1990s. In this memory component, it is no longer that the charge is stored by the conventional polycrystalline dream layer, but instead the crystals or nanocrystals (952) which are dispersed in each other are used to store the f charge. Each crystal typically has a small amount of charge storage; the electrons in all nanocrystals (952) control the conductivity of the memory transistor. The advantages of a metal nanocrystal cause a lot of attention. Compared to nanocrystals of semiconductors, metallic nanocrystals have low power loss, high density, better channel size, better dimensional reduction and high work function design component freedom. By depositing a thin film on the oxide layer, and then self-precipitating into nanocrystals through rapid thermal annealing, and can be integrated on the D-component, 7 201017828 l疋 is reduced by surface 纟 纟 high temperature annealing to drive the heat of the metal film Condensation becomes a nanocrystal on the channel oxide layer. Compared with the semiconductor crystal brother stealth metal nanocrystal memory, it shows several advantages:) It has strong lightness with the guide 5 channel (2) Better size reduction (3) On the Fermi level There is a higher state density (4) because of the lower energy perturbation of the carrier (9) The high power function has greater design freedom to optimize the component.

The metal nanocrystal does not withstand the cross-voltage from the open pole, which means that the voltage given by the gate will cross the tunneling oxide layer and the control oxide layer to obtain this benefit. Due to the high density state of the metal nano The crystal has more immunity to fluctuations in the Fermi level due to eucalyptus. Metal nanocrystals tend to store charge uniformity more uniformly' thus controlling the threshold voltage vth to be narrower. A wider range of available work functions provides a better design: by weighing the trader/erase and charge preservability, this is because the work function of the power function is the depth of the well and the available state density. The nano-crystal f-meter energy level between the 11-gap between the energy gap and the edge of the conductive strip during erasing can be obtained by the substrate. J /1 g, programming / Jg, retenti〇n ratio, because the writing is made by wearing electrons from the Shixi substrate into the nanocrystalline crystals 'so can always find the available state of the tunnel into the ' and can have an approximation At that time, the current is erased. The metal nanocrystal can be quickly written and erased and has the same conservatory property. Metal nanocrystals are also capable of reducing the size of the nanocrystals to achieve good memory characteristics. In order to ensure the single electron or a few electronic memory characteristics under the Coulomb repulsion effect, smaller nanocrystals are necessary, but 201017828 and compared to semiconductor nanocrystals and bulk materials, due to the multi-dimensional carrier limit effect The wide band gap of the nanocrystals reduces the effective potential well depth and must sacrifice charge retention. This effect is very small for metallic nanocrystals because it has thousands of conduction band electrons in the nanocrystals and even in the charge neutral state. Therefore, the increase in the Fermi level of the metal nanocrystal size is small. Although the current metal nanocrystals have a slight effect, the metal materials currently selected are not too expensive (such as Ag, Pt), but the thermal stability is not good, so that the metal materials cannot be applied to the source of CMOS (complementary MOSFET). The high temperature required for the /dole (S/D) ion implantation process is activated under it, or the work function is not good, so that it can store less state density and poor charge retention characteristics. Trouble with use. SUMMARY OF THE INVENTION Before the solution of the work function In order to solve the aforementioned problems of high cost, thermal stability, and problems of the metal crystal, the present invention employs molybdenum metal as a material of the metal crystal.

The electrode on the surface of the dielectric layer. The present invention provides a molybdenum nanocrystalline element which comprises a substrate, sequentially formed, a molybdenum containing a plurality of molybdenum nanocrystals, and two respectively formed on the substrate and controlled

The amorphous semiconductor substrate, ', is a single crystal semiconductor, a polycrystalline semiconductor substrate, a doped donor semiconductor substrate, a unit semiconductor 201017828 substrate or a multi-component semiconductor substrate. Molybdenum gold wherein each of the molybdenum nanocrystals in the molybdenum-ruthenium film may be a precipitated or molybdenum-rhenium compound. Non-volatile tunneling barrier wherein the control dielectric layer is a nitride or oxide film. The invention further provides a method for fabricating a memory element having a nanocrystalline crystal structure layer, the steps comprising: forming a tunnel barrier layer Forming a layer on a semiconductor substrate;

Forming a molybdenum-ruthenium film layer; depositing a molybdenum film on the tunneling barrier layer* to form a control dielectric layer, and performing a silver-controlled dielectric film on the box film layer; forming a pin nanocrystal, Performing a nanometer crystal precipitation process film (4) into a plurality of (four) mm ^ 石 ❹ 制 制 电极 电极 分别 之前 之前 之前 之前 之前 之前 之前 之前 之前 之前 之前 之前 之前 之前 之前 之前 之前 之前 之前 之前 之前 之前 之前 之前Control the dielectric layer to make an electrode of silver. The step of forming the tunnel barrier layer is to deposit an oxide or nitride of the semiconductor substrate by a physical vapor deposition or a chemical vapor deposition apparatus. Wherein, the step of forming a molybdenum-ruthenium film is formed by depositing a molybdenum-bismuth compound into the tunnel barrier layer by a physical germanium deposition or a chemical disorder deposition apparatus. Wherein, the step of forming the control dielectric layer forms an oxide or nitride film on the surface of the molybdenum 201017828 tantalum film by a physical vapor deposition or a chemical vapor deposition apparatus. The post-treatment process is a rapid thermal annealing process. Thereby, the molybdenum tantalum film used in the present invention can be effectively formed into a non-volatile memory storage carrier after being post-treated, since the molybdenum nanocrystal system is coated between the oxides of the tantalum , causing better isolation between the crystals of the nano crystals, avoiding the generation of excessive leakage paths. [Embodiment]

Please refer to the first figure and the second A to IIE drawings, which are non-volatile memory elements having a molybdenum nano crystal structure layer and a preferred embodiment thereof. The method for manufacturing a non-volatile memory of a crystal structure layer includes the steps of: forming a tunnel barrier layer, forming a molybdenum-ruthenium film (20), forming a control dielectric layer (3〇), and forming a molybdenum nanocrystal _ and An electrode (50) is fabricated. In the step of forming the tunnel barrier layer (10), as shown in FIG. 2A, a semiconductor substrate (8〇) is selected, which is subjected to a standard cleaning process to remove surface impurities, contaminants or native oxide layers (Native). After 〇xjde Layer), a tunnel barrier layer (81) is formed on the semi-conductive substrate _ the surface to be cleaned by the film growth apparatus. The semiconductor substrate (8 Å) can be a monocrystalline, single crystal or polycrystalline or amorphous semiconductor substrate (such as a germanium substrate or a tri-five compound semiconductor substrate, such as gallium-consuming); the so-called standard cleaning process can be - RCA standard process; the so-called film growth device can be - physical vapor deposition (PVD, sputter · ·, etc.) or - chemical vapor deposition devices (such as PECVD, ThermalCVD, ApcvD, etc.); the wear barrier layer (4) 11 201017828 is a non-conductive film layer capable of forming a carrier (electron, hole, etc.) transition or tunneling barrier effect, which may be an oxide, a nitride, or the like of the semiconductor substrate (80). In the preferred embodiment, a single crystal (1 Å) p-type germanium wafer is used as the semiconductor substrate (80), which is subjected to thermal oxidation treatment after being cleaned by standard RCA. The tunneling barrier layer (81) is a layer of 5 nm tantalum oxide layer in an atmospheric pressure chemical vapor deposition (APCVD) furnace. The step of forming the ruthenium film (20), as shown in the second B diagram, selecting a higher work function based on the metal nanocrystal will result in a deep potential wan, which can increase the data retention time without sacrificing Carrier injection efficiency. The more Dens丨ty 〇f state allows the metal nanocrystal memory to store more data. Therefore, a high work function metal material can be selected to produce a nanocrystal. Molybdenum (Mo, molybdenum) has the advantages of thermal stability, high work function and materials commonly used in the semiconductor industry. Therefore, molybdenum is used as a nanocrystal of non-volatile memory elements. In order to allow molybdenum to finally form nanocrystals for storage of carriers, in this step (2), various physical or chemical vapor deposition processes and devices (CVD, PVD) can be used for coating, for example, using two electrons. Dual E-Gun co-deposits molybdenum and tantalum materials on the surface layer of the tunnel barrier layer (81) at the same or different plating rates, or uses various sputtering methods for the molybdenum/ruthenium target (straight 〃IL, Parent flow, pulse, magnetron, ion assist, plasma assist, etc.) are bonded to the tunnel barrier layer (81). In this embodiment, DC sputtering is used to pass the required process gas (for example, Ar: 24 sccm, 〇 2 : 2 seem) and the pressure in the control chamber to several mtorr (for example, 7.6 mt 「r or less). In the process environment, a molybdenum telluride compound (MoSid and ruthenium target were respectively applied to 4〇 and 12 201017828 50Watt (the ratio of molybdenum to niobium was about one to three) to deposit a 5-1 〇 nanometer-aluminum ruthenium compound film ( 82) on the tunnel barrier layer (81). In the step of forming the control dielectric layer (30), please refer to the second c diagram, which can be formed by physical or chemical vapor deposition as described above. A control dielectric layer (83) is on the surface of the molybdenum-ruthenium compound film (82), and the control dielectric layer (83) may be a nitride, an oxide, etc., and the preferred embodiment is plasma-assisted chemical vapor deposition. The device (PECVD) has a control dielectric layer (83) made of yttrium oxide at an ambient temperature of about 3 〇〇〇c. The thickness of the control dielectric layer (83) of the preferred embodiment is about 30 nm. The step of crystallizing the nanocrystal (40), as shown in the second figure, in order to make the molybdenum compound A plurality of molybdenum nanocrystals (821) are precipitated in the film (82) as a suspension gate of the non-volatile simon element, and various annealing or heating can be utilized (rapid thermal annealing Rapid Therma丨Annea丨jng (RTA), Ray ^ Annealing, & furnace annealing, etc., in the environment of non-reactive gas or reaction gas (nitrogen, argon, oxygen, etc.), the non-volatile memory element that has completed the above steps as a whole or The molybdenum ruthenium compound film (82) is subjected to addition, and the molybdenum ruthenium compound film (82) is precipitated into the molybdenum nanocrystal (821). The preferred embodiment uses the RTA method to perform thermal annealing at about t. The nanocrystalline crystal (82^) precipitated at an annealing time of 60 seconds is about 5 nm. Further, this step (40) can also be performed in the 'in other words' section before the control dielectric (30) step is completed. After the completion of the step, the nanocrystalline crystal (82) is directly deposited on the finished molybdenum ruthenium compound film (82), for example, by laser annealing (for example, by laser annealing) Lai 13 201017828 eal>ng) way to the film In the step of the lit electrode (5Q), please refer to the second E diagram, after the conductive metal element t, 1 using the aforementioned physical or chemical vapor deposition or other step money, element replacement, coating... And forming a conductive electrode layer (4) on the surface of the control dielectric layer (83) after the completion of the foregoing (4) and the surface of the semiconductor substrate (8), and the conductive electrode layer (84) of the preferred embodiment Using the heat-resistance wire steaming system (τ|ι_3| c〇ater) on the two sides of the non-volatile memory ^ finished product. In addition, in the process of this step (50), if it is necessary to perform circuit layout planning on the conductive electrode layer (84), the conductive electrode layer (84) may be formed by a photolithography process or a metal 35 mask process. Specific graphics or circuits. In order to confirm the various effects of the non-volatile memory completed in the previous steps, please refer to the third to tenth views respectively; the second figure is the transmission electron microscope after the completion of the step of forming a molybdenum nanocrystal (4〇) (TEΜ) As a result of the photographic process, it is known that the plurality of molybdenum nanocrystals (82 Å) are precipitated from the molybdenum ruthenium compound film (82), and the annealing method of the preferred embodiment can effectively precipitate the molybdenum nanocrystals (821). The fourth and fourth maps are memory-electrical diagrams of the capacitance-voltage of the non-volatile memory element at different annealing temperatures (step 40). It can be found that the memory window has an annealing temperature at an annealing temperature of 900 degrees. 8 big down. The fifth A map and the fifth B graph are respectively the molybdenum element 3〇f orbital (fifth A picture) and the oxygen element (fifth b picture) 1s orbital domain in the as-deposited, annealing temperature of 800 degrees and XPS analysis of 900 degrees (after performing step 40) 201017828 Figure 'In the molybdenum 3cf trajectory, it can be observed that as the annealing temperature increases, the signal is gradually reduced from the Mo-Ο and M〇 signals to the M〇 signal. This phenomenon causes a large memory window when it is annealed at 900 degrees. Similarly, it can be observed from the oxygen 1s orbital domain that as the annealing temperature increases, the 3ί〇χ signal gradually shifts toward the binding energy, and when it is annealed to 9 degrees, it is a bond. Good Si〇2 signal. Therefore, it is presumed that most of the ruthenium is easily bonded to the oxygen-bonded Si〇2 and coated around the molybdenum nanocrystals, resulting in better isolation between the nanocrystalline bodies and avoiding excessive leakage paths. From the above XPS analysis, it was found that after annealing at a high temperature of 9 deg., the nanocrystals were made of metal molybdenum for storage, and the quality of yttrium oxide was also improved. In terms of charge retention time, the characteristics of the gate voltage were measured using a gate voltage of 1 volt volt for 5 seconds. It can be found that after annealing at 900 degrees, the charge retention time remains at 67 〇/〇 after ten years, which is significantly higher than that after annealing at 800 degrees. The remaining 41% of the save time is good, as shown in the sixth picture. The seventh and fourth graphs of the present embodiment are tested for their endurance in terms of endurance, using a gate voltage of 5 volts at 10 microseconds, and found that the resistance is up to 900 degrees after annealing. The charge of about 54% of the 6 times is obviously better than that of 800 degree after annealing. According to the charge retention time and the resistance, it can be found that the characteristics become better after annealing at 900 degrees. The reason may be due to the improved quality of yttrium oxide. It is not easy to escape, and the whole characteristics are improved. Further, the step of forming a molybdenum nanocrystal (40) may also include other different semiconductor processing methods, so that non-volatile memory elements can obtain different effects, such as plasma processing. (piasma treatment), etc., and when performing a plasma treatment process, different gases, such as ammonia, may be introduced. 15 201017828 Another preferred embodiment of the present invention utilizes plasma assisted chemistry after completion of the thermal annealing process. The vapor deposition system (PECVD) is treated with 3 〇〇 sccm of ammonia gas and hydrogen gas in a power environment of 1 watt for about 3 minutes, using electric and slurry to compensate for leakage paths and defects. Various results after plasma treatment. The ginseng can be the eighth and fourth graphs, which are the presence or absence of molybdenum nanocrystals in yttrium oxide, and the capacitance of the ammonia plasma treatment. Comparison of voltage characteristics can be found in When the plasma is turned from 10 V to -1 〇v, the memory window is obviously smaller than that of the untreated one. However, as shown in the ninth figure, the charge storage characteristics after ammonia plasma treatment can be By the end of ten years, 85% of the charge is left, which is significantly better than the 67% of the charge remaining from the untreated to ten years. In addition, in terms of leakage current characteristics, the entire leakage current after the ammonia plasma treatment is completed. The first figure is a flow chart of a preferred embodiment of the present invention. The second figure is a schematic flow chart of a preferred embodiment of the present invention. Transmissive Electron Microscope Photograph of the Preferred Embodiment of the Invention FIG. 4A and B are diagrams showing a capacitor/voltage characteristic circle according to a preferred embodiment of the present invention. FIGS. 5A and B are diagrams showing molybdenum according to a preferred embodiment of the present invention. X-ray photon spectroscopy (XPS) image of bismuth compound film. The charge storage time measurement result of the preferred embodiment 16 201017828 The seventh A, B @ is a schematic diagram of the financial measurement measurement result of the preferred implementation of the present invention. The non-volatile eighth and fourth diagrams are the preferred embodiments of the present invention. - Voltage characteristic diagram. Electrogram of memory material at paper electro-hydraulic ninth diagram is a sub-graph of the preferred embodiment of the present invention. The tenth figure is a charge-preserving characteristic measurement according to a preferred embodiment of the present invention. Results Figure 11 is a schematic diagram of one of the non-volatile memory structures used in the twelfth. Figure 12 is a schematic diagram of the memory structure of one of the nano crystals. [Main component symbol description] (8〇) Semiconductor substrate (81) tunneling barrier Layer (8 2) Turning Compound Film (821) Turning Nano Crystal (83) Control Dielectric Layer (84) Conductive Electrode Layer (90) Flash Memory (91) Floating Gate (92) Channel (93 ) cerium oxide (9 5) nanocrystal memory element (951) tunneling oxide layer 17 201017828 (952) nanocrystal (953) oxidized insulating layer

Claims (1)

201017828 X. The non-volatile memory component of the patent application scope, 1. A crystal structure layer having a molybdenum nanocrystal comprising: a substrate; a tunneling barrier layer-a molybdenum-ruthenium film, and a plurality of molybdenum nanocrystals; Formed on the surface of the substrate; formed on the surface of the tunnel barrier layer, including a control dielectric layer formed on the molybdenum tantalum film sheet; and two electrodes respectively formed on the substrate and the surface of the control medium layer. 2. If you apply for a patent scope! The non-volatile memory element having a molybdenum: layer, the substrate is a single::: body substrate 'amorphous semiconductor substrate, doped donor body: semi-conductive body: body: 7L early semiconductor substrate Or a multi-component semiconductor substrate. Body No. Crystal 槿恳 A non-volatile memory element having a nanocrystalline π as described in claim 1, wherein each of the nanometers in the molybdenum tantalum film may be a precipitated molybdenum metal or molybdenum ruthenium compound. The invention has a molybdenum nanocrystal junction. The control dielectric layer is nitride or oxidized. 4. A non-volatile memory element, as described in the patent application. 5. A non-volatile memory element having a τ'm-day structural layer as described in claim 13 or 2 or 4, wherein the control medium layer is a tantalum oxide film; a crucible type substrate; and the electrode is an aluminum electrode layer. 19 201017828 6 • A non-volatile memory element as claimed in the fifth aspect of the patent application, wherein: the control medium layer has a thickness of 30 nm; and the turnstone has a thickness of 5 to 1 nm. The method for manufacturing a non-volatile memory element having a molybdenum nanocrystal crystal having a molybdenum nanocrystal layer, wherein the step comprises: forming a via barrier layer to form a tunneling resistance on a semiconductor substrate a barrier layer; a germanium layer; forming an indium tantalum thin tantalum, and plating a key film on the (four) barrier layer to form a control dielectric layer film; plating a controlled dielectric layer on the molybdenum tantalum film layer a wafer crystallizing process for performing a nanocrystalline crystal precipitation process on the (four) film before or after the completion of the silver controlled dielectric film, so that a plurality of molybdenum nanocrystals are formed in the (4) film; An electrode is formed by plating an electrode on the semiconductor substrate and the control dielectric layer respectively. 8. A method for manufacturing a non-volatile memory element having a molybdenum nanocrystal structure layer according to claim 7 of the patent application, The step of forming a tunnel barrier layer is performed by plating a oxide or nitride of the conductor substrate by a physical vapor deposition or a chemical vapor deposition apparatus. 9. The method for producing a non-volatile memory element having a molybdenum nanocrystal dry layer as described in claim 7, wherein the molybdenum film is formed by a physical vapor deposition or a chemical vapor deposition The device forms a layer of the tunneling barrier layer. 10. The non-volatile enthalpy, '° 4 method having a layer of indium nanocrystals as described in claim 7 of the patent application scope, wherein the step of forming the control dielectric layer is a physical Wengfu, pull _ + The ritual 'or product or a chemical vapor deposition device forms a film of oxide or nitride (4) on the (4) (iv) material plane. 11. The method of manufacturing a non-volatile memory element having a key crystal structure layer as described in claim 7 of the patent application, wherein the electrode is formed by a physical vapor deposition process. 12 _ A method for producing a non-volatile memory element having a copper nanocrystal layer as described in claim 7 of the patent, which is a rapid thermal annealing process. You are a method for manufacturing a non-volatile memory element having a key crystal structure layer as described in claim 8 or 9 or (7) or 彳彳 or 12, which is a stepper layer forming step. After the semiconductor substrate is processed by a standard cleaning process, the tunneling barrier layer is formed. 14. The method of manufacturing a non-volatile memory element having a nanocrystalline crystal structure layer according to claim 8 or 9 or 1 or 2 or 12, wherein: forming the tunneling barrier layer is Electric auxiliary vapor deposition or a hot tube chemical vapor deposition process, forming oxygen or nitrogen to form the beautiful oxide or nitride layer; and the soil material to form a molybdenum tantalum film by using two electrons to separately vapor deposit molybdenum,矽 target village, or use the method of reducing ore to dry the composite composite plating on the surface of the barrier layer. 21 201017828 = · As described in the patent application, the method for manufacturing a non-volatile memory element having a (four) meter crystal 'Γ structure layer, as described in Item 14 of the present invention, wherein the rapid thermal annealing process temperature is between 800 and 900 degrees. The method for manufacturing a non-volatile memory element having a nanocrystalline crystal structure layer according to claim 15 of the patent application, wherein the precipitation nano crystal sinking m + 乂 plasma assisted chemical vapor phase Under the condition of human ammonia or hydrogen or nitrogen, the semiconductor substrate of the 石石石膜 layer is subjected to plasma treatment. u 十一, 囷: as the next page. ❹ 22