TW201017529A - Computation and addressing method of a eneral sized memory-based FFT processor - Google Patents

Computation and addressing method of a eneral sized memory-based FFT processor Download PDF

Info

Publication number
TW201017529A
TW201017529A TW97141311A TW97141311A TW201017529A TW 201017529 A TW201017529 A TW 201017529A TW 97141311 A TW97141311 A TW 97141311A TW 97141311 A TW97141311 A TW 97141311A TW 201017529 A TW201017529 A TW 201017529A
Authority
TW
Taiwan
Prior art keywords
fourier transform
memory
fast fourier
data
point
Prior art date
Application number
TW97141311A
Other languages
English (en)
Chinese (zh)
Other versions
TWI375171B (OSRAM
Inventor
Chen-Yi Lee
qing-feng Xiao
Yuan Chen
Original Assignee
Univ Nat Chiao Tung
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Univ Nat Chiao Tung filed Critical Univ Nat Chiao Tung
Priority to TW97141311A priority Critical patent/TW201017529A/zh
Publication of TW201017529A publication Critical patent/TW201017529A/zh
Application granted granted Critical
Publication of TWI375171B publication Critical patent/TWI375171B/zh

Links

Landscapes

  • Complex Calculations (AREA)
TW97141311A 2008-10-28 2008-10-28 Computation and addressing method of a eneral sized memory-based FFT processor TW201017529A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW97141311A TW201017529A (en) 2008-10-28 2008-10-28 Computation and addressing method of a eneral sized memory-based FFT processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW97141311A TW201017529A (en) 2008-10-28 2008-10-28 Computation and addressing method of a eneral sized memory-based FFT processor

Publications (2)

Publication Number Publication Date
TW201017529A true TW201017529A (en) 2010-05-01
TWI375171B TWI375171B (OSRAM) 2012-10-21

Family

ID=44830889

Family Applications (1)

Application Number Title Priority Date Filing Date
TW97141311A TW201017529A (en) 2008-10-28 2008-10-28 Computation and addressing method of a eneral sized memory-based FFT processor

Country Status (1)

Country Link
TW (1) TW201017529A (OSRAM)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9459812B2 (en) 2014-02-03 2016-10-04 Ceva D.S.P. Ltd. System and method for zero contention memory bank access in a reorder stage in mixed radix discrete fourier transform
CN109117454A (zh) * 2017-06-23 2019-01-01 扬智科技股份有限公司 3780点快速傅立叶转换处理器及其运作方法
US12494235B2 (en) 2023-03-31 2025-12-09 Taiwan Semiconductor Manufacturing Company, Ltd. Systems and methods for flexible bank addressing in digital computing-in-memory (DCIM)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9459812B2 (en) 2014-02-03 2016-10-04 Ceva D.S.P. Ltd. System and method for zero contention memory bank access in a reorder stage in mixed radix discrete fourier transform
CN109117454A (zh) * 2017-06-23 2019-01-01 扬智科技股份有限公司 3780点快速傅立叶转换处理器及其运作方法
CN109117454B (zh) * 2017-06-23 2022-06-14 扬智科技股份有限公司 3780点快速傅立叶转换处理器及其运作方法
US12494235B2 (en) 2023-03-31 2025-12-09 Taiwan Semiconductor Manufacturing Company, Ltd. Systems and methods for flexible bank addressing in digital computing-in-memory (DCIM)

Also Published As

Publication number Publication date
TWI375171B (OSRAM) 2012-10-21

Similar Documents

Publication Publication Date Title
US8364736B2 (en) Memory-based FFT/IFFT processor and design method for general sized memory-based FFT processor
JP4022546B2 (ja) 高速フーリエ変換を用いた混合−基数方式の変調装置
CN114816334B (zh) 加速单元、相关装置和方法
Jo et al. New continuous-flow mixed-radix (CFMR) FFT processor using novel in-place strategy
US8694570B2 (en) Method and apparatus for evaluation of multi-dimensional discrete fourier transforms
US9582474B2 (en) Method and apparatus for performing a FFT computation
JP3749022B2 (ja) 高速フーリエ変換を用いて短い待ち時間でアレイ処理を行う並列システム
Hsiao et al. A generalized mixed-radix algorithm for memory-based FFT processors
CN102053948A (zh) 在单指令多数据多核处理器架构上转置矩阵的方法和系统
TW594502B (en) Length-scalable fast Fourier transformation digital signal processing architecture
CN105224505B (zh) 基于矩阵转置操作的fft加速器装置
CN103699515B (zh) 一种fft并行处理装置和方法
US11675624B2 (en) Inference engine circuit architecture
JP2000231513A (ja) N次元矩形データアレイの任意の所与次元におけるパラレルデータアクセスのためのメモリアーキテクチャ
TW201017529A (en) Computation and addressing method of a eneral sized memory-based FFT processor
US9176929B2 (en) Multi-granularity parallel FFT computation device
KR101696987B1 (ko) Fft/dft의 역순 배열 시스템과 방법 및 그 연산 시스템
US7752249B2 (en) Memory-based fast fourier transform device
Sanjeet et al. Comparison of real-valued FFT architectures for low-throughput applications using FPGA
Puchała et al. Effectiveness of Fast Fourier Transform implementations on GPU and CPU
US20080228845A1 (en) Apparatus for calculating an n-point discrete fourier transform by utilizing cooley-tukey algorithm
TWI274262B (en) Digital signal processing apparatus
US10282387B2 (en) FFT device and method for performing a Fast Fourier Transform
KR100557160B1 (ko) 고속 퓨리에 변환을 이용한 혼합-기수 방식의 변조 장치
Liu et al. A VLSI array processing oriented fast Fourier transform algorithm and hardware implementation

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees