TW201015335A - Connection structure for accessing non-volatile memory - Google Patents

Connection structure for accessing non-volatile memory Download PDF

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TW201015335A
TW201015335A TW97138239A TW97138239A TW201015335A TW 201015335 A TW201015335 A TW 201015335A TW 97138239 A TW97138239 A TW 97138239A TW 97138239 A TW97138239 A TW 97138239A TW 201015335 A TW201015335 A TW 201015335A
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Taiwan
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memory
unit
central processing
processing unit
connection structure
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TW97138239A
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Chinese (zh)
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Zhuan-Sheng Lin
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Afa Technologies Inc
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Abstract

A connection structure for accessing non-volatile memory comprises a first and second data access units that are disposed within a dual-port memory and are respectively connected with a central processing unit and a flash memory control unit of a system, a third data access unit for connection with both the central processing unit and the flash memory control unit, and a control register that is respectively connected with the central processing unit and the flash memory control unit for controlling the data access of the dual-port memory. Thereby, memory space can be extended to increase the speed of data access and the extended memory space can be used for storing data temporarily to reduce the erasing frequency of storage block and consequently prolong the lifetime of the non-volatile memory.

Description

201015335 六、發明說明: 【發明所屬之技術領域】 本發明係有關一種記憶體連結結構,尤指一種連結於系統主機 與非揮發性記憶體之間,以提高資料存取速度,並延長非揮發性 記憶體使用壽命的用於存取非揮發性記憶體的連結結構。 【先前技術】 ❹ 魯 NAND非揮發性記憶體具有低寫入和擦除時間、高密度(高 存放空間)和低製造成本的特性,由於它的1/〇界面只允許連續讀 取,所以並不適合電腦内存,但是卻很適合應用在儲存卡上。而 目則除了在儲存卡被大量應用外,手機、MP3播放器、數位多媒 體播放H也已大量使用,作為存放乡媒麵案_介之一。 但當NAND轉發性記健直接連結於祕域時,在資料 的處理過程中,由於主機之中央處理單元(CPU)常需同時處理 命令下達、主記憶及NAND非揮發性記憶體之資料讀取、複製及 搬移、NAND非縣性記讎之資料伽檢正(Ecc)及非 性圯憶體轉換層(FTL,Flash Translation Layer)之運作等,因此, ^然cpu之資料處理速度相當快速,但在cpu忙碌狀態時,仍 會影響與NAND非揮發性記憶體之間之傳輸效能,且由於 ^揮發性記億體之頻寬大约在_/sec左右,在資料傳輸時,更 會使資料存取逮度無法提升。 而如第5圖所不,當ΝΑΝ〇非揮發性記億體A與一 元 ,雖_紐_取切^處理單 的“,以減少ECC及FTL的運作程序,但在整體的資料 201015335 •存取速度上,仍是相當的緩慢。201015335 VI. Description of the Invention: [Technical Field] The present invention relates to a memory connection structure, and more particularly to a connection between a host computer and a non-volatile memory to improve data access speed and prolong non-volatile A link structure for accessing non-volatile memory for the life of a memory. [Prior Art] NAND NAND non-volatile memory has low write and erase time, high density (high storage space) and low manufacturing cost, since its 1/〇 interface only allows continuous reading, so Not suitable for computer memory, but it is suitable for application on a memory card. In addition to the large number of applications on the memory card, mobile phones, MP3 players, and digital multimedia playback H have also been widely used as one of the media. However, when the NAND forwarding property is directly linked to the secret domain, the central processing unit (CPU) of the host often needs to simultaneously process the command release, the main memory, and the NAND non-volatile memory data reading during the processing of the data. , copying and moving, the operation of NAND non-county records, the operation of the Ecc and the operation of the non-sexual translation layer (FTL, Flash Translation Layer), therefore, the data processing speed of the cpu is quite fast. However, when the cpu is busy, it still affects the transmission performance between the non-volatile memory and the NAND non-volatile memory, and since the bandwidth of the volatility is about _/sec, the data will be transmitted during data transmission. Access catchance cannot be increased. And as shown in Figure 5, when the non-volatile 记 亿 体 体 体 与 与 与 与 , , , , 纽 纽 纽 纽 处理 处理 处理 处理 处理 处理 处理 处理 处理 处理 处理 处理 处理 处理 处理 处理 处理 处理 处理 处理 处理 处理 处理 处理 处理 处理 处理 处理 处理 处理The speed is still quite slow.

再者’因為NAND非揮發性記憶體的特性,在主機資料的處 理過程中,無論是輸入隨機或連續性資料,皆必須完成一個寫入、 搬移複製、抹除及區塊位址轉換的動作,當儲顧塊經不斷的抹 除’不但會縮短非揮發性記憶體的使用壽命,且由於詩處理過 程的重複,將使得非揮發性記億體的處理速度無法提升。縱缺使 用適當_揮魏纖㈣社料紐,條··平儲 ’除了可延長非揮發性記憶體的使用壽 命之外,在資料存取速度上,仍無法有效增加。Furthermore, because of the characteristics of NAND non-volatile memory, in the process of processing host data, whether writing random or continuous data, it is necessary to complete a write, move copy, erase and block address conversion action. When the storage block is continuously erased, it will not only shorten the service life of the non-volatile memory, but also will make the processing speed of the non-volatile recording body unable to increase due to the repetition of the poetry processing process. Inappropriate use of _ _ Wei Wei (four) community materials, bar · ping ‘, in addition to prolonging the life of non-volatile memory, in terms of data access speed, can not effectively increase.

有4α於此為了改善上述之缺點,使用於存取轉發性記憶 結射觀增加賴麵紐,以加速料發性記億體 •、、度’且可減少雜發性鋪塊抹除之鮮,以延長 非揮發性魄__壽命,人積多年雜驗及補的研發 改進,遂有本發明之產生。 【發明内容】 祕ί發=之主要目的在提供—種用於存取非揮發性記憶體的連 ㈣在系統主機與快閃記憶體鋪單元之間連結一記憶 '争择 〇構,俾此增加資料之整體密度,以提高存取 以在儲她躺寫场財,提供暫存之資_存空間, f示之頻率,延長非揮發性記憶體的使用壽命。 體的日仅㈣,本發輯設之肖神轉揮發性記憶 、、,Ό…構,包括雙接口記憶體(Dual_p 暫存器<cont!Ol 〇rt Memory)以及一控制 register )。其中’該雙接口記憶體包括一第一資 料 4 201015335 .^取單70、―第二資料存取單元及-第三資料存取單元,該第-身料存取單元連結—祕之中央處理單元該第二資料存取單元 連結一快閃記憶體控制單元,該第三資料存取單元分別連結中央 處理單元及快閃記憶體控制單元(Flash Mem〇ry c〇n滅⑷,供選 擇1·生的存取來自中央處理單元或快閃記憶體控制單元之資料;而 該控制暫存n係分職結巾央處理單元及,_記碰控制軍元, 健财域理單元之執行命令及雜脸鮮狀反應,以存 ® 取進出雙接口記憶體之資料。 貫施時 伞知明更包括一控制訊號,供由中央處理單元 傳輸以控制快閃記憶體控制單元之作動。 實施時’财域釋祕她㈣存 ^非輸嘯嘯,#軸權ata财、sd= MMC協定或SCSI協定。 為便於對本發明能有更深人的瞭解,轉述於後: 【實施方式】 連社其為本發_於存取非揮發性記憶體的 連—構!之較佳實施例,包括雙接口記憶體伽峨 以及一控制暫存器(contr〇1 r is 〇ly)2 控制暫存器3的-端連接—系。、該雙接口記憶體2及 體2及控制暫存器3的另端連接門該雙接口記憶 記憶體控制單元5連接- 快閃記憶體控制單元5係以―二,疋4與該 單向傳輪-mmm,__讀贿m處理單元4 優先_命令,例如:續命令_麟命=,進行高度 201015335 該雙接口記憶體2係為一靜態隨機存儲記憶體(SRAM),實 靶時,所述的雙接口圮憶體2亦可為動態隨機存取記憶體 (DRAM)、磁性記憶體(mraM)或鐵電性隨機存取記憶體 (FeRAM)。該雙接口記憶體2包⑽目互區隔的_第__資料存取單 元21、-第二資料存取單元22及一第三資料存取單元23。其中, 該第-資料存取單元連結中央處理單元4,並僅供中央處理單 元4進行資料之存取;該第二資料存取單元22連結快閃記憶體控 制單元5,並舰_記_控鮮元5存取_記憶體S之資 料;而該第三資料存取單元23係分別連結中央處理單元4及快閃 疏體控㈣元5,以藉由特定控制訊號_制,選擇性的存取來 自中央處理單元4或快閃記憶體控制單元5之資料。 以笛^^ 單元21做粒機之主記賴使用, 祕祕存取單元22料執行㈣倾檢正(ECC)、非揮發 轉換層(吼)及平均抹寫儲存區塊技術(_ie:In order to improve the above-mentioned shortcomings, 4α is used for the purpose of accessing and forwarding memory junctions to increase the thickness of the material, and to reduce the amount of hair loss. In order to prolong the non-volatile 魄__ life, the human development has been improved for many years and supplemented, and the invention has been produced. SUMMARY OF THE INVENTION The main purpose of the secret is to provide a connection for accessing non-volatile memory (4) to connect a memory between the system host and the flash memory unit. Increase the overall density of the data, in order to increase access to store her lying in the field, provide temporary storage resources, the frequency of f, to extend the life of non-volatile memory. The day of the body is only (4), and the collection of the fascinating memory, Ό, Ό, 双, includes dual interface memory (Dual_p register <cont!Ol 〇rt Memory) and a control register). The 'double interface memory includes a first data 4 201015335 . ^ order 70 , a second data access unit and a third data access unit , the first body access unit link - the central processing of the secret The second data access unit is coupled to a flash memory control unit, and the third data access unit is coupled to the central processing unit and the flash memory control unit (Flash Mem〇ry c〇n (4), for selection 1 · The raw access is from the central processing unit or the flash memory control unit; and the control temporarily stores the n-series and the central processing unit, and the execution command of the _ control unit And the reaction of the face is fresh, and the data of the double interface memory is taken in and out of the memory. The umbrella knowledge includes a control signal for transmission by the central processing unit to control the operation of the flash memory control unit. The financial domain explains her (4) deposits ^ non-transmission whistling, #轴权ata, sd= MMC agreement or SCSI agreement. In order to facilitate a deeper understanding of the present invention, it is described as follows: [Embodiment] The hair _ access non-volatile A preferred embodiment of the memory structure includes a dual interface memory gamma and a control register (contr〇1 r is 〇ly) 2 controlling the end-to-end connection of the register 3. The dual interface memory 2 and the body 2 and the other end of the control register 3 are connected. The dual interface memory control unit 5 is connected - the flash memory control unit 5 is connected to the two-way transmission wheel -mmm, __ reading bribe m processing unit 4 priority _ command, for example: continued command _ lin life =, height 201015335 The dual interface memory 2 is a static random access memory (SRAM), real target, The dual interface memory 2 can also be a dynamic random access memory (DRAM), a magnetic memory (mraM) or a ferroelectric random access memory (FeRAM). The dual interface memory 2 package (10) a ____ data access unit 21, a second data access unit 22, and a third data access unit 23. The first data access unit is connected to the central processing unit 4 and is only for the central The processing unit 4 accesses the data; the second data access unit 22 is connected to the flash memory control unit 5, and the ship___ control The third data access unit 23 is connected to the central processing unit 4 and the flashing body controller (4) element 5 respectively, to selectively store the signal by using a specific control signal. Take the data from the central processing unit 4 or the flash memory control unit 5. Use the flute ^^ unit 21 as the master of the granular machine, and the secret access unit 22 to perform (4) the positive detection (ECC), non-volatile Conversion layer (吼) and average erase storage block technology (_ie:

IT ’树三資料存取單元23做物處理單元 一 :°己w _單疋5共用的記麵暫存空間,使在中央處理 = ==;!之執行命令時,將敎__備二 資^ _咖6购區塊之 述的第二資料存取單塊位址轉換的動作。實施時,所 用,以M k I 與第三資料存取單元23亦可於配使 而該=:=5所_之記憶體空間: 分別連結_理單元4 2分離,該_存器3 理單元4在_特定、“麵控制早70 5,以控制中央處 .L下下達命令給快閃記憶體控制單元5,以 201015335 處理單元4,^記,_控鮮元5之反應回傳給中央 控制暫存H 3村祕雙接°讀、體2之資料。實辦,所述的 央處理單元4钟人 β *'"體2、'Όσ (如第2圖所示)、與中 結合(如第4 、3圖所示)或與快閃記憶體控制單元5 ^圖所不),皆可達到相同的功能。 存取触中,以_料_,在上述資料的 聽斷或sCSI協〜i同而使用顧财、SD協定、 ycsm不同的溝通财,或自訂協定。 因此,本發明具有以下之優點: 右在系餘機與快閃記賴控制單元之間增加一具 記憶體空間’不但可有效增加資料之整體存取密度瓦 可縣取代巾域科元之運作,啸高龍魏速度。 本發明能提供更大的轉發性記紐冑理及平均抹寫儲存 Ο 區塊技術之運算空間,且可將欲存取的部份雜暫存,藉以減少 非揮發性記鍾_純叙齡缝,叹長轉發性記憶體 的使用壽命。 綜上所述’依上文所揭示之内容,本發明確可達到發明之預 期目的’提供-種不僅能增加資料存取密度以加速非揮發性記 憶體的處理速度,且可減少非揮發性記舰區塊抹除之頻率以 延長非揮發性記紐使用壽命的胁存取轉發性記憶體的連緒 結構’極具產業上糊之價值’綠法提自發明專利申請。 【圖式簡單說明】 第1圖係為本發明用於存取非揮發性記憶體的連結結構之實施例 201015335 之方塊示意圖。 第2圖係為本發明用於存取非揮發性記憶體的連結結構之控制暫 存器與雙接口記憶體結合時之方塊示意圖。 第3圖係為本發明用於存取非揮發性記憶體的連結結構之控制暫 存器與中央處理單元結合時之方塊示意圖。 第4圖係為本發日月係為本發明用於存取非揮發性記憶體的連結結IT 'tree three data access unit 23 processing unit one: ° has w _ single 疋 5 shared face temporary storage space, so that when the central processing = ==;! execution command, will 敎 __ prepared two The operation of the second data access single block address conversion described in the section of the purchaser. In the implementation, the M k I and the third data access unit 23 can also be configured to match the memory space of the ===5: respectively, the connection unit 4 2 is separated, and the storage unit 4 is separated. Unit 4 is in the _specific, "face control early 70 5, to the central control. L under the command to the flash memory control unit 5, with 201015335 processing unit 4, ^ record, _ control fresh element 5 reaction back to The central control temporarily stores H 3 village secret double access reading, body 2 information. In practice, the central processing unit 4 bell people β * '" body 2, 'Ό σ (as shown in Figure 2), and The same function can be achieved by combining (as shown in Figures 4 and 3) or with the flash memory control unit (Fig. 5). Accessing the touch, to _ material_, in the above data Or the sCSI association can use different financial resources, SD agreement, ycsm communication, or custom agreement. Therefore, the present invention has the following advantages: Adding between the right balance machine and the flash memory control unit The memory space can not only effectively increase the overall access density of the data, but also replace the operation of the towel domain, and the speed of the Xiao Gaolong Wei. The invention can provide The large forwarding property and the average transcript storage area of the block technology, and the temporary storage of the part to be accessed, in order to reduce the non-volatile clock _ purely narrative seam, sigh long forward The useful life of the memory. In summary, according to the above disclosure, the present invention can achieve the intended purpose of the invention 'providing--can not only increase the data access density to accelerate the processing speed of non-volatile memory And can reduce the frequency of non-volatile logging block erasing to prolong the service life of the non-volatile billing life of the threat access forwarding memory structure of the "very industrial value" green law from the invention Patent Application. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a block diagram showing an embodiment of the present invention for accessing a non-volatile memory connecting structure 201015335. Fig. 2 is a view of the present invention for accessing non-volatile The block diagram of the control structure of the memory structure is combined with the dual interface memory. Fig. 3 is a combination of the control register for accessing the non-volatile memory of the present invention and the central processing unit. Time Figure 4 is a schematic diagram of the present invention for accessing non-volatile memory in the present invention.

構之控制暫存H触閃記舰控鮮元結合時之方塊示意 圖。 第5圖係為s用儲存卡與系統主機之中央處理單元連結時之方塊 示意圖。 【主要元件符號說明】 NAND非揮發性記憶體 A 儲存卡 C 用於存取非揮發性記憶體的連結結構 雙接口記憶體 2 第二資料存取單元 22 控制暫存器 3 快閃記憶體控制單元 5 控制訊號 7The block diagram of the control of the temporary storage H touch flash ship control fresh element. Figure 5 is a block diagram of the s memory card coupled to the central processing unit of the system host. [Main component symbol description] NAND non-volatile memory A memory card C connection structure for accessing non-volatile memory dual interface memory 2 second data access unit 22 control register 3 flash memory control Unit 5 control signal 7

控制器 BController B

中央處理單元 D 1 第一資料存取單元21 第三資料存取單元23 中央處理單元 4 快閃記憶體 6Central processing unit D 1 first data access unit 21 third data access unit 23 central processing unit 4 flash memory 6

Claims (1)

201015335 •七、申請專利範圍: 卜一種用於存取非揮發性記憶體的連結結構,包括: 雙接口記億體(Dual’Port Memory),包括一第一資料存取單 =、一第二侧存取單元及—第三倾麵單元,該第一資料 存取單疋連結-錢之中央處理單元,鄉二¥料存取單元連 結-快,記鋪控制單元,職第三資料存取單元分別連結中 央處理單元(CPU)及快閃記憶體控制單元(FlashMem0Iy Φ co咖ller),供選擇性的存取來自中央處理單元或_記憶體控 制單元之資料;以及 -控制暫存1 (eontrolregisteO ’係分概針央處理單 讀快閃纖驗鮮元,供控财央處科元之執行命令及 記憶_鮮元之反應,以存取進出雙接σ記龍之資料。 如申清專利範圍第1項所述之用於存取非揮發性記憶體的連結 結構,更包括-控制訊號,供由中央處理單元單向傳輸以控制 g 快閃記憶體控制單元之作動。 3、 如申請專利範園第1或2項所述之用於存取非揮發性記憶體的 連結結構,其中,該控制暫存器係與雙接口記憶體結合。 4、 如申請專利範圍第丨或2項所述之用於存取非揮發性記憶體的 連結結構,其中,該控制暫存器係與中央處理單元結合。 5、 如申請專利範圍第1或2項所述之用於存取非揮發性記憶體的 連結結構’其中’該控制暫存器係與快閃記憶體控制單元結合。 6、 如申請專利範圍第i或2項所述之用於存取非揮發性記憶體的 連結結構,其中,該雙接口記憶體係為靜態隨機存儲記憶體 (SRAM)、動態隨機存取記憶體(DRAM)、磁性記憶體 9 201015335 (MRAM)或鐵電性隨機存取記憶體(FeRAM)其t之一種。 7、如申請專利範園第〗或2項所述之用於存取非揮發性記憶體的 連結結構,其中’該中央處理單元顧由_ 記憶體存取轉舰魄,聽 ^接 定、®協定讀協定或_協定其中之:皿協201015335 • Seven, the scope of application for patents: a connection structure for accessing non-volatile memory, including: Dual interface (Dual'Port Memory), including a first data access order =, a second Side access unit and third tilting unit, the first data access unit link-money central processing unit, township two material access unit link-fast, record control unit, third data access The unit is respectively connected to a central processing unit (CPU) and a flash memory control unit (FlashMem0Iy Φ co café) for selectively accessing data from the central processing unit or the _ memory control unit; and - controlling the temporary storage 1 ( eontrolregisteO 'The Department of the Central Committee handles the single-reading flash-flashing test for the control of the financial department's executive order and memory _ fresh element response, in order to access the data of the double-connected σ 记 龙. The connection structure for accessing the non-volatile memory according to Item 1 of the patent scope further includes a control signal for one-way transmission by the central processing unit to control the operation of the g flash memory control unit. Patent application The connection structure for accessing non-volatile memory according to Item 1 or 2, wherein the control register is combined with the dual interface memory. 4. As described in claim 2 or 2 a connection structure for accessing non-volatile memory, wherein the control register is combined with a central processing unit. 5. For accessing non-volatile memory as described in claim 1 or 2. The connection structure 'where the control register is combined with the flash memory control unit. 6. The connection structure for accessing non-volatile memory as described in claim i or 2, wherein The dual interface memory system is one of t of static random access memory (SRAM), dynamic random access memory (DRAM), magnetic memory 9 201015335 (MRAM) or ferroelectric random access memory (FeRAM). 7. For the connection structure for accessing non-volatile memory as described in the Patent Application No. 2 or 2, wherein the central processing unit relies on _ memory access to the ship, listening to ® Agreement Read Agreement or _ Agreement:
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI550607B (en) * 2014-07-24 2016-09-21 智原科技股份有限公司 Write disturbance mitigation circuit for dual port sram
TWI608350B (en) * 2016-03-09 2017-12-11 慧榮科技股份有限公司 Memory device and control unit thereof, and data movement method for memory device
TWI632458B (en) * 2016-03-09 2018-08-11 慧榮科技股份有限公司 Memory device and control unit thereof, and data movement method for memory device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI550607B (en) * 2014-07-24 2016-09-21 智原科技股份有限公司 Write disturbance mitigation circuit for dual port sram
TWI608350B (en) * 2016-03-09 2017-12-11 慧榮科技股份有限公司 Memory device and control unit thereof, and data movement method for memory device
US10025526B2 (en) 2016-03-09 2018-07-17 Silicon Motion, Inc. Storage device and data moving method for storage device
TWI632458B (en) * 2016-03-09 2018-08-11 慧榮科技股份有限公司 Memory device and control unit thereof, and data movement method for memory device

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