TW200938042A

TW200938042A - Method and apparatus for rapid fabrication of functional printed circuit board

Info

Publication number: TW200938042A
Application number: TW097106401A
Authority: TW
Inventors: Kfir Biton; Yosh Dollberg
Original assignee: Infermata Systems Ltd
Priority date: 2007-02-23
Filing date: 2008-02-25
Publication date: 2009-09-01
Also published as: WO2008102266A3; TWI425899B; WO2008102266A2

Abstract

The present invention discloses an apparatus for the rapid fabrication of functional printed circuit board (PCB), which fabricates the PCB in one working machine by additively producing the dielectric layers and the conductive layers of the PCB layer by layer. The fabricated PCB may contain necessary via/holes and possible electronic components. The fabrication process of this invention comprises the additive production of the dielectric layers and the conductive layers and the necessary via/holes and the possible electronic components, and their curing. The PCB so fabricated may be the multilayer single side PCB or the multilayer double side PCB.

Description

200938042 九、發明說明：【發明所屬之技術領域】本發明是關於一種印刷電路板之製造技術。特別是有關於製造功能性印刷電路板的系統與方法，包括用以製造功能性電路板原型，並提供快速、安全、潔淨、無水化、有效率及小型化之製程。【先前技術】印刷電路板（theprinted circuit board，以下稱PCB)乃是用來在機構上支撑電 0 子元件’並在電路上以連線或導線連結電子元件的物品。在習知之pCB製造技術上’上述連線或導線是以蝕刻或銑除方式，以銅洛片形成，麟積在非導體絲上。雜步槪費相當長時間，且使用大量有害物質及溶劑。此外，上述步驟也產生廢棄材料，而需以安全及環保方式處理。PCB之用途極廣，包括在電腦内、行動電話内’以及各種之電子器材上。習知PCB製造技術產生之問題也來自於PCB之製造本身為相對複雜且費時之程序。例如’為生產-片原型KB ’如使用習知技術之製造方法，一般即必須使用 ❹ 5到30工作天’祕電子元件之組裝及運送。其期間長短主要取決於所製造之電路板複雜度如何。此外’由於在不同之製造階段一般均使用不同之製造機器，而機器可能位於砰翁’ f知之PCB製造雜中也包括物品麵之統合技術，而需使用 • 更多時曰。結果，在習知之製造技術中，需使用大量時間。這種情形在所製作者為原型電路板，或以該PCB設計新產品時，更形不經濟。習知PCB製造技術另一項缺點為其需重複使用相同的生產卫具，例如在各生產階段中’均需使用罩幕及模型。因此，在每次設計新電路板時，均需使用新治具及模型。雖然這在大量生產時，是屬於合理成本，但對於小量辦而言，例如在新 5 200938042 產品推介（NPI)，特別是在原型製作時，此種時間、成本、處理及材料上之耗費，即屬昂貴。在習知技術中使用罩幕、也導致產生有害材料及溶劑，因而更需要在生產程序中，以特別設計之設備加以處理，更增加生產成本。近來產業上之趨勢乃是引進更高度複雜化之電路板製作，這是由於使用更形複雜之技術及因應生產上更高之需求所致，主要的例子包括：更高之時鐘頻率，對控制阻抗（controlledimpedance)更高的需求，因微型化而導致使用更小線寬、更小接點及孔徑’以及使用更多層次等。元件之尺寸越小，越不易於利用習知技術加工，〇因為在傳統製造技術中，早已有其基本之極限。例如，不同板層之疊積對位 (registration)即產生正確性方面之問題。此項問題導致習知之似製作技術在產量及正確性方面，無法提高。在不同板層間對位，在習知技術中隨技術之演進，其要求越形提高。不但如此，對位乃是製程中之主要瓶頸。需要龐大及昂貴之儀器，而最重要者為影響到製造正確性及產量。由鱗一板層均個別製作，產生個別的、非線性之變形，最後再加以對位、積層’其精度要求為數十微米之程度。在習知製造技術中另一瓶頸為鑽孔。通常典型之PCB上會有數百至數萬導孔/孔洞，其直徑並不相同，而需要使用一整套之鑽孔機器’例如為機戒式或雷射鑽孔機，依序進行鐵孔作業。有時每次增加新層次後’即產生新的導孔/孔洞型態（例如埋孔，buried via)。在製作流程中，實屬昂貴之連串步驟，耗費時間與金錢。更因小孔徑之鐵孔機耗材消耗驚人，鑽孔費用 ' 可能高達全部製造成本30°/。左右。如所周知’習知PCB包括導電板層及絕緣板層，均形成在基板上，在導電板上依線路設計形成導電線路。該導電祕係利用遮蔽，例如罩幕，描舰在^^ 6 200938042 开多成之導電線路設計。開發出遮蔽之後，即使用例如金屬電鑛技術，以將導電材料 (例如銅）施加到基板上未被遮蔽之區域在某些作法中，該遮蔽隨後即遭移除，而在另一些作法中，遮蔽則留在PCB上。以電鍍或非電鍍製程形成連線，以在各金屬層間形成電連接。對於此相關技術進一步之討論’特別為使用SU-8作為光阻樹脂之技術，請參照美國專利第4,882245號，其内容作為本案之參考。 SU-8 是一種辛基環氧酴酿（octaflmctionalexpoxidizednovalac)，由 Celanese Corporation (美國德州達拉斯）所販售。如上述’245專利所述，當SU-8與一顯影起 © 始劑（Photo initiator)與其他成份適度混合之後，可使Su_8在輻射線，例如選定之紫外線照射下曝光後熟化，可用來在該基板上定形線路。該，245專利建議使用 UVE1014 CT (由美國康乃迪克州Fairfield之General Electric所生產之CT)，作為顯 • 影起始劑。不過，其他材料，例如三芳基硫鑌鹽類（triatylsulfonium salts )也可適用。快速原型製作是指利用例如固態自由成形製造法（s〇Jidfabrfcati〇n， SFF)或者直接寫入卿㈣以吨），自動形成實體物件或模型的工法。固態自由成形製造法是-種製造固態物件之技術，是透過有次序之能量供應及/或材料供參應’至空間上特定（點，以製作該固體。快輕型製作是將電腦輔助設計（CAD) 或動晝模型軟體巾取得虛擬之設計資訊，加以轉換成為薄層、擬真之平面截面圖，其後在實體空間中產生各層之截面，—層接—層，直到完成麵為止。在一添力口型 • _㈣製作過程中，機器由-CAD_中讀出資料，一層一層施加互相連續i 久德體、私末或薄片材料’而以此方式由-組載面圖型建構，加以自動接合或融 «後即可產生最終之形&。類之一維或一維形狀或幾何特徵。因此，快雜型製作經常使用在生產設計元件之 7 200938042 實體模型，而未必是工作模型。 β又§十PCB之目的乃在設計新產品。在步驟上通常是先設計一 pCB，然後產生該PCB之原型。後者需花費相當時間’人力及費用^所得之pcB原型其後再經與電子元件組裝’進行測試。最常見之情形為測試結果顯示功能上或性能上之缺陷。如此一來，前述步驟即需重複進行，直到最後驗證結果顯示該pcB原型版本正確，已適合大量生產為止。近來絕大多數之PCB原型是使用與大量生產PCB所使用者相同之製程及設 ® 備，以及相同之材料製作。此種方式之製程相當耗費人力，且對製作原型及小量生產而言’確實缺乏效率，造成時間、人力及費用不必要之浪費。因此，目前業界亟需有一種能使PCB之設計能快速化、並能可靠的由設計階段經過原型製作’進入大量生產之技術。特別是需要有能直接由電腦pcB設計，立即 • 經濟地自動產生原型之方法。 PCB原型在PCB研發過程中，極為重要。因為pcb原型乃是要將所研發之設 δ十付諸測試之最終方法及標的。且是在決定是否付諸大量生產時，作為決策考慮最重要之因素。如貿然進入生產，而未確實製成與測試結果具有相關性之pCB原型，貝1J該PCB大量生產之結果可能導致大量生產之系統產品失敗，造成時間及金錢大量損失。在快速原型製作方面’目前業界使用數種方式進行。包括：選擇性雷射燒結 (selective laser sintering，SLS )，融合·模型化(_ dep〇siti〇n m〇dding，腦），立體光學 1¾型法（stereolithography，SLA)，積層式物件生產（laminatedobject manufacturing ’ LOM)，電子光束燒溶法，ggM)，以及三維 8 200938042 印刷技術技術（3-Dprinting，3DP)。通常而言，錢製作的目的在提供所設計產品作實體驗證，而非功能驗證。200938042 IX. Description of the Invention: [Technical Field of the Invention] The present invention relates to a manufacturing technique of a printed circuit board. In particular, there are systems and methods for fabricating functional printed circuit boards, including prototypes for making functional circuit boards, and providing processes that are fast, safe, clean, non-hydrated, efficient, and miniaturized. [Prior Art] A printed circuit board (hereinafter referred to as a PCB) is an article for supporting an electric component on a mechanism and connecting the electronic components by wires or wires on the circuit. In the conventional pCB manufacturing technique, the above-mentioned wiring or wires are formed by etching or milling, and formed by a copper piece, which is accumulated on the non-conductor wire. Miscellaneous steps take a long time and use a lot of harmful substances and solvents. In addition, the above steps also produce waste materials that need to be disposed of in a safe and environmentally friendly manner. PCBs are extremely versatile, including in computers, in mobile phones, and in a variety of electronic devices. The problems with conventional PCB manufacturing techniques also arise from the fact that PCB manufacturing itself is a relatively complex and time consuming process. For example, 'for production-piece prototype KB', as with the manufacturing method using conventional techniques, it is generally necessary to use ❹ 5 to 30 working days for the assembly and transportation of the electronic components. The length of the period depends mainly on the complexity of the board being manufactured. In addition, since different manufacturing machines are generally used in different manufacturing stages, and the machine may be located in the PCB manufacturing of the 砰 ’ f 也也也也也也也也也也也也也也也也也也也也也也也也也也也也也曰As a result, a large amount of time is required in the conventional manufacturing technique. This situation is more uneconomical when the producer is a prototype circuit board or when designing a new product from the PCB. Another shortcoming of conventional PCB manufacturing techniques is the need to reuse the same production harness, such as the use of masks and models in all stages of production. Therefore, new fixtures and models are required each time a new board is designed. Although this is a reasonable cost in mass production, for small-scale offices, such as the new 5 200938042 product introduction (NPI), especially in prototyping, such time, cost, processing and materials costs , that is expensive. The use of masks in conventional techniques also results in the production of hazardous materials and solvents, and is therefore more likely to be processed in specially designed equipment during production procedures, increasing production costs. The recent industry trend is to introduce more highly complex circuit board production due to the use of more complex technologies and higher demands for production. The main examples include: higher clock frequency, control The higher demand for controlled impedance, resulting in the use of smaller line widths, smaller contacts and apertures, and the use of more layers due to miniaturization. The smaller the size of the component, the less easy it is to process using conventional techniques, 〇 because of its basic limitations in traditional manufacturing techniques. For example, the registration of different layers results in problems with correctness. This problem has led to the inability of conventional technology to produce in terms of production and correctness. Alignment between different layers, as the technology evolves in the prior art, the requirements are increased. Not only that, but the alignment is the main bottleneck in the process. Large and expensive instruments are needed, and the most important ones are the impact on manufacturing accuracy and production. Each layer of the scale is individually produced, resulting in individual, non-linear deformation, and finally the alignment, the buildup's accuracy is required to be tens of microns. Another bottleneck in conventional manufacturing techniques is drilling. Usually, there are hundreds to tens of thousands of holes/holes on a typical PCB. The diameters are not the same. Instead, a complete set of drilling machines, such as machine or laser drilling machines, are used. operation. Sometimes new vias/hole patterns (eg buried vias) are created each time a new level is added. In the production process, it is an expensive series of steps, which takes time and money. Moreover, the consumption of consumables for small-aperture iron-hole machines is staggering, and the cost of drilling can be as high as 30°/. about. As is well known, the conventional PCB includes a conductive plate layer and an insulating plate layer, both of which are formed on the substrate, and a conductive line is formed on the conductive plate in accordance with the circuit design. The conductive secret system utilizes shielding, such as a mask, to design a conductive circuit in the ^^ 6 200938042. After the masking is developed, using, for example, metal electrowinning techniques to apply a conductive material (e.g., copper) to the unmasked areas of the substrate, in some practices, the masking is subsequently removed, while in other practices The shadow is left on the PCB. Wires are formed by electroplating or electroless plating to form electrical connections between the metal layers. For a further discussion of this related art, in particular, the use of SU-8 as a photoresist resin, reference is made to U.S. Patent No. 4,882,245, the disclosure of which is incorporated herein. SU-8 is an octaf epoxy novalac, sold by Celanese Corporation (Dallas, Texas). As described in the '245 patent above, when SU-8 is moderately mixed with other components with a photo initiator, Su_8 can be cured after exposure to radiation, such as selected ultraviolet radiation, and can be used in The substrate is shaped on the substrate. The 245 patent proposes the use of UVE1014 CT (CT produced by General Electric, Fairfield, Connecticut) as a photoinitiator. However, other materials such as triatylsulfonium salts are also suitable. Rapid prototyping refers to a method of automatically forming a physical object or model using, for example, a solid freeform manufacturing method (s〇Jidfabrfcati〇n, SFF) or direct writing of a (four) ton. The solid-state free-form manufacturing method is a technique for manufacturing solid objects by providing an orderly energy supply and/or material for the purpose of 'particularly to make the solid. Fast and light production is computer-aided design ( CAD) or virtual model soft towel to obtain virtual design information, converted into a thin layer, imaginary plane cross-section, and then create a cross-section of each layer in the physical space, - layer - layer until the surface is completed. Adding a force type • _ (4) During the production process, the machine reads the data from -CAD_, applying one layer at a time to each other, i-detailed, private or thin-sheet material', and in this way, the --set surface pattern is constructed. It can be automatically joined or melted to produce the final shape & one dimensional or one-dimensional shape or geometric feature. Therefore, fast hybrid production is often used in the production design component 7 200938042 solid model, not necessarily working Model. The purpose of β and §10 PCB is to design a new product. In the step, it is usually to design a pCB, and then generate the prototype of the PCB. The latter takes quite a time 'manpower and cost ^ income The pcB prototype is then tested with the electronic component assembly. The most common case is that the test results show functional or performance defects. In this case, the above steps need to be repeated until the final verification result shows the pcB prototype. The correct version is suitable for mass production. Recently, most PCB prototypes are manufactured using the same process and equipment as the mass production PCB, and the same materials. The process of this method is quite labor-intensive and In terms of prototyping and small-volume production, 'it is really inefficient, causing unnecessary waste of time, labor and expenses. Therefore, there is a need in the industry for a prototype that can make PCB design fast and reliable. Produce 'into mass production technology. Especially need to have a method that can be directly designed by computer pcB, and immediately and economically generate prototypes. PCB prototype is extremely important in PCB development process. Because pcb prototype is to be developed. Let δ be the final method and target of the test, and when deciding whether to put into mass production, The policy considers the most important factors. If you rush into production and do not make a pCB prototype that is relevant to the test results, the result of mass production of the PCB may result in the failure of mass production system products, resulting in a large loss of time and money. In terms of rapid prototyping, the industry currently uses several methods, including: selective laser sintering (SLS), fusion and modeling (_dep〇siti〇nm〇dding, brain), stereo optics 13⁄4 Stereolithography (SLA), laminated object manufacturing (LOM), electron beam dissolution, ggM), and 3D 200938042 printing technology (3-Dprinting, 3DP). In general, the purpose of money making is to provide a physical verification of the product being designed, rather than functional verification.

過去曾經有數種方案提出，以提供PCB原型快速製似生產之系統。其中有提議以機械式快縣型製作技術或其他類似方法，用以製作⑽。例如，有提議以押出方法’在舰PCB級h臟金料線。㈣—纖細是以料線雷射部份熟讀脂樹脂’用以形成部份交聯（㈣掀⑷的魏。其上再以習知方法施以金屬導線。其後將該紐放置於-模具内，使其變形成為三度空間形狀，最後再予完 ^ 全熟化’以形成二度空間之PCB。另—種作法則是將三度空間印刷技術使用在PC 製作。利用-印子頭吐出導電材料，並利用另一印字頭吐出絕緣材料。關於贼技術之詳細說明’可見於下列專利文件：w〇〇〇52976，us 5，172,472，仍5,〇99 〇9〇， US5,156,772 ’ US6，169’605 ’ US5,838,567，US534,061 及美國專利公開案 2004/0077112 〇雖然上述各種方案提出不同快速製作PCB之方法，其速度也確可快於習知技術，但習知之PCB製作程序、系狀材料已經在業界沿用超過⑷年，以提供pcB 各種適合其用途及應用方式所需之功能。因此，上述替代性方法因與習知方法不同，必須要加以修正’以配合所要製作之PCB所需提供之功能標竿。否則製造所得1 型PCB只能作為機械性，功能受限之模型，而不能作為全功能之機電結構，而與最 • 終產品不同。時至今日，已知之技術均無法提供具有功能性價值之PCB製作技術， • 也無法提供能夠控制PCB之功能性，使其適應於所需之功能性需求標準之方法。身又而s，測试結果通常是依PCB在不同環境下之表現而異。而peg之表現更受各種特性所影響，這些特性在已出版之PCB工業標準中，均有嚴格的規範。 9 200938042 雖然已有各種嘗試，也有不同之可用技術，但迄今PCB之快速生產技術仍是業界遙不可及的目標。現今PCB之生產仍然沿用數十年歷史之技術，包括：成形、積層、鑽孔、電鍍、阻焊劑及網印等步驟。此種停滯性(protracted)製程造成遲延並增加設計及製造上之成本。只要使用PCB，莫非如此。因此，目前實有必要提供一種革命〖生之技術，可以大大減少生產時間及製造複雜度。此外，也必需有一種新技術，可以避免或減少傳統製造技術中，大量使用之習知技術毒性及/或有害物質。習知技術之製程事實上極為浪費。據估計大約只有7%之物料投入生產之後，可以留在製成之PCB上。換言之，所投入之物料中有93%最後是作為毒性廢棄物處置’並造成環境嚴重破壞。【發明内容】以下對本發明之說明，目的只是在提供對本發明若干面向及特徵之基本理解。發明之說明並非對本發明之全面介紹，因此並非用以特別介紹本發明之主要或必要元素，或用來界定發明线圍，其唯一之目的只是在以簡單扼要之方式展示本發明所提出之數種概念，作為以下發明詳細說明之導言而已。根齡發明之-面向’本發鴨提丨_種由賴設計直接、快速且有效率生產功能性PCB及功能性PCB原型之方法及裝置。本發明之-槪在賴製得之咖雜是以不献料，透過不随奴機械製作（與習知技術係·大量生產不同），但可產出測試結果，而該測武结果與用利用習知大量生產技術製造方法製作之PCB設計，所得之測試結果，具有高度以目關性。根據本發明之另一面向’本發明之方法及裝置可生產出的PCB與主要工業標準所纖之重要功能及規格具有高度相關性。詳如以下所述。此外，本發明也祕可以付合贿絲來業標準之結構性預訂方式，故而可以實現彈性的咖製造方 200938042 法’並能符合適用之工業標準，特別是為目標用途所規範之標準β 根據本發明之數種實施例，本發明提供生產功能性印刷電路板之系敍/或方法目的在使本發明所揭示之系統及方法可以更有效率，且以較傳統生產方法更勞力及設備Μ之方式’生產功紐pcb。所生產之功紐pcb具有所g之機械性能、導熱特性、電氣特性及其他特性，使該PCB可提供傳統rcB設計上應具備之特性。本發明所揭示之PCB製S設備具有「辦公室友善」之特性，並 Cdeanoperations) 可在研細發場所餅觀。此外，本發明之PCB製錄献方法可料需使賴缸具⑽如罩幕及網印機），或只使用極少之驗J1具，即可從事生產。因此觀酿容胃雜，且對短時間少量製作而言’更可提高效率。如何從數種組成PCB球料中選取適當讀料，以使㈣具有適^之電子、電氣、電磁、導熱及機械特性，將在以下作較詳細之說明。本發明之一實施例械示快速生產·之設備，用來以較習知方法更短之期間内（例如某-實施例只需短至數小時）’生產功能性pcB。能夠達成如此節省時間之^因，非但在於改變製造PCB之程序面，更在於所使用之設備及材料。f知之 ra製造方法需要數十到數百專業員工，設備聽房⑽額投資，以及大量製造設 ««_綠_ ’ 7_單—操作員’並使用單—祕即可製作 PCB ’該製造系紐不同元件滅整合，該不同元件在習知技術則需分別由多數不同製造機器供應。本發明之製程高度自動化，且只需單—操作員，即可操作物料容器之更換、在製造系統建置製造資料、簡易的系職正等等。如有必要，也可將電子元件的組合整合到製程中，而達成一完全統包系統(tum场办翁)。 11 200938042 根據本發明之另-面向，製造PCB時仰使聰反或習知之軟性細積層板 (copperda^aminate，CCL) ’而是使縣加型技術，例如固體自由成形製造法及 /或電子印刷技術’以「從零嫩（g^^teh)製造，換言之，不使用任何起始絲。在-特定實例中’係將可輻射熟化德體組成物注入一托盤對該可輻射熟化讀體組成物施予輻射線’固定PCB之形狀及邊界。成為一熟化之絕緣層換。之可將輻射衛轉性的施予，熟化該液體，以作成任何尺寸及形狀之，並祕在其内形成幾何形狀（例如導孔/孔洞）。上述第-步驟將產生-絕緣體，實 ❹ 質上就已取代傳統之紐。傳統技細需要鑽孔、裁邊，才能形成適當之尺寸及形狀。將該絕騎熟化之後，以添加型且無罩幕之方式，例如以喷墨印刷或其他技術將導線把加在该熟化之絕_上。其後再施加可輕射糾说體組成物，形成另 ’Ht °重覆上述步驟，直到製成PCB為止。導孔/孔洞之金屬化也可利用添加 - 型技術達成，例如卿。另也可將該PCB翻轉，在另一面進行另一套絕_及導電層之裝程以製得多層雙面pCB。不同的熟化方法及洪烤步驟，都可在製造各層絕賴及/或導電層之製程中使用。本發明之優點在於可以避免製造多層rcB時，必 ® 須將各層對準之對準、對位上之困難。因此可以防止誤差之累積。根據本發明之另-面向’係提供製造至少-功能性印刷電路板之方法，該方法包括下列步驟： ' A PCB製造資料播； Β·執行資料轉換，以產生一修改後之對應製造擋； C·執行資料變更’包括修改該修改後製造槽所含之參數，以配合製造rcB時所使用之材料及製程之變化：該資料變更後產生一變更後製造播； 12 200938042 D.提供一托盤； Ε·利用該變更後製造播製造一介電層，其步驟包括： i· 將一液體組成物注入該托盤； ΰ· 使該液體組成物塗布於該托盤之表面；及证熟化該液體組成物级擇區域，以固定PCB之形狀及邊界，以提供一熟化之絕緣層，而具有一上表面及一下表面； F.以該變更後製造播製造一導電層，其方法包括將一導電線路形成在該熟化絕_社表面及下表面之至少一者；用以提供一 pcB，該ra可表現與傳統^用該製造資料播所製得之PCB相同之性能。本發明之方法另可包括多次重覆步驟_，且可在該介電層之上表面或下表 •面__。肋_層單面PCB。本侧之方法另可包括翻轉該單面pcB，使該熟化之絕騎成為试面’並在該介電層之上表面或下表面之另一者多次重覆步及F，肋製得M雙面PCB。本發狀方法另可包括猶介餅社表面及下表面重f該步· W，製得Μ雙面PCB。本侧之綠更可缺在該雙面PCB上以有色介電材料，形成縣焊劑罩幕層、導電接腳塗布與標記中之一種或多種。二擇區域之方法可能包括以輻射照射選擇之區域。以輕射照射選擇之區域之方去可祕以紫外線照射該選擇區域。熟化該選擇區域之方法也可另祕一熟化提升步驟’使用在輻射照射該選擇區域之後。該熟赌升步驟缺一加熱步驟。 s .、·、步驟可包括以微波照射該製得之pcB 〇在上述方法中步驟D可包括在該托盤上提供-離翻，共一離型劑之方式可包括下列之一種··提供一織物層在該托盤 13 200938042 上’或喷灑一液體離型劑在該托盤上。本發明之方法另可雖在該熟化之絕騎上製作導孔/孔洞之步驟，其方法缺界定非輻射照射區，及在該熟化步驟後清除該非輻射照射區。本發明之方法另可包括在選定之導孔/孔洞内施加導電物質，以製每導電孔。該步驟E可祕在該滅嶋加-液體域物，該液散成物含有辛基環氧酚醛（octafimctionalepoxidizednovdac)光阻劑及光起始劑。該液體組成物可更包括奈米顆粒。形成該導電線路之方法可包括以一喷頭射出導電物冑於該熟化之絕 _上。每次執行E步驟時小步驟i，u及Ui可重覆多次，用以製造該介電層，使 ❹ 俯電層財錄小層。在敏Μ小娜m之後，可靖製得之PCB加熱。本發明之方法並可另包括在每次執行小步驟i，a及m時，在小層上形成導孔/孔洞。 t發H法並可#包括在每她行小步驟丨，^及Μ時，在選定之導孔/孔洞内施予導電物質。本拥之方法另可祕在執行多次之小步驟丨，^及&後在選定之導孔/孔湖施予導電物質。本發明之方法並可另雖在執行步驟£預定次數後’在該製得之介電層上製作熟傾升通道。本發明之方法並可另包括在執行步驟 _ E預定次數後，施予可溶性物質，以在製得之介電層上界定導孔/孔洞。每次執行步驟E之後，可以重覆執行小步驟i ’ u錢，而使用至少兩種不同之介電材料，以使製得之介電層包括乡數之小層，各層具有不肖之介電絕緣雜。在本發明中步驟E另可包括在該介電材料中混合：可以提高導體之黏性之成份、可穩定該介電材料錢械性之成份、及可提升該介電材料之熱穩定性之成份，其中至少-種。在本發财步另可祕猶介響料幅合可以蚊介電層材料絕緣特性之成份。步驟E另可包括在該介電層上形成一中介層，用以提升導電材料固著至該介電層之固著力。本發明之方法可另缺在執行選定次數之步驟£時， 200938042 二介電層至少-表面形成斷步驟，而其中步驟F輸铜内施加至少一獻導電線路之步驟。本發明爾細漱次數之步驟F時，以該變更後製造標所職之厚度變化，形成導電線狀步驟。在執行選定次數之步驟F時，形成導電線路之方法’可祕以_導紐獅成—種子層，及在該種子層上形成一主導電層=驟。形成主導電層之方法包括可以使_。拇明之方法另輸在執灯選疋魏之麵F時，騎戦之轉祕猜自動域學檢測，及雜導電線 _1行電_試，兩者巾至少—種之步驟。發明之方法另可祕在完成PCB製作之後，進行魏性制試之步驟。在—托盤上可同時製造乡數之PCB。麵E與步驟F均可另祕至少娜該介電層所需之絕緣特性及該導電層所需之電阻特性，而選用製程參數之步驟。步驟E之小步驟这另可包括平整該液體之上表面之步驟。根據本發明之另一面向’本發明揭示製造至少一功能性印刷電路板之方法。該方法包括：將PCB製造資料檔上載到一控制器；使用該控制器控制一中央處理站之作業，以裝載一製造托盤至多數托盤定位站’及從該多數托盤定位站卸載該托盤；使用該控制器控制一介電材料供應器之作業，以供應一介電物質至該托盤，並控制一熟化機構之作業，以熟化該介電物質，而形成一介電層；利用該控制器控制一導體供應器之作業，以供應一導電物質至該介電層上；及利用該控制器控制一加熱站之作業，以對該介電物質與該導電物質之至少一者作熱處理。該熱處理可包括將該介電物質與該導電物質之至少一者，暴露於選自下 15 200938042 列之至少一種之步驟：紫外線輻射，微波輻射及加熱器輻射。控制該介電材料供應器之作業，可包括操作一液體供應器，將一輻射可熟化液體供應至該托盤上之步#，且其中熟化該介電物質之步驟包括輻射照射該液體之步驟。控制一介電材料供應器之作業包括操作一供應頭’根據該介電層之外形設計，供應介電物質之步驟。本發明之方法另可包括利用該控制器控制一平整機構之作業，以平整該介電層。控制該導體供應器之作業包括操作一喷墨印字頭，以供應導電線路材料之步驟。本發明之方法另可包括利用該控制器控制一翻轉機構之作業，以翻轉一製得之 ❿ 板體’以在該板體兩側形成導電線路。該方法可另包括將至少二製得續! 步驟。本發明之方法另可包括：操作該控制機以從至少該pCB製造資料播，產生自由成形製造播之步驟’其中該自由成形製造播中選定之資料經過變更，以使該pcB 具有與習知方法技術之PCB之功能特性，具有高相關度之功能特性。變更成變更後製造標之方法可#缺產生-檔案，以控繼熟域構，以使導孔/孔洞定形之步驟。變更成變更後製造槽之方法可另包括產生一檔案，以控制該熟^構，以使導 ❾孔/孔洞定形並含有傾斜，非垂直之侧壁之步驟。變更成變更後製造槽之方法可另包括產生一檔案’以在各製得找體製造相配合之结構，以確保該製得時可正確對位之步驟。在本發明的方法中，利用該控制器控制一導體供應器之操作，可包括在該介電層之兩面供應導電物質之步驟。本發明之方法另可祕設定該熟峨敎參數，以氣作具有與根據該製造資料檔製成之習知rcB絕料相同雜之介電層之步驟。本發月之方法並可包括6又疋该導體供應器及該熱處理站之參數，以製造具有與根據該 k資料鮮叙f知PCB賴制目嚼性之導電層之_。變更成變更後製造資 16 200938042 料檔之方法可另包括改變導電線之設計厚度，以降低電阻之步驟。本發明之方法另可包括利用該控制器控制該介電材料供應器之操作，及該導體供應器之操作，以透過連續形成其中具有導孔/孔洞之薄層介電小層之方式，以形成導孔/孔洞，並在導孔/孔洞内施加導電物質之步驟。該小層之至少二層可以使用不同之介電材料形成。本發明之方法更可包括利用該控制器控制該介電材料供應器之操作，及該導體供應器之操作’以透過施加導電材料柱’並在柱體周遭施加介電層之方式，以形成導孔/孔洞之步驟。本發明之方法更可包括利用該控制器控制該介電材料供應器、 ® §玄導體供應器及一可溶性材料供應器之操作，以透過施加可溶性材料使該導孔/孔洞疋形’施力口介電層於S玄可溶性材料周遭，除去該可溶性材料使該導孔/孔洞出現在該介電層巾，及施加導電物質於該導孔/孔湖之方式，以形成導孔/孔洞之步驟。本發明之方法並可包括利用該控制器控制該介電材韻應器之操作，以形成焊接罩幕及/或標記之步驟。根據本發明之另-面向’本發明揭示—功能性PCB之製造方法，該方法包括：械-具有-上表面及—下表面之主介電層，其方式缺在一製造托盤上施加一介電材料，並將該介電材料暴露於一熟化製程，以使該主介電層之面積及邊界定形；於該主介電層社表面形成_系列互相穿插之導電線路層及絕騎；於該主介電層之下表面形成至少一導電線路層。其中將該介電材料暴露於一熟化製程之步驟可包括以-光源照射該介電材料之步驟。將該介電材料暴露於一熟化製程之步驟可包括 (direct-write)供應導電材料’並熟化該導電材料至少一部份，加以執行。本發明之方法另可祕在選定之介電層形成導孔/孔洞，及施加導電材料於該導孔/孔洞内 17 200938042 之方式，形成導孔/孔洞之步驟。形成導孔/孔洞之方式可包括形成當中具有導孔 /孔洞之介電小層’以形成各該介電層，及在各小層之導孔/孔洞中施加導電物質之步驟。形成導孔/孔洞之方法可包括施力σ可溶性材料以界定該導孔/孔洞，其後形成各該絕緣層，最後在形成各絕緣層後，除去該可溶性材料之步驟。本發明之方法另可包括形成接腳塗布、焊劑罩幕及標記之至少一種之步驟。形成各該絕緣層之方法可包括重覆形成厚度為該絕緣層之部份之小層，及在形成下一小層之則熟化5玄小層之步驟。本發明之方法另可包括在各小層上形成孔洞，及在熟〇化該小層後，在孔洞内施加導電物質之步驟。形成導孔之方式包括改變各小層之孔洞直徑’而使开)成在各絕緣層之導孔具有傾斜之側壁之步驟。施力^導電材料之方法可以包括塗敷選定孔洞之側壁，但將其他孔洞完全塗滿之步驟。本發明之方法另可包括執行電氣測試’以驗證該PCB之功能性之步驟。本發明之方法另可祕同_ 成-第二功能性PCB之步驟，其步驟包括將該介電材料暴露於一熟化製程，而鄉成該主介電層之同時，使該第二主介電層之面積及邊界定形，於該第二主介電層之上表面形成一系列互相間隔之導電線路層及絕賴；及於該第二主介電層之下表面 © 形成至少一導電線路層之步驟。根穌發明之另-面向’本發鴨示_製造印猶路板（pcB)之祕。該系統祕：-中央處理站，包括—可延伸機器手臂，用以裝載一托盤；至少一托盤定 • 位麟’該機11手臂可及之處，用以由該機器手臂接受該托盤；至少一介電物質供應器’錄該機器手臂可及之處；至少一導電物質供應器，位於該機器手臂可 …化站位於該機器手臂可及；及-操作機器，輕合於該介電物質供應器、該該導電物質供應器及熟化站，並控制其作業。本發明之系統另可包括— 18 200938042 製造站，其内裝置該介電物質供絲、該導電物質供應麵托盤定位機構。本發明之系包括、第-製造站，位於該機器手臂可及之處並在其内裳置該介電物質供應器及-托盤定減構；及一第二製造站，位於該機器手臂可及之處，並在其置該導電物質供應器及一第冰盤定位機構。該介電物質供應器可紐一液體供應器;及一顯影齡該顯影機構可包括一輻射光源。該輻射光源可包括一紫外光源。該導電物質供應器可包括―供應頭。該供應頭可改變傾斜角度。本發明之純可更包括-鱗機構。用以翻。In the past, there have been several proposals to provide a system for rapid prototyping of PCB prototypes. Among them, it is proposed to use mechanical fast-type production technology or other similar methods to make (10). For example, there is a proposal to push the method 'in the ship's PCB level h dirty gold line. (4) - slender is a part of the cross-linking ((4) 掀(4) of Wei, which is used to form part of the cross-linking of the laser portion of the laser beam. The metal wire is applied by a conventional method. The button is then placed in - Inside the mold, it is deformed into a three-dimensional shape, and finally finished ^ fully matured to form a second-degree space PCB. Another method is to use three-dimensional space printing technology for PC production. Use - print head spit Conductive material, and use another printing head to spit out the insulating material. Detailed description of the thief technology can be found in the following patent documents: w〇〇〇52976, us 5,172,472, still 5, 〇99 〇9〇, US5,156,772 ' US 6, 169 '605 ' US 5, 838, 567, US 534, 061 and U.S. Patent Publication No. 2004/0077112 〇 Although the above various solutions propose different methods for rapidly manufacturing PCBs, the speed can be faster than conventional techniques, but conventional PCB fabrication Programs and system materials have been used in the industry for more than (4) years to provide pcB with various functions suitable for its application and application. Therefore, the above alternative methods must be corrected due to different methods from the conventional methods. The functional label required for the fabricated PCB. Otherwise, the manufactured Type 1 PCB can only be used as a mechanical and functionally limited model, but not as a full-featured electromechanical structure, unlike the final product. Today, None of the known technologies provide PCB manufacturing techniques with functional value, and • there is no way to control the functionality of the PCB to suit the required functional requirements. Depending on the performance of the PCB in different environments, the performance of peg is more affected by various characteristics, which are strictly regulated in the published PCB industry standards. 9 200938042 Although there have been various attempts, there are different Available technologies, but the rapid production technology of PCBs is still an unreachable goal in the industry. Today's PCB production still uses decades of history, including: forming, laminating, drilling, plating, solder resist and screen printing. This protracted process causes delays and increases the cost of design and manufacturing. As long as the PCB is used, this is not the case. Therefore, it is necessary now. For a revolutionary technology, the production time and manufacturing complexity can be greatly reduced. In addition, there must be a new technology that avoids or reduces the toxic and/or hazardous substances that are used in large quantities in traditional manufacturing techniques. The process of knowing technology is actually extremely wasteful. It is estimated that only about 7% of the materials are put into production and can be left on the finished PCB. In other words, 93% of the materials invested are finally disposed of as toxic wastes and cause The following is a description of the present invention, and is intended to provide a basic understanding of the invention. The description of the invention is not intended to be a comprehensive description of the invention. The elements are used to define the invention, and the sole purpose of the invention is to present the various concepts set forth in the present invention in a simplified manner. Root Age Invention - A method and apparatus for designing functional PCBs and functional PCB prototypes directly, quickly and efficiently. The invention is based on the fact that the glutinous rice produced by the 槪不不 , , , , , , 不不不不不不不不不不不不不不不不不不不不不不不不不不不不不不不The PCB design produced by the mass production technology manufacturing method is well known. Another PCB that can be produced in accordance with the method and apparatus of the present invention is highly correlated with important functions and specifications of major industry standards. Details are as follows. In addition, the present invention can also pay for the structural reservation method of the bribe industry standard, so that the flexible coffee maker 200938042 method can be realized and can meet the applicable industrial standards, especially the standard β standard for the intended use. The present invention provides a system and method for producing a functional printed circuit board in order to make the system and method disclosed by the present invention more efficient and more labor-intensive and more versatile than conventional production methods. The way 'production of the power pcb. The manufactured pcb has the mechanical, thermal, electrical and other characteristics that make it possible to provide the traditional rcB design. The PCB S device disclosed by the invention has the characteristics of "office friendly" and Cdeanoperations) can be used in the research and development of the cake. In addition, the PCB preparation method of the present invention can be carried out by using the Lai cylinder (10) such as a mask and a screen printing machine, or using only a few inspections. Therefore, it is possible to increase the efficiency in terms of brewing the stomach and in the case of a small amount of production in a short period of time. How to select appropriate reading materials from several kinds of PCB materials to make (4) have appropriate electrical, electrical, electromagnetic, thermal and mechanical properties, which will be described in more detail below. One embodiment of the present invention is directed to a rapid production apparatus for producing a functional pcB during a shorter period of time than conventional methods (e.g., as long as the embodiment is as short as several hours). The ability to achieve such a time-saving is not only due to changes in the programming of the PCB, but also in the equipment and materials used. f know the ra manufacturing method requires tens to hundreds of professional staff, equipment to listen to the room (10) investment, and a large number of manufacturing ««_绿_ '7_ single - operator 'and use a single secret to make PCB 'this manufacturing The different components of the system are integrated, and the different components are supplied by a number of different manufacturing machines in the prior art. The process of the present invention is highly automated, and requires only a single operator to operate the replacement of the material container, to construct manufacturing materials in the manufacturing system, to perform simple functions, and the like. If necessary, the combination of electronic components can also be integrated into the process to achieve a complete turnkey system. 11 200938042 According to another aspect of the present invention, when manufacturing a PCB, Cong Cong reverse or conventional soft-layered laminate (CCL) 'is a county-added technology, such as solid free-form manufacturing and/or electronics. The printing technique 'is manufactured from zero tenderness (g^^teh), in other words, does not use any starting filaments. In a specific example, the radiation-curable matured body composition is injected into a tray for the radiation-curable cooked body. The composition is applied to the radiation line to fix the shape and boundary of the PCB. It becomes a mature insulating layer. The radiation can be applied, and the liquid is matured to make any size and shape. Forming geometric shapes (such as vias/holes). The above-mentioned first step will produce an insulator, which has replaced the traditional one. The traditional technique requires drilling and trimming to form the appropriate size and shape. After the aging is matured, the wire is placed on the aging aging in an additive type and without a curtain, for example, by inkjet printing or other techniques. Thereafter, a light illuminating body composition is applied to form a composition. Another 'Ht ° repeat The steps are made until the PCB is fabricated. The metallization of the via/hole can also be achieved by an additive-type technique, such as qing. The PCB can also be flipped over and the other side can be mounted on the other side. To make a multi-layer double-sided pCB, different curing methods and flooding steps can be used in the process of manufacturing each layer and/or conductive layer. The advantage of the invention is that it can avoid the manufacture of multi-layer rcB. It is difficult to align the alignments and alignment of the layers. Therefore, the accumulation of errors can be prevented. According to another aspect of the present invention, there is provided a method of manufacturing at least a functional printed circuit board, the method comprising the following steps: 'A PCB manufacturing data broadcast; Β·Execute data conversion to generate a modified corresponding manufacturing block; C·Execution data change' includes modifying the parameters contained in the modified manufacturing slot to match the materials and processes used in the manufacture of rcB Change: After the data is changed, a change is made and the production is broadcast; 12 200938042 D. Providing a tray; Ε·Using the change to manufacture a dielectric layer, the steps of which include: i· Injecting the object into the tray; ΰ applying the liquid composition to the surface of the tray; and aging the liquid composition grading region to fix the shape and boundary of the PCB to provide a cured insulating layer, and having a The upper surface and the lower surface; F. manufacturing a conductive layer by the modification, the method comprising: forming a conductive line on at least one of the surface of the curing and the lower surface; for providing a pcB, the ra It can express the same performance as the conventional PCB made by the manufacturing material. The method of the present invention can further include a plurality of repeating steps _, and can be on the surface of the dielectric layer or the following surface __ The rib_layer single-sided PCB. The method of the present side may further comprise flipping the single-sided pcB so that the ripening is a test surface' and the other surface of the upper or lower surface of the dielectric layer is heavily weighted Stepping and F, ribs made M double-sided PCB. The hair-styling method may further comprise a surface of the sap and a lower surface of the slab, and the double-sided PCB is obtained. The green of this side may be lacking on the double-sided PCB as a colored dielectric material to form one or more of the county solder mask layer, the conductive pin coating and the marking. The method of selecting regions may include areas selected by radiation exposure. The selected area is irradiated with ultraviolet rays by lightly illuminating the selected area. The method of ripening the selected area can also be followed by a curing step of 'using the radiation after illuminating the selected area. The cooked gambling step lacks a heating step. The step of s., may include irradiating the prepared pcB with microwaves. In the above method, step D may include providing a tilt-off on the tray. The manner of the total release agent may include one of the following types: The fabric layer is on the tray 13 200938042 or sprays a liquid release agent onto the tray. The method of the present invention may further comprise the step of making a via/hole on the matured mount, the method of defining a non-radiation illumination zone, and removing the non-radiation illumination zone after the curing step. The method of the present invention may further comprise applying a conductive material within the selected via/hole to make each conductive via. This step E can be secreted in the cockroach-liquid domain, which contains an octaf epoxy novaldehyde (v) octafimctional epoxidized novdac photoresist and a photoinitiator. The liquid composition may further comprise nanoparticle. The method of forming the conductive traces can include ejecting a conductive material onto a cured wafer. Each time the E step is performed, the small steps i, u and Ui can be repeated a plurality of times to fabricate the dielectric layer, so that the subdivision layer is recorded. After Min Xiao Xiaona m, the PCB can be made by Jing. The method of the present invention may additionally include forming vias/holes in the small layers each time the small steps i, a and m are performed. t-H method and #include the conductive substance in the selected guide hole/hole in each of the small steps ^, ^ and Μ. The method of this invention is also secretive in the implementation of a number of small steps ^, ^ & & then applied conductive material in the selected guide hole / hole lake. The method of the present invention can further produce a cooked tilting channel on the resulting dielectric layer after performing the steps a predetermined number of times. The method of the present invention may further comprise applying a soluble substance to define a via/hole on the resulting dielectric layer after performing the step _E a predetermined number of times. After each step E is performed, the small step i 'u money can be repeatedly executed, and at least two different dielectric materials are used, so that the prepared dielectric layer includes a small number of layers, and each layer has a dielectric Insulation is mixed. In the present invention, the step E may further comprise mixing in the dielectric material: the component which can improve the viscosity of the conductor, the component which can stabilize the dielectric material, and the thermal stability of the dielectric material can be improved. Ingredients, at least one of them. In this financial step, you can also use the ingredients of the insulation properties of the mosquito dielectric layer. Step E may further comprise forming an interposer on the dielectric layer to enhance the adhesion of the electrically conductive material to the dielectric layer. The method of the present invention may additionally be devoid of the step of performing the selected number of steps, 200938042, the second dielectric layer is at least a surface forming step, and wherein the step F is followed by the step of applying at least one conductive line to the copper. In the case of the step F of the number of times of the present invention, the step of manufacturing the label is changed to form a conductive linear step. When the selected number of steps F is performed, the method of forming the conductive traces can be used to form a dominant layer of electricity on the seed layer. The method of forming the main conductive layer includes _. The method of thumb-up is also lost when the lamp is selected for the face of Wei, and the automatic detection of the 戦戦秘猜 , 自动自动自动自动自动自动自动自动自动自动自动自动自动自动自动自动自动自动自动自动自动自动自动自动自动自动自动自动两者两者两者The method of the invention can also be carried out after the completion of the PCB fabrication. On the tray, the PCB of the township number can be manufactured at the same time. Both face E and step F can be used to at least the insulating properties required for the dielectric layer and the desired electrical resistance characteristics of the conductive layer, and the process parameters are selected. The small step of step E may additionally include the step of leveling the surface above the liquid. Another aspect of the present invention is directed to a method of fabricating at least one functional printed circuit board. The method includes: uploading a PCB manufacturing data file to a controller; using the controller to control a central processing station operation to load a manufacturing pallet to a plurality of pallet positioning stations' and unloading the tray from the plurality of pallet positioning stations; The controller controls the operation of a dielectric material supply to supply a dielectric substance to the tray, and controls the operation of a curing mechanism to cure the dielectric substance to form a dielectric layer; A conductor supply operates to supply a conductive material to the dielectric layer; and the controller is used to control the operation of a heating station to heat treat at least one of the dielectric material and the conductive material. The heat treatment can include exposing at least one of the dielectric substance and the electrically conductive material to at least one selected from the group consisting of ultraviolet radiation, microwave radiation, and heater radiation. Controlling the operation of the dielectric material supply can include operating a liquid supply to supply a radiant curable liquid to the tray, and wherein the step of curing the dielectric material includes the step of irradiating the liquid. The operation of controlling a dielectric material supply includes the step of operating a supply head to provide a dielectric substance in accordance with the shape of the dielectric layer. The method of the present invention may further comprise the use of the controller to control the operation of a leveling mechanism to level the dielectric layer. The operation of controlling the conductor supply includes the step of operating an ink jet printhead to supply conductive trace material. The method of the present invention may further comprise the use of the controller to control the operation of a flipping mechanism to flip a fabricated slab body ' to form conductive traces on both sides of the panel. The method may additionally comprise at least two steps! The method of the present invention may further comprise: operating the control machine to produce data from at least the pCB, and generating a free-form manufacturing broadcast step wherein the selected material in the free-form manufacturing broadcast is altered to make the pcB The functional characteristics of the PCB of the method technology have high correlation functional characteristics. After changing to the modified method, the method of manufacturing the standard can be used to control the formation of the via hole/hole. The method of modifying the modified trough can additionally include the step of creating a file to control the scrim to shape the bore/hole and to include the inclined, non-vertical sidewalls. The method of changing the manufacturing groove after the change may further include the step of generating a file to conform to the structure of each of the manufactured bodies to ensure proper alignment. In the method of the present invention, the operation of controlling a conductor supply by the controller may include the step of supplying a conductive substance on both sides of the dielectric layer. The method of the present invention is further capable of setting the cooked parameter to use gas as a step having the same dielectric layer as the conventional rcB material made according to the manufacturing data. The method of the present month may include the parameters of the conductor supply and the heat treatment station to produce a conductive layer having a chevable property according to the k-data. Change to Manufacturing Capital after Change 16 200938042 The method of the material file may further include the step of changing the design thickness of the conductive wire to reduce the resistance. The method of the present invention may further comprise controlling the operation of the dielectric material supply by the controller, and operating the conductor supply to transparently form a thin dielectric layer having via holes/holes therein A step of forming a via/hole and applying a conductive substance within the via/hole. At least two of the layers can be formed using different dielectric materials. The method of the present invention may further comprise controlling the operation of the dielectric material supply by the controller, and operating the conductor supply to transmit a dielectric layer through the column and applying a dielectric layer around the cylinder to form The step of guiding holes/holes. The method of the present invention may further comprise using the controller to control the operation of the dielectric material supply, the XX conductor supply, and a soluble material supply to force the via hole/hole by applying a soluble material The oral dielectric layer is surrounded by the S-soluble material, the soluble material is removed to cause the via hole/hole to appear in the dielectric layer, and a conductive substance is applied to the via hole/hole lake to form a via hole/hole. step. The method of the present invention can include the step of using the controller to control the operation of the dielectric material to form a solder mask and/or indicia. According to another aspect of the present invention, the present invention is directed to a method of manufacturing a functional PCB, the method comprising: a main dielectric layer having an upper surface and a lower surface, the method of which is applied to a manufacturing tray An electric material, and exposing the dielectric material to a curing process to shape an area and a boundary of the main dielectric layer; forming a _ series interdigitated conductive circuit layer and a ride on the surface of the main dielectric layer; At least one conductive circuit layer is formed on a lower surface of the main dielectric layer. The step of exposing the dielectric material to a curing process can include the step of illuminating the dielectric material with a light source. The step of exposing the dielectric material to a curing process can be performed by direct-write supplying the conductive material and curing at least a portion of the conductive material. The method of the present invention further comprises the steps of forming a via/hole in the selected dielectric layer and applying a conductive material in the via/hole 17 200938042 to form a via/hole. The manner in which the vias/holes are formed may include forming a dielectric via having a via/hole therein to form each of the dielectric layers, and applying a conductive material to the vias/holes of each of the small layers. The method of forming the via/hole may include the step of applying a force σ soluble material to define the via/hole, thereafter forming each of the insulating layers, and finally removing the soluble material after forming the insulating layers. The method of the present invention may further comprise the step of forming at least one of a pin coating, a flux mask, and a marking. The method of forming each of the insulating layers may include repeating the step of forming a small layer having a thickness of a portion of the insulating layer, and forming a next small layer to cure the 5 small layer. The method of the present invention may further comprise the steps of forming a hole in each of the small layers and applying a conductive substance to the holes after the small layer is cooked. The manner in which the via holes are formed includes the step of changing the diameter of the holes of each of the small layers to be opened so that the via holes of the respective insulating layers have inclined side walls. The method of applying a conductive material may include the step of applying the sidewalls of the selected holes, but completely filling the other holes. The method of the present invention may further comprise the step of performing an electrical test' to verify the functionality of the PCB. The method of the present invention may further be the same as the step of forming a second functional PCB, the step comprising exposing the dielectric material to a curing process, and simultaneously forming the main dielectric layer, and making the second main medium Forming an area and a boundary of the electrical layer, forming a series of mutually spaced conductive circuit layers on the upper surface of the second main dielectric layer; and forming at least one conductive line on the lower surface of the second main dielectric layer The steps of the layer. The other invented by the roots - facing the 'this hair duck show _ the secret of manufacturing India road board (pcB). The system secret: - the central processing station, including - an extendable robotic arm for loading a pallet; at least one pallet fixed to the position of the arm 11 of the machine for receiving the pallet by the robotic arm; a dielectric material supply 'records the robot arm accessible; at least one conductive material supply is located in the robot arm ... the chemical station is located in the robot arm; and - the operating machine is lightly coupled to the dielectric substance The supplier, the conductive material supply and the curing station, and control the operation thereof. The system of the present invention may further comprise - 18 200938042 manufacturing station in which the dielectric substance supply wire, the conductive substance supply surface tray positioning mechanism is disposed. The system of the present invention includes a first-manufacturing station located at a position where the robot arm is reachable and in which the dielectric substance supply device and the tray fixed structure are disposed; and a second manufacturing station located at the robot arm And where the conductive material supply and an ice tray positioning mechanism are placed. The dielectric substance supply device can be a liquid supply device; and a developing mechanism can include a radiation source. The radiation source can include an ultraviolet light source. The conductive substance supply can include a "supply head." The supply head can change the tilt angle. The purity of the present invention may further include a scale mechanism. Used to turn over.

® 設置於該中央處理站之…本發明樣统可另包括-處理n，以接收PCB 製造資料並機成控制指令，以控制該介電物質供應器、該導電物質供應器及該加熱站之作t H步變找湖齡，贿魏PCB觀餅之參數。本發明之系統可另包括—離型機構，以使製造完成之電路減離該托盤。本發明之系統可另包括-清潔機構，用以清除該顯影機構所未顯影之物質。本發明之系統可另包括一焊劑罩軸加器’倾該機器手臂或一搬運機器人可及之處。本發明之系統可另包括一標記施加器、一接腳塗布器及/或電氣元件組裝單元，均位於該機器手臂或一 ® 搬運機器人可及4。在該系統中’該離型機構可包括一托盤開啟機構。本發明之系統另可包括一控制器，以動態改變該輻射光源之焦點。本發明之系統另可包括一加熱器，以加熱該 . 托盤。該製造站可包括一惰性氣體氛圍。該第一及第二製造站中至少一者可包括一 - 惰性氣體氛圍。該托盤可包括多數之可力σ鎖小托盤。根據本發明之一面向，本發明揭示一製造印刷電路板（PCB)之系統，該系統包括：至少一介電子系統，用以製造介電層；至少一導體子系統’用以製造導電層； 19 200938042 一熟化子系統；一操作機台，以控制該系統之作業；及一搬運機構，以將各子系統搬運至一個或多個PCB製造物。該介電子系統可包括：一液體供應器；及一顯影機構。該顯影機構可包括一輻射光源，該導體子系統可包括一印字頭，本發明之系統可更包括一腔體，於製造過程中可供應惰性氣體氛圍。本發明之系統可更包括一製造托盤，用以收容一或多個PCB製造物。該熟化子系統可包括一烤爐。該熟化子系統可包括一加熱器，以加熱該托盤。該液體供應器可包括多數喷嘴。該導體子系統可包括多數之供應頭。該導體子系統可缺一種子層供應||及一導電線路製造器。 ^ 該種子層供應器可祕至少一供應頭’而該導電線路製造器包括-電鍍子系統。【實施方式】以下對於本發明不同實施例之說明，均在揭示一種印席J電路板（P^g)原型製 ‘ 作及/或生產之新穎裝置與方法。該裝置是單一、全自動、數位化、積體化之系統，肋製造有完全功紐之PCB级(bar^board)。必要牡可組裝電子元件於其上。在特定情形下該滅也可麟同時製造彡數PCB。所製得之概具有縣^、導電層金屬化導孔/孔洞及犧牲導孔/孔洞，與f知之pCB相同。其不同^^上 ® 述組成部份均使用新I員之製程及製造系統所製作。本發明之系統可僅由單人操作’即可生產全功能之rcB，且料僅數小時而非數日。本發明可不使用或僅使用極少量毒性及/或有害物質。因林發明之系統可 ’ :-¾開發場所内’進行實驗室内PCB原型製作。本發明也可不使用習知技術之 '、與光罩機D，因林發明之系統為低勞力、快速產出之製造方法，足以取代工業化之K®雜謂。本㈣餐奸研__提_从雜，例如可以轉節終力及絲，以及綠設計耻俩需_，時_在設計初期階段，可在實驗室内製作而將機密設計内容保持在實驗室内，可加強保密。不但如此，本 20 200938042 發月也可以對於设計上之錯誤’儘早當場反應，以在原型測試階段即可發祕誤，不胁累積誤差。本發明另一優點在於可以將錄測試分歸不同研究團隊及依不同叹疋（例如類比、數位、直流、高頻等）進行，可以打開綱，但所增加費用極少。不及備载之伽’足以使得之研細綱程更為雜且更為集中並可使PCB原型的製作由能細免之步驟（如今日之狀況），變成簡化縮短 PCB流程所不可或缺之必要步驟。本發明之系統對於PCB之製造業祕出重大貢獻。缺可以極有效率，在短時 © 間内生產相對少量（例如原型、NPI)之PCB，因此對於PCB製造業者可以節省建置成本以及製迨工程上需手動之勞力，故可大量縮短對客戶之回覆時間，提高其競爭力。本發明其他特概優點，可由以下詳細說明而更形清楚。第1圖表示本發明一實施例之pcb製造系統1〇〇之示意圖。第认圖表示該PCB " 製造系統100内置中央處理機構之示意圖。如第1A圖所示，該中央處理機構具有 -轉盤110。延伸臂115固定於該轉盤11〇上，而托盤架12〇連接該延伸臂出之一端，以承接該托盤125。該轉盤110、延伸臂115及托盤架12〇使得本發明之系統， ❹可將托盤125置於任何圍繞在轉盤no周圍之工作站内。在本實施例中，該PCB 18〇是從托盤I25舉高，並可以翻轉機構脱（詳如下述）將之翻轉。必需說明者為：本發明並不·_上述稱，且使何機狀纟_可提供_之魏。在本 * 實施例中，如第1圖所示’環繞在轉盤110周遭作站祕介電層製造站13〇、熟化站135 (可例如為一烤爐）、導體製造站145及清潔站14〇。另外，如有必要，也可提供一排料槽160 ’用以排出完成後之電路板。各工作站之功能祕提供可在環境條件及/或清潔度條件（例如真空環境、純 21 200938042 氣環境（例如氬、氮）等）下製造之能力。同時，-主操作員機台15〇提供铸自動倾制之管理，以及使用者介面，並用來控制該系統100巾不同工作站之作業，以及托盤處理機構。該主操作員機台150可以更換為—it控站，用以控制數個製造系統100。當然，本發明中也可提供任何數量之工作站，因此在此所揭示之特定工作站’以及其他實補所揭示之工作站，只是縣例示，顿絲關本發明之範圍。本發明之系統也缺原料容器17G，絲容置消耗性製雜料，並麟原_ ❹存於適當職下。適當之物料製造裝置(未圖示)可將製造用原料在使用前處理至適當條件，缺預熱、勝等。製造用材料可為液體或粉狀，可包括介電材料及導電材料。其他製造材料另可祕導體塗布材料、有色介電材料（例如印製標記之顏料）、絕緣材料、焊劑罩幕材料、可溶性材料、鉛、焊膏、水、清潔劑等。以下詳細說明各工作站之结構及其作業。但該製造系統之製程可以一般性描述如下：將用來製造空板之標準CAD及/或CAM (電腦輔助製造）槽案，以及必要 ❹之組裝檔上載（意指本發明之系統可利用時下一般pCB工廠生產啦時所使用相同之電腦檔）到該主操作員機台15〇。將該槽案轉換並變更成製造槽，提供機器指令，用以製造全功能之PCB。如有必要，另可提供以⑽做軟體嫩，祕與使 7互動⑷如詢問對於特定設計、控制阻抗值等有無修改之必要？以及其他關於製—计（DFM)之詢問）。製造過程是由該轉盤ιι〇將托盤⑵放進該介電製造站130開始。將一可輻射熟化液體組成物倒入、喷激、加入托盤⑵内。特定之可輻概化雜，但由本案相酬書即可瞭心也可_在拇L雛齡至顏物（修可選擇性將該 22 200938042 固態物變成液態），均可使用。此外該液體也可使用輻射以外之方法熟化，例如加熱熟化、以化學方法熟化等。就此而言，本說明書所狀「熟化」，包括部份熟減全部熟化，視情形而定。換言之，在生產之不同階段中，不同層次可以不同程度熟化，均可以該程序管理加以控制，而可針對不同設計及不同材料特性，而決定個別的熟化條件因此除非使用Γ全熟化」一詞’否則「熟化」均包括部份熟化及全部熟化。成物平均喷麗在托盤125内，以形成一樹脂薄層。在本發明某些實例中（未圖示）’試用不同方式以確保樹脂能平均分布。利用一輻射光源（例如一紫外光源，如第2圖所示）照射該液體，以使pCB之形狀及邊界定形。該輕射可熟化該照射區域’使其成為硬化之介電材料。在此步驟’大家均可瞭解，一板層（例如一介電層）可包括數層製得之小層。例如-絕緣;可包括數介電層，社述方法將一層製作在另外一層上面。該缺厚度丁依„又。十上所需之特性（電氣絕緣特性或機械特性）而定。此外，該托盤位於該介電製造站時，可作z軸運動，以在製成之pCB變厚之同時，可調整其與供應裝置之距離。（例如形成一層後，PCB將變厚。此時可將托盤因應增加之厚度下移。）另一種方式是使該供應裝置可做z軸運動，用於補償製造過程中增加的厚度。第2A及2B圖顯示托盤225内填滿液體26〇，並暴露於轉射線下之狀態。使用 -輻射光源' ’ 料綠射265A錄外絲265B照賴雜，使該pCB成形’並將飾區域暴露於輻射之下。在此步驟中，導孔/孔洞或其他幾何圖形（如導電線路所用之溝槽）並不受輻射照射，因此在熟化及清潔後，該導孔/孔洞即露出’並可用來容納導電材料。在本實施例中，該清潔站140是用來除去及清除未經 23 200938042 Μ照射_旨’•位於導孔/孔洞位置顿脂等等。但在本發明其他實施例中，該介電製造站可將介電材料選擇性施加(意即只施加在材料需要熟化及硬化之位置），其後進行熟化。如此即可不需後續之除去及清除未熟傾脂之步驟。在第2Α圖中顯示使用_掃描麟將絲由光源施弓丨導到液體，直接「描搶」斤需之PCB t狀之方式。而在第2Β圖中醜示使用一動態光罩奶，使級透過光罩達到液體260，以複製所需之形狀之方式。健也可使用其他之技術，而不背離本發明4圍。因為使用輻射照射可以形成任何形狀，使用本發明甚至可以同時 ❹製1^多數PCB ’如第2A圖第2B圖所示。如上所述，在經照射之區域27〇熟化之後，將形成PCB之紐〇事實上因為本步驟可產生_絲以供製造pcB，故而不需使用傳統之起始基板，例如Ccl。在》玄第-介電層上，將定義似形狀之區域铸暴絲輕射下後，可將該托盤搬送至熟化站（例如烤爐135)處理。另-種方式是在完赫^之後再進行熟化。此時托盤應先搬送至導體製造站M5。在雜製造站145可形成導電線路，並對導 _ 孔/孔/同做金屬化’其方式可使用例如喷墨型印刷技術。在完成印刷後，該導電材料可予熟化（例如燒結）。如有必要，並可將托盤再度搬送至熟化站135，進行加熱熟化。導電麟製作完成後，可進行測試（例如以光學檢驗該導電線路），以驗證導體成形疋否正確’及驗證與所提供之製造指令之相關性。如可能，可再進行導電性電乳測試，以驗證形成之導體之電氣性能。其後將托盤送回介電製造站130，並在托盤内倒入第二層可輻射熟化液體組成物。在開始各製作步驟前，或在步驟後，如有必要也可進行清潔或清洗步驟（例如在清潔站140)。再度啟動輻射光源照射絕緣層之暴露區域，以將該區域熟化，而在導電線路層 24 200938042 上形成絕緣層。與之前相同，導孔/孔洞之位置及其他幾何形狀（例如導電線路所用之溝槽）’並不照射輻射，故在熟化及清潔後，該導孔/孔洞即會露出，可以用來容納導電材料。再度將托盤置於熟化站内處理，再搬送至導體製造站，以將該導孔 /孔洞金屬化，或在導孔/孔洞内加入導電材料，形成第二層之導電線路。在此步驟中’某些導孔/孔洞可能只在側壁塗布，其他導孔//孔洞則以導電材料填滿，均 n 據該製造指令決定。如所周知，該液態樹脂倒下後會分布成自然形狀之平坦上表面。這是本發明本 ® 實施例之優異特點。換言之，在製作絲三明治形之導電層與介電層夹層後，其上表面為平坦，而可在其上製作其他導電層。然而在某些情況下，也可使用例如強制平面機構（例如刮刀），使其表面更加平坦。第3A圖及3B圖即顯示其一例。其中第-樹脂層310已經熟化，其上又形成一導電線路315，另外，導孔/孔洞34〇側壁也以導電材料350塗布。在第3A圖中，絕緣^ 32〇已經輕射照射，使導孔/孔洞330定形。而在第3B圖，經過清除多餘，未熟化續脂32〇後，該導孔/孔洞 330就會露出。當將第3B圖之^结構熟化，如有必要再驗烤後，就可提供一平坦上表面’以供形成第二金屬層，其方式祕將導電材料施加到導孔/孔洞内。此仃業人士均骑解’要奴平坦±表面可能需较干「休息」關，以使液體能平坦分布，其長短與液體黏度、周遭溫度等有關。上述之處理程序可重複進行，以形成如所需數量之金屬線路層。其後利用例如轉盤110上之翻轉機構185，將熟化之PCB轉。再度進行上述程序，以在咖之底面產生導絲路及獅，所得之rcB與其他PCB糊，在上表面及下表面均 /、有導電層。只要製作完成第-介電層之後，在PCB之底面可以形成各種數量1 25 200938042 -人（包括介電層）。另外，在製造中，該rcB也可在需要時加以翻轉，均可根據製心!·程決疋如第1圖所示，约J製程可以使用一攝影機及其魏^制手段（未圖示) 監控。因此可以不需使用鍅，也不級用傳統pcB製造技術，即可製作雙面KB。 (指兩最外層均需具有導電元件之PCB。如树業人士所知，在PCB内層也可具有導電層，即為多層雙面PCB。）第4圖表不本發明另-實施例之pcB製造系統之示意圖。第4圖所示之元件與第1圖之實施例類似，但圖中並無該介電製造站及該轉製造站，而以結合之介電 © 及導體製造站430代替。本實施例之製作流程與第1圖之實施例也_，但該絕緣層及該導電層是在製造站430製作。該製造站43〇紐可以供應可輕射熟化液體組成物及供應該導電線路之元件。例如，該結合製造站CO可蛛—喷嘴，用以供應域物’ 喷墨頭，賴印麟電鱗。如此即可免除在導體製造站與絕緣體製造站之間來回運送之作業，而可提高效率。此外也可簡化對位之程序，提1¾正確性。第5圖表示本發明另一實施例之PCB製造系統之示意圖。第5圖所示之pcB 製造站秘第1圖或第4圖所示者相似，鸿加另一製造站。該增加之製造站用來測試完成後PCB之設備’以及在PCB上组裝元件之設備。所包括之製造站有一焊膏供應站565、一電氣測试站570及一貼片站575。另設置一轉盤510B，用以搬送 . _，而在該製造站5纪、57〇及S75内處理。本實施例之一特色為該熟化站奶為一烤爐，該烤爐也作焊劑爐使用。此外在本實施例之烤爐535也提供將板體送至第二#盤510B之機構，其方式可包括使用一輸送帶。以下將說明本發明一實施例之PCB之製造方法。第6圖表示本發明一實施例之 26 200938042 PCB製造方法流程圖。第6圖所表示之步驟係使用於第5圖之系統，但也可使用在本發明PCB製造系統之其他實施例。於600將適用之製造槽602 ’客戶資料604及組裝檔（也可省略）606下載至操作員機台550。上述檔案之資料經過轉換及變更，成為一製造檔。根據本發明之内容’「資料轉換」包括改變資料之呈現方式，以適應該製造系統。此時該資料所代表之設計内容則未變更。因此例如在步驟600可將CAD 資料轉換成可以產生自由成形製造槽之製造檔，用以提供製造PCB各步驟，例如在形成可熟化液體薄層，燒結粉末等步驟，所需之指令。另一方面，「資料變更」包括 ❹ 修改原始設計’以提供與傳統PCB相同之功能’但製作過程卻使用非傳統材料及方法。因此該CAD資料經過修改，以定義例如用來形成導電線路及導孔/孔洞之材料導電係數，熟化後介電材料之介電係數等。改變後的製造樓也包括應於何處形成絕緣材料、應於何處开)成導電材料、曝光時間、熟化及/或烘烤時間等之描述，而使製造所得之PCB之性能，能與傳統使用該原始CAD資料，以傳統方式製作之 PCB，具有高度相關性。於步驟610製作—PCB板體’其方式為使用本發明系統之數製造站。如前所述， ® 在開始製作時並不使用紐，故步驟以於611準備該托盤開始。如下所將說明，準備托盤在此階段有其必要，但事後需將托盤與製成之PCB脫離，例如於製造完成時或飾轉時。因此可以使用例如塗布可溶輯料，形成離型層之方式，以便於脫離。於6i2製備-介電層作為該電路板之起始層。該介電層可糊任何快速模型製作/ SIT/直接寫入技術’以介電材料形成’祕可輻射熟化液態組成物、可燒結介電粉末等。該介電層可加以熟化，例如依據該製造樓6〇2所提供之設計，經過讎及後之資訊，以輕射照射、化學或熱處理熟化等方式熟化。熟化或固化後之介電 27 200938042 層可以進行退火或烘烤。在此步驟中’該第一層介電層並不需在單一步驟帽成，而可透過献或嶋目疊數薄層液體、粉末等材料而形成。重點在於：因為製作了該第一層修本細之綠㈣個—额作她刪後可將該卿做成任賴之尺懒狀，其方式職起始她。· 度彈赚綱點，例如簡化梅本編线序（例如導孔/孔洞金板低長咼比’因為只需雜電層部份高度進行金屬化，詳下述> ❹ ❹ 在完成第-介電層後，辦驟⑽，在該介電層上形成一導電層或導電線路。用來形成鱗電層之方法有多種，祕各種直接寫入或spF方法。根據本發明一實施例，該導電線路是以印刷技術形成，例如以喷墨印刷技術^與該介電層相同，該導電線路並不s要在單—麵巾戦，而可购刷多賴層，層紅方式形成。各導電層可予熟化或不熟化’也可部分熟化至所需程度，或在沈積第二導電層之前，經過烘烤。在完成該導電線私後，可將該PCB退火或供烤。於616進行導孔/孔洞金屬化，及其他線路連接’均可視需要而製作。另一種方式係使步驟614至M6 平行進行，例如使用多數供應頭，以供應導電材料，其一用以形成導電線路，另— 供應頭用以作導孔/孔洞金屬化。於618判斷是否需製作其他層次。如是。則重複步驟612到618。於步驟616做導孔/孔洞金屬化’目的在將導孔//孔洞以導電材料填滿或包覆。如上所述，製作導孔孔洞需有其他預處理步驟（例如於製造站 540)，以在步驟616金屬化之前，清潔該導孔/孔洞，除去多餘之介電材料。於此所稱之導孔/孔洞金屬化，可理解為使用導電材料填滿或包覆導孔/孔洞。但導電材料未必為金屬材料。故「金屬化」只是名稱而已。步驟610之處理，可在PCB之上表面製作完成後，在另一面重複進行。換言之， 28 200938042 於達到步驟618後’可判斷是否已完成最後一層，其後判斷是否應在pcB之下表面製作導電層及/或絕騎。如是，在捕定實施例中即將咖翻轉，重複進行步驟 610 ’以在PCB之下表面製作導電線路及絕緣層。當⑽树有步鄉句完成後，可於62〇進行另外技面修飾步驟。在表面修飾步驟中，所有步驟均尸、影響rcB之最外層。因歧面修飾步驟可在完成至少一最外層後才進行，無論為PCB之上表面或下表面。在域表面㈣步驟（如依第6圖及第7圖所示）以外’也可視需要進行板體著色步驟，用來使板體具有與傳統PCB相 ❹同之外觀。所使用之顏料可為環氧基底材料。另-種方式是將介電材料以不同顏色製作’例如可為深綠色球料，顏色與傳統方法之製作之多數啦相同。一般而言，方法是在製作過程中，或在系統中，在原材料中加入麟，其 ' 時機為形成材料層之前。於步驟622進行接腳塗布。接腳塗布之步觀空板技面修都步驟中，扮演重要角色，因為接腳㈣用來插入元件之導孔/孔洞）為電路板與元件間唯一之接觸點。因此元件與部分或铸接腳間技結需具有高品質，包括其機械特性（例如 ® 拉伸強度、讎強度）與電氣特性（例如導電係數）。此外，連結時可使用一中介材料，以在元件與電路板之導體間，提供一良好介面，包括黏著度、導電性等。塗布接腳的適當方法有數種’其中適用者祕HASL (熱氣焊料整平勸，因R〇HS環 -境保護法規之限制’現已極少使用)、化學鎳，浸液金技術、化學鎳，嫩/浸液金技術及其他方法。上述之方法於習知製造技術中均屬常見，均使用大量化學浸潤、溶劑及有害物質。如上所述之金屬連接之方法，因電路板所使用讀料、該電子零狀^料以及 29 200938042 連接兩者之_軸价嫩物崎酬，_瓣油㈣ )料組成物在PCB製作過程巾可予鋪，因此可雜據特定電路及 -哥需求而加以調整，以產生不同Μ面特性，因錄據本發明之一特徵，缝布程序中有_步驟是_供能符合特咖上需求之功能。例如某些電路板完全；(·紐麵之PCB ，並不綠具有獅，故不需塗布）或/、需以有機可焊性保護劑（吨獅娜町職磁做簡易之接腳塗布即可有機可焊性保護劑之優點在於在焊接前，可保護該導體表面不受氧化。 ❹另方面，對於需使用更娜之塗布技術（例如化學鎳/浸液金塗布技n 板例如採用B曰片式印刷電路板（chip〇nb〇ard)或球柵陣列⑽咖啲乂）之元件’即應提供相對應之接腳塗布。本發明之實施例使用該賴製造站，例如第$圖製U站545以塗布接腳。如有必要，也可使用舰性材料（油娜咖㈣也）作為接腳塗布劑’例如奈米銀膏、奈米金膏或其他類似材料。另外，本發明之方法中’塗布接腳之方法也可根撕使用之接腳及導電材料，以麟需之目標應用不同，而有不同。此外，由於在本發明之方法中，鱗電材料可與習知之pcB製造技術所使用續不同’故可使用不同材料形成接腳，_在電子元件與電路板間，提供良材料介面。於步驟624在PCB之兩面或一面之最外層表面，製作焊劑罩幕層。焊劑罩幕之目的最主要在將PCB最外層表面隔絕，而避免在暴露之線软間（此處不需塗布焊 • 劍形成焊劑之連接。焊劑罩幕之製作有助於達成本發明之特徵，但於某些用途並不需要，故不需使用。在傳統PCB製造方法中，液體顯影劑型焊劑罩幕是以網印方式塗布到電路板，其後於烤爐中乾燥。之後將電路板暴露於光源下，進行顯影再 200938042 除去未曝光之罩幕部分。最後再將電路to 口以烘烤，以熟化遺留之罩幕部分。根據本發明之-實例，焊鮮幕係以施加之方式形成，而不使用罩幕，與上述 ^ sFFjLmm^m 料薄層（或類似物質，可含有顏色）之方式，形成該焊劑罩幕。例如可使用該介電製造站530形成焊劑罩幕，形成所需之形狀，如上述製造播所定義。另一種方法是在該焊劑罩幕製造站使用數位噴墨印刷系統，而以施加之方式，高度正確的將錄度油墨，以喷墨方式印刷，成為焊劑罩幕層。所施加之油墨可以提供與習知製造技 © 術所使用之焊劑罩幕類似之特性。關於此項技術，如有進一步了私必要，可參考美國專利第6,754,551號。糾，於麟未制之無方法，也可贿製作鱗劑軍篡。於626製作-標記。標記之目的在標*元件μ稱，以在組裝時可以參考。通 ’常之作法為標示傾白色之元件記號，使得手動組裝較為容胃。雜麟㈣功能 ϋ'要之可提供此補點，並可應不同顧上之需求_用。在習知麟1ίΊχ糊顿’糊（修使職記底#軸酿）到冑路板。最後於 β 烤爐中熟化而結束此步驟。 ’該標記是以下列方法之一製作。在一實施例中係使用該介電製造站530 ’以適當切料形成標記。例如薄膜直接寫入機器，即可用來固化 *電材料之有色版本’最好為白色，因在傳統pCB製造巾均使用白色。該介電材 ’ _顏料而具有顏色。但其傭料也可應用在本發明，只要能在其他(修^溫職猶時），不舰_可。在實棚中酿用噴墨印刷猶形成標記，該喷墨印職器在本發明之系統中應做適當之調整與修 31 200938042 改。例如以色列Rehc_之_公司所生產之LGp_8〇9數位標記印刷系統，即可適用。另-種做法是在導電製造站，例如第5圖之製造站545，形成標記。另外其他未說明之方法，也可用來形成該標記。步驟620所進行技面鑛綜合說明如下：必需說明者，為絲據本發明之較佳實例中，本步驟中讀有步驟（祕接腳塗布奶、焊劑罩幕戦似、標記形成 626)，都使用該介電製造站530及鱗電製造站545勒于。而兩者也應用在電路板之製作° S餘表面修飾步射，傳驗術上—台額外機器才能執行之步驟 Ο (亦即’在傳統製造技術中必須分別使用多數特定錢器形成記號，以及以多數之特定機器形成焊劑罩幕等等），在本發明當中則以一多目的製造站即可達成。因此本發明確可簡化製作程序，提昇效能。 ' 完成步驟62G後，該PCB之製作基本上已經完成，產生- PCB之妹。如有 _ 必要可在步驟630將rcB搬送至製造站57〇 ’進行電氣測試。使用電路板檢驗及/ 或測試’以驗證電路板之瑕疯及功能性。程序主要包括使用適用之電流等，檢驗其電阻係數及導電係數。測試可使用時下相關產業所使用之基台進行，例如飛針測試 ❹ 機（flyhgProbetesters)。為使測^^達成與本發明系統各實施例之相容性，可能必需進行某些調整，以及增加其他在該完成後之電路板所需之測試功能。當然其他之驗證程序及其他測試，均可包含在本發明製造機器之不同步驟中。如製得之pcB通過測試，即在640獲得一全功能化之KB空板。如第5圖所示’本發明之實施例也可在該製造系統中，整合元件組裝功能。該組裝步驟650可以模組化方式進行，因此元件組裝機器可以整合到本發明之系統内。就此而言，在652先進行PCB之焊劑塗布，再將PCB搬送到焊劑塗布站565， 32 200938042 以在電路板之相關部分（例如接腳處）’塗上元件組裝所需之焊接材料（例如焊膏> ’該_之塗布可_加之方式狀，崎_罩幕及網印機。就此目的，可使用一自動化、高正破度之焊劑塗布機器。另一種方式則可使用本發明系統之其他耕，例如該介電製造站或該導電製造站，來塗布焊劑。焊劑之塗布係根據適當之組裝資料標，該資料樓經過轉換與變更程序成為製造槽。在進行654組裝電子元件時，本發明之實施例可使則專統少量表面黏著機 (surface mounting device)、貼片機（pick&place machines)(例如貼片機 575)，並® is disposed at the central processing station. The inventive system may further include a process n for receiving PCB manufacturing data and establishing a control command to control the dielectric substance supply, the conductive material supply, and the heating station. Let t step change to find the age of the lake, bribe Wei PCB view cake parameters. The system of the present invention may additionally include a release mechanism to reduce the finished circuit from the tray. The system of the present invention may additionally include a cleaning mechanism for removing material that is not developed by the developing mechanism. The system of the present invention may additionally include a flux cap shaft applicator 'too that the robot arm or a handling robot is accessible. The system of the present invention may additionally include a marker applicator, a pin applicator and/or an electrical component assembly unit, both of which are located in the robot arm or a ® handling robot. In the system, the release mechanism can include a tray opening mechanism. The system of the present invention may further include a controller to dynamically change the focus of the radiation source. The system of the present invention may further include a heater to heat the tray. The manufacturing station can include an inert gas atmosphere. At least one of the first and second manufacturing stations may include an inert gas atmosphere. The tray can include a majority of the force sigma lock small tray. In accordance with one aspect of the present invention, a system for manufacturing a printed circuit board (PCB) includes: at least one dielectric system for fabricating a dielectric layer; at least one conductor subsystem 'for fabricating a conductive layer; 200938042 A curing subsystem; an operating machine to control the operation of the system; and a handling mechanism to transport the various subsystems to one or more PCB fabrications. The dielectric system can include: a liquid supply; and a developing mechanism. The developing mechanism can include a radiation source, the conductor subsystem can include a printing head, and the system of the present invention can further include a cavity for supplying an inert gas atmosphere during the manufacturing process. The system of the present invention can further include a manufacturing tray for housing one or more PCB articles. The curing subsystem can include an oven. The ripening subsystem can include a heater to heat the tray. The liquid supply can include a plurality of nozzles. The conductor subsystem can include a majority of the supply heads. The conductor subsystem can be supplied with a sub-layer supply || and a conductive line manufacturer. ^ The seed layer supply may be at least one supply head' and the conductive line manufacturer comprises a plating system. [Embodiment] The following description of various embodiments of the present invention discloses a novel apparatus and method for making and/or producing a prototype of a printed circuit board (P^g). The device is a single, fully automatic, digital, integrated system, and the ribs are manufactured with a full-featured PCB level (bar^board). It is necessary to assemble electronic components on it. In certain cases, this can also be used to manufacture a number of PCBs. It is made of the same county, the conductive layer metallized via hole/hole and the sacrificial via hole/hole, which is the same as the pCB. The different parts of the ^^® are made using the process and manufacturing system of the new I member. The system of the present invention can produce a full-featured rcB with only a single operation, and is expected to be only hours rather than days. The invention may be used without or with minimal amounts of toxic and/or hazardous materials. The system invented by Lin can be used to prototype PCBs in the laboratory. The present invention can also replace the industrialized K® miscellaneous term with the low-strength, fast-output manufacturing method of the system invented by the conventional technology and the photomask machine D. This (4) meal rape research __ mention _ from the mixed, for example, can be transferred to the final force and silk, and green design shame needs _, time _ in the early stages of design, can be produced in the laboratory and keep the confidential design content in the experiment Indoors can enhance confidentiality. Not only that, this 20 200938042 month can also respond to the design mistakes as early as possible, so that in the prototype test stage can be secret, not cumulative error. Another advantage of the present invention is that the recording test can be divided into different research teams and according to different sighs (e.g., analog, digital, direct current, high frequency, etc.), and the program can be opened, but the added cost is minimal. It’s not as good as the rigor of loading. It’s enough to make the fine-grained process more complicated and more concentrated, and it can make the PCB prototype production indispensable from the steps that can be spared (the current situation) to simplify and shorten the PCB process. The necessary steps. The system of the present invention makes a significant contribution to the manufacturing of PCBs. Lack can be extremely efficient, producing relatively small (eg prototype, NPI) PCBs in a short period of time, so PCB manufacturers can save on construction costs and manual labor on the manufacturing process, so they can be significantly shortened to customers. Reply time to improve their competitiveness. Other specific advantages of the present invention will become apparent from the following detailed description. Fig. 1 is a view showing a pcb manufacturing system 1 according to an embodiment of the present invention. The first figure shows a schematic diagram of the PCB " manufacturing system 100 built-in central processing mechanism. As shown in Fig. 1A, the central processing unit has a turntable 110. The extension arm 115 is fixed to the turntable 11A, and the tray holder 12 is connected to one end of the extension arm to receive the tray 125. The turntable 110, extension arm 115 and tray holder 12 are such that the system of the present invention can place the tray 125 in any workstation surrounding the turntable no. In the present embodiment, the PCB 18 is lifted from the tray I25 and can be flipped over by the flip mechanism (described in detail below). The necessary explanations are as follows: The present invention does not _ the above-mentioned, and what kind of machine _ can provide _ Wei. In the present embodiment, as shown in Fig. 1, 'around the turntable 110, the station is a dielectric layer manufacturing station 13A, a curing station 135 (which may be, for example, an oven), a conductor manufacturing station 145, and a cleaning station 14 Hey. Alternatively, a discharge chute 160' may be provided to discharge the finished circuit board, if necessary. The functional secrets of each workstation provide the ability to be manufactured under ambient conditions and/or cleanliness conditions (eg vacuum environment, pure 21 200938042 gas environment (eg argon, nitrogen), etc.). At the same time, the main operator machine 15 provides management of the cast automatic tilting, as well as the user interface, and is used to control the operation of the system 100 different workstations, as well as the pallet handling mechanism. The primary operator machine 150 can be replaced with a -it control station for controlling a number of manufacturing systems 100. Of course, any number of workstations are also provided in the present invention, and thus the particular workstations disclosed herein, as well as the workstations disclosed in other practical supplements, are merely exemplified by the county, and the scope of the invention is limited. The system of the present invention also lacks the raw material container 17G, and the silk accommodates the consumable raw materials, and the Linyuan _ is stored in a proper position. A suitable material manufacturing apparatus (not shown) can process the raw materials for manufacturing to appropriate conditions before use, lacking preheating, winning, and the like. The material for manufacture may be in the form of a liquid or a powder, and may include a dielectric material and a conductive material. Other materials of manufacture are concealed conductor coating materials, colored dielectric materials (such as printed marking materials), insulating materials, flux mask materials, soluble materials, lead, solder paste, water, detergents, and the like. The structure of each workstation and its operation are described in detail below. However, the manufacturing process of the manufacturing system can be generally described as follows: a standard CAD and/or CAM (Computer Aided Manufacturing) slot for manufacturing an empty board, and an assembly file if necessary (meaning that the system of the present invention is available) The same computer file is used in the production of the general pCB factory to the main operator machine. The slot is converted and changed to a manufacturing slot, and machine instructions are provided for manufacturing a fully functional PCB. If necessary, it is also possible to provide (10) soft body, secret and 7 interaction (4) if the inquiry is necessary for specific design, control impedance value, etc. And other questions about the system (DFM). The manufacturing process begins by placing the tray (2) into the dielectric manufacturing station 130 by the turntable. A radiation sterilizable liquid composition is poured, sprayed, and added to the tray (2). The specifics can be generalized, but the rewards can be obtained from the case. The heart can also be used in the case of the thumb-aged to the pigment (the optional 22 200938042 solid can be turned into a liquid). Further, the liquid may be aged by a method other than radiation, such as heating and aging, chemically aging, or the like. In this regard, the term “maturing” as used in this specification includes partial ripening and full maturity, as the case may be. In other words, in different stages of production, different levels can be matured to varying degrees, which can be controlled by the program management, and individual maturation conditions can be determined for different designs and different material properties, so the term “full ripening” is used unless Otherwise, "maturing" includes partial ripening and full ripening. The average of the objects is sprayed in the tray 125 to form a thin layer of resin. In some embodiments of the invention (not shown), different approaches have been tried to ensure an even distribution of the resin. The liquid is illuminated with a source of radiation (e.g., a violet source, as shown in Figure 2) to shape the shape and boundaries of the pCB. The light shot can cure the illuminated area' to make it a hardened dielectric material. In this step, it is understood that a layer (e.g., a dielectric layer) may comprise a plurality of layers made of layers. For example - insulation; may include several dielectric layers, and the method described one layer on top of the other. The thickness is determined by the characteristics (electrical insulation properties or mechanical properties) required for the tenth. In addition, when the tray is located at the dielectric manufacturing station, it can be moved by z-axis to make the pCB change. At the same time, the distance from the supply device can be adjusted. (For example, after forming a layer, the PCB will become thicker. At this time, the tray can be moved down according to the increased thickness.) Another way is to make the supply device can do z-axis motion. Used to compensate for the increased thickness during the manufacturing process. Figures 2A and 2B show the tray 225 filled with liquid 26 〇 and exposed to the state of the ray. Use - radiant light source ' ' Green 265A recorded external wire 265B Dependent, shaping the pCB and exposing the decorative area to radiation. In this step, the vias/holes or other geometric patterns (such as the trenches used for the conductive lines) are not exposed to radiation and are therefore matured and After cleaning, the via/hole is exposed and can be used to accommodate conductive material. In the present embodiment, the cleaning station 140 is used to remove and remove the un-23 200938042 Μ _ • • • • • • • • • • Lipid, etc. But in this hair In other embodiments, the dielectric fabrication station can selectively apply a dielectric material (ie, only to the location where the material needs to be cured and hardened), and then mature. This eliminates the need for subsequent removal and removal of the uncooked dump. The step of the fat. In the second figure, the method of using the _scanning lining wire to guide the liquid from the light source to the liquid directly shows the way of the PCB t-shaped. In the second figure, it is ugly to use a dynamic mask milk to pass the stage through the mask to the liquid 260 to replicate the desired shape. Other techniques may be used by Jian, without departing from the invention. Since any shape can be formed by irradiation with radiation, it is possible to simultaneously control a plurality of PCBs as shown in Fig. 2A and Fig. 2B. As described above, after the irradiated region 27 is cured, the PCB will be formed. In fact, this step can produce a filament for the manufacture of the pcB, so that a conventional starting substrate such as Ccl is not required. On the "Xuandi-dielectric layer", after the definition of the shaped area is cast, the tray can be transported to a curing station (for example, oven 135) for processing. Another way is to mature after finishing the ^. At this point, the pallet should be transported to the conductor manufacturing station M5. Conductive lines can be formed at the hybrid fabrication station 145 and metallized to the vias/holes/the same can be used, for example, by ink jet type printing techniques. After the printing is completed, the electrically conductive material can be aged (e.g., sintered). If necessary, the tray can be transported again to the ripening station 135 for heating and aging. Once the conductive lining is completed, it can be tested (for example, optically verifying the conductive trace) to verify that the conductor is formed correctly and verify the correlation with the manufacturing instructions provided. Conductive electro-milk testing can be performed, if possible, to verify the electrical properties of the formed conductor. The tray is then returned to the dielectric fabrication station 130 and a second layer of radiation curable liquid composition is poured into the tray. A cleaning or washing step (e.g., at cleaning station 140) may be performed, if necessary, before starting each production step, or after the step. The radiation source is again activated to illuminate the exposed region of the insulating layer to cure the region, and an insulating layer is formed on the conductive wiring layer 24 200938042. As before, the position of the via/hole and other geometries (such as the trench used for the conductive trace) do not illuminate the radiation, so after the curing and cleaning, the via/hole is exposed and can be used to accommodate the conductive material. The tray is again placed in the curing station for processing, and then transferred to the conductor manufacturing station to metallize the via/hole, or a conductive material is added into the via/hole to form a conductive layer of the second layer. In this step, some of the vias/holes may only be coated on the sidewalls, and the other vias/holes are filled with conductive material, depending on the manufacturing instructions. As is well known, the liquid resin will be distributed into a flat upper surface of a natural shape after being poured down. This is an excellent feature of the present embodiment of the present invention. In other words, after the wire sandwich-shaped conductive layer and the dielectric layer are laminated, the upper surface thereof is flat, and other conductive layers can be formed thereon. However, in some cases, it is also possible to use, for example, a forced flat mechanism (e.g., a doctor blade) to make the surface flatter. An example of this is shown in Figs. 3A and 3B. The first resin layer 310 has been cured, and a conductive line 315 is formed thereon. Further, the via hole/hole 34 side wall is also coated with a conductive material 350. In Fig. 3A, the insulating film 32 has been lightly irradiated to shape the via hole/hole 330. In Fig. 3B, after the excess is removed, the via hole/hole 330 is exposed after 32 minutes of uncooked. When the structure of Fig. 3B is cured, and if necessary, a flat upper surface is provided for forming a second metal layer in such a manner that a conductive material is applied to the via hole/hole. All practitioners are riding a solution to make the slaves flat. ± The surface may need to be dry and rested so that the liquid can be distributed flatly. The length of the liquid is related to the viscosity of the liquid and the temperature around it. The above described processing procedures can be repeated to form as many metal circuit layers as desired. Thereafter, the cooked PCB is rotated by, for example, a turning mechanism 185 on the turntable 110. The above procedure is repeated to generate a guide wire and a lion on the underside of the coffee, and the obtained rcB and other PCB paste have a conductive layer on both the upper surface and the lower surface. After the completion of the first dielectric layer, various quantities of 1 25 200938042 - people (including dielectric layers) can be formed on the bottom surface of the PCB. In addition, in manufacturing, the rcB can also be flipped when needed, and can be based on the heart-making process. As shown in Figure 1, the J-process can use a camera and its means (not shown). ) Monitoring. Therefore, it is possible to produce a double-sided KB without using 鍅 or the conventional pcB manufacturing technology. (The two outermost layers are required to have PCBs with conductive elements. As the tree industry knows, the inner layer of the PCB may also have a conductive layer, that is, a multi-layer double-sided PCB.) The fourth chart is not the invention - the pcB manufacturing of the embodiment Schematic diagram of the system. The components shown in Fig. 4 are similar to the embodiment of Fig. 1, but the dielectric manufacturing station and the transfer manufacturing station are not shown in the drawings, but are replaced by a combined dielectric © and conductor manufacturing station 430. The fabrication flow of this embodiment is also the same as the embodiment of Fig. 1, but the insulating layer and the conductive layer are fabricated at the manufacturing station 430. The manufacturing station 43 can supply a light-radiating curing liquid composition and an element for supplying the conductive line. For example, the combined manufacturing station CO can be a spider-nozzle for supplying the domain' inkjet head, Lai Yinlin scale. This eliminates the need to transport back and forth between the conductor manufacturing station and the insulator manufacturing station, thereby improving efficiency. In addition, the program of alignment can be simplified to improve the correctness. Fig. 5 is a view showing a PCB manufacturing system according to another embodiment of the present invention. The PCB manufacturing station shown in Figure 5 is similar to the one shown in Figure 1 or Figure 4, and another manufacturing station in Hongga. The added manufacturing station is used to test the equipment of the finished PCB and the equipment for assembling components on the PCB. The manufacturing station included has a solder paste supply station 565, an electrical test station 570, and a placement station 575. A turntable 510B is also provided for transporting . _, and is processed in the manufacturing stations 5, 57, and S75. One of the features of this embodiment is that the curing station milk is an oven, and the oven is also used as a soldering furnace. Further, the oven 535 of the present embodiment also provides a mechanism for feeding the board to the second #510B, which may include the use of a conveyor belt. Hereinafter, a method of manufacturing a PCB according to an embodiment of the present invention will be described. Figure 6 is a flow chart showing the method of manufacturing a PCB of 2009 20094242 according to an embodiment of the present invention. The steps shown in Fig. 6 are used in the system of Fig. 5, but other embodiments of the PCB manufacturing system of the present invention can also be used. The applicable manufacturing slot 602' client profile 604 and assembly file (may also be omitted) 606 are downloaded to the operator console 550 at 600. The information of the above files has been converted and changed to become a manufacturing file. According to the content of the present invention, "data conversion" includes changing the manner in which data is presented to suit the manufacturing system. At this time, the design content represented by the data has not changed. Thus, for example, at step 600, the CAD data can be converted into a manufacturing file that can produce a freeform fabrication slot for providing the steps required to fabricate the PCB, such as in forming a thin layer of curable liquid, sintering the powder, and the like. On the other hand, “data changes” include 修改 modifying the original design to provide the same functionality as traditional PCBs, but the production process uses non-traditional materials and methods. Therefore, the CAD data has been modified to define, for example, the conductivity of the material used to form the conductive traces and vias/holes, the dielectric constant of the cured dielectric material, and the like. The changed manufacturing building also includes descriptions of where the insulating material should be formed, where it should be made, the conductive material, exposure time, curing time, and/or baking time, etc., so that the performance of the fabricated PCB can be Conventionally using this original CAD material, the PCB produced in the traditional way is highly correlated. The PCB board is fabricated in step 610 in a manner that uses the number of manufacturing stations of the system of the present invention. As mentioned earlier, ® does not use a button at the beginning of the production, so the step is to start the tray at 611. As will be explained below, the preparation tray is necessary at this stage, but the tray needs to be detached from the finished PCB afterwards, for example, at the time of manufacture or when it is turned. It is thus possible to use, for example, coating a soluble material to form a release layer in order to facilitate detachment. A dielectric layer was prepared at 6i2 as the starting layer for the board. The dielectric layer can be paste-formed by any rapid prototyping/SIT/direct writing technique to form a secret radiation curing liquid composition, a sinterable dielectric powder, and the like. The dielectric layer can be aged, for example, according to the design provided by the manufacturing building 〇2, and after aging, it is cured by light irradiation, chemical or heat treatment aging. Digested or cured dielectric 27 200938042 The layer can be annealed or baked. In this step, the first dielectric layer does not need to be formed in a single step, but can be formed by stacking or stacking a thin layer of liquid, powder or the like. The point is: because the first layer of the repair of the fine green (four) - for her deletion, the Qing can be made into a lazy shape, the way to start her. · Degrees of profit, such as simplifying the line of the Meben line (such as the low hole-to-turn ratio of the guide hole/hole gold plate) because only the height of the part of the hybrid layer is metallized, as described below > ❹ ❹ At the completion of the - After the dielectric layer, step (10), forming a conductive layer or a conductive line on the dielectric layer. There are various methods for forming the scale layer, and various direct writing or spF methods are used. According to an embodiment of the present invention, The conductive line is formed by a printing technique, for example, by an inkjet printing technique, which is not the same as the dielectric layer, and the conductive line is not formed in a single-faced tissue, but can be purchased in a layered manner. Each of the conductive layers may be pre-cooked or un-cooked' or partially cured to a desired extent, or baked prior to depositing the second conductive layer. After completing the conductive line, the PCB may be annealed or baked. 616 for via/hole metallization, and other line connections' can be made as needed. Alternatively, steps 614 through M6 can be performed in parallel, such as using a plurality of supply heads to supply conductive material and one to form conductive lines. , another - supply head for guidance / Hole metallization. Determine if additional levels need to be made at 618. If yes, repeat steps 612 through 618. Conduct via/hole metallization in step 616 to fill or coat the via hole//hole with conductive material As noted above, the fabrication of via holes requires additional pre-treatment steps (e.g., at fabrication station 540) to clean the vias/holes prior to metallization in step 616 to remove excess dielectric material. The metallization of the via hole/hole can be understood as filling or coating the via hole/hole with a conductive material. However, the conductive material is not necessarily a metal material. Therefore, "metallization" is just a name. The processing of step 610 can be performed on the PCB. After the surface is finished, it is repeated on the other side. In other words, 28 200938042 After reaching step 618, it can be judged whether the last layer has been completed, and then it is judged whether a conductive layer and/or a ride should be made on the surface of the pcB. If so, In the capture embodiment, the coffee is turned over, and step 610' is repeated to make a conductive line and an insulating layer on the lower surface of the PCB. When the (10) tree has a step-by-step sentence, another technical repair can be performed at 62〇. Step: In the surface modification step, all steps are corpses, affecting the outermost layer of rcB. Since the surface modification step can be performed after at least one outermost layer is completed, whether it is the upper surface or the lower surface of the PCB. (As shown in Figures 6 and 7), the board coloring step can also be performed as needed to make the board have the same appearance as the conventional PCB. The pigment used can be an epoxy base material. Another way is to make the dielectric material in different colors. For example, it can be a dark green ball. The color is the same as the majority of the traditional method. In general, the method is in the production process, or in the system, in the The lining is added to the raw material, and the timing is before the formation of the material layer. The step coating is performed in step 622. The step of the coating step is to play an important role because the pin (four) is used to insert the component. The via hole/hole is the only point of contact between the board and the component. Therefore, the bonding between the component and the part or the cast pin requires high quality, including its mechanical properties (such as ® tensile strength, tensile strength) and electrical properties (such as conductivity). In addition, an intervening material can be used for bonding to provide a good interface between the component and the conductor of the board, including adhesion, electrical conductivity, and the like. There are several ways to apply the pins. The HASL (hot gas solder leveling, limited by R〇HS environmental protection regulations) is now rarely used, chemical nickel, immersion gold technology, chemical nickel, Tender/immersion gold technology and other methods. The above methods are common in conventional manufacturing techniques, using a large amount of chemical infiltration, solvents and hazardous materials. The method of metal connection as described above, due to the reading material used in the circuit board, the electronic zero-shaped material, and the 29 200938042 connection of the two shafts, the price of the material (the oil (4)) material composition in the PCB manufacturing process The towel can be laid, so it can be adjusted according to the specific circuit and the needs of the brother to produce different kneading characteristics. According to one of the features of the present invention, the step in the sewing program is _ energizing on the special coffee. The function of demand. For example, some boards are completely; (· PCB of the noodle, no green lion, so no need to apply) or /, need to use organic solderability protection agent (Tonshi Namachi magnetic to do simple pin coating The advantage of the organic solderability protectant is that the surface of the conductor can be protected from oxidation prior to soldering. On the other hand, coating techniques that require more use (for example, chemical nickel/immersion gold coating technology, for example, B) A component of a chip printed circuit board (chip〇nb〇ard) or a ball grid array (10) should provide a corresponding pin coating. Embodiments of the present invention use the manufacturing station, such as the figure U-station 545 is used to coat the pins. If necessary, a ship-based material (Naina (4)) can also be used as a pin coating agent such as nano silver paste, nano gold paste or the like. In the method of the invention, the method of applying the pin can also tear the used pin and the conductive material, which is different depending on the target application of the lining. In addition, since the method of the present invention, the squama material can be used Knowing that PCB manufacturing technology is used differently, so it can be used Different materials form the pins, _ between the electronic components and the circuit board, providing a good material interface. In step 624, on both sides of the PCB or on the outermost surface of the surface, a solder mask layer is formed. The purpose of the flux mask is mainly on the PCB. The outermost surface is isolated from the exposed soft line (where no soldering or swording is required to form the flux connection. The fabrication of the flux mask helps to achieve the features of the present invention, but is not required for some purposes, Therefore, in the conventional PCB manufacturing method, the liquid developer type flux mask is applied to the circuit board by screen printing, and then dried in the oven, and then the circuit board is exposed to the light source for development and then removed by 200938042. The portion of the mask that is not exposed. Finally, the circuit to the mouth is baked to cure the remaining mask portion. According to an embodiment of the present invention, the solder screen is formed by application without using a mask, as described above. ^ sFFjLmm^m The thin layer (or similar material, which may contain color) forms the solder mask. For example, the dielectric fabrication station 530 can be used to form a solder mask to form the desired shape. The above method is defined by the manufacturer. Another method is to use a digital inkjet printing system at the flux mask manufacturing station, and in a manner of application, a highly accurate recording ink is inkjet printed to form a solder mask layer. The ink applied can provide similar characteristics to the solder mask used in the conventional manufacturing technique. For further information on this technique, reference is made to U.S. Patent No. 6,754,551. No method, you can also make a scale to make a scale. In 626 production - mark. The purpose of the mark is in the standard * component μ, for reference in the assembly. Through the usual method to mark the white component mark, so that manual The assembly is more stomach-friendly. The hybrid lin (four) function ϋ 'can provide this make-up point, and can be used to meet the needs of different _ use. In the Xi Zhilin 1 Ίχ Ίχ ' 糊糊糊修修修修修修修修修修修修修修修board. This step is completed by aging in a beta oven. 'The mark is made in one of the following ways. In one embodiment, the dielectric fabrication station 530' is used to form indicia with appropriate cuts. For example, if the film is directly written into the machine, it can be used to cure. * The colored version of the electrical material is preferably white, since white is used in conventional pCB manufactured towels. The dielectric material has a color. However, its merchandise can also be applied to the present invention, as long as it can be used in other (repairing the temperature). The inkjet printing in the actual shed is still a mark, and the inkjet printer should be properly adjusted and repaired in the system of the present invention. For example, the LGp_8〇9 digital marking printing system produced by the company Rehc_ of Israel is applicable. Another approach is to form indicia at a conductive manufacturing station, such as manufacturing station 545 of Figure 5. Other methods not described can also be used to form the mark. The technical synthesis of the surface minerals in step 620 is as follows: necessary to explain, in accordance with the preferred embodiment of the present invention, the steps are read in this step (the secret foot coating milk, the flux mask screen, the mark formation 626), Both the dielectric manufacturing station 530 and the scale manufacturing station 545 are used. Both of them are also applied to the production of circuit boards, and the steps of the extra machine can be executed. (In other words, in traditional manufacturing techniques, most of the specific money must be used to form marks. And forming a flux mask, etc. in a plurality of specific machines, in the present invention, a multi-purpose manufacturing station can be achieved. Therefore, this development can simplify the production process and improve performance. After the completion of step 62G, the PCB production has basically been completed, resulting in - PCB sister. If necessary, the rcB can be transported to the manufacturing station 57〇' for electrical testing at step 630. Use board inspection and / or testing ' to verify the madness and functionality of the board. The program mainly includes the use of applicable currents, etc., to verify its resistivity and conductivity. Testing can be performed using the abutments used in the relevant industries, such as flyhgProbetesters. In order for the test to achieve compatibility with various embodiments of the system of the present invention, certain adjustments may be necessary and other test functions required for the completed circuit board may be added. Of course, other verification procedures and other tests can be included in the different steps of the manufacturing machine of the present invention. If the resulting pcB passes the test, a fully functional KB blank board is obtained at 640. As shown in Fig. 5, the embodiment of the present invention can also integrate component assembly functions in the manufacturing system. This assembly step 650 can be performed in a modular manner so that the component assembly machine can be integrated into the system of the present invention. In this regard, the solder coating of the PCB is first performed at 652, and then the PCB is transferred to the flux coating station 565, 32 200938042 to apply the solder material required for component assembly at the relevant portion of the board (eg, the pin) (eg, Solder Paste > 'The coating of _ can be added _ _ _ _ mask and screen printing machine. For this purpose, an automated, high-positive flux coating machine can be used. Another way can use the system of the invention Other ploughing, such as the dielectric manufacturing station or the conductive manufacturing station, applies flux. The coating of the flux is based on the appropriate assembly data, and the data building is converted into a manufacturing process by the conversion and change procedure. Embodiments of the present invention may allow for a small number of surface mounting devices, pick & places machines (eg, mounter 575), and

據客_需求，可使用元件插孔^。另可以傳統之回焊爐（reflowoven)進行焊劑塗布656。在—實施例中，本發明之祕使麟製之回馳（或其他麵之⑴，塗挪•另—種方式則可在熟化站535進行焊劑塗布。例如在離實例中，該熟化站535即為可做回焊爐使用之爐體。第7A圖表示本發明另一實施例之pcB製造方法流程圖。第7a圖中之數步驟與第6圖之步驟雷同’但根據第7A圖所示之方法，該PCB並非以交互製作介電層〇與金屬層之方式製作，而是製作個別介電層，在各層次形成導電線路及導孔/孔洞，最後將各層接合。例如各不同層次可包括M已接合之介電小層，將各層加以接合，成為單-之介電層’但其中單面或雙面含有金屬線路分布其上。所形成^體可以 . 視為積層體’全部之積層利用中介介電物質（intermediate dielectric substance )(例如預次材料等），以雜或接合方式，形成完整之pCB 〇使用中介介電物質之目的有二：-是相鄰兩層（包括導孔/孔洞）之間的電氣中介導體’二是黏合相鄰兩層（與疊積有關）。中介介電物質層可以預先處理，以符 33 200938042 合周遭介電底板之形狀，例如可在中介介電層上形成開口，g己合相鄰層次上所開設之開口，其方法可使用雕刻、鑽孔、雷射鑽孔、固態自由成形等。中介介電物質之形成（第7A圖未圖示）可與介電層製作步驟平行進行，用以縮短全部製作時間。該程序需重複進行，因每層多層板體都包含多數中介介電層，作為介電層互相間之中介層。於700將適當之電路板稽702、客戶資料7〇4及組裝檔706 (可予省略）下載到操作員機台550。上述槽案之資料經過轉換及變更，成為一製造槽。該製造槽包含 Ο 一自由成形製造樓’用以提供製造PCB各步驟，例如以可熟^诚體、燒結粉末等形成之薄層，所需之指令。該製造權也包括應於何處形電材料、曝光時間、熟化及/或供烤時間等之描述。 ' 在710製作1板體，其方式為使用轉盤及本發明系統之數製造站。如前所述，步驟以於711準備一托盤開始。其後製作一介電層。該介電層可_任何快速模型製作技術’以介電材料形成’包括可輻射熟化液態組成物、可燒結介電粉末等。該介電層可加以熟化，包括以輻射照射、燒結粉末等方式，根據該_702所提供 β 之設計而定。其後可以勒于退火或烘烤，作為熟化之方法。在此步驟中該第一層介電層並不需在單-步财製成，而可透過熟化或將連續之液體、粉末等薄層暴細形成。重點在於：曜侧—層介電層，本實施例之方法即不咖一餘作 -之尺侧狀，其方树將起始材料依所需形狀熟化即可。在完成第-介電層後，辦驟714，在該介電層上形成導電線路。用來形成該導電層之方法有多種’包括各種直接寫入法或快物製作方法。根據本發明一 34 200938042 實施例’該導電線路是以印刷技術形成’例如以噴墨印刷技術。與該介電層相同，該導電線路並不需要在單一步驟中形成，而可以印刷多數薄層，層層相疊之方式形成。各導電層在製作相疊之下一層前，可予熟化或不熟化。在完成該導電線之後，可將該PCB退火或烘烤。於716進行導孔/孔洞金屬化。如前所述，導孔/孔洞金屬化可與金屬線路形細時進行。於718在該層上執行自動化光學檢驗（A〇I)，以驗證所形成之導電線路與製造槽之相關性。於步驟713判斷是否需製作其他廣次。如是。則重複步驟712、714、716及718。 ® 否則，執行步驟715，將個別所製得口以對準，重疊。可在各層提供確認記號’以便利將各層對準。將該疊積物熔合或接合成為一體，其方式可為習知之退火或接合技術。另-種方式默將各層蘭，以最終聚合步槪/或最終熟化步驟，將該結構完全熟化而硬化。完成此步驟後，程序進行與第6圖所述相同。第7B圖表示在第7A圖之製作方法下，將不同板體層次對準之實施例。第祀圖為侧視圖，只顯示相鄰兩層PCB之介電層7⑻A與7〇〇B，互相對準。兩層均以 ❹導電線路780覆蓋。兩層間以中介介電層72〇分隔。因為使用固態自由成形製造該介電層，在相鄰兩層間可製備微小形狀輔助物，以提供對準之依據，並提高正確率。 5輔助物了為形狀互相配合之突針槽74〇。對準輔助物可在資料變更階段加入到製造槽t，且只使用在介電層無導體及其他元件之部分。根縣發财同實細，可峨科同耕及獨娜，觀PCB。以下將詳細說明。如同對第Ϊ圖之說曰月’該主操作員機台15〇祕一中央計算單元，用以操作本發明系統之各種組成元件。該*央計算單元之架構顯示於第8圖，在以下說明中有時稱為系統管理員（SM800) ’主要缺如下元件：一製程管理員（pM8〇5)， 35 200938042 用以進行整體管理及監督製造流程(指製造程序)，_不肝程序之同步及協調、 '初期及後期之時間推移等。機器内通信介面⑽用以連結本發明系統之次級元件之部分或铸。在本發明中有些次級元件可具有獨立之製程恤者_介面（GUI)，建置_ ^記鮮祕用以儲存製成之演鞠⑽瓣行之統合，及其赌瓣所㈣辦等），以及其餘關資料，該記憶單元815可以儲存登入槽（㈣細）、製造辦之影像文件或其相關部分，可以預先規制或手動_ (例如’所使用之攝影機可提供兩According to the customer's request, the component jack ^ can be used. Flux coating 656 can also be performed with a conventional reflow oven. In an embodiment, the secret of the present invention allows for the hopping of the lining (or other aspects (1), coating, and other methods of flux coating at the curing station 535. For example, in the example, the curing station 535 That is, the furnace body which can be used for the reflow furnace. Fig. 7A is a flow chart showing the manufacturing method of the pcB according to another embodiment of the present invention. The steps in the figure 7a are the same as those in the sixth diagram, but according to the figure 7A In the method shown, the PCB is not fabricated by interposing a dielectric layer and a metal layer, but an individual dielectric layer is formed, and conductive lines and via holes/holes are formed at each level, and finally the layers are joined. For example, different levels The M-bonded dielectric layer may be included, and the layers are joined to form a single-dielectric layer 'but one or both sides of which contain a metal line distributed thereon. The formed body can be regarded as a laminated body' The laminate uses a dielectric material (such as a pre-material) to form a complete pCB in a hetero- or bonding manner. The purpose of using an intervening dielectric material is twofold: - two adjacent layers (including Hole/hole) The intervening dielectric intermediate conductor 'two is bonded to the adjacent two layers (related to the stacking). The intermediate dielectric material layer can be pre-processed to conform to the shape of the dielectric substrate, such as can be formed on the dielectric dielectric layer. The opening, g has been connected to the opening opened on the adjacent level, and the method can use engraving, drilling, laser drilling, solid state free forming, etc. The formation of the intermediate dielectric substance (not shown in Fig. 7A) can be combined with The electrical layer fabrication steps are performed in parallel to shorten the overall fabrication time. This procedure needs to be repeated as each layer of the multilayer body contains a plurality of dielectric layers as intervening layers between the dielectric layers. The board 702, the customer data 〇4, and the assembly file 706 (may be omitted) are downloaded to the operator machine 550. The data of the above-mentioned slot case is converted and changed to become a manufacturing slot. The manufacturing slot includes Ο a freeform manufacturing The floor 'is used to provide the steps required to manufacture the PCB, such as a thin layer formed of a mature body, sintered powder, etc. The manufacturing right also includes where the electrical material should be exposed, exposure time, ripening and/or Description of the roasting time, etc. 'One board is made in 710 by using the turntable and the number of manufacturing stations of the system of the present invention. As described above, the steps are to start preparing a tray at 711. Thereafter, a dielectric layer is fabricated. The dielectric layer can be formed by any rapid modeling technique 'forming a dielectric material' including a radiation curable liquid composition, a sinterable dielectric powder, etc. The dielectric layer can be cured, including irradiation with radiation, sintering of powder, etc. The method depends on the design of β provided by the _702. It can be followed by annealing or baking as a method of curing. In this step, the first dielectric layer does not need to be made in a single step. It can be formed by aging or thinning of a thin layer of liquid, powder, etc. The key point is: the 曜-layer dielectric layer, the method of this embodiment is not singularly--the side of the ruler, the square tree The starting material can be matured according to the desired shape. After the completion of the first dielectric layer, step 714 is performed to form a conductive trace on the dielectric layer. There are a variety of methods for forming the conductive layer, including various direct writing methods or fast material fabrication methods. According to the invention a 34 200938042 embodiment 'the conductive line is formed by printing technology', for example in ink jet printing technology. As with the dielectric layer, the conductive trace does not need to be formed in a single step, but a plurality of thin layers can be printed, and the layers are stacked one on another. Each of the conductive layers may be aged or not matured before being formed on the lower layer. After completing the conductive line, the PCB can be annealed or baked. Via/hole metallization was performed at 716. As previously mentioned, the via/hole metallization can be performed in a thin metal-to-metal shape. An automated optical inspection (A〇I) is performed on this layer at 718 to verify the dependence of the formed conductive traces on the fabrication trench. In step 713, it is determined whether it is necessary to make other wide times. If so. Then steps 712, 714, 716, and 718 are repeated. ® Otherwise, step 715 is performed to align and overlap the individual ports. A confirmation mark can be provided at each layer to facilitate alignment of the layers. The laminate is fused or joined in one piece by conventional annealing or joining techniques. Another way is to silently cure the layers in the final polymerization step/or final ripening step, and the structure is fully cured and hardened. After completing this step, the program proceeds as described in Figure 6. Fig. 7B shows an embodiment in which the different plate layers are aligned under the manufacturing method of Fig. 7A. The figure is a side view showing only the dielectric layers 7 (8) A and 7 〇〇 B of two adjacent PCBs aligned with each other. Both layers are covered by a meandering conductive line 780. The two layers are separated by an intermediate dielectric layer 72〇. Since the dielectric layer is fabricated using solid state free forming, minute shape aids can be prepared between adjacent layers to provide a basis for alignment and improve the accuracy. The 5 aids have a pin groove 74 that is shaped to match each other. The alignment aid can be added to the fabrication trench t during the data change phase and used only in the dielectric layer without conductors and other components. The roots of the county are rich in real money, and they can work together in the same field and view the PCB. The details will be explained below. As with the first diagram, the main operator machine 15 is a central computing unit for operating the various components of the system of the present invention. The architecture of the central computing unit is shown in Figure 8. In the following description, it is sometimes referred to as the system administrator (SM800). The main components are: the following components: a process administrator (pM8〇5), 35 200938042 for overall management. And supervise the manufacturing process (referring to the manufacturing process), the synchronization and coordination of the _ liver program, and the time lapse of the initial and late stages. The in-machine communication interface (10) is used to join portions or casts of the secondary components of the system of the present invention. In the present invention, some of the secondary components may have a separate GUI-interface (GUI), and the _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ ), and the remaining information, the memory unit 815 can store the login slot ((4) fine), the image file of the manufacturing office or its related parts, which can be pre-regulated or manually _ (for example, 'the camera used can provide two

種功能’包括專為内部製造辆為之影像處理及為產生製造文倾所為之纖理）。上述演繹法則可以用來支援一種或以上之電路w或一種或以上設計之平行 . 咖卿嶋衡蝴彻雜雜，嫌嫩蝴、材料容器之供應量、估計之尺寸變動（如有）、機械設計變動（例如金屬線路所用之纖形、導孔/孔洞形式 '熟化加熱通道、導電線狀厚度、各層#度）、提高導電係數（例如以添加方式）、電氣特性變動（可繼求使用者輸入額外之參數’例如作 .…率）等等⑽…撕通仏介面幻〇用以請求接收、遠端規制、各種工作仲 j等等如有乂要，本發明之系統另可包括外界或内部通信介面（實體介面或邏輯介面）。 • 鱗統管理員8〇〇可另咖立之控制與錯誤回復單元825，齡監督外界生產辦、處理及改正錯誤等。_操作員gui83() 姆製獅㈣、#输餐t、__㈣鬚樹、统計資料等’進订校正及製程設定等操作一維修_35可有別於該使用者〇_而 36 200938042 獨立設置，用以提供所有之操作員GUI之功能，以及更專業之規制面板，以產生系統元件及維修等級之登入報告書、錯誤報告書，並提供直接使用次級元件，以及即時監控或改變製程等等。通常而言，該系統管理員800管理並監督整體系統，並可由上述各種元件全部或一部組成，另可包括其他各種元件，均視需要而定。該系統管理員8〇〇也可支援製造請求先後排序，故可同時接收多數之請求。該系統雜貞蝴魏之餅，缺該巾央機械+， ® 至另一製造站。該中央職手可使用傳統讀器人，例如美國麻州ChelmsM之The function 'includes the image processing for the internal manufacturing of the vehicle and the production of the manufacturing text." The above deductive rules can be used to support one or more circuits w or one or more of the parallel designs. The clerk is smothered, the supply of the material container, the estimated dimensional change (if any), machinery Design changes (such as the shape of the fiber used in the metal circuit, the shape of the guide hole / hole 'curing the heating channel, the thickness of the conductive line, the thickness of each layer # degrees), improving the conductivity (for example, by adding), changes in electrical characteristics (can continue to seek users Input additional parameters 'for example... rate), etc. (10)... tear through interface illusion for request reception, remote regulation, various jobs, etc. If necessary, the system of the present invention may additionally include the outside world or Internal communication interface (physical interface or logical interface). • The squad administrator 8 can control the error and error response unit 825, supervise the outside production, handle and correct errors. _ Operator gui83() Mushi lion (4), #送餐t, __(4) Shoushu, statistics, etc. 'Order correction and process setting operation, etc. _35 can be different from the user 〇 _ and 36 200938042 Independent setting , to provide all the functions of the operator GUI, as well as more professional regulatory panels to generate system components and maintenance level login reports, error reports, and provide direct use of secondary components, as well as immediate monitoring or change process, etc. Wait. In general, the system administrator 800 manages and supervises the overall system and may be comprised of all or a combination of the various components described above, as well as various other components, as desired. The system administrator can also support the ordering of manufacturing requests, so that most requests can be received at the same time. The system is a chowder of Wei's cake, which lacks the towel machine +, ® to another manufacturing station. The central staff can use traditional readers, such as ChelmsM, Massachusetts, USA.

BrroksAutomation公司所製作之RdianceATR常壓機器人，或美國加州之 EpsonRobots公司所製作之加版脱型常壓機器人。於第认圖之實施例中，該中央機械手一轉盤110、可延伸f 115及托盤架12〇。該轉盤可以是任何習知高準確度之轉動盤，例如翻·^之恤―公司所製作之尺識，論實際完成之架構如何，該中央機械手均需能準確將托盤放置於各製造站中。要將托盤準確放置，可由加強托盤本身之設計著手〇由於托盤是在各製造站中移動，故麵各職峨適⑽編，财細㈣構及該嶋才诠…一也…_The RdianceATR atmospheric robot manufactured by Brroks Automation, or the extended-type atmospheric compressor manufactured by Epson Robots of California, USA. In the embodiment of the first drawing, the central robot has a turntable 110, an extendable f 115 and a tray holder 12 。. The turntable can be any conventionally high-precision rotating disc, such as a t-shirt of the company, which is made by the company. Regarding the actual structure, the central manipulator needs to accurately place the pallet at each manufacturing station. in. To accurately place the pallet, it can be designed by strengthening the design of the pallet itself. Since the pallet is moved in each manufacturing station, it is suitable for each job (10), and the financial (4) structure and the 嶋才才... one...

不同製造站間搬送時’更是如此。在本發明一第一種需確保托盤正確對準製造站之工作表淺將其固定在製造站之工作表面。目前p知夕 ‘對位’均為重要考慮’特別在將電路板在一實施例中提供兩種托盤對準之精確度。良面。於此情形，可使用現有技術蝴冓，固定方式、真空等方式。目前已知^_定方式包括電顧定方式、氣 37 200938042 補也可提供雜咖能撼條細，綱對準之功月匕詳口之自將第一層暴露於介電製造站之後，該暴露之⑽相對於該托盤之座 ‘必姐疋’亦即，rcB不得在托盤内有任何移動。此外，該⑽於生產多層雙面PCB時需經翻轉。因此該對準機構需能確保⑽翻雛，仍能與該托盤在平面上形成適當之對位，以利後續加工。 _本義—實_，固定rcB之方式乃是使贿作減上特錄置所提供之真工吸孔„亥真空吸孔是由連接到部分或约^製造站，以及該轉盤之中央真空系統 β 所驅動。操作該真空系統，即可將該PCB固定於該托盤。該真空吸孔可以活塞封閉，用以維持製絲面平坦，侧是在製料―介電層時。_其他細輯替代，以固疋托盤，例如糊側箝，均在本發明範圍之内。也可使用電腦視覺對位系統，建 ’在製造減於製造關移鱗，如該pCB在托翻發生位移，即可即時聽。本發明之優點，特別是第6圖所示之製程之優點，祕飾製造站均使用施加型雜觸製程’故可免除使用印刷機、罩幕等，可以簡化對位偏差之紅，且«透過倾層奴目献改，修触記狀麟，即可完成。躺著之優點 ® 為，在偵測到托盤對位偏差時’並不需重新以機械方式置放。在本發曰月中，於侦測到托盤對位偏差時’該系統管理員可將下一層次之座標，以適當量作平移，以補償該對位偏差。上获其赠點餅本_之方法能娜統PCB製作程序，提供更有利之特性。不必如傳統技術，需對所有層次一次進行機械式之對位。特別是本發明之系統可鱗層（甚至每一小層）製作時，均進行對位，故可避免累積誤差，並可將多層、特定功能之電路板，以高度精殘之方式製作。第9圖為本發明一實施例之托盤之上視圖，該托盤用來製造具有支撑框之 38 200938042 PCB。該支禮框提供數項優點，包括容易移動、容易對準、容易離型、以及容易翻轉，均如以下所述。該PCB 920形成在托盤900之中央部分，並包括支撑框元件925，該支撲框元件925於PCB製作完成後必須加以移除。該支撐框元件925因使用機械This is especially true when transporting between different manufacturing stations. In the first aspect of the invention, it is necessary to ensure that the tray is properly aligned with the work table of the manufacturing station to secure it to the work surface of the manufacturing station. At present, the 'alignment' is an important consideration, especially in the case where the circuit board provides the accuracy of two kinds of tray alignment in one embodiment. Good face. In this case, the prior art can be used, such as a butterfly, a fixed method, a vacuum, or the like. At present, it is known that the method of determining the method includes the electric setting method, and the gas 37 200938042 can also provide the fine coffee, and the outline of the work is after the first layer is exposed to the dielectric manufacturing station. The exposure (10) is relative to the seat of the tray, which means that rcB must not have any movement in the tray. In addition, the (10) needs to be flipped when producing a multilayer double-sided PCB. Therefore, the alignment mechanism needs to be able to ensure (10) ploughing and still form an appropriate alignment with the tray on the flat surface for subsequent processing. _本义—实_, the way to fix rcB is to make the bribe a reduction in the real suction hole provided by the special record. The vacuum suction hole is connected to the part or about the manufacturing station, and the central vacuum system of the turntable Driven by β. The vacuum system can be used to fix the PCB to the tray. The vacuum suction hole can be closed by a piston to keep the flat surface flat and the side is in the material-dielectric layer. Alternatively, a solid tray, such as a paste side clamp, is within the scope of the present invention. A computer vision alignment system can also be used, which is constructed to reduce the scale of the manufacturing, such as the displacement of the pCB in the tray. It can be heard immediately. The advantages of the present invention, especially the advantages of the process shown in Fig. 6, the secret manufacturing station uses the application type hetero-touch process, so that the use of the printing machine, the mask, etc. can be dispensed with, and the alignment deviation can be simplified. Red, and «through the sloping slaves, the repairs can be completed, and the advantages of lying down are: when detecting the deviation of the pallet alignment, it does not need to be mechanically placed again. In the middle of the month, when the pallet alignment deviation was detected, the system The administrator can shift the coordinates of the next level to the appropriate amount to compensate for the deviation of the alignment. The method of giving the gift to the cake can provide more favorable features. It does not have to be as traditional technology. It is necessary to perform mechanical alignment on all levels at a time. In particular, the system of the present invention can be aligned when it is made of scales (even every small layer), so that cumulative errors can be avoided and multiple layers and specific functions can be The circuit board is fabricated in a highly sophisticated manner. Figure 9 is a top view of a tray for manufacturing a support frame 38 200938042 PCB. The gift box provides several advantages, including Easy to move, easy to align, easy to release, and easy to flip, as described below. The PCB 920 is formed in a central portion of the tray 900 and includes a support frame member 925 that is fabricated after the PCB is completed. Must be removed. The support frame element 925 is mechanically used

式元件以將該PCB固定接觸於該支撐框元件925，使得該PCB更容易移動並更容易固定。該機械式固定元件可以配合固定之模型尺寸設計，而不受所製造之pcB實際尺寸影響。例如可以在該支推框下方，而不在整個製作表面上，形成真空吸孔。在此種設計下該支樓框元件之尺寸及位置將與PCB相配合，而不受pcB尺寸影響。此外，連結元件935將該PCB連結於支樓框元件925 〇如第9圖所示’可以製作一對準罩幕93〇於支擇框奶之上方。對準罩幕93〇可以形成於各介電層上表面。於製作第一介電層時，則可另在線路板鱗後，於其底面另外製作對準罩幕，作為對準之用。該對準//基準罩幕同位置’其形狀則無限制。重要的是在習知技術當中所用來對半雜製造做整體對更是如此。上述罩幕之製準之技術’也可用於本發明。特別在該介電層為透明時，作’可以使用在托盤上刻晝固定之對準圖形’而使第一層之介電材料因而形成相對應之形狀’而在底表面形成對準罩幕。由於pcB之幾何形狀隨所輸入之資料而變動’上述對準罩幕最_成於不致影響製造之區域，例如不應與支揮框925重疊。另-種方式是將第-介電層底部之解罩幕，利用可熔性材料先形成支撑構件，在形成對準罩幕之形狀。而在彻—實婦，則峨路板上特定之資料點作為對準之依據’.基準_或其他電路元件，即不需製作對準罩幕。該支樓框也可設計成使得該電路板之旋轉或翻轉更為容易。例如可以在支撐框元件之側邊形成旋轉支職座’因而可以利用相韻化錢觀轉電路板。第的 39 200938042 圖顯示本發明一實施例之翻轉機樣结構圖。第10圖中之轉機構可倾资轉盤麵之頂面，或位於指定之旋轉工作轉等。在本實施例中，於支推框_彡$插座並以主動銷插入插座中。該插銷可沿圖中z軸方向移動，如圖中雙箭頭所示，並可轉動，如圖中向内箭頭所示。根據本發明-實施例’該托盤本身需以鎌作扣板之適當材辦成。例如使用SU-8或其衍生物作為介電材料時，托盤之材料必須與樹脂之化學物性相容，並需能耐受任何退火或烘烤過程中之溫度變化。此外也料慮將卿黏著到托盤之技 β 術，以達成將電路板保持於正確位置之目的。另-方面，如黏度太高則使電路板完全無法離型。因《各製作階段選擇正確娜時，需將材料黏性列入考慮。將PCB從托盤上脫離的方法有許多種。托盤之材料需能與介電材料自然黏附。 ' 才能在將薄層、低長寬比模型（例如PCB)脫離時，可容易達成。離型之方法有數 - 種。根據本發明一實施例，係使用機械方式將PCB自脫盤上脫離。可使用德财式包括第K)圖所示之方式。但僅使用其中一種即可。上述機械方式包括使用真空吸孔’但需以相反方向操作。詳言之，將真空泵細〇連結到托盤上形成之真空吸孔 ® 1G35 ’在娜嫩板時，操條浦咖喻扯在將電路板移除時，則以相反方式操，峨絲壓，轉_雜。帛⑴騎齡之^纖械方式則為頂針。纖解她漸_嫩頂_。_ —頂咖_將頂 •針腦頂高，通過托盤娜上之孔洞麵。該頂針與電路板接觸，並將電路板頂雜盤’鱗酬祕即可帶峨雜。在«—f 大之陣列，晴質上形成—針床，帶動該電路板。另—種_可姻上方真空產生器圆，以由上方帶動電路板向上移動。該真空產生器可單獨帶動電路板二 200938042 可與泵浦麵或與撕1G55 —起帶_路& 〇另一種幫助將PCB從托盤上_之__ ^ ^ W«PCB 〇 ^ 1〇 ^ ^ 熱器元件跡用以對托盤娜加熱，幫助電路板離型。也可在托盤上舖設一製作層，例如耐綸（η細）層，在該雜耐綸層上軸•在移除輸後，只需將耐綸層由電路板上撕下即可。如不使用耐綸，可在托盤上以傭、塗布、印刷 ❹ 等方式，塗布-離型材料層或可熔性材料層，作為起始層在於該層上方製侧Β。咖_後，可娜熱、化學或其他方法峨_層移除，而概該完成之電路板。-般而言該離型層讀料可以提讎附於該介電材料之黏度，錄度可以夂程序控制’例如透過不同溫度條件，使用離型溶液等方式控制。例如可炫性壤即為適當之離型層材料。第10圖揭示另-種方式。係將魏盤作成兩部分，而分別旋轉，如圖中箭頭r 所示，以將托盤從電路板上裂開。在裂開⑽程中可使用真空產生器麵。也可使用其域械方法，例如使用_貢桿將電路板撬離。其方式為將槓桿頂住該支撲框。第11圖表示本發明一實施例之資料雛及改變方法流程圖。在上載（由本地電腦或由網路上載）含有電路及機械製造#料（CAD及其蹄料格式）之龍播（例如為Gerber#额錄PCB t作所使狀櫞赋），並輸^^曝作資料之後，即開始進行軟體轉換。系統管理者可以根據習知之DFM/DFA (由設計到生產/由〇又。十至】組裝）程序’加以修正’以產生簡易之隨插即用介面，以進行一般之Dpj^j^pA 製程，與習知PCB製作技術相同。該系統管理者也可以便利之控制及轉換方式，將非電腦輔助設計資料轉換到系統中。資料包括控制電阻資料、導體厚度、介電層厚 200938042 度及其他。在某些實例中’可將設計資料（例如設計路由播），而非製造資料，上載到本發明之系統。在此階段，於其後階賊需之資料均可產生出來，並轉換成適當之格式’以在製程中各步驟當中，提供相關之製造站使用。本發明之系統可以將習知技術之pCB製造樓（以及將來新技術所使用之其傭案），織成本發明各步驟或工作站所需之資料格式。不但如此，本發明之系統也可將所收到之非電腦輔助設計資料’轉換成各子系、麟需之相麟入資料格式。例如 "電層厚度值（通f是在PCB設計檔内1始資料），可與二維細輔助設計資料 © 所描述之幾何形狀(由各層Gerber檔所提供)相結合，產生三維電腦輔助設計資料，以供介電製造站使用。其後對雛所得之製造檔，進行資料變更步驟。資料變更步驟與前述資料賴步驟不同。資料變更步驟用以改變原始製造檔中，對於實際尺寸及特性之定義，而非僅只變找料格如&。糊相更冑料之，而非改變資料本身。資料變更所產生之PCB製造檀’其内容與原始製造播相較，則有些許變化，例如改變尺寸、形狀。作資料變更之目的主要在使得製造完成之電路板，與習知製造方法 ® 所製得之相同電路板，具有相關功能性及表現。作資料變更時所輸入之標案為標準之PCB製造槽，内容與原始取得之資料（例如各層、接腳、線路之機械座標、材料、目標參數及其他資料）相同。當然資料變更步驟中所輸入之資料，也可使用與原始製造權不同之格式或資料呈現方式，凡此 ' 均在本發明範圍之内。換言之可在資料變更前進行資料轉換，用以改變原始製造權之格式。而在資料轉換時該製造播會經過變更（指改變資料内容，而非如資料轉換，僅改變其外觀），用以反映本發明製程之需求’並使製得之pCB之功能特性，與輸 42 200938042 入之製造撕描述之功能特性（使用標準大量生產製程所製得者）相同。檔之修正，可針對各層，並依據各層所含之圖形資料分別為之。但某些修正則可針驗PCB層’甚至所有層次，所形成構组為之。所得之功能性卿在功能上（指 PCB最終之用途或應用）験大量生紅PCB，具有相關性，其外部機械尺寸綠具有密切之相關性。以下將針對本發明實施例中’不同製程步驟，說明其詳細之實例。本發明之系統可在單—步驟製作多數rcB ’包括多數具相同設計之PCB，或多數設計不同之 ❹ PCB，只要剩餘表面積許可。例如在30x30 cm之有效製程面積，即可在單一製作循環中，製作36個Wcm之電路板。所完成之電路板只要經過簡易之分割程序即可將完成之PCB互相分離。另-種方式則使用容侧除之支架，形成糊別板體之 • 間’而在製作完成後容易加以移除。另一種方法則在各製造站提供可支援多數托盤之裝置，而可同時進行多數托盤之平行處理。如均述’例如於第6圖中，本發明之製程支援無底板製法，電路板是「從零购」，故不使職板或積層製程。與f知製造方法概，本發明上述優點為重要突〇破，並將製程簡化’提高正確率（無需儲存個別層次，中介層，無需解、疊積）。卜因為使用SSF及直接寫入技術製造電路板，更可達成高準確度，並可縮短製作極為複雜多層之PCB ’缺脳（高密度錢）pCB之製作。當完成電路板最後一層製作時，製作即為完成。換言4發明之方法是以一定轉初製作電路板。製 - ^各層謂序為由下向上（b〇tt〇m_up)之方式，先製作下方層次在製作上方之層餘此類推。不過本發明製作各層獨序也可根據其序步驟（例如導電線路、選用之對準及對位方法）、之特殊麵、客戶設計上之特性、及其脑晒 43 200938042 素，而加以改變。對於決定如何製造PCB (指製造各層之次序）之說明，只是作為範例，如遇有特定設計’仍可加以改變。當然每一循環會與系統中其他平行進行之步驟，作時間上之配合，以縮短整體製作時間。介電層是根據麵所得之軟體資料製作，完成一具有所需幾何形狀之介電層空板。空板意指僅有介電層，其上並無形成或裝置導體或電氣元件。特別是各層之製作缺：製成各層形狀（包括X、γ、Z座標）、形成孔洞（導孔、填充孔、微孔洞、透孔）、形成積準透孔及其他所需之機械資源、導體製作步驟之機械預製作（例— 〇成雜及船浴，以埋入導献接腳）、對準記號、對準基準點、以及任何其他另外需要讀械性資源/辅助/構造（例如上述之支樓框)。如上所述，該介電層是以SFF或直接寫入法所製作。該介電製造站先由一製作 • 機取雜’ _職_各躺t魏體或粉諸料，麟此建立-纟列層次截 • 面之模型。因此並不需使用鑽孔。由於鑽孔乃是傳統PCB製造方法中，最主要、昂貴且成為麵之步驟，本發日月使用SFF製作介電層，成為本發明方法主要節省時間、治具及成本之主要因素之一。 ® 娜本發明之實補，齡f層是侧—制斯之倾材料製作。該材料為單-或複合材料溶液，麟別適伽在本發明之介電層製作技術。根據本發明一實例，該介電層蝴4係使用su_8或su_8之改良衍生物，例如含有奈米複合過遽器（nanocomposite filter)之SU-8。以下輕介電膽作材料之主要重要特性： a) 需能細吏用在介電層製作系献技術，特別在符合所需之準確度、解析度、處理速度、黏度、平坦化品質及平坦化時間、熟化後收縮等。 b) 具有it當你料介面，特別是關於她合材料之黏附與連結。特別在本發”， 44 200938042 因為電路板為疊層結構，該介電層需對《材料，以及對介電材料本身，提供良好之黏性。 C)需能耐受本發明製作流程中各步驟之條件。同時也需能耐受可能之元件組襄及鲜接程序，例如其材料特性包括較高找璃化溫度(Tg)，才能耐受常用續接溫度’該溫度通常達到250。(：。 Φ所提供之電氣、電磁、熱學、機械等特性，需與習知印刷電路板製造技術所製成之介電材料’具高度侧性。當然，所述之相關性也會受本個方法~使帛— © 電機辨。關於在本_ PCB製狀導電碰，顺之詳細·，讀者可參閱工業標準IPC_4lxx，該標準對於不同目標用途之不同型態材料，有詳細之驗說明。例如MM101即說明硬式多層電路板之基底材料之規格。 • e)如有可能，應無毒性，且符合環保，最好為可回收。 ' 合’峨雜雜。條可使用氧化銅作為介電層改良劑，加膽介電材料中，用以提高覆蓋金屬等之散熱性、金屬化剝離強度。另一實例為使用奈米顆粒以提高材料性能，例如抗熱性或熱膨服系 ^ 數。此外將該介電材料與其他組成物混合之時機，可在材料生產時（例如，可以將此合後料裝料*1£内）’或將最終洲於施加之前，在系、納與其他組成物混合 (於此情形，該純需財雜容H，以祕該合之介電材料及其他組成物）。 • 根據本發明-實施例，係使用薄膜直接寫入製程形成該介電層。於步驟開始時 - 先在托盤内之離型層(如有使用)上’塗敷-致、穩定及平坦·^谢脂層(例如SU-8)。塗層之厚度在每-單層可介於數毫米至數百毫米之間，因而可在-塗布循環中形成典型之多層板PCB之介電層。當然，如有必要，也可經由數循環製造具有數薄層之 45 200938042 介電層0 塗布數醋之方法有多種。例如傳統之旋模塗布法，即可適用在本發明。喷麗塗布器可用以塗布平坦且一致之不同材料層，具有高度精確度，也可用於本案。此外因SU-8之黏度分布極廣，故可加以調整，以適應不同應用需求，因此可以使用喷墨製程，以塗布一致之SU-8層，為另一種選擇。例如使用M3D® (無罩幕介米級材料塗布機）系統。該產品為美國新墨西哥州Albuquerque之Optomec公司所生產。重要的是，本發明之系統如使用整合之介電層及導電層製造站（如第4圖所示），則 ❹ 喷墨機或喷墨庫（^etbank)，齡塗布介電物質，晴朗另一喷墨機或喷墨庫用以塗布導電材料。所塗布之導電物質隨後暴露於輻射之下。例如,如該介電物質為樹脂(例如 SU-8) ’則可暴露於紫外線下，進行聚合。本發明系統當中所使用之照射方法，可不使用罩幕，也侧使治具，之照㈣迦秦祕鱗描方式 (赠^vector纖）、整合掃描方式細聊及細描方式（離—。The component is in fixed contact with the PCB to the support frame member 925, making the PCB easier to move and easier to fix. The mechanical fastening element can be designed to fit a fixed model size without being affected by the actual size of the pcB being manufactured. For example, a vacuum suction hole can be formed below the push frame instead of the entire production surface. In this design, the size and position of the frame member will be matched to the PCB without being affected by the pcB size. In addition, the connecting member 935 connects the PCB to the branch frame member 925. As shown in Fig. 9, an alignment mask 93 can be formed over the replacement frame milk. The alignment mask 93 can be formed on the upper surface of each dielectric layer. When the first dielectric layer is fabricated, an alignment mask can be additionally formed on the bottom surface of the wiring board for alignment. The alignment//reference mask has the same position as its position without limitation. What is important is that it is used in the prior art to make a holistic pair of semi-hybrid manufacturing. The technique of the above-described masking can also be used in the present invention. Particularly when the dielectric layer is transparent, the dielectric material of the first layer can be formed into a corresponding shape by using an alignment pattern fixed on the tray to form a corresponding mask on the bottom surface. . Since the geometry of the pcB varies with the input data, the above-mentioned alignment mask is most likely to be in an area that does not affect manufacturing, for example, should not overlap with the support frame 925. Another way is to form a support member by using a fusible material to form a support mask at the bottom of the first dielectric layer to form a shape of the alignment mask. In the case of a thorough woman, the specific data points on the board are used as the basis for the alignment. _ or other circuit components, that is, no alignment mask is required. The truss frame can also be designed to make it easier to rotate or flip the board. For example, a rotating branch can be formed on the side of the support frame member, and thus the circuit board can be utilized. No. 39 200938042 The figure shows a structure diagram of a turning machine according to an embodiment of the present invention. The turning mechanism in Fig. 10 can be used to pour the top surface of the turntable surface, or to rotate at a designated rotation. In this embodiment, the socket is pushed into the socket by the push pin. The pin can be moved in the z-axis direction of the figure, as indicated by the double arrow in the figure, and can be rotated, as indicated by the inward arrow in the figure. According to the present invention - the embodiment of the tray itself is made of a suitable material for the gusset plate. For example, when SU-8 or a derivative thereof is used as the dielectric material, the material of the tray must be compatible with the chemical properties of the resin and must withstand any temperature change during annealing or baking. In addition, it is also expected to adhere the slab to the tray to achieve the purpose of keeping the board in the correct position. On the other hand, if the viscosity is too high, the board can not be completely removed. Because the selection of the correct phase at each stage of production, the material viscosity should be considered. There are many ways to detach the PCB from the tray. The material of the tray needs to be able to adhere naturally to the dielectric material. ' can be easily achieved when thin layers, low aspect ratio models (such as PCB) are detached. There are several ways to release the type. According to an embodiment of the invention, the PCB is mechanically detached from the detachable disk. You can use the method shown in Figure K). But just use one of them. The above mechanical means involves the use of vacuum suction holes but needs to be operated in the opposite direction. In detail, the vacuum pump is connected to the vacuum suction hole formed by the tray. 1G35 'When the nano-plate is used, when the circuit board is removed, the opposite method is used, and the wire is pressed. Turn _ mixed.帛 (1) The riding method is the thimble. Fibre her gradually _ tender top _. _ — Top coffee _ will top • The needle head is high, passing through the hole on the tray. The thimble is in contact with the circuit board, and the top of the circuit board can be noisy. In the array of «-f, the formation of a needle bed on the sunny, driving the board. Another kind of _ can be married above the vacuum generator circle to drive the board up from above. The vacuum generator can be driven separately by the board 2 200938042 can be used with the pump face or with the tear 1G55 - _ road & 〇 another help to PCB from the tray _ __ ^ ^ W « PCB 〇 ^ 1 〇 ^ ^ The heater component trace is used to heat the tray to help the board to be out of shape. It is also possible to lay a production layer on the tray, for example a nylon (η fine) layer on the shaft of the hybrid nylon layer. After the removal, the nylon layer only needs to be torn off the circuit board. If nylon is not used, a layer of release-release material or a layer of fusible material may be applied on the tray by means of maid, coating, printing, etc., as a starting layer on the side of the layer. After the coffee _, Kona heat, chemical or other methods 峨 _ layer removed, and the board should be completed. Generally, the release layer reading material can improve the viscosity attached to the dielectric material, and the recording can be controlled by a program, for example, by using different temperature conditions and using a release solution. For example, a flexible soil is a suitable release layer material. Figure 10 reveals another way. The Wei disk is made into two parts and rotated separately, as indicated by the arrow r in the figure, to break the tray from the circuit board. A vacuum generator face can be used in the split (10) process. It is also possible to use a mechanical method, such as using a gong rod to separate the board. The way is to hold the lever against the frame. Figure 11 is a flow chart showing the data source and the changing method of an embodiment of the present invention. Uploaded (from a local computer or uploaded by the network) containing the circuit and mechanical manufacturing #CAD (CAD and its shoe format) dragon broadcast (for example, Gerber# for the record of the PCB), and lose ^ ^ After exposure to the data, the software conversion begins. The system administrator can modify the DFM/DFA (from design to production/from 。 to ten) assembly to create a simple plug-and-play interface for general Dpj^j^pA processes. , the same as the traditional PCB production technology. The system administrator can also easily control and convert the non-computer-aided design data into the system. The data includes control resistor data, conductor thickness, dielectric layer thickness of 200938042 degrees and others. In some instances, design data (e.g., design routing), rather than manufacturing materials, may be uploaded to the system of the present invention. At this stage, the information required by the subsequent thief can be generated and converted into the appropriate format to provide the relevant manufacturing station for use in each step of the process. The system of the present invention can be used to fabricate the pCB manufacturing building of the prior art (and its commission for future new technologies) into the data format required for each step or workstation of the invention. Moreover, the system of the present invention can also convert the received non-computer-aided design data into a data format of each sub-system and Lin. For example, "electric layer thickness value (passing f is the data in the PCB design file), can be combined with the geometry described by the 2D fine auxiliary design data © (provided by the Gerber file) to generate 3D computer aid Design information for use at dielectric manufacturing stations. Thereafter, the data change step is performed on the manufacturing file obtained from the chick. The data change procedure is different from the previous data. The data change step is used to change the definition of the actual size and characteristics in the original manufacturing file, rather than just changing the search grid such as & It’s more ambiguous than changing the data itself. PCB manufacturing produced by data changes, its content is slightly different from the original manufacturing broadcast, such as changing size and shape. The purpose of the data change is mainly to make the finished circuit board and the same circuit board made by the conventional manufacturing method ® have relevant functions and performance. The standard input for the data change is the standard PCB manufacturing slot, and the content is the same as the original data (such as the mechanical coordinates, materials, target parameters and other materials of each layer, pin, line). Of course, the data entered in the data change step may also be in a format or data presentation different from the original manufacturing right, and all of them are within the scope of the present invention. In other words, data conversion can be performed before the data is changed to change the format of the original manufacturing rights. In the data conversion, the production broadcast is changed (refer to changing the content of the data, instead of changing the appearance of the data, to reflect the requirements of the process of the invention) and to make the functional characteristics of the produced pCB, and lose 42 200938042 The functional characteristics of the manufacturing tear-off description (produced by the standard mass production process) are the same. The correction of the file can be made for each layer and according to the graphic data contained in each layer. However, some corrections can be made to verify the PCB layer' or even all levels. The resulting functional clerk is functionally (referred to as the final use or application of the PCB), has a large number of red PCBs, is related, and its external mechanical size green has a close correlation. Detailed examples of the different process steps will be described below in the embodiments of the present invention. The system of the present invention can produce a majority of rcB's in a single-step process, including most PCBs of the same design, or a majority of different designs of ❹ PCB, as long as the remaining surface area permits. For example, in an effective process area of 30 x 30 cm, 36 Wcm boards can be fabricated in a single production cycle. The completed board can be separated from each other by a simple segmentation process. Another way is to use the bracket on the side to form the gap between the sheets and the parts are easy to remove after the production is completed. In another method, a device that supports a plurality of trays is provided at each manufacturing station, and parallel processing of most trays can be performed at the same time. As described above, for example, in the sixth drawing, the process support of the present invention supports the substrateless method, and the circuit board is "purchased from zero", so that the job board or the lamination process is not performed. In view of the manufacturing method, the above advantages of the present invention are important and sudden, and the process is simplified to improve the accuracy rate (no need to store individual levels, interposer, no solution, stacking). Because of the use of SSF and direct write technology to manufacture circuit boards, high accuracy can be achieved, and the production of extremely complex multi-layer PCB 'lack of high density money' pCB can be shortened. When the final layer of the board is completed, the production is complete. In other words, the method of the invention is to make a circuit board at a certain beginning. System - ^ The predicate of each layer is from bottom to top (b〇tt〇m_up), first make the lower level above the production layer. However, the order of the layers of the present invention can also be changed according to its sequence steps (such as conductive lines, alignment and alignment methods), special aspects, customer design characteristics, and its brain. The description of how to make a PCB (refer to the order in which the layers are made) is only an example, and can be changed if a specific design is encountered. Of course, each cycle will be combined with other steps in the system to make time constraints to shorten the overall production time. The dielectric layer is fabricated from the software data obtained from the surface to complete a dielectric layer blank having the desired geometry. An empty plate means that there is only a dielectric layer on which no conductors or electrical components are formed or device. In particular, the production of each layer is lacking: forming the shape of each layer (including X, γ, Z coordinates), forming holes (guide holes, filling holes, micro holes, through holes), forming accurate through holes and other required mechanical resources. Mechanical prefabrication of conductor fabrication steps (eg - 〇及船船船船船 , 埋埋埋埋埋埋 ) ) ) ) ) ) ) ) ) ) 、、、、、、、、、、、、对准对准对准对准对准对准对准对准For example, the above-mentioned branch frame). As described above, the dielectric layer is fabricated by SFF or direct writing. The dielectric manufacturing station first adopts a production machine to take the miscellaneous ' _ jobs _ each lying t-body or powder materials, and the lining establishes a model of the 层次层次层次。。. Therefore no drilling is required. Since the drilling is the most important, expensive and versatile step in the conventional PCB manufacturing method, the use of SFF to fabricate the dielectric layer in the present day and month has become one of the main factors for saving time, fixture and cost in the method of the present invention. ® Na is the real complement of the invention, the age f layer is made of side-made material. The material is a single- or composite solution, and the dielectric layer fabrication technique of the present invention. According to an embodiment of the invention, the dielectric layer 4 is a modified derivative of su_8 or su_8, such as SU-8 containing a nanocomposite filter. The following important characteristics of the light dielectric bile material: a) need to be able to be used in the dielectric layer fabrication technology, especially in accordance with the required accuracy, resolution, processing speed, viscosity, flattening quality and flat Time, shrinkage after ripening, etc. b) Have it when you interface, especially regarding the adhesion and bonding of her materials. Especially in this issue", 44 200938042 Because the circuit board is a laminated structure, the dielectric layer needs to be able to withstand the "material, and the dielectric material itself, to provide good adhesion. C) needs to be able to withstand the various processes in the production process of the present invention. The conditions of the step. At the same time, it is also necessary to withstand the possible component group and the fresh connection procedure, for example, its material properties include higher glass-forming temperature (Tg) to withstand the usual continuous temperature 'this temperature usually reaches 250. The electrical, electromagnetic, thermal, mechanical and other characteristics provided by Φ need to be highly lateral with the dielectric material made by the conventional printed circuit board manufacturing technology. Of course, the correlation is also affected by this Method ~ Make 帛 - © Motor Identification. For details on this _ PCB conductive contact, please refer to the industry standard IPC_4lxx, which has detailed descriptions for different types of materials for different purposes. For example MM101 is the specification of the base material of the hard multi-layer circuit board. • e) If possible, it should be non-toxic and environmentally friendly, preferably recyclable. 'Combined' 。。。可可可可可可可可可可可可Modifier In the fused dielectric material, it is used to improve heat dissipation and metallization peel strength of the covering metal, etc. Another example is to use nano granules to improve material properties, such as heat resistance or thermal expansion. The timing of mixing the dielectric material with other components can be mixed at the time of material production (for example, can be filled within *1 £) or the final can be mixed with other components before application. (In this case, the pure need for the capacitor H, to the secret dielectric material and other compositions.) • According to the present invention - an embodiment, the dielectric layer is formed using a thin film direct writing process. - Apply 'coating, stabilizing and flatting · ^ grease layer (such as SU-8) on the release layer (if used) in the tray. The thickness of the coating can be several millimeters per layer Between hundreds of millimeters, a dielectric layer of a typical multilayer board PCB can be formed in a coating cycle. Of course, if necessary, a number of thin layers of 45 200938042 dielectric layer 0 can be fabricated via several cycles. There are many ways to vinegar, such as the traditional rotary coating method, ie It is suitable for use in the present invention. The spray applicator can be used to coat flat and uniform layers of different materials with high precision, and can also be used in the present case. In addition, because of the wide viscosity distribution of SU-8, it can be adjusted to suit different applications. The need to use an inkjet process to coat a consistent SU-8 layer is another option, such as the M3D® (Unmasked Meso-Material Coating Machine) system, which is Optomec, Inc., Albuquerque, New Mexico, USA. It is important that the system of the present invention uses an integrated dielectric layer and a conductive layer fabrication station (as shown in Figure 4), then an inkjet or inkjet library (^etbank), age coated dielectric Substance, sunny Another inkjet or inkjet library is used to coat the conductive material. The coated conductive material is then exposed to radiation. For example, if the dielectric substance is a resin (e.g., SU-8), it can be exposed to ultraviolet light to carry out polymerization. The illumination method used in the system of the invention can be used without the mask, but also with the fixture, the photo (4) the Jiaqin secret scale method (gift ^vector fiber), the integrated scanning method, and the detailed description (from -.

‘噪光循環中，照射整片表面。由开>成一定形狀。例如可使用一另一方面，在使用整合雷射照射方法時，是於單一罩幕產生器， 46 200938042 LCD或鏡面裝置’例如商用之數位微鏡面裝置（DMD)，如美國德州達拉斯之德州儀器公司（Texaslnstruments之DLP⑧產品）。使用整合照射方法具有兩大優點。第一，可與現行之光罩製程技術相容’因將整層一次曝光，光亮一致，故與傳統光罩曝光技術相似。第二’因為各層絕大部分均同時加工，而非如以線掃描技術照射形成所需形狀’故可以提高速度。於此相同光柵照射技術也可使用在本發明。光拇照射技術與整合照射技術相似，因每次照射相當大面積，但每次照射並非針對全部表面，故需使用掃描控制，移動該照射頭、該製作物或兩者。 ® 第12圖表示本發明一實施例之介電層製造站示意圖。第12圖之製造站12〇〇可用來製作介電層。在本實例中該製造站具有一 XYZ機台12〇5，支持該托盤121〇。耗材桶1215内装製造物料，例如樹脂，以供施加至托盤121〇上。賴射光源可為— • 紫外光雷射’用以提供輻射光束。光圈㈣則用以控制該輻射光束。反射鏡系統 1230 ’例如為DLP®機n ’用以提供動態'照明偏轉。其他光學元件1235則用以進一步調整轄射之形狀。第12圖恰好也顯示一托盤定位鑛腦之實例。該托盤定位機構·可用以 ® 將托盤禮蝴咖^之位置及綠，並可重複實施。圖巾僅顯示該托盤定位機構1206之大體。任何其_器設備均可用來達成其任務。於此，重要之問題為能重複將托盤蝴位置及雜’或者以另一種方法，精確計算該托盤與給定之記说間之漂移量。 . __之冑狄機，t要伽烤爐/祕滅其他絲加熱，以提升熟化效果，而達到在該介電層上製作導體最適合球度。之後將未照射犧部分（指根_需之形狀，喊經雷射/光線照射之區域）移除，而不進行交聯作用。 47 200938042 例如，如為樹脂(例如 su_8)即可在 PGMEA(PropyleneGlyc〇1MethylEtherAcetete，甲基醚丙二醇醋酸酯）中浸泡發展，再用乙醇沖洗。也可額外使用或改用機械方法，以除去未滕之婦。修娜魏體及/或水及/韻郁條該未黯物質之區域’以使不緊緻讀料鬆脫。也可使用真空吸氣方式；可糊使用也可與其他方法併同使用。吸氣方式可與其他方式共同擊破材料之堅硬表層，.喷壤少量溶劑及 /或以超音波震動’可以完全除去多餘之材料。另可使用相對較長之供烤步驟，作為熟化步驟之終結。雌方式稱為爾（ω ® 。另-種方式則是只在PCB约5完成後，才進行奶I。第13圖表示本發明-實施例之介電層製作流程圖。於步驟删將托盤以樹脂層塗布。應注意如使用一離型劑，則托盤應先塗布離型劑，其後再塗布樹脂。兩者 • 討利用喷灑塗布機、喷墨塗布機、旋模塗布機等，進行塗布。於1320將該樹脂暴胁娜歸下。可朗騎顧賴、整合照細^，將_旨暴餅紫外線輕射之下。如需強化交聯作用，則可於步驟執行。其方式可為熱處理。於· 清潔該托盤，以除去多餘之未照射物質。其方式可例如為使用化學方法、機械方法㈣後處理’例如爾’完成熟聽理。此外，上述之說明僅在綱以薄膜直接寫入工法製作之實施例，但其方法（例如上述照射方法、移除斜線清除未經麵部分之方法），也可使用在其他製作介電層之實例。根據本發明另-實例，該介電層是與可溶性材料一起形成。在本實施例中，形 •成導狀其職牲通纖縣易。於本實例中係使用可溶性材料，形成該電路板之便宜製作轉，錄取介電#_，鱗導狀其他狐L本實施例之方法包括如下步驟，並可參嶋14圖。首級㈣―製触（修親賴製造 48 200938042 站），以製作一可溶性物質製作層M00。該層14〇〇可具有邊界14〇5，以形成一容器型平台，用以製作該介電層。該可溶性層14〇〇可使用SFF/Rp，使用相同之介電層製造裝置（但可能在同-裝置裡使用不同之噴嘴），或使用獨立之製造站形成。如有需要，在本實施例中該可溶性層也可含有導孔定型柱141〇〇 mis ^ 周。將該介電層1415施加完成並熟化（部分熟化或铸熟化）之後，除去該導孔定型柱1410，其方式可為將溶劑選擇性倒在該可溶性物質上。其後可在製作過程之任 © 何時間點，沖洗該製作物妙，或以該可溶性材料製作之定型柱部分，赚去定型柱。本實施例提供數項優點’祕不需清淨導孔内之剩餘介電材料，電路板容易自托盤上/7離’可以製作需要支撐之3D結構（例如在絲H電層上製作定位標記）。此外，本發明也可用製作具有複雜形狀，且需要支撐之3DPCB。其後，製作該PCB之導電層。鱗電層可包括導電線路及糾之接腳塗布（只形成於最外層)。根據轉雛之軟體資料可以在此前所製成之介電層上，形成一導電層。製作導電層之方法可包括下列元件：導電線路，可具有不同形狀、不同線寬及厚度（在X、Y、Z軸）’更可能有不同材料。通常而言，導電線路是以銅製作，但也可使用金、紐其他金屬材料製作。 lir體製le站可使用施加型’無罩幕印刷電子方法及設備，以形成導電層結構。在本實把例中疋使用Mb機器^其他可適用之方法紐噴墨印刷（例如非接觸型數位印刷技術’例如以壓電噴墨印刷機供應導電液體，咖吏用美國加州Santacl啦之Din*公司產品）、雷射工程化淨成型（聰）系統（由砸_ ,可在本發明之系統中使用，以獲得顯 49 200938042 著提高之精確度及解析度。如需上述技術更深入之資料’可參閱美國專利第 7,〇45,015 號及第 6,046,426 號。其他適用之方式包括使用特製之供應器或膏劑印刷機，以供應高黏度之導電材料。同時本發明之系統也可使用導電性聚合物，例如以施加方式供應。該導電性聚合物可利用與製作介電物質之同一製造站、該Mb系統或任何其他適當之系統與技術，經過適當之改變或修正之後，供應到介電層上。根據本發明之實施例，該導電層是使用一特別設計之導電材料製作。該材料為 ❹ 單一或複合材料溶液，並特別適合使用在本發明之導電層製作技術。根據本發明一實例，該導電層之材料係使用NMIINanoSilverlnk (NTS05)(由美國紐約州 Binghamton之NanoMasTechnologies公司所供應）或其改良衍生物。以下為該導電 ' 層製作材料之主要重要特性： a) 需能適合使用在導電層製作系統及技術，特別在符合所需之準確度、解析度、處理速度、黏度、沾锡角度（wettingangle)等。 b) 具有適當讀料介面’制是關於與耗合材料之黏附與連結。特別是各導電層間之黏性（以產生具有多數小層之導電層厚度）、與介電材料間之黏性，以及在常用元件組裝製程（例如銲接）中，與元件間之連結性。 0在軟質/硬質·軟質之顧中，該導電材料f提供相#錢械柔做，以在電路板折彎時提供延展性。 Φ需能耐受本發明製作流程中各步驟之條件。同時也需能耐受可能之元件組裝及銲接秦修細娜綠較__數咖），嫩娜之鱗脹係數產«雛，鼓在—鱗触訂，鱗鞠财瓶，該溫度通常 50 200938042 達到250°c 〇 )所提供之電氣、電磁、熱學、機械等特性，需與習知印刷電路板製造技術所製成之導電材料（在99.8%之情形下是使用銅），具高度相關性。例如該導電層之導電係數在電路板熟化之後，為決定PCB魏性之重要參數。广述各種印刷方法中，本發明之系統可以卿於一個供應頭，各供應頭可 '、特疋之不咖途’贱節省躺及提高效率。例如，槪之線路，例如接絲面及較粗之線路，則可使用寬口喷嘴提供。至於較細之線路，例如細線路’則可用精密喷嘴提供。連結部分（導孔）之化則可以特製倾提供。本發明之重要特徵祕，上述各種技術及系統可以透過預處理(例如在施予導電材料之前對介電綱潔及入侧及颇處理(對形成顺潔及/或加熱W㈣知之娜瓣卩提供__制：賴物烤爐加熱或雷射 ' 燒結0 電層加工平行進行。本發明之系統可用導孔金屬化也可以相同之設備，而與導。對導孔的金屬化可以使用兩In the 'noise cycle', the entire surface is illuminated. From the opening > into a certain shape. For example, another aspect can be used, in the case of an integrated laser illumination method, in a single mask generator, 46 200938042 LCD or mirror device, such as a commercial digital micromirror device (DMD), such as the Texas Instruments in Dallas, Texas, USA. Company (DLP8 products of Texas Instruments). There are two major advantages to using an integrated illumination method. First, it can be compatible with the current reticle process technology. Because of the uniform exposure of the entire layer, the brightness is the same, so it is similar to the traditional reticle exposure technology. The second 'because the vast majority of the layers are processed at the same time, rather than being shaped by the line scanning technique, the speed can be increased. The same grating illumination technique can also be used in the present invention. The light-illumination technique is similar to the integrated illumination technique. Since each illumination is relatively large, but each illumination is not for all surfaces, scanning control is required to move the illumination head, the fabrication, or both. ® Fig. 12 is a view showing a dielectric layer manufacturing station of an embodiment of the present invention. The fabrication station 12 of Figure 12 can be used to fabricate a dielectric layer. In this example the manufacturing station has an XYZ machine 12〇5 that supports the tray 121〇. The consumable barrel 1215 contains a manufacturing material, such as a resin, for application to the tray 121. The source of the light source can be - • ultraviolet laser light to provide a beam of radiation. The aperture (4) is used to control the radiation beam. Mirror system 1230' is, for example, a DLP® machine n' for providing dynamic 'illumination deflection. Other optical components 1235 are used to further adjust the shape of the ray. Figure 12 also shows an example of a tray positioning mineral brain. This tray positioning mechanism can be used to position and green the tray and repeat it. The towel only shows the general orientation of the tray positioning mechanism 1206. Any of its devices can be used to accomplish its mission. Here, an important problem is to be able to repeatedly calculate the position of the tray and the miscellaneous or another way to accurately calculate the amount of drift between the tray and the given note. __ 胄胄机 , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , The unexposed portion (the shape of the root, the area that is shouted by the laser/light) is removed without cross-linking. 47 200938042 For example, if it is a resin (such as su_8), it can be soaked in PGMEA (PropyleneGlyc〇1MethylEtherAcetete, methyl ether propylene glycol acetate) and rinsed with ethanol. It is also possible to use or switch to mechanical methods to remove the woman. The repaired body and/or the water and/or the rhyme of the area of the untreated material 'to make the untightened reading loose. Vacuum suction can also be used; it can be used in combination with other methods. The suction method can be used to break the hard surface of the material together with other methods. Spraying a small amount of solvent and/or ultrasonic vibration can completely remove excess material. Alternatively, a relatively long roasting step can be used as the end of the ripening step. The female mode is called ω ® . Another way is to carry out the milk I only after the completion of about 5 PCB. Figure 13 shows the flow chart of the dielectric layer of the invention - the embodiment. It should be coated with a resin layer. It should be noted that if a release agent is used, the tray should be coated with a release agent and then coated with a resin. Both • use a spray coater, an inkjet coater, a die coater, etc. The coating is carried out. The resin is smashed down at 1320. It can be ridden and integrated, and the violent granules are under ultraviolet light. If the cross-linking effect is to be strengthened, it can be carried out in steps. The method may be heat treatment. The tray is cleaned to remove excess unirradiated material, for example, by using chemical methods, mechanical methods, (4) post-treatment, for example, to complete the familiarity. In addition, the above description is only in the The embodiment produced by the direct writing method of the film, but the method (for example, the above irradiation method, the method of removing the oblique line to remove the unfaced portion) can also be used in other examples of fabricating the dielectric layer. According to another aspect of the present invention The dielectric layer is The material is formed together. In this embodiment, the shape and the shape of the guide are used by Tongxian County. In this example, the soluble material is used to form a cheap production turn of the circuit board, and the dielectric ##, scale guide Other foxes L The method of this embodiment includes the following steps, and can refer to Fig. 14. The first level (four) - the touch (manufactured by Xia Lai Productions 48 200938042 station) to make a soluble substance layer M00. There may be a boundary 14〇5 to form a container-type platform for making the dielectric layer. The soluble layer 14 can be fabricated using SFF/Rp using the same dielectric layer (but possibly in the same device) Use a different nozzle), or use a separate manufacturing station. If necessary, in this embodiment the soluble layer may also contain a via styling column 141 〇〇 mis ^ weeks. The dielectric layer 1415 is applied and cured. After partial aging or cast curing, the via sizing column 1410 is removed by selectively pouring a solvent onto the soluble material. Thereafter, at any point in the fabrication process, the rinsing material is rinsed. Or with the soluble material The shaped column portion of the material is produced, and the shaped column is earned. This embodiment provides several advantages. 'There is no need to clean the remaining dielectric material in the guiding hole, and the circuit board is easy to be pulled from the tray/7' to make a 3D structure that needs support. (For example, a positioning mark is formed on the wire H electrical layer.) In addition, the present invention can also be used to fabricate a 3D PCB having a complicated shape and requiring support. Thereafter, a conductive layer of the PCB is fabricated. The scale layer can include conductive lines and corrective Pin coating (formed only on the outermost layer). A conductive layer can be formed on the previously formed dielectric layer according to the software data of the transfer. The method of fabricating the conductive layer can include the following components: conductive lines, which can have different Shapes, different line widths and thicknesses (in the X, Y, Z axes) are more likely to have different materials. Generally speaking, the conductive lines are made of copper, but they can also be made of gold or other metal materials. The lir system can use an application-type no-mask printing electronic method and apparatus to form a conductive layer structure. In this example, the Mb machine is used. Other applicable methods are inkjet printing (for example, non-contact type digital printing technology), for example, a piezoelectric inkjet printer is used to supply conductive liquid, and the curry is used in Din, Santa Clara, California, USA. *Company product), laser engineering net forming (Cong) system (by 砸_, can be used in the system of the invention to obtain the improved accuracy and resolution of the display 49 200938042. If the above technology is required to be more in-depth ''''''''''''''' The polymer is supplied, for example, by application. The conductive polymer can be supplied to the dielectric using the same manufacturing station as the dielectric material, the Mb system, or any other suitable system and technology, with appropriate changes or modifications. In accordance with an embodiment of the invention, the conductive layer is fabricated using a specially designed electrically conductive material. The material is a single or composite solution. It is particularly suitable to use the conductive layer fabrication technique of the present invention. According to an embodiment of the invention, the material of the conductive layer is NMIINano SilverVerk (NTS05) (available from NanoMas Technologies, Inc. of Binghamton, New York, USA) or a modified derivative thereof. The main important characteristics of the conductive 'layer fabrication material: a) need to be suitable for use in the conductive layer fabrication system and technology, especially in accordance with the required accuracy, resolution, processing speed, viscosity, wetting angle and so on. b) Having a proper reading interface ‘ is about adhesion and bonding to the consumable material. In particular, the adhesion between the conductive layers (to produce the thickness of the conductive layer having a plurality of small layers), the adhesion to the dielectric material, and the connection between the components in a conventional component assembly process (e.g., soldering). 0 In soft/hard and soft, the conductive material f provides a phase to provide ductility when the board is bent. Φ is required to withstand the conditions of the steps in the production process of the present invention. At the same time, it is also necessary to be able to withstand the possible component assembly and welding. Qin Xiu Na Na is more than __ number of coffee), Nen Na's swell expansion coefficient produces « chicks, drums in the scales, scales, and the temperature is usually 50. 200938042 The electrical, electromagnetic, thermal, mechanical and other characteristics provided by 250°c 〇) are highly related to the conductive materials made by the conventional printed circuit board manufacturing technology (using copper in 99.8%). Sex. For example, the conductivity of the conductive layer is an important parameter for determining the ductility of the PCB after the board is matured. In a wide variety of printing methods, the system of the present invention can be used in a supply head, and each supply head can be used to save lying and improve efficiency. For example, 槪 lines, such as wire joints and thicker lines, can be provided using wide mouth nozzles. For thinner lines, such as thin lines, they can be supplied with precision nozzles. The connection part (guide hole) can be specially made. An important feature of the present invention is that the above various techniques and systems can be pre-processed (for example, providing dielectric cleaning and in-situ treatments prior to application of the conductive material (for forming a smooth and/or heating W (four) knowledge) __ system: aging oven heating or laser 'sintering 0 electrical layer processing in parallel. The system of the present invention can be used for the metallization of the via hole or the same device, and the metallization of the via hole can be used.

來金屬化各種導孔，包括填滿導孔、單面導礼^透孔種主要金屬化技術：填娜與塗布_。填嫌咖適合用在上述填滿導孔及單面辄，鱗訊_麟。_私__職各料孔，麟將要插入電子元件孔’碰布導孔壁。㈣技術，除非另有聲明。導孔之娜可贿壯峨_饿_歉任何—種咖。但是也可使用其嘛金舰術。該其他技術_彳如pyD (物理⑽及⑽（化學細。刚雜-《罐勝㈣嫩_㈣驗層。峨術 51 200938042 現7主要用在對半^|^b7C及硬碟形狀。不過本發明之系統可使用PVD/CVD技術，並可使用在導孔金屬化，甚至也可使用在導電層之製作。當然其他添加型導孔金層化技術，都可使用在本發明。也可使用化學方法以提高導孔金屬化製程之可信賴度，以及介電材料與導電材料之在本實_巾’機介電層找傭、驗缝布—種巾介材料，以該材料提高介電層對導電層之黏性。其後在將導電材料施加在導孔，即可獲得提同之黏性。（也可成施加在導電線路，用來同時提高導電線路對介電層之黏性。） © 此外’因為本發明使用添加型技術以產生該介電層，故需使用底板，故可強化該導孔找構。第15圖顯示本發明實施例所使用之不同導孔結構。如第15圖所示，該導孔側壁經過改良’成為傾斜。換言之，為非垂直側壁。與習知技術不同者為：多數標準PCB之導孔為垂直筒狀側壁，因其製法使用傳統讀孔方法。但在本發明中’根據本發明之實例，每一介電層是使用添加型技術，層積而得，導孔之侧壁形狀可改良成如第15騎权細，可形。权意義在於，透過不峨娜狀之設計，可料孔壁枝面積增烟極限，並可 ® 使其在Χ軸上之形狀更為平坦，換言之，導孔可提供之垂直表面積，可大到極限。使用添加形紐麟上絲轉增Α且較平坦之孔辦金狀，加讀為容易，且效果更形提高。麟垂細奴細，以添加方式做金屬她比，本伽之方法可大大改善相關重要參數，例如成形之-致性、金屬層/紐黏性、形成導電材料之特性（例如導電係數）及可靠度。除此之外，所形成之孔洞可用來插入插孔元件。在此種應用中’孔洞之截面直徑最小處，必須配合元件插入接腳之直徑，以及必要之空間。 52 200938042 第15圖所示之改良型金屬化方法之範例，可以使用本發明實施例中之任何系統，加以達成。特別是在資料變更階段，對輸入電腦辅助設計資料之分析及變更之過程中，可包括分析孔洞表面積，以與各相關層次之電路板面積比較。該電腦輔助設計資料可根據分析結果’以内插法處理，結果將改變各導孔之形狀，但仍保有原始之電路板特性。以此種方法，可使電路板之設計者不需顧慮孔洞之形狀，只需使用傳統孔洞結構設計該電路板。而在將設計結果上載到本發明系統之後，該設計資料會經過變更’且關於孔洞結構之資料會經過改變，而提供所選用之改良導孔結構。 ❹ 這時導孔金狀難之錄絲（例如厚度、沈舰度、材概度等），都可根據在資料變更階段中所為之資料内插結果，加以設定。使用添加型導孔金屬化技術時’有一重要考慮因素，為該孔洞之高寬比，亦即導孔高度對直徑之比例。高寬比健大，該導孔之金屬化則細難。本發明在以下實施例’提供導孔金屬化之有用方法。該方法可順暢整合到本發明之製法（指第6 圖或第7A圖所示之方法）中，請詳下述。該方法顯示於第16A及i6B圖。第i6A 圖表示本發明一實施例導孔/孔洞金屬化流程圖。第湖圖為其⑽截面圖。響如上所述’本發明之系統乃是使用固，態自由成开)製造法，以製造該p⑶之介電層在過程帽造多數介電材料薄層。因此也如前所述，咖之一層可以添加方式製成’並由多數小層之製造循環製得。於製作介電層時，首缺1610製造第-介電層形成第1®圖所示體麵，完成dl小層。其後於刪對該層内之導孔王口P或口P進行導孔金屬化，結果將導孔vl之侧壁以導電塗層cl塗布。其 ϋ步驟1630檢查該板體之介電層之完成部分，是否已餅需高度。如否，則重覆前步驟’如圖中1664到1670所示。 53 200938042 當製得级體層高度達到所需之後，於觸進入導電層製作，將導電層製造站製得之最後層介電層技面上。步驟表示該介電層D已經完成所需高度（包括出、d2及d3 )，而導孔v也已經完成（包括cl、ώ及^ 。其後於步驟祕，在該介電層d3上謂作導電層，包括線路uβ及〇。㈣-猶法，如轉祕麻，該制ώ之部分之塗層高於小層也之高度，抓X_㈣緣，_生_壁之環_磐二該環狀物糊峨，樣缝嫩，咖嫩卿分塗布區 ©之定錄’以提供較佳之黏性，並對下一階W為之塗布提供支撑。此外，另一種重要之改進為使用提升熟化技術處理各製得之小層。對多數介電薄層作熟化處理，可得到比解-瓣親自，侧—叙雛絲。·，對製得之小層作熟化處理，可以增進效果並提高精確度。第17A-17C圖為根據本發明實施例之導孔製作流程示意圖。第17A圖顯示先製作該介電層’再以—層疊—層之方式製作導孔之方法。步驟顯示該PCB之一部分，射有一第一介電層dl，具有一導電線路^，形成一其上，以及一第二介電層d2其中有導孔v卜形成於導電線路^之上。於步驟㈣，該導孔vi已經以導電材料填滿，而-第二導電線路c2則已形成。於步驟i7i4，在導電上方形成另-介電層d3，並有導孔v2延聽其上。上述步獅侧跡·重複進行多次，直到完成導孔製作。第17B圖顯不另實施例，其中先形成該導孔之全高，最後再加以填滿。如圖所示，於步驟㈣先形成-第—介電層dl，其上形成導電絲d，並有一第二介電層d2其内有導孔vi，形成於該導電線路社。於步驟㈣形成一第二導電 54 200938042 線路層C2。但此時並不將導孔vl以導電材料填滿。於步驟顯在該導電層C2上形成-第三介電層d3，但該導孔vl仍保持開放。於步驟1726重複上述步驟多次，於步驟1728完成最後之導電線路，而將導孔vl以導電材料填滿。第17C圖所示之實把例與第17A圖之實施例作法相反。於步驟173〇形成一第 ;ι電層dl ’其上也形成-導電線路el及導孔vl。於步驟形成一導電導孔 cv卜此時尚未在其周圍形成介電材料。於步驟1734形成一介電材料心，包圍該導電導孔CV卜於步驟1736重複上述麵多次，祕步驟1738形成最後之導電線〇路’該導電線路可能覆蓋該導電導孔。於上述數種實施例中，該導孔係以導電材料填滿，其方式可為沈積，其後將_材料熟化，例如可用供烤、聚焦雷射燒結等方法。由倾製得之導孔被導線填充，因此不能作為供插孔元件使用之孔洞。上述第17A至第17C ®之實施例，均描述填滿孔洞之情形，且其高度與pcB各層高度相同。然而上述說日月僅為例示之用’不得用峨制本發明线圍。例如孔洞可使用側壁塗布之方式力〇工，而不需娜填滿，也可在特定實施例中，形成任何高度。不但如此，第17A到第17C圖所示之實施例中，也可用來襲作側壁塗布且内部填滿 ® 之通孔導孔（未圖示）。如上所述内部填滿找孔，可以製作在-離型層（例如可溶性材料）上，而非直接製作在托盤上。填充於導孔之材料尚度可超過孔洞表面，因而形成小型導電突起，可用來作為 ' 相鄰層次間之連線。第丨队、18B圖為本發明一實施例中，以填加導電材料進行導孔金屬化之實施例示意圖。如第18A圖所示，該導電物質填充在孔洞内，並高出其表面一預定量。此種作法可提高導孔塗布/填充各部分（亦即，該孔洞之介電侧壁及導電塗布/填充乃是依序形成）間之黏性，有利於成導孔之金屬化。 55 200938042 第19 _示三觀用或不使用可溶性材料形成導孔之製法。在第π圖中，該第-介電層、形成於_可綱_之上。嶋法在各實施例中並非必需，只是一種舉例。導孔_形成「自由站立」狀，而具有金屬化之側壁。該導孔_ 具有-延伸部’延伸至該介電層·之上方。該延伸之自由站立部分，於製作第二介電層時’會被覆蓋。而另-方面，導孔也具有自由站立部分，但為在製作過程中支持該自由社部分，娜^ux可戦撕簡就。與此獨，導孔卿⑽電漏胸麵，蝴綱,，上述步驟也可調轉稱，換言 ❹之，可先以可雜或介電材料㈣心部’再以導電材料加以覆蓋。除此之外，也應明瞭，填滿透孔之導孔需製作於一離型層（例如可溶性材料）之上，因為較重之導柱無法直接製作在托盤上。在將導電材料施加於導孔之側壁時，可將供應頭傾斜，或傾斜該托盤，或傾斜兩者。第20圖顯示供應頭細相對托盤細形成傾材料施加在介電材料層2020内之導孔之側壁2005。第21圖表示根縣發明一實施例設計之卿製造系統示意圖。根據本實施例，第21圖所示之祕架構包含固定式托盤及移動式工作站，而與此前之實施例不同。第21圖顯示固定式托盤架構一範例之侧視圖，根據圖上，該pcB2i5〇係在固定式托盤2140上製作。使用-上框架216〇支持χ_γ移動系統217〇 (例如平面馬達）。該移動系統可崎-套不同之製作裝置，加以移動。該製作裝置相對應於前述移動式托盤之實_中之製造站。在圖中也齡，介電材難應頭2iiq，冑冑材_應頭2120，聚焦熟化裝置2130 (例如麵合於聚焦光學元件之雷射產生器）及大量熟化農置2180 (例如磁控管、加熱板）。另外也可得知，上述之製作裝置也可包含一種 56 200938042 或多種分料元，但只__料_____ 導電材料供應頭2120可含有一八雜置m …Ή如該键接。有刀離單疋，例如噴霧器，置於該上框架之上，並與電 /實施例之一特嫩，本發明可以避免如過去之作法，即卿功能之裝置，也必須在不同製造站中（在移動拖盤之架構下），重復相同之摔作。例 Μ本實侧來加工 ❹ 在移動徽架構下，則需使用數套熟化裝置’因為熟化製程通常需在材料施予之後即進行。例如細台輻射熟繼，，於介娜製造站，另_台電材料製造站。不但如此，有些裝置也可具有2抽移動功能或轉動功能。例如，熟化装置可由不同距離軸加工；導糖概頭在形鱗繼綱需傾物。此外，能作鄉動魏可用以對托修工，例如保持電猶度與所需製作高度之間之相.包括在施加介電層之後，電路板會增厚。此時必須使電路板下㈣補償所增加之厚度。本發明之系統也缺對卿之底部表面供應材料鲁該機罾構如«所述’但細面懦（例如上部板體翻雛置)。但由前述之說明可知，與前_多動托盤型纏目似，本發明之裝置可祕額外所需之裝置，也例如：電氣測試系統、元件置放祕，以及其他裝置，均可鱗定之細上絲，使用在本發明。本發明另-項特色乃是可以在單一托盤上，同時製作數個pcB，而各pcB可具有不同之設計。根據此項特徵，單一之板體可以包括數個（對翻/非對稱型/混合型）⑱你「單位板體」（pixel_plates),各單位板體可用來如積本般自動組合成不 57 200938042 同尺寸、形狀構成之小板體’以符合不同設計所需。此種特徵在獲得多元設計製程板體時’可以提高效率。這是因為該板體各部份可能具有不同特性(例如層次數目），可能需以不同製程處理（例如不同之熟化/烘烤條件），而在不同製造站/製程步驟中加工。本發明德神在其可使單—工作板體可以分隔成較小:^反體，而可以各別加以構成，操作及自動處理，以形成單一之大面積板體，也可形成數個較小面積之板體。在單一托盤2250上製作數程電路板之方法係如第22A圖所示。不過，此種應 ❹ 用對本發明而言，可謂為不同製造站之較無效率應用或可稱為使本發明之系統之產能降低。例如’假設要以單一板體製作二種不同之電路板（如第22A圖所示），又假设PCB設計A2210具有6層，而PCB設計B 2220 (第22A圖）具有10層。如果要將兩者製作於同圖板體上，則PCB設計A將延後到另一設計（ρ^設計B ) ' 以較長時間製作完成之後’才能提供給使用者。此外，PCB - A可能會經過「過度加工」（例如暴露於熟化/烘烤條件下過久），因而可能導致其特性上不利之改變及 /或導致瑕疫。由於對製造設備之效率評價主要是級其產能，且在製造單一種電 ® 路板時，有些製造站在使用中，其他製造站貝否，將該不使用之製造站置於「等待狀態」，直到製造物依一定之製作程序到達時，乍法將導致時間與金錢浪費。第22B-22E醜示本發明一實施例中，該板體係以數小板體製成，而將其以機 ' 械化，電腦控制自動化設備組合後，形成較大板體。每-小板體均具有-孔洞2290， ' α供妓組裝n或輸梢，使其似_單錄體可紅「配合」，Μ形成較大 °每-單位板體2230可與其相鄰板體配對，如第22C圖所示，其g己對方式缺平仃、連接’方向可為成行’成列或兩者皆是。至於^何分割數個面也/板體， 58 200938042 乂成為較小板體，則可依據特定之方式決定，而可能考慮其整體板體尺寸，需製作 ^_種類 '層減其厚度’於各製造站中之停留時間，以及綱目關參數。在決定如何侧之後，贿使各雜板體均具細立域纖構，可使其與鄰近之單位板體相配對，均如第22B圖所示。也可以將該機構設於板體之最外框部份’或僅設於行或列上，如第22D_22E圖所示。具有上述機構之單位板體將作為「主單位板體」決定如何結合鄰近板體作，列，其他之單位板體則為「從單位板體」，而依據雜D又什而決定與何者單位板體結合。另如上述，也可將各別之單位板體作 ❹ 成可獨立操作。現回到第22B®。圖巾，娜馬達224()係位於該「轉錄體」，或平概各雄動—赌纖，以產生—觸近單位板體德理連結。上述^_包括推桿座’具有球形軸227〇以及定位梢·。不過，上述設計僅為種例不以其他方式實j驗體技結，均屬可行。將大板體分割成小板體之後，各小板體均可自行提供其在本發明中之功能，且可與其他小板體平行操作，而提昇效率。 Ο 本發月之另-特徵在於其熟化該介電材料，亦即，使其產生交聯作用。上述特徵制有伽絲合物，修α su_8之熟化/交聯侧。熟化時鑛賴之層次， -層疊層，其内包含介電層，進行熟化。在對光聚合物進行熟化，而該聚合物係 -層4層’並需保持其特性’例如黏性時，主要之困飾何使熱能（散熱）月匕由最外層表面傳達到物體之内部。有些光聚合物，例如su_8及其衍生物需使用光'原(X吊為篡外、^||圍）及熱能，才能達到材料之完全熟化狀態。熱能也用於排出溶劑0 59 200938042 根據本發明之一實施例’製作—多層pcB時，需形成層次，使其—層疊一層。其後，在將第-層熟化（全部或部份）之後，則需形成第二層〆下一層，並熟化之。 Mm產±之_在於，鱗導在第—層已經熟化之後，將形劣化。^，此問題將更形嚴重。特別在該受熱裴置係置於托盤上（例如加熱板）時，更是如此。為達成較佳之熱傳導（如果係如本發明之系統中，以加熱作為熟化方法），較易控制及/或使製成之PCB設計麟得_^彳，纟外之官道於哺成之物品巾’而使空缺容胃紐，而使熱能更容細達該犯物 Φ 體之各個部份。第23圖表示本發明-實施例中所製得具有改良熟化之pCB之一部份。如第^ 圖所不，可哺巾空管道形細輕姆，或形献電路板之歡點/深甚至形成齡電層喊。例如，管道可穿越PCB之部份，而連接到導孔細。也可貫穿數個PCB，而連接到導孔2320 ’也可穿越PCB2330或其部份2340，而不連接到導孔。建立上述之管道為相對容易，因本發明之系統係使用固體自由成形製造技術，以建立該介電層。形成3D之幾何形狀即屬可能。該管道可形成水平方向，垂直方 © 向，或甚至為對角線方向。管道之尺寸/直徑/形狀可以有變化，均可依據製作上之需求以及其線貌設計（最外層之開放空間、層次數目、製作速率等）而定。該管道需倾未有元件佔用讀，亦即’無導電線路、接腳、電子元件等所佔用之處。、此外，所在德之電氣行為必須為最*(如有電氣特性），才不胁損及PCB之功To metalize a variety of guide holes, including filling the guide hole, single-sided guide hole ^ through hole type of metallization technology: fill and coating _. Filled with the suspected coffee is suitable for filling the above-mentioned guide hole and single-sided 辄, 鳞 _ _ Lin. _ Private __ job holes, Lin will be inserted into the electronic component hole 'touch the guide hole wall. (iv) Technology, unless otherwise stated. The guide hole can be bribed and sturdy _ hungry apology - any kind of coffee. But you can also use its gold warship. This other technology _ such as pyD (physical (10) and (10) (chemical fine. Just mixed - "can win (four) tender _ (four) layer. 峨 51 51 200938042 now 7 is mainly used in the half ^|^b7C and hard disk shape. The system of the present invention can use PVD/CVD technology and can be used for metallization in via holes, and can even be used in the fabrication of conductive layers. Of course, other additive via gold layering techniques can be used in the present invention. The use of chemical methods to improve the reliability of the via metallization process, as well as the dielectric materials and conductive materials in the real-to-the-machine's dielectric layer to find the commission, the inspection cloth - the kind of material, to improve the material The adhesion of the electrical layer to the conductive layer. Thereafter, the conductive material is applied to the via hole to obtain the same viscosity. (It can also be applied to the conductive line to simultaneously improve the adhesion of the conductive line to the dielectric layer. In addition, since the present invention uses an additive type technique to produce the dielectric layer, it is necessary to use a substrate, so that the via hole can be strengthened. Fig. 15 shows different via structures used in the embodiment of the present invention. As shown in Figure 15, the sidewall of the via hole has been modified to become In other words, it is a non-vertical side wall. The difference from the prior art is that: the guide holes of most standard PCBs are vertical cylindrical side walls, and the conventional method of reading holes is used for the method of manufacture. However, in the present invention, 'in accordance with an example of the present invention, Each dielectric layer is laminated by using an additive type technology, and the shape of the side wall of the guide hole can be improved to be as fine as the fifteenth riding weight, and can be shaped. The right meaning is that through the design of the non-small shape, the wall of the hole can be made The area is increased in smoke and can be made flatter on the boring axis. In other words, the guide hole can provide a vertical surface area that can be as large as the limit. Use the added shape of the lining to turn the boring and flatter hole It is easy to add gold, and the effect is more improved. The lining is fine and thin, and the method of adding metal is added. The method of Benga can greatly improve relevant important parameters, such as forming, metal layer/ New viscous, characteristics of conductive materials (such as conductivity) and reliability. In addition, the holes formed can be used to insert the jack components. In this application, the smallest diameter of the hole must be matched with the components. insert The diameter of the foot, and the space necessary. 52 200938042 An example of the improved metallization method shown in Fig. 15 can be achieved using any of the systems of the embodiments of the invention, particularly in the data change phase, on the input computer aid During the analysis and modification of the design data, the surface area of the hole may be analyzed to compare with the area of the circuit board of each relevant level. The computer aided design data may be processed by interpolation according to the analysis result, and the result will change the shape of each guide hole. However, the original board characteristics are still preserved. In this way, the designer of the board can design the board without using the conventional hole structure without having to worry about the shape of the hole. The design result is uploaded to the system of the present invention. After that, the design data will be changed 'and the information about the hole structure will be changed to provide the selected improved guide hole structure. ❹ At this time, the gold-plated guide holes (such as thickness, sinking degree, material outline, etc.) can be set according to the data interpolation results in the data change stage. An important consideration when using an additive via metallization technique is the aspect ratio of the hole, which is the ratio of the height of the via hole to the diameter. The aspect ratio is large, and the metallization of the guide hole is difficult. The present invention provides a useful method of via metallization in the following examples. This method can be smoothly integrated into the production method of the present invention (refer to the method shown in Fig. 6 or Fig. 7A), which is described in detail below. This method is shown in Figures 16A and i6B. Figure i6A is a flow chart showing the via hole/hole metallization according to an embodiment of the present invention. The first lake map is its (10) sectional view. As described above, the system of the present invention is a solid-state free-form fabrication process for fabricating the p(3) dielectric layer to form a thin layer of a plurality of dielectric materials in the process cap. Therefore, as previously mentioned, one layer of the coffee can be made in a 'additional manner' and produced by the manufacturing cycle of most small layers. When the dielectric layer is formed, the first dielectric layer 1610 is fabricated to form the first dielectric layer to form the first surface of the first layer, and the small layer of dl is completed. Thereafter, the via hole metallization is performed by deleting the via hole P or the port P in the layer, and as a result, the sidewall of the via hole v1 is coated with the conductive coating layer cl. The step 1630 checks the finished portion of the dielectric layer of the board to determine if the cake has a height. If no, the previous step is repeated as shown in Figures 1664 to 1670. 53 200938042 After the height of the obtained body layer is reached, it is made into the conductive layer and the conductive layer is fabricated on the last dielectric layer. The step indicates that the dielectric layer D has completed the required height (including, d2, and d3), and the via hole v has also been completed (including cl, ώ, and ^. Thereafter, in the step secret, on the dielectric layer d3 As a conductive layer, including the line uβ and 〇. (4) - Judah, such as the transfer of secret hemp, the coating of the part of the system is higher than the height of the small layer, grab the X_ (four) edge, _ raw _ wall ring _ 磐 two The ring is paste, the sample is tender, and the coffee tenders are coated in the coating area © to provide better adhesion and support for the next step W. In addition, another important improvement is the use of lifting. The aging technology treats each of the prepared small layers. By aging the majority of the dielectric thin layer, the specific solution-valve can be obtained, and the side-slaughtering silk can be obtained by curing the small layer obtained. 17A-17C is a schematic view showing a flow of manufacturing a via hole according to an embodiment of the present invention. FIG. 17A is a view showing a method of fabricating a via hole by first fabricating the dielectric layer and then laminating the layer. a portion of the PCB, having a first dielectric layer dl, having a conductive line ^ formed on one of the And a second dielectric layer d2 having a via hole v formed on the conductive line ^. In the step (4), the via hole vi has been filled with a conductive material, and the second conductive line c2 has been formed. I7i4, forming a double-dielectric layer d3 over the conductive layer, and having the via hole v2 listening to it. The above-mentioned lion side track is repeated a plurality of times until the via hole is formed. FIG. 17B shows another embodiment, wherein First, the full height of the via hole is formed, and finally filled. As shown in the figure, in step (4), a first-dielectric layer dl is formed, a conductive wire d is formed thereon, and a second dielectric layer d2 is provided therein. The via hole vi is formed on the conductive line. A second conductive layer 5438038042 is formed in the step (4). However, the via hole v1 is not filled with a conductive material at this time. The step is formed on the conductive layer C2. The third dielectric layer d3, but the via hole v1 remains open. The above steps are repeated a plurality of times in step 1726, and the last conductive line is completed in step 1728, and the via hole v1 is filled with a conductive material. The actual example is opposite to the embodiment of Fig. 17A. In step 173, a first form is formed; The layer dl' also has a conductive line el and a via hole v1 formed therein. A conductive via hole cv is formed in the step to form a dielectric material around the film. A dielectric material core is formed in step 1734 to surround the conductive layer. The hole CV repeats the above-described surface a plurality of times in step 1736, and the secret step 1738 forms a final conductive line 'the conductive line may cover the conductive via. In the above several embodiments, the via is filled with a conductive material. The method may be deposition, and then the material is matured, for example, it can be used for baking, focusing laser sintering, etc. The inclined guide hole is filled by the wire, and therefore cannot be used as a hole for the jack component. The examples from 17A to 17C ® describe the case where the holes are filled and the height is the same as the height of each layer of the pcB. However, the above-mentioned saying that the sun and the moon are for illustrative purposes only shall not be used to make the wire circumference of the present invention. For example, the holes can be formed by side wall coating without the need to fill up, or in any particular embodiment, any height can be formed. Not only that, but in the embodiment shown in Figs. 17A to 17C, it can also be used as a through-hole guide hole (not shown) for sidewall coating and internal filling. Internally filling the holes as described above can be made on a release layer (e.g., a soluble material) rather than directly on a tray. The material filled in the via hole can still exceed the surface of the hole, thus forming a small conductive protrusion, which can be used as a connection between adjacent layers. The Dijon team and the 18B diagram are schematic views of an embodiment in which a conductive material is used for conducting via metallization in an embodiment of the present invention. As shown in Fig. 18A, the conductive material is filled in the holes and raised above the surface by a predetermined amount. This method can improve the adhesion between the portions of the via coating/filling (i.e., the dielectric sidewalls of the holes and the conductive coating/filling are sequentially formed), which facilitates the metallization of the via holes. 55 200938042 19th _ shows the method of forming guide holes with or without soluble materials. In the πth diagram, the first dielectric layer is formed on top of the _. The method is not necessary in the embodiments, but is merely an example. The guide holes _ form a "free standing" shape with metallized sidewalls. The via hole _ has an extension portion extending above the dielectric layer. The extended free standing portion will be covered when the second dielectric layer is fabricated. On the other hand, the guide hole also has a free standing part, but in order to support the free part of the production process, Na ^ux can be easily removed. In addition, the guide hole (10) electric leakage chest surface, butterfly, the above steps can also be transferred to the name, in other words, can be first covered with a miscellaneous or dielectric material (four) heart and then with conductive materials. In addition, it should be understood that the via holes filled with the through holes need to be formed on a release layer (e.g., a soluble material) because the heavier guide posts cannot be fabricated directly on the tray. When a conductive material is applied to the side wall of the guide hole, the supply head can be tilted, or the tray can be tilted, or both can be tilted. Figure 20 shows the sidewalls 2005 of the vias that are applied to the dielectric material layer 2020 in a thin manner relative to the tray. Figure 21 is a schematic view showing the manufacturing system of the embodiment of the invention of the invention. According to the present embodiment, the secret architecture shown in Fig. 21 includes a fixed tray and a mobile workstation, which is different from the previous embodiment. Figure 21 shows a side view of an example of a fixed tray architecture in which the pcB2i5 is fabricated on a stationary tray 2140. The _γ mobile system 217 〇 (for example, a planar motor) is supported using the upper frame 216 。. The mobile system can be moved by a different set of production devices. The production device corresponds to the manufacturing station of the aforementioned mobile tray. Also in the figure, the dielectric material is difficult to head 2iiq, coffin _ should head 2120, focus curing device 2130 (such as laser generator that covers the focusing optics) and a large number of mature agricultural 2180 (such as magnetron , heating plate). In addition, it is also known that the above-mentioned manufacturing apparatus may also include a type of 2009 200942 42 or a plurality of sorting elements, but only the conductive material supply head 2120 may contain a plurality of miscellaneous m ... such as the key joint. A knife is placed on a single frame, such as a sprayer, placed on top of the upper frame, and is electrically integrated with one of the electric/embodiments. The present invention can avoid the device as in the past, that is, the device of the function, and must also be in different manufacturing stations. (Under the structure of the mobile tray), repeat the same fall. Example ΜThis side is to process ❹ Under the mobile emblem structure, several sets of curing equipment are required' because the curing process usually needs to be carried out after the material is applied. For example, the fine table radiation is familiar, and at the Jienao manufacturing station, another _ Taiwan electrical material manufacturing station. Not only that, but some devices can also have 2 pumping or turning functions. For example, the curing device can be processed by different distance axes; the guiding sugar head is in the form of a scale. In addition, it can be used for the maintenance worker, for example, to maintain the phase between the electrical hysteresis and the required fabrication height. The board is thickened after the application of the dielectric layer. At this point, the board must be (4) compensated for the increased thickness. The system of the present invention also lacks the material for the bottom surface of the brilliance, such as the "described" but the fine surface 懦 (for example, the upper plate ploughing). However, as can be seen from the foregoing description, the device of the present invention can be used as an additional device, such as an electrical test system, component placement, and other devices, which can be scaled. Fine wire is used in the present invention. Another feature of the present invention is that a plurality of pcBs can be made simultaneously on a single tray, and each pcB can have a different design. According to this feature, a single plate body can include several (pitch/asymmetric/hybrid type) 18 "pixel plates" (pixel_plates), and each unit plate body can be used to automatically combine as a product. 200938042 Small plate body of the same size and shape to meet different design needs. This feature can improve efficiency when a multi-design process board is obtained. This is because the various parts of the plate may have different characteristics (such as the number of layers) and may need to be processed in different manufacturing stations/processes by different processes (e.g., different maturation/baking conditions). The invention can make the single-working plate body can be divided into smaller: ^ anti-body, and can be separately constructed, operated and automatically processed to form a single large-area plate body, and can also form several comparisons. A small area of the board. The method of making a multi-circuit board on a single tray 2250 is as shown in Figure 22A. However, such application is not a relatively inefficient application for different manufacturing stations or may be referred to as reducing the throughput of the system of the present invention. For example, it is assumed that two different boards (as shown in Fig. 22A) are to be fabricated in a single board, and that the PCB design A2210 has six layers, and the PCB design B 2220 (Fig. 22A) has ten layers. If you want to make both of them on the same board, PCB design A will be postponed to another design (ρ^Design B) 'after a long time to complete' to be available to the user. In addition, PCB-A may undergo “over-processing” (eg exposure to aging/baking conditions for too long), which may result in adverse changes in its characteristics and/or lead to plague. Since the efficiency of manufacturing equipment is mainly based on its production capacity, and when manufacturing a single electric board, some manufacturing stations are in use, and other manufacturing stations are not, and the unused manufacturing stations are placed in a "waiting state". Until the manufacturing arrives in accordance with certain production procedures, the law will result in wasted time and money. 22B-22E shows an embodiment of the present invention in which the panel system is made up of a plurality of small plates, and the machine is mechanically and the computer controlled automation equipment is combined to form a larger plate body. Each-small plate body has a hole 2290, 'α is used for assembling n or a tip, so that the _ single-recorded body can be red "fitted", and the Μ is formed larger. Each unit plate 2230 can be adjacent to the plate. Body pairing, as shown in Fig. 22C, the g-pair mode is lacking, the connection 'direction can be a row' or both. As for how to divide several faces/plates, 58 200938042 乂 becomes a smaller plate, which can be determined according to a specific method, and may consider the overall plate size, and need to make ^_ kind 'layer minus its thickness' The residence time in each manufacturing station, as well as the parameters of the program. After deciding how to side, the bribes are made to have a fine domain texture, which can be paired with adjacent unit plates, as shown in Figure 22B. It is also possible to provide the mechanism at the outermost frame portion of the plate body or only on the row or column as shown in Fig. 22D_22E. The unit plate body with the above-mentioned mechanism will be used as the "main unit plate body" to determine how to join the adjacent plate body, and the other unit plate body is "from the unit plate body", and depending on the miscellaneous D, which unit is determined Board combination. As described above, the individual unit plates can also be independently operated. Now return to section 22B®. The towel, Namo 224 () is located in the "transcript", or the masculine gambling, to produce - close to the unit board. The above ^_including the pusher seat' has a spherical shaft 227A and a positioning tip. However, the above design is only feasible for the case and does not use other methods. After dividing the large plate into small plates, each of the small plates can provide its own functions in the present invention, and can operate in parallel with other small plates to improve efficiency.另 Another feature of this month is that it matures the dielectric material, that is, it causes cross-linking. The above-mentioned characteristics have a gamma compound, and the ripened/crosslinked side of α su_8 is repaired. The level of mineralization at the time of ripening, - a layered layer containing a dielectric layer for aging. When the photopolymer is matured, and the polymer layer-layer 4 layer 'and needs to maintain its characteristics' such as viscosity, the main obstacle is to make the heat (heat dissipation) moon 匕 from the outermost surface to the inside of the object . Some photopolymers, such as su_8 and its derivatives, require the use of light 'original (X hanging for external, ^||) and thermal energy to achieve full ripening of the material. Thermal energy is also used to vent the solvent. 0 59 200938042 When a multi-layer pcB is fabricated in accordance with an embodiment of the present invention, it is necessary to form a layer so that it is laminated. Thereafter, after the first layer is matured (all or part), a second layer of the lower layer is formed and matured. The Mm production is that the scale guide degrades after the first layer has matured. ^, This problem will be more serious. This is especially true when the heated device is placed on a tray, such as a heating plate. In order to achieve better heat conduction (if in the system of the present invention, heating is used as a curing method), it is easier to control and/or make the PCB design of the finished product. The towel makes the vacancies empty, and makes the heat more compact to the various parts of the body. Figure 23 shows a portion of the pCB having improved ripening prepared in the present invention-embodiment. If the figure is not in the picture, you can feed the empty tube shape and light shape, or shape the circuit board's joy/deep or even form the electric layer to shout. For example, the pipe can pass through portions of the PCB and be connected to the guide holes. It is also possible to extend through several PCBs, and the connection to the vias 2320' can also traverse the PCB 2330 or portions 2340 thereof without being connected to the vias. It is relatively easy to establish the above described piping, as the system of the present invention uses solid freeform fabrication techniques to create the dielectric layer. It is possible to form a 3D geometry. The pipe can be formed horizontally, perpendicularly to the direction, or even diagonally. The size/diameter/shape of the pipe can vary, depending on the requirements of the production and its line design (open space of the outermost layer, number of layers, production rate, etc.). The pipe needs to be dumped without component reading, that is, where no conductive wires, pins, electronic components, etc. are occupied. In addition, the electrical behavior of the Germans must be the most * (if there are electrical characteristics), and no damage and PCB work

- 雛。在粒完絲道之後’麵觸段巾，触驗可更料働，且整體PCB 對溫度4露將更為-致。對PCB之最外層如此，對^未與空^_^. 域*也是如此。 200938042 以上所述之各種實施例，可以使用在製作功能性PCB。所謂之「功能性pcB」疋指以本發明之製程及系麟製得之ra之特色，制是指上述製得之咖在表耻及在測試結果上’與其相對應之大量生產切當物品(指以傳統大量製造技術，根據相同之製造槽所製得之PCB)在表耻及在測試結果上株對性。就此而言，必須說明者為，上絲社無試絲上之姆性，會因其目標細及製得之㈣之用途’而有差異。例如，在製造作為原型（域·之使用綱最長不會超過數個月）之PCB之情形，耐腐蝕性測試方面之相對性，即較不重要。反之，如所製造 © 之PCB係屬最終產品’則耐腐雛之重要性即為重大因素。而其與習知技術所製得之PCB之相對性’則屬必要。如諸業之人士所熟知’ PCB架構具有非常複雜錢電特性，而決定其在無數〇 , pcb 需⑽電子魏’ _合其物樹及_酬需。·汽翔pcB必須符合- Young. After the grain is finished, the touch surface can be more sturdy, and the overall PCB will be more sensitive to temperature 4 exposure. This is true for the outermost layer of the PCB, as well as for the ^^ and ^^^. fields*. 200938042 The various embodiments described above can be used to fabricate functional PCBs. The so-called "functional pcB" refers to the characteristics of ra made by the process of the present invention and the system of the system. The system refers to the coffee produced in the above-mentioned shame and the test results. (refers to the PCB made by the same mass production technology, according to the same manufacturing tank) in the shame and the test results. In this regard, it must be stated that there is no difference in the quality of the silk on the silk, and it will vary depending on the purpose of the target and the use of (4). For example, in the case of manufacturing a PCB as a prototype (the domain can be used for a maximum of several months), the relativeness of the corrosion resistance test is less important. Conversely, if the PCB manufactured by © is the final product, then the importance of the anti-corrosion is a major factor. And its relativeness to the PCB made by the prior art is necessary. As the people of the industry are familiar with the 'PCB architecture has very complex money and electricity characteristics, and decided that it is innumerable, pcb needs (10) electronic Wei' _ its own tree and _ remuneration. ·Steam Xiang pcB must meet

之需求’轉肖細子產品之PCB獨。在傳統咖触巾，所棚之製造機器及材料已經沿用超過60年。並經過精密之調整及最佳化，以生產各種用途之 ra。而對製造設備及材料找用則與所需之產品功能性及用途息息相關 ’並經各種已公布之PCB工㈣準綱確條上述之規献糾全球性鮮協會，脱 ⑽峨》㈣舞_。因此，她她槪裝置之目的，以生產具功能性之PCB，與其傳統之相對應製品產生相關性。所製得之PCB在重要特性及性能上必須與傳統工藝所製得之相對應 PCB，能«密棚，雖晴明係使_之製程及材料’以製造⑽。如同前述’需有相關性之特定測試為何’實與PCB之_途及朗不可分。以下之實 200938042 潘針對作為原型使用之目的介紹，但需瞭解，於本發明中，不論其測試項目為何，都只是因其目_途及顧而有差異，但其結果具高度相關性，則無不同。在作為顧之崎上，通妓町_試項目來定義㈣功雛、表狀電子學作為之測試： L在將電源接到PCB後，必須在指定之接點上量測到正確之结果。在預疋之測試向量上，由指定接點所讀取之聽需符合原設計。 jtMt業所周知上述量測之結果取決於各種參數，例如組成該讀料之〇 ^ . 0 , I、由傳統大量生產之相對應PCB之參數，建幼關性。以下之實例即顯示重要參 '說月其對PCB功旎性及表現之影響。其後，本發明用以控繼參數之方法，、mMu建立相關性之方法，將作—翻。此外，鱗解：以下討論本 _ 質上為例示之用，不得用以限制本發明之範圍。電氣域凡整性（electricalSignallntegrity，準。si是與其應用相關之頻率與電壓〆電流之結合。在過去2〇年間，沿已成為㈣設計雕巾，料重要之斯上考翻素。躲使PCB能符合魏表符合法規之需求般而5，類比及數位'系統都受多種因素影響，導致信號發生偏差，並使 SI劣化，而使整體系統表麟受影響。因此，大多數之PCB在設計上均需符合沿之要求不但如此，在设計上電磁相容性（Electr〇magneticC卿沾㈣，細也是-種重要之纖’因為由〜電子系統向另—電子系麟發生之電_射外茂，必須加以關，找符合國際鮮及絲。耻，由於SI乃是設計上重要之考量，而雛影響PCB表耻之量測結果，根縣發明之方法所製得之rcB，其s【必須 62 200938042 •所$得之相對應產品’具有冑度相_性。將^^要求轉化到材料特 14上產生衫響si最主要之因素，即為導體之形狀及阻抗，以及介電層之散熱係數。在電子學表财面H重轉項為魏峨。所謂魏_^彳旨對交流電 (AC)產生之抗拒之程度。也就是對AC線路之電阻之概念。在理論上在線路阻抗匹配時’絲路上所艇的織神為最大。此獅雕冑織置巾尤為重要。數位線路因使用高轉速度，需要能控制阻抗，才能適合其脈衝之快速上昇及下降時間。當在傳輸線中有任何部份之阻抗不匹配時，即無法獲得最大信號傳輸功率， © 而不匹喊會使信號回送。如前所述，在實際上信號的回送會影響數位高頻系統之功能及表現。因此，在許多種PCB應用設計上，能控制其阻抗為非常重要之電氣特性需求，故在本發明中，所製得之PCB之阻抗需與以傳統工藝所製得切對應產品，共有緊 _侧性。—般而言，影響阻抗之因素包括：介電層之厚度、介電常數、導電線私寬度麟度、以及焊劑罩幕之厚度。上觸有參數在已公布之工業標準中均有嚴格的絲，例如針對各種材料所公布業標準，祕即絲基^介 ❹電材料之樹聰料表。以下之公式即為一種代表性公式，作為傳輸線软雛阻抗之模型，可引為一種範例：The need to turn the PCB of the Xiaozi product. In traditional coffee towels, the machines and materials used in the shed have been in use for more than 60 years. It has been carefully adjusted and optimized to produce a variety of uses. The use of manufacturing equipment and materials is closely related to the functionality and use of the products required. And through various published PCB workers (four), the above-mentioned regulations are confined to the global fresh association, off (10) 峨 (4) dance _ . Therefore, she used the purpose of the device to produce a functional PCB that was related to its traditional counterpart. The PCBs produced must have the same characteristics and performance as the PCBs produced by the traditional processes. They can be manufactured in a dense manner, although they are made in (10). As in the previous section, 'The specific test that needs to be relevant' is inseparable from the PCB. The following 200938042 Pan is introduced for the purpose of use as a prototype, but it should be understood that in the present invention, regardless of the test items, it is only because of its purpose, but the results are highly relevant, then No difference. In the case of Gu Zhiqi, Tongyu Town _ test project to define (four) power, morphological electronics as a test: L After the power is connected to the PCB, the correct result must be measured at the designated contact. On the pre-tested test vector, the listening needs read by the specified contact are in accordance with the original design. jtMt is well aware that the results of the above measurements depend on various parameters, such as the composition of the reading material 〇 ^ . 0 , I, the parameters of the corresponding PCB produced by the traditional mass production, the establishment of the relationship. The following examples show the impact of the important part of the month on the performance and performance of the PCB. Thereafter, the method for controlling the parameters of the present invention, and the method for establishing correlation between mMu, will be turned over. In addition, the scaly solution: The following discussion is for illustrative purposes and is not intended to limit the scope of the invention. Electrical domain integrity (standard.si is the combination of frequency and voltage 〆 current related to its application. In the past 2 years, along the edge has become (four) design eagle towel, the important thing is to test the paper. Hide the PCB It can meet the requirements of Wei's compliance with regulations. 5, analog and digital 'systems are affected by many factors, leading to signal deviation and SI degradation, and the overall system is affected. Therefore, most PCBs are designed. In addition, it is necessary to meet the requirements along the line. In addition, electromagnetic compatibility in design (Electr〇magneticC (4), fine is also an important fiber's because of the electricity generated by the electronic system to another electronic system. Mao, must be closed, looking for international fresh and silk. Shame, because SI is an important consideration in design, and the young influence on the measurement results of PCB shame, RCB made by the method of invention by Genxian, its s [ Must be 62 200938042 • The corresponding product of the product has the degree of _. The most important factor in the production of the material is the shape and impedance of the conductor, and the dielectric layer. Scatter Coefficient. In the electronic form, the H-retransition item is Wei Wei. The so-called Wei _^ 彳对对对对对对对对。。。。。。。。。。。。。。。。。。。彳彳彳。。。。。。。。 When the boat on the silk road is the biggest weaving god, this lion carving woven towel is especially important. Because of the high rotation speed, the digital line needs to be able to control the impedance to suit the rapid rise and fall time of its pulse. When in the transmission line When there is any part of the impedance mismatch, the maximum signal transmission power cannot be obtained, and the signal will be sent back without being shouted. As mentioned above, the actual signal return will affect the function and performance of the digital high frequency system. Therefore, in many kinds of PCB application designs, it is possible to control the impedance as a very important electrical characteristic requirement. Therefore, in the present invention, the impedance of the fabricated PCB needs to be matched with the product manufactured by the conventional process, and is tight _ Laterality—In general, the factors affecting the impedance include: the thickness of the dielectric layer, the dielectric constant, the private width of the conductive line, and the thickness of the solder mask. The upper touch has parameters in the published industry. There are strict silks in the standard, for example, the industry standard published for various materials, the secret is the silk-based material of the electric material. The following formula is a representative formula, as a model of the impedance of the transmission line soft chick, Can be cited as an example:

7 一 I jijOL • z〇 = VgT^c 其中，R為每單位長度之阻抗，L為每單位長度之電感，g為介電材料之每單位導電度，c為每單位電容，j為虛數單位（imaginaiyunit)， ω 為角頻率（angular frequency )。以下將綱數種控制上述參數之方法。該參絲影響其沿及贼。一般而言， 63 200938042 以下所述之方法可分為三種層次之控制1料變更上、處理技術上及材料選擇上。如前所述，該PCB製造槽經過轉換及變更。在進行資料變更時，所輪入者為標準之PCB製造檔’内含所取得之原始資料，例如各層之機械座標，接腳及線路，材料，目標參數以及其他。本發明之範圍也包括將所輸入之資料變更方法，設計其資料具有與原始製造標不同之資料格式及資料描述。另如（例如）在第6圖纖示，資料轉換可在資料變更前進行，以改變原始製造樓之格式。在進行資料變更時，係將輸出之資料標加以變更，亦即，改變其資料值，而非如餅雛一般，只改變 ^ 八描述方/去。資料變更之結果’可以產生配合製程需求之資料值，用以使戶斤製得之 PCB在功能性上，能與該輸入之製造標，利用傳統大量生產製程所製得之pcB，所能具有之魏雛。互姆應，雜兩者係啊哺程，不同娜製得。在資料變更％需修正製造權之内容，其方式可針對每一層次分別依據其所含之圖型資料為之’也可將PCB冰層加以分組（_全部設為一組），針對組別為之。依據本發明所製得之功紐PCB ’在功紐上（如該PCB_^目標顧及帛撕^義之功能性），需與以傳統工藝所製得之PCB，能夠互相對應，且需能密切配合外部讀〇械尺寸。由於本發明之方法係使用自由成形製造之法及直接寫入技術，以高速生產 PCB ’故本發明也需能供應能支援上述技術讀料。在大部份情形下，所使用狀料常與省知工藝在大量生產pCB時，所使用球料不同。因此，在本發明之方法中 PCB觀之重要特性，但另—方面靡麵提供與所選用之固態自由成形製造方法及直接寫入技術，能夠相容。在本發明之專利說明書中，鱗出右干湖·物之用，但树轉材额需經過進—步處理、改良，以提 64 200938042 供所需之狀雜。耻，本㈣之方法中，有雜也包括結構及/或改進所需之特性，均如以下實施例所示。以下將說明依據本發明之-實施例，控制一導電層之導電度之實例。由於在— 般使用在直接寫入技術及自由成形製造工法之導電印劑，具有在熟化之後不能猶所需體材料導電度（bulkm—tivity)之缺點（目献量生產啦製程中所使用之導電材料99.8%為純銅)，以施加方法所製得之電路板與傳統大量生產工藝板’導電性有劣化之現象。因麟製得之電路板在表^ ® _資料變更可鱗決上述問題。其方式祕：將設計中之導電線路尺找大’以產生截面偷A之導體，喊良其導電度。最好是在導體之厚度上增加尺寸’赠在寬度上增加改腾體寬度之結果，職生繞線困難的問題’而提高同層電路互相重疊或短路之機會。 . 仏从及2犯_示資料變更故例，該資料變更將改變導電線於幾何形，得之線路具相對應性之功能。在此實僧，卿製造檀F為-標準製造檔，而pcB製造擋f，則為本發明之電路板而修正後之變更吓及F，均祕n層介電層骨則顯示其心層，而在，間，作為比對。如第· 及则所示，線路（分別為们、㈣與T1，、取叮）在χ軸及γ轴均保 ' 寸^在2轴則增加尺寸’故可提高線路Τ1，、Τ2,及13,之導電度。蝴乍法可以適用在製造财所有層次内所有線路，用以使其導電度與利用製造檔而以傳統工藝製得之電路板，能相對應。 ^ 貝料變更也可適用在介電層内產生導體用麟之步驟。透過本發明 _她撕。細編可容納 65 200938042 導電材料，而使其密度可以提高，使製成之導體之最終特性（尤其是其導電度），可以提高。第25A及25B圖顯示結合上述方法而成之製法。其中，線路们，、^，及 Τ3’經過增厚’並職入介電層中預先製作之凹處。另需說明者，為本發明之製造系統可以在_層次帽彳林哪度之導電體，其方式為朗錄寫人〆簡自由成形製程’以製作導電部份。峨方式與傳統製造工藝不同，因在傳統工藝，位於相同層次中之導電線路，高度均相彫此處所述之資料變更方法，可以提供上述優點，而在相同層次中製得高度不同之導體。可以用來例如符合特定之特性需求。 © 上述增厚導體之方法可能導致相鄰兩層之導體，太過接近，因而降低各層間之介電絕緣效果。如有此情形，應將介電層也予增厚，或以其他方式修正，而獲得較佳之介電絕緣效果。以下將說明數種控制介電絕緣效果之方法。以下說明其赌尚導孔導電度之方法。在一般pcB設計過程中，大多數之導孔係以銅塗布其側壁’用以提供不同層次間之電氣連接。在雜較小之導孔（通常為埋孔或盲孔，故非用以供插人元件），因其導體之無積相對較小，其導電度可能太低，而不適用。如有此情形，則可能透職側壁塗布型導孔，變更成填滿型導孔， ® 以擴大導電連線之截面積，並提高導電度。如第26A圖及施圖所示，本發明並非將所有導孔全加以變形。在此例中，私LV2及V3係變更成為填滿型（請見對應於製造播F’之V2’及V3’）’而導孔VI則未見變更（V1=V1，），因其已達直徑之上限。以下將說明控制導電材料特性（特別指其導電度）4理技術。在一贿使用，在紐上施加金屬之製程中，通常是將液化^/粉麟材料施加在絲上，然後加以燒結或熱化，以使材料硬化，而獲得材料之目標特性。在熟化技術領域中，熟化係以燒結或烘烤進行’對於材料之最終特性具有重大之影響。舉一特例如下：當使用 66 2009380427 I IijjOL • z〇= VgT^c where R is the impedance per unit length, L is the inductance per unit length, g is the conductivity per unit of dielectric material, c is the capacitance per unit, and j is the imaginary unit (imaginaiyunit), ω is the angular frequency. The following is a method for controlling the above parameters. The ginseng affects its edge and the thief. In general, 63 200938042 The methods described below can be divided into three levels of control, material change, processing technology and material selection. As mentioned earlier, the PCB manufacturing slot has been converted and changed. In the case of data changes, the wheeled person is the standard PCB manufacturing file containing the original data obtained, such as the mechanical coordinates, pins and lines, materials, target parameters and other layers of each layer. The scope of the present invention also includes a method of changing the input data, and designing the data to have a different data format and data description than the original manufacturing standard. As another example, in Figure 6, the data conversion can be performed prior to the data change to change the format of the original manufacturing building. When the data is changed, the output data is marked and changed, that is, the data value is changed, instead of being like a cake, only the ^8 description/go is changed. The result of the data change can generate the data value that matches the process requirements, so that the PCB made by the household can be functionally used, and the manufacturing standard of the input can be made by using the traditional mass production process. Wei chick. Mutual m should be mixed, the two are tied to each other, and different Na is made. In the data change%, the content of the manufacturing right needs to be corrected, and the method can be based on the graphic data contained in each level. 'The PCB ice layer can also be grouped (_all set as a group), for the group For it. According to the invention, the workbench PCB 'on the power button (such as the PCB_^ target takes into account the functionality of the tear), and the PCB made by the conventional process needs to correspond to each other and needs to be closely coordinated. External read mechanical size. Since the method of the present invention uses a free-form manufacturing method and a direct writing technique to produce a PCB at a high speed, the present invention is also required to be capable of supporting the above-mentioned technical reading materials. In most cases, the materials used are often different from the materials used in the mass production of pCB. Therefore, in the method of the present invention, the important characteristics of the PCB are observed, but the other aspects are compatible with the solid-state free-form manufacturing method and the direct writing technique selected. In the patent specification of the present invention, the scale of the right stem lake is used for the purpose, but the amount of the tree material to be transferred is subjected to further processing and improvement to provide the desired variety. Shame, in the method of (4), the impurities also include the characteristics required for the structure and/or improvement, as shown in the following examples. An example of controlling the conductivity of a conductive layer in accordance with an embodiment of the present invention will now be described. Because of the general use of the direct writing technology and the free-form manufacturing method of the conductive printing agent, there is a disadvantage that the bulk material conductivity (bulkm-tivity) cannot be used after the aging (the use of the production process) The conductive material is 99.8% pure copper), and the electrical conductivity of the circuit board produced by the application method and the conventional mass production process board deteriorates. The circuit board made by Lin can be used to determine the above problems. The secret of this method is to find the conductive circuit ruler in the design to create a conductor that steals the A section and shouts its conductivity. It is preferable to increase the size of the thickness of the conductor to give the result of increasing the width of the modified body, which is a problem of difficulty in wounding of the employee's, and to increase the chance of overlapping or short-circuiting the same layer circuits.仏从 and 2 _ shows the data change case, the data change will change the conductive line in the geometry, and the circuit has the corresponding function. In this case, Qing made Tan F as the standard manufacturing file, and pcB manufactures the f, which is the modified board of the invention. The modified change scares F, and the n-layer dielectric layer shows the core layer. And between, in, as a comparison. As shown in the first and the second, the lines (these, (4) and T1, respectively) are guaranteed in both the χ and γ axes, and the size is increased in the 2 axes, so that the lines Τ1, Τ2, and 13, the conductivity. The butterfly method can be applied to all the lines in all levels of manufacturing, so that the conductivity can be matched with the circuit board made by the conventional process using the manufacturing file. ^ Bead change can also be applied to the step of producing conductors in the dielectric layer. Through the invention _ she tears. Fine-grained to accommodate 65 200938042 conductive material, and its density can be increased, so that the final characteristics of the finished conductor (especially its conductivity) can be improved. Figures 25A and 25B show the method of combining the above methods. Among them, the lines, ^, and Τ3' are thickened and placed in pre-made recesses in the dielectric layer. It should be noted that the manufacturing system of the present invention can be used as a conductive body in the form of a slab. The 峨 method is different from the traditional manufacturing process. Because of the traditional process, the conductive lines located in the same level, the method of changing the data described in the high-uniformity can provide the above advantages, and the conductors of different heights are produced in the same level. . It can be used, for example, to meet specific feature requirements. © The above method of thickening the conductor may result in conductors of two adjacent layers being too close together, thus reducing the dielectric insulation between the layers. If this is the case, the dielectric layer should also be thickened or otherwise modified to achieve a better dielectric insulation effect. Several methods of controlling the dielectric insulating effect will be described below. The following describes the method of betting on the conductivity of the via hole. In the general pcB design process, most of the vias are coated with copper sidewalls to provide electrical connections between different levels. In the case of small guide holes (usually buried or blind, it is not used to insert components), because the conductor has a relatively small product, its conductivity may be too low to be applicable. If this is the case, it is possible to pass through the sidewall coating type via hole and change it to a filled via hole, ® to enlarge the cross-sectional area of the conductive wiring and improve the conductivity. As shown in Fig. 26A and the drawings, the present invention does not completely deform all the guide holes. In this example, the private LV2 and V3 systems are changed to be full (see V2' and V3' corresponding to the production broadcast F') and the via VI is not changed (V1=V1,) because it has The upper limit of the diameter. The following describes the technique for controlling the properties of conductive materials (especially their conductivity). In the process of applying a metal to a bond, the liquefied material is usually applied to the wire and then sintered or heated to harden the material to obtain the target characteristics of the material. In the field of curing technology, curing is carried out by sintering or baking, which has a significant influence on the final properties of the material. Take one special example: when using 66 200938042

Nanotechnologies公司之AG_25_ST2導電銀印劑，而以M3D成形系統供應用，如使用不同之熟化條件’將獲得不同之材料特性。如使用28⑻J/cm2之能量進行雷射燒結’則可獲得大約5.3μΏ·αη之阻抗。而如果使用烤爐在4〇〇。(：以下燒結2小時，以相同之材料卻獲得大約3.^^之阻抗。因此，依據本發明之實施例’係對加工參數也作變更，例如對熟化時間、熟化溫度、以及熟化雜。例如，在本_之编巾，導紐料製造站對於板上成形之 ❹Nanotechnologies AG's AG_25_ST2 conductive silver ink, supplied with the M3D forming system, will have different material properties if used with different curing conditions. If laser sintering is performed using an energy of 28 (8) J/cm 2 , an impedance of about 5.3 μΏ·αη can be obtained. And if you use the oven at 4 〇〇. (The following sintering was carried out for 2 hours, and the same material was used to obtain an impedance of about 3. ^^. Therefore, according to the embodiment of the present invention, the processing parameters were also changed, for example, the ripening time, the ripening temperature, and the ripening. For example, in this woven towel, the guide material manufacturing station for sheet metal forming

_ 控制。龍變更之結果也可能驗用多於一個熟化裝置，._崎射燒結及烤爐，以在製程中依特定程序，及在特定操作參數下’輪流使用。如將燒結條件與客戶對材料特性之撕目搭配，則本發明之系統_ control. As a result of the dragon change, it is also possible to inspect more than one curing device, ._single sintering and oven, to be used in turn in the process according to a specific procedure and under specific operating parameters. The system of the present invention is such that the sintering conditions are matched with the customer's material properties.

可更容易加以校正，以提供所需之墓雷糾7 M 導電!·生。例如，如果需要透過控制線路導電度值之方式，控制電狄阻抗，則可使用特製型熟化製程條件，導電性數值。料能達成所需之 /一種可以用來提高施加型成形線路導電度顺法，乃是在形簡件並熟化之後，另以輔助性處理加I。適用之特定綠級肖施_& 以直接寫入該導電元件之部份，例如形部份經最終熟化之後，利用例如電鍍等方法·厚度之2〇%。其後’在該種子層得嫣較禮副线子層將該導電耕製成所需厚㈣鍍製方法下，並不需要精確之電鍍，因為該種子層越之導電度。如此一來，在本發明之其後娜(電鑛)僅需對钟電路板為：:出所需線路圖形之幾何形狀。屬只會在種子狀金躲面上形成。口 ^全不級肖轉，目電鍍之金該介電層之介電常數也是一種相當重參數而頌嚴_合觀撕定之 67 200938042 規格。換言之’大多數之標準製造槽均會包含疊積之層次中球料資訊，祕介電層之特定絕緣特性鱗度值。本發明以下述方法，使得在即使使用相當少數種類之材料時，仍能符合各種不同之介電特性絲。與上述導電層相同，其中一種方法為改變其厚度，亦即，以改變該介電層之… 例如’第27A及27B圖即顯示在一 PCB設計下，改變介電層u參數之例。根據第27A BIU始製造檔，該介電層祕切料介電常數為&，厚度為ή。而在本實例中，該介電材料製造站僅能供應單一齡電材料，其介電常數為。 ® 為能提供相同之特性，乃將原始之介電層Li修改成Li.，其厚度經過增加，用以提供該原始製造標中所絲之介電絕緣特性。更重要的是，在製造上電路板之總厚度有其限度，才能與傳統工藝所製得^^目對應產雜。. 厚度不可超過以傳統工法大量生產製成之電路板總厚度，加上該工法所容許之誤差值（tolerance)。但如本發明所述，由於使用固態自由成形製造方法，以製作介電層，且可以Μ薄層小層組成-層，故可以精確製得極薄^^欠，而無慮上述問題。本發明另-種方法乃是將麟具有不同介電常數，以及相製程表現之介電 ® 材料層’加以結合’以達成使各原始層具有所需之介電特性之目的。在第28Α圖及 28Β圖之實例中，該介電層Li係變形成為3層各別之介電小層，共同提供絕缘值 Li ’而其總厚度為Γι’，與原始厚度Τι相對應。在本實例中，係將_介電常數不 ‘ 同之介電材料加以結合，以提供所需之絕緣雛。本發明因使用自由成形施加型製法，故可以精密之方式製得各薄層小層。本發明另一種方法’係以改變熟化條件之方式，控制介電材料之特性。例如，對SU-8之傳統熟化方法乃是包括數步驟： 68 200938042 先形成未經熟化_如有需要，可以短暫預烘烤加熱傭露於紫外線雷射輻射下。最後通常再經後烘烤，以完成熟化程序。各種參數，例如顯烤時間及溫度變化、紫外線照職度、照射方法（例如逐線掃摇或面照射）、贿時間、後烘烤時間及溫艘化等’為決綱卩無讀料最終雜之重要因素。因此，本發明之方法乃提供可以根騎需材料雛，以客製化熟化條件進行熟化，以使介電材料能適應廣大範圍之用途下，所需之各種材料特性。如此刖所述之例不用實例，PCB之各種重要特性，以及會影響pcB特性讀料 ❹雛，以及其對製作完成後之KB枝現有何影響，均已詳述。以下將說明本發明之方法如何控制上述參數之方法及裝置。該方法係用以使所製得之，在表社及在特性上能與以傳統工法所製得之相對應產品，相互呼應，而使所製得之PCB在 ’與傳統轉所製得之姆絲^她，毫不親。絲應說明者為’上述討論只是作為例示之用，不得用來限制本發曰月找圍。習知本領域工藝之人士均可由本發明之實例，得出用來控制及改良其謝料特性，而提升PCB表現之方法例如熱予特性，包括玻璃轉化溫度；機械特性，包括拉伸/剝離強度等。 © 只要其結果與已公布之工業標準，油關之目標用途及應用所賊者相符即可。由上述說明可知’本發明之製造系統、製法及材料，並不受傳統pcB製造工藝之限制條件所限，因而可以適用在廣大範圍之用途選擇，其適用範圍辆過傳級 i PCB之製造工藝。以下提供兩纖用細，以說明本發明製造内建電子元件之 PCB ’以及製造軟質/硬質_軟質pcB之應用。由於目前對於小型化，輕量化及低價化功能性rcB之要求日殷，使得⑽製造業者必婦奸元件喊在rcB以。目前可狀應包括__散式電子元 69 200938042 件’例如_、電容、電晶體、蓄電It、光電元件（photovdtaics)、侧器、記憶體、電射光源、光偵·、磁性元件、擴音器及其他元件，内建在其中。近年來更可見到之應用’則是在製作PCB時，同時（jn_situ)製造電子元件，並將電子元件之製作’作為製作PCB程序之一部份。目前可同時製作之元件，主要包括電阻及電合而其他元件，例如電晶體，也可望在不久將來即可同時製作，其顧將隨該種技術研發完成’而提高用量。據估計，在各種商用化之pcB中，約有鄕或以上之 PCB表面積’疋由不需多數接點，而可埋設或内建於層次内之電子元件所占〇用。因此可以釋放出相當大面積之PCB表面，以容_交高功能性之元件於同一面積中乂提同PCB之集積化程度及/或使得製成之之面積可以縮小，而由此更可降低製造成本。就内建型離散树鋼時製作電子元件峨技躺言，職子元彳鍵置在pcb 各層中所祕件，並不綱。而其糊之需雜件&括：獅細需少、元件厚度需底’且通常耗電功率需低，才能適用在有限的環境條件下。月b用作同時跡之元件，通常需為高變化度（麵確度）及健範圍（例如， ©可供同夺製作之電谷’其容值範圍只電容）。如果PCB係缺離散型元件及同寺製作兀件’則需特別注意選用pcB狀料，圖型形成方法，以及元件置放方法。内建離散型元件日守’更需提鬲其對準精確度，以及接點連接技術。另外，同時製作技術更要求需為特殊樹之元件，需，贼元件讀料，織通細魏麟定之量測程序及修正元件之讀值。本I月之方法及系統可以用來製作具有内建離散型電子元件及同時製作型電子兀件之PCB麟喊之 200938042 產品之製程。内建離散型電子元件之方法可包括如下之步驟： a*在導電層上作電子元件或空晶粘晶（此 b.形成介電薄層以隔絕電氣或防止短路。 c·形成導孔接點。 d·將接點金屬化。本發明之方法使用正規H曰曰技術’並提供最佳之工具，以使電子元件能建立與介電材料及導電材料’建立正確之隔絕與通導。因此，在將離散型電子元件固定 ® 〗層後可以私準生產方法進行其他製程步驟，而與例如第6圖所示之製造流程，糊結合。為支援離散型電子元件之建置，本發明之系統另可引進一貼片機(pi— ❹ placehead) ’用以自特定之托盤上拾取電子元件，並將該元件貼附到預定位置。所使用之貼片機’可如第5 @之桃機575所示。該電子元件可雜_—標準枯著劑或圖型切，娜鐵_細繼細親_可直接貼附在半熟化介電層上’因該層具有雛。在後者即不需再另行供應枯著劑。在電子元件貼附步驟繼，输咖鴨峨撕，咖⑽置形成絕緣體及導孔’及供給導電細乍為導電接線以及導孔金屬化之用。到目前為止，只有少植舰提侧_作電子树之生產祕，時製作型電子^Mtf狄㈣墨_，網顿，着雜猶抑轉糊奸.製作。典型之方法錄導概施视賴，卿輸以提供歡嶋，並使疋钗计及特疋目標應用之二維或三維圖型之方式製作。 71 200938042It can be more easily calibrated to provide the required tomb correction 7 M conductive! For example, if it is necessary to control the Didi impedance by controlling the conductivity value of the line, a special type of curing process condition and conductivity value can be used. The material can be used to achieve the desired conductivity of the forming line, but after the shape is formed and matured, the auxiliary treatment is added. A specific green-level schist _& is applied to directly write the portion of the conductive member, for example, after the final portion is aged, using, for example, electroplating or the like, 2% of the thickness. Thereafter, in the seed layer, the conductive sub-layer is used to form the desired thickness (four) plating method, and precise plating is not required because the seed layer is more conductive. In this way, in the present invention, the electric (or electric ore) only needs to be on the clock board: the geometry of the desired line pattern. Genus will only form on the seed-shaped gold hiding surface. The mouth is completely unsatisfactory, and the gold of the electroplating layer is also a relatively heavy parameter and sturdy _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ In other words, most of the standard manufacturing slots will contain the information of the ball in the layer of the stack, and the specific insulation characteristics of the secret dielectric layer. The present invention is capable of conforming to a variety of different dielectric properties of the filament even when a relatively small number of materials are used. Like the above-mentioned conductive layer, one of the methods is to change the thickness thereof, that is, to change the dielectric layer... For example, '27A and 27B show an example of changing the dielectric layer u parameter under a PCB design. According to the 27A BIU manufacturing process, the dielectric layer has a dielectric constant of & and a thickness of ή. In this example, the dielectric material fabrication station can only supply a single age electrical material with a dielectric constant of . In order to provide the same characteristics, the original dielectric layer Li was modified to Li., and its thickness was increased to provide the dielectric insulating properties of the original manufacturing standard. More importantly, there is a limit to the total thickness of the printed circuit board in order to produce impurities corresponding to the conventional process. The thickness shall not exceed the total thickness of the board produced in large quantities by conventional methods, plus the tolerances allowed by this method. However, as described in the present invention, since a solid-state free-form manufacturing method is used to fabricate a dielectric layer, and a thin layer can be formed into a layer, it is possible to accurately produce an extremely thin defect without considering the above problems. Another method of the present invention is to combine the dielectric layers of dielectric materials having different dielectric constants and phase process performance to achieve the desired dielectric properties of the respective layers. In the examples of the 28th and 28th views, the dielectric layer Li is deformed into three separate dielectric layers, which together provide an insulation value Li' and a total thickness of Γι' corresponding to the original thickness Τι. In this example, a dielectric material that does not have a dielectric constant is combined to provide the desired insulating body. According to the present invention, since a free-form application type method is used, each thin layer can be produced in a precise manner. Another method of the present invention is to control the properties of the dielectric material in a manner that alters the curing conditions. For example, the traditional curing method for SU-8 consists of several steps: 68 200938042 Forming un-cooked _ If necessary, it can be temporarily pre-baked with heat and exposed to ultraviolet laser radiation. Finally, it is usually post-baked to complete the ripening process. Various parameters, such as the time of baking and temperature change, UV exposure, exposure methods (such as line-by-line sweep or face), bribe time, post-baking time, and warming, etc. An important factor. Accordingly, the method of the present invention provides a variety of material properties that can be achieved by customizing the ripening conditions to allow the dielectric material to be adapted to a wide range of applications. The examples described in this case are not examples, the various important features of the PCB, and the impact of the PCB feature readings, and their impact on the KB branch after the completion of the production, have been detailed. The method and apparatus for controlling the above parameters by the method of the present invention will be described below. The method is used to make the corresponding products in the table and the characteristics and the corresponding products made by the traditional method, so that the prepared PCB is made in the 'conventional tradition'. Ms. ^She, no kiss. The wire should be explained as 'The above discussion is for illustrative purposes only and should not be used to limit the search for this month. Those skilled in the art can use the examples of the present invention to derive methods for controlling and improving their properties, such as thermal properties, including glass transition temperatures, and mechanical properties, including stretching/stripping. Strength, etc. © As long as the results are consistent with published industry standards, the target use of the oil and the application of the thief. It can be seen from the above description that the manufacturing system, the manufacturing method and the material of the present invention are not limited by the limitations of the conventional pcB manufacturing process, and thus can be applied to a wide range of applications, and the applicable range of the over-transfer level i PCB manufacturing process. . The following two sheets are provided to illustrate the use of the PCB of the present invention for the manufacture of built-in electronic components and the manufacture of soft/hard-soft pcB. Due to the current demand for miniaturization, lightweight and low-cost functional rcB, the (10) manufacturing industry is called rcB. At present, the shape should include __scattered electronic element 69 200938042 pieces 'eg _, capacitor, transistor, power storage It, photoelectric element (photovdtaics), side device, memory, electric light source, optical detection, magnetic component, expansion Sounders and other components are built into them. In recent years, the application has been seen in the production of PCBs, at the same time (jn_situ) the manufacture of electronic components, and the production of electronic components as part of the PCB production process. At present, components that can be fabricated at the same time mainly include resistance and electricity, and other components, such as transistors, are also expected to be produced at the same time in the near future, and the company will increase the amount with the development of the technology. It is estimated that in various commercial PCBs, about 鄕 or more of the PCB surface area 疋 is occupied by electronic components that can be buried or built into the hierarchy without requiring a large number of contacts. Therefore, a relatively large area of the PCB surface can be released, so that the high-functionality component can be integrated with the PCB in the same area and/or the fabricated area can be reduced, thereby reducing the area. manufacturing cost. When it comes to built-in discrete steel bars, the electronic components are produced. The secrets of the employees are placed in the various layers of the pcb. However, the need for miscellaneous items is included: the lion needs less, the thickness of the component needs to be lower, and the power consumption is usually low, so that it can be applied under limited environmental conditions. Month b is used as a component of the simultaneous trace, usually with a high degree of variation (face accuracy) and a range of health (for example, © for the electricity valley that can be made), the capacitance range is only capacitance. If the PCB system lacks discrete components and the same temple fabrication component, special attention should be paid to the selection of pcB materials, pattern formation methods, and component placement methods. The built-in discrete components are more compliant with the accuracy of the alignment and the connection technology. In addition, the simultaneous manufacturing technology requires that the components of the special tree be required, and the thief components should be read, and the measurement procedures of the fine Wei Linding and the reading values of the correcting components should be woven. The method and system of this month can be used to make a process for the 200938042 product of PCB Lin shouting with built-in discrete electronic components and simultaneous electronic components. The method of constructing the discrete electronic component may include the following steps: a* forming an electronic component or an apomorphous crystal on the conductive layer (this b. forming a dielectric thin layer to isolate electrical or prevent short circuit. c. forming a via hole connection d. Metallization of the contacts. The method of the present invention uses a conventional H曰曰 technique' and provides an optimum tool to enable electronic components to establish proper isolation and communication with dielectric materials and conductive materials. Therefore, after the discrete electronic component is fixed to the layer, the production method can be carried out by other methods, and the process is combined with the manufacturing process shown in, for example, Fig. 6. To support the construction of the discrete electronic component, the present invention The system can also introduce a placement machine (pi- ❹ placehead) to pick up electronic components from a specific tray and attach the component to a predetermined position. The placement machine used can be like the 5th @ The peach machine 575 is shown. The electronic component can be mixed with _-standard dry agent or pattern cut, and the nano iron _ fine fine fine _ can be directly attached to the semi-cured dielectric layer 'because the layer has a chick. In the latter That is, there is no need to supply a separate agent. The attachment step is followed by the tearing of the coffee duck, the coffee (10) forming the insulator and the guide hole' and the supply of the conductive fine wire for the conductive wiring and the metallization of the guide hole. So far, only the small ship is lifting the side The secret of the production of the tree, the production of electronic ^Mtf Di (four) ink _, net ton, mixed with the sorrow and ruin. Production. Typical method of recording the implementation of the reliance, Qing lose to provide joy, and make 疋钗Manufactured in a way that takes into account the 2D or 3D pattern of the target application. 71 200938042

在上述各種技術中，所隱含之困難在於，所施予成形之材料必須經過燒結或熟化，最後梢進行量測，因為量測電容或阻抗，並不容易。不但如此，要微調或提高其電容值或阻抗值（如在量測後發現有此必要時），可謂為不可能，至少，其複雜程度使得調整在標準商業用途中’完全不符實際。因此，同時製作型被動元件要能提供正確之功能性’必須能夠供應材料，以正確形成三度空間形狀，並能控衡料之熟化或燒結條件。然而本發明之方法則可用以正確製作内建之被動元件，其方式是透過增加供應額外之絕緣材料及額外之介電材料，其方式與供應導電材料及介電材料，以製作PCB時所用之方法相同。在以施予材料形成之被動元件製作過程中，可以使用電氣量測設傷’例如第5圖之電氣量測單元57〇，量測其讀值。本發明之方法可以正侧瓣#齡獅職，桃_爾，形成經控制之薄層且平均之小層，並在形成下—層之前，输已形成^次熟化。如果必要，則可利用本發明之方崎具概材料之_次，喻働建被動元件之值’因而可能得到正確之被動元件，而符合設計上的纖。Among the above various techniques, the difficulty is that the material to be formed must be sintered or matured, and the final tip is measured because it is not easy to measure capacitance or impedance. Not only that, it is impossible to fine-tune or increase its capacitance or impedance value (as found after measurement). At the very least, the complexity makes adjustments in standard commercial use 'completely unrealistic. Therefore, the simultaneous fabrication of passive components must provide the correct functionality' must be able to supply the material to properly form a three-dimensional shape and control the ripening or sintering conditions of the material. However, the method of the present invention can be used to properly fabricate built-in passive components by adding additional insulating materials and additional dielectric materials in a manner that is compatible with the supply of conductive and dielectric materials for PCB fabrication. The method is the same. In the fabrication of the passive component formed by the application of the material, the electrical measurement can be used to measure the damage, for example, the electrical measurement unit 57A of Fig. 5, and the reading is measured. The method of the present invention can form a controlled thin layer and an average small layer with a positive side flap #龄狮职,桃_尔, and the formation has been formed before the formation of the lower layer. If necessary, the value of the passive component of the present invention can be utilized to make it possible to obtain the correct passive component and conform to the design fiber.

一為硬質/軟質PCB。軟質PCB 軟質PCB可區料兩，—為健pcB，铸為可撓性，其上未咖赌料。雖峨蝴化元件，但並麵層之一釉。而硬質/軟質PCB則含有硬質材料及可撓性材料。軟質⑽係由特定改質材料及製賴得。魏隸於輪之使__，谢降，且卫法較為專業。例如’製啦谢，大約獅硬質KB之5倍到7倍。本發明之梅刪崎胸f pGB猶。細侧統之操 ’她可以提供自動化賴易之製作，__在小«作。修，使__型製造方 72 200938042 法可以在PCB上製作具有不同層數之區域。此外，本發明之方法可以選擇性塗敷 "電材料’以自動符餘何形狀需求，而在相同pCB上，雜可挽性及硬質區域。由於本發明可以塗布及熟化幾乎為各鮮度之介電材料，故可依據各種不同之設計上需求’規劃出各種撓錄度及三度空間樣特性。而本發明可以形成各種不同厚料’ t使得_介電層之雜，鄉成魏做冑/軟冑咖，更形容易’製造過程中，僅需極少人工參與。 ώ於月;I述各實施例巾可知，本發明所述之製程可以延伸各種用途。更多之用途 ^ 〇括用以生產二度空間PCB，多元晶片模組（multi chip module~MCM)，射頻及電磁屏壁/包覆（用以包覆射頻干擾及電磁干擾之導體）、修復概之咖，以及在既有PCB上增加特別紙/功能^次。此外，本發明之製造方法及技術，或其一部份’增可加以修改，以供高度效率之大量生產使用。最後必湏說明.本案所述之製程及技術，並不财^使用在任何特定之裝置，而可以任何子系統傭結合，而加以實施。此外，也可使用各種型態之泛用型機 °又備依據本發明所揭示之内容，加以實施。如果設計專用型之裝置，以實施本案所述之方法步驟’顿合宜。而本發明雖已以特定之實例加以說明，但其說明之性質僅屬.，而_在_本義。習槪藝之人士均可雜，·不同之硬體、軟體及靭體之結合，也可用來實施本發明。例如，以摘述之軟體可以多種程式撰寫方式或程式描述語言，例如七祕蚯，c/c*，peri，制，卿，触職， CST，EEK等，加以達成。本發明之内容，已以特定實施例翻如上。但以上之綱目的均在例示，而非制本發月、於斯藝之人士均可瞭解，本發明實可以不同级體、軟體、勒體之 73 200938042 結合，加以達成。此外’其他實現本發明之方式，對此行業之人士而言，只要閱讀本發明之專利說明書，並操作所揭示之發明内容後，將易於達成。因此，專利說明書及其實施例，僅只是供例示之用’而本發明真正之範圍及精神，應如以下申請專利範圍所示》【圖式簡單說明】附圖構成本案專利說明書的一部份，用以例示本發明之實施例，與發明之詳細說明共同制並例示本發明之主體。但BI式並_來詳盡說 0 技術特徵，所揭示之元件尺寸、大小也僅供參考。第1圖及第1A圖表示本發明一實施例之pcb製造系統之示意圖。第2A及2B圖表示根據本發明實施例照射輕射之示意圖。 - 第3A及3B圖表示本發明一實施例之介電層製作示意圖。 - 第4圖表示本發明另一實施例之PCB製造系統之示意圖。第5圖表示本發明再一實施例之pcB製造系統之示意圖。第6圖表示本發明一實施例之PCB製造方法流程圖。〇第？A圖表示本發明另—實施例之PCB製造方法流程圖。第艰圖表示層次對準示意圖。第8圖表示本發明一實施例之系統管理員方塊圖。 • 第9圖為本發明—實施例之托盤之上視圖，該托盤用來製造具有支雜之pcB。 . 第10圖為本發明一實施例之翻轉機構結構圖。第11圖表示本發明一實施例之資料轉換及改變方法流程圖。第12圖表示本發明一實施例之介電層製造站示意圖。第13圖表示本發明一實施例之介電層製作流程圖。 74 200938042 第14圖表示根據本發明一實施例與可溶錄料共同形成之介電層示意圖。第15圖顯示本發明實施例所使用之不同形狀之導孔/孔洞。第16A圖表示本發明-實施例導孔/孔洞金屬化流程圖。第i6B圖為該實施例各步驟之PCB截面圖。第ΠΑ-nC ®為根據本發明實施例之導孔/孔洞製作流程示意圖。第18A、18B圖為本發明一實施例中，以填加導電材料進行導孔/孔洞金多之實施例示意圖。第19圖為本發明-實施例中，三種使用或不使用可溶性材料形成導孔/孔於製法示意圖。第20圖顯示供應頭相對托盤形成傾斜之狀態示意圖。第21圖表示根據本發明一實施例設計之系統示意圖。第22A-22E圖表示在一托盤上製作多數⑽之不同方式示意圖。第23圖為本發明-實施例中對製得之卿作熟倾升之示意圖。One is a hard/soft PCB. Soft PCB Soft PCB can be divided into two materials - for the PCB, cast for flexibility, and there is no gambling on it. Although it is a butterfly element, it is one of the top layers of the glaze. Hard/soft PCBs contain hard materials and flexible materials. Soft (10) is made of specific modified materials and manufactured. Wei Li is in the turn of the __, thank you down, and the Weifa is more professional. For example, 'Thank you, about 5 times to 7 times the lion hard KB. The plum cuts the chest f pGB of the present invention. The fine side of the exercise ‘she can provide automation for the production of Lai Yi, __ in the small « work. Repair, make __ type manufacturer 72 200938042 method can make areas with different layers on the PCB. In addition, the method of the present invention can selectively apply "electrical materials' to automatically match the shape requirements, while on the same pCB, hetero-releasability and hard areas. Since the present invention can coat and cure almost all of the dielectric materials of various freshness, various degrees of flexibility and three-dimensional spatial characteristics can be planned according to various design requirements. However, the present invention can form a variety of different thick materials, so that the _ dielectric layer is mixed, and the town is made into a filthy/soft café, which is more convenient. In the manufacturing process, only a small amount of human participation is required. ώ于月; I describe the various embodiments of the towel, the process described in the present invention can be extended for a variety of uses. More uses ^ including the production of second-degree space PCB, multi-chip module (MCM), RF and electromagnetic screen wall / cladding (to cover the interference of RF interference and electromagnetic interference), repair General coffee, as well as adding special paper/functions on existing PCBs. In addition, the manufacturing method and technique of the present invention, or a portion thereof, may be modified for use in high-efficiency mass production. Finally, it must be explained that the process and technology described in this case are not used in any particular device, but can be implemented by any combination of subsystems. In addition, various types of general-purpose machines can be used and implemented in accordance with the disclosure of the present invention. If a dedicated device is designed, it is desirable to implement the method steps described in this section. While the present invention has been described with respect to specific examples, the nature of the description is only for the purpose of the invention. The person skilled in the art can be mixed, and the combination of different hardware, soft body and firmware can also be used to implement the present invention. For example, the software can be summarized in a variety of programming styles or program description languages, such as seven secrets, c/c*, peri, system, qing, touch, CST, EEK, etc. The content of the present invention has been turned up as above in the specific embodiment. However, the above outlines are all exemplified, and those who do not make the moon and the artist can understand that the present invention can be achieved by combining different levels, software, and levitators 73 200938042. In addition, other ways of implementing the present invention will be readily apparent to those skilled in the art by reading the patent specification of the present invention and operating the disclosed invention. Therefore, the patent specification and its embodiments are intended to be illustrative only and the true scope and spirit of the present invention should be as shown in the following claims. [FIG. Brief Description] The drawings form part of the patent specification. The embodiments of the invention are illustrated and described in conjunction with the detailed description of the invention. But BI type and _ to elaborate 0 technical features, the size and size of the disclosed components are also for reference only. 1 and 1A are schematic views showing a pcb manufacturing system according to an embodiment of the present invention. 2A and 2B are views showing a light exposure according to an embodiment of the present invention. - Figures 3A and 3B are views showing the fabrication of a dielectric layer in accordance with an embodiment of the present invention. - Figure 4 is a view showing a PCB manufacturing system according to another embodiment of the present invention. Fig. 5 is a view showing a pcB manufacturing system according to still another embodiment of the present invention. Fig. 6 is a flow chart showing a method of manufacturing a PCB according to an embodiment of the present invention. 〇 No.? Figure A is a flow chart showing a method of manufacturing a PCB according to another embodiment of the present invention. The first difficulty diagram represents a hierarchical alignment. Figure 8 is a block diagram showing a system administrator of an embodiment of the present invention. • Fig. 9 is a top view of the tray of the present invention, which is used to manufacture a pcB having a branch. Fig. 10 is a structural view showing an inverting mechanism according to an embodiment of the present invention. Figure 11 is a flow chart showing the method of data conversion and change in an embodiment of the present invention. Fig. 12 is a view showing a dielectric layer manufacturing station according to an embodiment of the present invention. Figure 13 is a flow chart showing the fabrication of a dielectric layer in accordance with an embodiment of the present invention. 74 200938042 Figure 14 shows a schematic diagram of a dielectric layer formed in conjunction with a soluble recording material in accordance with an embodiment of the present invention. Fig. 15 shows guide holes/holes of different shapes used in the embodiment of the present invention. Figure 16A is a flow chart showing the via hole/hole metallization of the present invention. Figure i6B is a cross-sectional view of the PCB of each step of the embodiment. The ΠΑ-nC ® is a schematic diagram of the via hole/hole fabrication process according to an embodiment of the present invention. 18A and 18B are schematic views showing an embodiment of conducting a hole/hole in a conductive material by adding a conductive material according to an embodiment of the present invention. Figure 19 is a schematic illustration of three methods of forming vias/holes with or without the use of soluble materials in the present invention. Fig. 20 is a view showing a state in which the supply head is inclined with respect to the tray. Figure 21 is a diagram showing a system designed in accordance with an embodiment of the present invention. Figures 22A-22E show schematic views of different ways of making a plurality (10) on a tray. Fig. 23 is a schematic view showing the ripening of the obtained sage in the present invention.

第24A、24B圖顯示變更資料賴改變導電線路幾何形狀，以使線轉性與習知方法製作之線路具相關性之實例示意圖。第25A、25B圖顯示結合本發明之方法，而使線路Τ1，、η，及乃，變厚，並形成在預先製作在導電層内之溝槽内之實例。第26Α、26Β圖表示本發明一實施例之導孔/孔洞變形示意圖。第27Α、27Β圖表示本發明一實施例中⑽之介電層Li變形示意圖。第 28A、28B 之示意圖。圖表示在本發明一實施例中將該介電層Li變更成為三小層介電層 75 200938042Figs. 24A and 24B are diagrams showing an example of the change of the data to change the geometry of the conductive line so that the linearity is correlated with the circuit produced by the conventional method. Figs. 25A and 25B show an example in which the wirings Τ1, η, and 、 are thickened by the method of the present invention, and are formed in a groove previously formed in the conductive layer. Figures 26 and 26 are schematic views showing the deformation of the via hole/hole according to an embodiment of the present invention. Figures 27 and 27 are schematic views showing the deformation of the dielectric layer Li of (10) in an embodiment of the present invention. Schematic of Figures 28A, 28B. The figure shows that in one embodiment of the invention, the dielectric layer Li is changed into three small dielectric layers. 75 200938042

【主要元件符號說明】 100 PCB製造系統 110 轉盤 115 延伸臂 120 托盤架 125 托盤 130 介電層製造站 135 熟化站 140 清潔站 145 導體製造站 150 主操作員機台 160 排料槽 170 原料容1§ 180 PCB 185 翻轉機構 225 托盤 260 液體 265A 紫外光雷射 265B 紫外光燈 270 照射之區域 275 光罩 310 樹脂層 315 導電線路 320 樹脂 320 絕騎 330 導孔/孔洞 340 導孔/孔洞 200938042[Main component symbol description] 100 PCB manufacturing system 110 Turntable 115 Extension arm 120 Pallet holder 125 Pallet 130 Dielectric layer manufacturing station 135 Curing station 140 Cleaning station 145 Conductor manufacturing station 150 Main operator machine 160 Discharge tank 170 Raw material capacity 1 § 180 PCB 185 Flip mechanism 225 Tray 260 Liquid 265A Ultraviolet laser 265B Ultraviolet light 270 Irradiated area 275 Photomask 310 Resin layer 315 Conductive line 320 Resin 320 Riding 330 Guide hole/hole 340 Guide hole/hole 200938042

350 導電材料 430 導體製造站 510B 轉盤 530 介電製造站 535 熟化站 535 烤爐 540 製造站 565 劑塗布站 565 焊膏供應站 570 電氣測試站 575 貼片站 702 級播 780 導電線路 825 控制與錯誤回復單元 900 托盤 925 支撐框元件 930 對準罩幕 935 連結元件 1005 托盤 1010 轉盤 1015 主動銷 1030 操作系浦 1035 真空吸孔 1040 真空產生器 1050 頂出機構 1055 頂針 1070 加熱器元件 77 200938042350 conductive material 430 conductor manufacturing station 510B turntable 530 dielectric manufacturing station 535 curing station 535 oven 540 manufacturing station 565 agent coating station 565 solder paste supply station 570 electrical test station 575 patch station 702 level broadcast 780 conductive line 825 control and error Recovery unit 900 tray 925 support frame element 930 alignment mask 935 connection element 1005 tray 1010 turntable 1015 drive pin 1030 operating system 1035 vacuum suction hole 1040 vacuum generator 1050 ejection mechanism 1055 thimble 1070 heater element 77 200938042

1200 製造站 1205 XYZ機台 1206 托盤定位機構 1210 托盤 1215 •謝桶 1225 光圈 1230 反射鏡系統 1235 光學元件 1400 可溶性物質製作層 1405 邊界 1410 導孔定型柱 1415 介電層 1900 可溶性層 1905 介電層 1910 導孔 1920 可溶性材料 1925 導孔 2000 托盤 2005 側壁 2010 供應頭 2020 介電材料詹 2110 介電材料供應頭 2120 導電材料供應頭 2130 熟化裝置 2140 托盤 2150 PCB 2160 上框架 200938042 2170 X-Y移動系統 2180 大量熟化裝置1200 Manufacturing Station 1205 XYZ Machine 1206 Pallet Positioning Mechanism 1210 Pallet 1215 • Xie Bucket 1225 Aperture 1230 Mirror System 1235 Optical Element 1400 Soluble Substance Production Layer 1405 Boundary 1410 Guide Hole Styling Column 1415 Dielectric Layer 1900 Soluble Layer 1905 Dielectric Layer 1910 Guide hole 1920 soluble material 1925 guide hole 2000 tray 2005 side wall 2010 supply head 2020 dielectric material Zhan 2110 dielectric material supply head 2120 conductive material supply head 2130 curing device 2140 tray 2150 PCB 2160 upper frame 200938042 2170 XY mobile system 2180 large-scale curing device

2210 PCB 設計 A2210 PCB Design A

2220 PCB 設計 B 2230 板體 2240 微形馬達 2250 托盤 2260 推桿 2270 球形轴 ❹ 2280 定位梢 2290 孔洞 2310 導孔2220 PCB Design B 2230 Plate 2240 Micro Motor 2250 Pallet 2260 Plunger 2270 Spherical Shaft ❹ 2280 Positioning Tip 2290 Hole 2310 Guide Hole

2330 PCB 2340 部份2330 PCB 2340 part

Claims

200938042 X. Patent application scope: 1. A method for manufacturing at least one functional printed circuit board (PCB), comprising the following steps: A. Obtaining a PCB manufacturing data; B. Performing data conversion to generate a modified correspondence Manufacturing file; C. Execution of data changes, including modification of the parameters contained in the modified manufacturing file to match the changes in materials and processes used in the manufacture of pCB: a change in the data to produce a modified manufacturing mark; D. a tray; Ο E. manufacturing a dielectric layer using the modified manufacturing file, the steps comprising: i. applying a liquid composition to the tray; ϋ. distributing the liquid composition on the surface of the tray; Curing a selected area of the liquid composition to fix the shape and boundary of the PCB to provide a cured insulating layer having an upper surface and a lower surface; F. to view the conductive layer and to make a conductive layer A conductive line is formed on at least one of an upper surface and a lower surface of the cured insulating layer; © _ providing - PCB, the PCB can exhibit performance according to the correlation of the conventional paste made by the dragon. 2. If the method of claim i is applied, the steps E and F are repeated a plurality of times on the upper or lower surface of the dielectric layer to form a multi-layer single-sided PCB. 3. If the method of claim 2 of the patent scope is used, the other side of the pCB is changed to make the matured material become the upper surface of the tray and the other surface of the ageing layer is shouted. Steps E and F are repeated to produce a multi-layer double-sided PCB. The method of the third item is purely repeated on the surface and the lower surface of the dielectric layer. 200938042 5. 6. 8. Over the steps, the steps of decorating the PCB are made. For example, the method of applying the fourth paragraph of the patent scope includes the steps of opening the layer to the surface of the insulating solder mask, as in the case of the fourth aspect of the patent application, the process of coating into the conductive coating. The method of claim 4, further comprising the step of marking the double-sided mark. Such as the scope of patent application! The method of the present invention, wherein the step of printing the selected region on the matured PCB with the colored dielectric material is selected by radiation irradiation. 9. The method of claim 8 is applied to the selected area. The step of irradiating the selected region with radiation includes applying the ultraviolet (1) to the exclusive side (four) Na, and the step of using the radiation to illuminate the selected region. The method of claim 10, wherein the ripening step comprises a heating step. Please ask the method of the plum _ 1 item, the PCB.

• The method of claim 1, wherein the step D is a step of providing a release agent on the tray. The method of claim 13, wherein the step of providing a release agent is one of the following: providing a fabric layer on the tray, or spraying a liquid release agent on the tray. 15 > • The method of claim 4, further comprising the step of making a via/hole in the aging process, the method comprising defining a non-radiative illumination zone, and removing the non-light shot after the curing step The step of irradiating the area 〇81 2〇〇938〇42 is a method of patenting the item l4, and the step of applying a conductive substance in the selected via hole/hole to manufacture the conductive hole. The method of claim 1, wherein the step E comprises applying a liquid composition in the tray. The liquid composition comprises an octyl epoxy ( ) photoresist and a photoinitiator. The method of claim 17, wherein the liquid composition is more secret nanoparticle. Ο

The method of claim 1, wherein the forming the conductive method comprises emitting a conductive material onto the cured insulating layer by a showerhead. The method of claim 4, wherein the small step i, a and the elaboration of the plurality of ribs are performed each time the Ε step is performed, so that the dielectric layer has a plurality of small layers. The method of claim 20, wherein the method of heating the PCB is performed after each small step m is repeated. 22. The method of claim 20, further comprising the step of forming a via/hole in the small layer each time the small steps i, ii and iii are performed. Β· _Please refer to the method of item 22 of the patent, and the step of applying a conductive substance in the selected guide hole/hole each time the small steps i, ii and iii are performed. 24. If the method of applying for the scope of patent No. 22 is included, it is also included in the implementation of several rounds of small steps. 25. If the method of the _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ After a predetermined number of times, the soluble 82 200938042 material is applied to define the vias on the dielectric layer of the germanium. 27. The method of claim 4, wherein each time step ε is performed, the small steps i, U and iii' are repeated a plurality of times and at least two different dielectric materials are used to make the The dielectric layer includes a plurality of small layers 'each of the small layers has different dielectric insulating properties. 28. The method of claim 4, wherein the step e further secrets, in the dielectric material, a step of mixing at least one of the following components: a component capable of improving adhesion, and the dielectric can be stabilized The mechanical component of the material and the component that enhances the thermal stability of the dielectric material.

29. The method of claim 4, wherein the step e further comprises the step of mixing the dielectric material with a component that improves the insulating properties of the dielectric layer material. 30. The method of claim 4, wherein the step further comprises forming an interposer on the dielectric layer to enhance adhesion of the electrically conductive material to the dielectric layer. 31. The method of claim 4, wherein the step of forming a predetermined number of times forms a step of forming at least one surface of the dielectric layer, and the step includes applying at least a portion of the conductive layer within the dielectric layer. When the side is _4-shaped, when it is smashed, the step of manufacturing the broadcast is changed by 4 degrees to form a conductive linear step. For example, if the patent is inferior, the 纟纟纟 _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ There are four methods, another step of performing at least one of the automated optical detection of the conductive line formed on the 83 200938042 and performing the resistance test on the conductive line when performing the selected number of steps E. 36. If the method of claim 4 is applied, the electrical test step is performed after the completion of the PCB fabrication. 3λ. The method of claim 4, wherein a plurality of pcBs are simultaneously manufactured on a tray. 38. The method of claim 1 wherein step E and step F each comprise the step of selecting process parameters based at least on the insulating properties required for the dielectric layer and the desired electrical resistance characteristics of the conductive layer. The method of claim 1, wherein the small step of the step E further comprises the step of leveling the upper surface of the liquid. 40. A method of manufacturing at least a functional printed circuit board, the method comprising: uploading a PCB manufacturing data to a controller; using the control to measure the health of the central office a number of pallet positioning stations' and unloading the pallet from the majority of the pallet positioning stations; using the 5H controller control - dielectric material || operation to supply a dielectric substance to the tray, and the control Working to mature the dielectric material to form a dielectric layer; using the controller to control a miscellaneous supply of n to a conductive substance onto the dielectric layer; and using the control-measurement-contact operation , Jing Jingjie and at least one of the conductive substances " heat treatment. 41. The method of claim 4, wherein the heat treatment secrets at least one of the dielectric substance and the conductive substance to at least one of the following: ultraviolet radiation, microwave radiation, and a heater Radiation 〇84 200938042 42. 43. 44. ❹ 45. 46. 47. 48. • 49. If the __ 40 item of silk, the towel of the control of the new operation - liquid supply 'a radiation can be matured liquid Supply to the tray, and wherein the step of curing the dielectric substance comprises irradiating the liquid with radiation. For example, the method of applying for the patent item 4G's operation of the towel emblem lazy button wire comprises an operation-supply head, and the dielectric material is designed according to the shape of the dielectric layer. For example, in the method of claim 40 of the patent scope, the controller uses the controller to control the operation of a flat configuration to level the dielectric layer. For example, the method of claim 4G, wherein the step of controlling the operation of the conductor supply wire is performed as an ink jet print head to supply a conductive wiring material. The method of claim 45, further comprising the step of controlling the operation of a flipping mechanism to flip the prepared plate body to form conductive lines on both sides of the board. If the method of claim 40 is applied, the method of making the ice can be at least two. The method of claim 40, further comprising the steps of: operating the controller to generate a freeform manufacturing slot using at least the PCB manufacturing data file; and operating the controller to change the freeform manufacturing building to be changed The subsequent manufacturing file; wherein the selected material in the freeform manufacturing building is modified such that the pCB has functional characteristics associated with the functional characteristics of the conventional method technology %tPCB. The method of claim 48, wherein the changing to the modified manufacturing method further comprises the step of generating a file for controlling the familiarity to shape the via/hole. The method of claim 49, wherein the method of modifying the modified groove further comprises generating a file to control the forming mechanism to shape the via hole/hole and including the inclined, non-vertical sidewall 85. 50. Steps of 200938042. For example, the method of applying for the patented circumstance, wherein the method of changing to the modified manufacturing file further comprises generating a file to create a matching structure on each of the prepared ice bodies to ensure that the wartime can be always obtained. The correct alignment step. The method of claim 40, wherein the controlling the operation of the object supply by the controller comprises the step of supplying a conductive substance on both sides of the dielectric layer. For example, the method of claim 40 of the patent patent includes the steps of setting the parameters of the cooked money to prepare a dielectric layer having a chewing property of the conventional pcB made according to the Weijian data; The method of claim 40, wherein the method of setting the conductor supply and the heat treatment station is further configured to have a conductive layer having the same characteristics as the conventional PCB manufactured according to the manufacturing data. 55. The method of claim 48, wherein the method of modifying the modified data slot further comprises the step of varying the design thickness of the conductive line to reduce the resistance. _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ And a step of applying a conductive substance in the hole to form a via hole. The method of the above-mentioned Patent Item 56 is formed by at least two layers of two-year electrical materials of the small layer of the towel. Shen Yue specializes in her method of item 40. The other secret uses the controller to control the operation of the dielectric material ship and the feeder to apply a dielectric column and apply a dielectric around the cylinder: Way, the step of forming a guide hole. 86 200938042 The method of claim 40 of the scope of claim π, further comprising using the controller to control the dielectric material, the body supply device and the operation of a visor, to apply the soluble material a conductive hole is shaped, and a dielectric layer is applied to the soluble material, and the conductive material is removed from the dielectric layer, and a conductive material is applied into the hole to form a conductive hole. The steps. 60. The method of claim 40, further comprising the step of using the controller to control the operation of the dielectric member to form a pin coating step. 61. The method of claim 40, further comprising using the controller to control the © operation of the dielectric leak repeller to form a flux mask step. 62. The method of claim 4, wherein the step of controlling the operation of the dielectric material to supply the colored dielectric substance to form a mark. • 63·—A method of manufacturing a work-buckle PCB, which lacks: 'The main dielectric layer with the upper surface and the lower surface, the method comprising applying a dielectric material on the manufacturing tray, the cake is dielectric The material is exposed to a curing process to shape the area and boundary of the main dielectric layer; ® is formed on the upper surface of the main dielectric layer - (4) a conductive circuit layer and a separate layer; and the main dielectric At least one conductive circuit layer is formed on the lower surface of the layer. 64. The method of claim 63, wherein the step of exposing the dielectric material to a curing process comprises the step of illuminating the dielectric material with a light source. 65. The method of claim 63, wherein the step of exposing the dielectric material to the step of curing the portion of the curing process comprises the step of curing the main dielectric layer. The method of claim 63, wherein the step of forming each of the conductive circuit layers comprises supplying a conductive material using direct ❹ 380 200938042 direct-wnfc, and curing at least a portion of the conductive material step. ^Application _ _ _ 63 method </ RTI> Also includes the step of forming a hole in the dielectric layer of the tender, and applying a conductive material in the manner of the scaly hole. The method of claim 67, wherein the method of forming the via hole comprises the step of forming a hole with a hole ___, a tree surface. For example, the method of claim 67, wherein the method of forming a guide hole includes applying a soluble material to define the guide hole, and thereafter forming each of the rides, And the step of removing the soluble material after forming each county. The method of claim 63, and the method of forming at least one of a pin coating, a touch mask, and a mark. 72. The method of claim 63, wherein the forming The method of forming a small layer having a thickness of a portion of the viewing layer and a step of forming the lower layer in the formation of the next layer. 73. The method of claim 72, further comprising the step of forming a hole in each of the small layers and applying a force of the σ conductive material in the hole after the layer is matured. 74. The method of claim 73, wherein the forming the hole comprises the step of changing the diameter of the holes of each of the small layers such that the via holes formed in the respective insulating layers have inclined side walls. 75. The method of claim 67, wherein the method of applying the electrically conductive material comprises the step of applying a sidewall of the selected aperture but completely filling the other aperture. 76. The method of claim 63, further comprising the step of performing an electrical test to verify the functionality. 88 200938042 T7. The method of claim 63 is another step of the second functional μ, which comprises the following steps: _ ripening process 'making the main dielectric layer while making the second main medium The area and the boundary of the electrical layer are shaped; a series of mutually spaced conductive circuit layers and a ride are formed on the surface of the second main dielectric layer; and at least a conductive circuit layer is formed on the surface of the ητ of the second main dielectric layer. 78·- A system for manufacturing printed circuit boards (pCB), which lacks: - a central processing station, so that an extendable robot arm can be used to load a tray; and the tray positioning mechanism can be accessed by the robot arm. Wherein, the tray is received by the robot arm; at least one dielectric material supply is located in the robot arm; at least - conductive material is supplied to the wire, and the health machine II arm is accessible; - the ripening station is located The robot arm is accessible; and an operator machine is coupled to the dielectric substance supply, the conductive substance supply and the curing station and controls the operation thereof. For example, the system of claim 6 of the patent scope H 78, further includes a manufacturing station in which the dielectric substance supply, the conductive substance supply, and the tray positioning mechanism are disposed. • If the system of patent application No. 78 is included, the following includes: The first-manufacturing station's position where the thief can reach the arm, and the singer who calls the dielectric supplier and the tray positioning mechanism; and the 'silk device' Conductive material supply and 89 200938042 - the first disc positioning mechanism. 81. The system of claim 1 wherein the dielectric substance supply comprises - a liquid supply; and - a developing mechanism. The system of claim 81, wherein the developing mechanism comprises a radiation source. A system as claimed in claim 82, wherein the source of illumination comprises an ultraviolet source. 84

If the application for the syllabus of item 78 is applied, the towel scale material supply includes a supply head. 85 The system of claim 84, wherein the supply head can change the angle of inclination. 86 The system of claim 78, further comprising a flipping mechanism for flipping the body made in the tray. 87. The system of claim 86, wherein the turning mechanism is disposed within the central processing station. The system of claim 78, further comprising a processor for receiving PCB manufacturing materials and converting the control instructions for controlling the dielectric material supply, the conductive material supply and the heating station, and The control command is further changed to change the parameters of the PCB manufacturing data. 89 The system of the Kashin May patent scope, item 78, further includes a release mechanism to disengage the finished plate from the tray. Shen. The system of Section 78 of the monthly patents also includes a release agent supply located where the robot arm is accessible. 9l The system of Section 81 of the “Shenzhen® Patent Range” includes a cleaning mechanism for removing substances that are not developed by the developing mechanism. 2. The system of claim 78, including a flux cover wire applicator, a health care robot arm or a 200938042 ~ handling robot accessible 93. The system of claim 78 of the patent application 'includes a marker application The device is located where the robot arm or a handling robot can reach. %, for example, the system of claim 7S, and the foot-applicator, which is located in the robot arm or a transport robot. 95. The system of claim 78, wherein the system further comprises an electrical component assembly unit located in the robot arm or a handling robot. The system of claim 89, wherein the release mechanism can include a tray opening mechanism. 97. The system of claim 82, further comprising a controller to dynamically change the focus of the consumable source. '98. The system of claim 78, further comprising a heater to heat the tray. The system of claim 79, wherein the manufacturing station comprises an inert gas atmosphere. 100. The system of claim 80, wherein the first and second manufacturing station towels are at least one inert atmosphere. 〇 101. The system of claim 79, wherein the tray has a majority of lockable small trays. 102. A system for manufacturing a printed circuit board (PCB), the system comprising: at least one dielectric system for fabricating a dielectric layer; • at least a conductor subsystem for fabricating a conductive layer, - a curing subsystem; An operator machine to control the operation of the system; and an 'transport mechanism' to carry each subsystem to one or more pcB articles of manufacture. 200938042 103. The system of claim 2, wherein the electronic system is secret: a liquid supply; and a 'developing mechanism° 104. The system of claim 1, wherein the developing mechanism Includes a light source. 1〇5. For example, the system of claim 1 of the patent scope, wherein the subsystem is a printed head. The system of claim 105 of the patent scope, another secret cavity, can supply an inert gas atmosphere during the manufacturing process. 〇申申申申申申〇申申申申申申申申申申申申申申申申申申申申申The system of claim 1 of the patent application, wherein the curing subsystem comprises a furnace. A system of claim 107, wherein the curing subsystem includes a heater to heat the tray. The system of the first aspect of the invention, wherein the liquid supply comprises a plurality of tilts. Cut the fibre 15 of the 104th item, the towel of the conductor can be lacking in the supply of the majority. The system of claim 102, wherein the conductor subsystem comprises a seed layer supply and a conductive line manufacturer. For example, the purity of the claim is as follows: wherein the seed layer supply comprises at least a supply head, and the switch line manufacturer is a plating system. 92