200935225 υ/ua^i.i w zo840twf.doc/n 九、發明說明： 【發明所屬之技術領域】 本發明是關於一種裝置與方、土 識別系統㈣之裝置與方法去，且_是關於一種可 【先前技術】200935225 υ/ua^ii w zo840twf.doc/n IX. Description of the invention: [Technical field of invention] The present invention relates to a device and a device for identifying a square and soil identification system (4), and _ is related to Prior art
„種類相當豐富’傳統常見的伺服器有機架式 ，式’其中機架式的伺服器有m、犯和_統機二 式的伺服器有5U和6U系統。 σ 伺服器的生產廠商在設計主機板時，有時候需要考慮 到-塊主機板可能會應用於多種伺服器的機齡統。由於 不同的機㈣統會有;f同的周軌置，在這種情況下，傳 統作法是：使者在應㈣需要知道該域板是I在什麼 型式的機箱裏，進而進行手動區分配置。 傳統的做法是在主機板上設置識別碼（identificati〇n， ID)來區分出不同的配置，我們通常稱之為系統識別 (system ID)。比如生產廠商所設計的主機板相容於⑴機 ‘式和2U機架式系統’傳統的做法是設置兩位元的系統識 別來區分 ’ SYS—ID1和SYS_ID0 ;當SYS_IDl/0為00時’表 示該主機板應用在1U機架式系統中；而當sys_ID1/0為01 時，則表示該主機板應用在2U機架式系統中。而設置和改 變系統識別的方法，通常有以下幾種： 1、直接通過電阻上拉（Pull-up)或下拉（Pull-down) 來設置系統識別的邏輯高低，或是通過改變電阻上拉或 下拉電阻來改變系統識別。 200935225 v …"…，-6840twf.doc/n 2、 以軟體存儲系統識別，通過刷新軟體來改變系統 識別。 3、 用開關（switch)來控制上拉（Pull-up)或下拉 (Pull-down)’通過撥動開關來改變系統識別。 上述的這些傳統方法，都需要人為識別、操作去改變 系統識別的設置’因此增加了操作步驟，並且容易出差錯； 而且對於應用於不同的機箱系統，由於人為的系統識別改 ❹ 變了主機板上的狀態，因而無法做到隨取隨用，靈活性受 到了限制。在量產出廠時還必須要做到不同系統的主機板 的區分對待。 【發明内容】 本發明的目的是提供一種可識別系統型態之裝置，主 機板對周邊背板的硬體設定是主機板經由内部整合電路匯 流排或系統管理匯流排來讀取識別資訊，主機板根據識別 資訊來識別出系統型式以進行配置。 ❹ 本發明另提供一種可識別系統型態之方法，主機板不 需人為設定，主機板可以從内部整合電路匯流排或系統管 理匯流排所讀取到的識別資訊來自動匹配系統，使得主機 板可以直接應用於所支援的不同的機箱的系統。 本發明提出一種可識別系統型式之褒置，適用以識別 其所處的系統型式以進行配置。此裝置包括主機板以及周 邊背板。主機板包括中央處理單元、信號資料介面、以及 内部整合電路匯流排或系統管理匯流排。主機板適用以組 合其他的背板。周邊背板通過信號資料介面輕接主機板， 6 200935225 5840twf.doc/n 並且還通過内部整合電路匯流排或系統管理匯流排耦接主 機板，周邊背板上存放識別資訊。其中，主機板對周邊背 板的硬體δ又疋疋主機板經由内部整合電路匯流排或系統管 理匯流排來讀取識別資訊，主機板根據識別資訊來識別出 系統型式以進行配置。 上述之裝置，在一實施例中，周邊背板為硬碟背板。 上述之裝置，在一實施例中，周邊背板包括記憶體， 〇 此記憶體用以存放識別資訊。 上述之裝置，在一實施例中，記憶體為唯讀記憶體。 上述之裝置，在一實施例中，主機板還包括晶片組、 以及基本輸出輸入系統單元或是基本管理控制器。晶片組 耦接至中央處理單元。晶片組通過内部整合電路 (Inter-Integrated Circuit，I2C )匯流排或系統管理匯流 (System Management Bus，SMBus)排耦接至憶體。所述 基本輸出輸入系統單元或是所述基本管理控制器輕接至晶 片組，通過内部整合電路匯流排或系統管理匯流 ¥ 別資訊。 上述之裳置，在一實施例中，系統型式為機架式或塔 式。 從另一觀點來看，本發明另提出一種可識別系統型式 之方法，此方法適可識別裝置所處的系統型式以進行配 ^中裝置包括主機板以及周邊背板，主機板包括中央 处^單7〇、域資料介面、以及内部整合電路匯流排或系 統&理匯流排，主機板適用以組合其他的背板，周邊背板 200935225 __________ _j840twf.doc/n 通過該信號資料介面耦接主機板，並且還通過内部整合電 路匯流排或系統管理匯流排耦接主機板，此方法至少包括 下列步驟：存放識別資訊於周邊背板上；主機板通過内部 整合電路匯流排或系統管理匯流排來讀取識別資訊；以及 主機板根據識別資訊識別出該系統型式來配置。 上述之方法，在一實施例中，存放識別資訊於周邊背 板上之步驟更包括.存放識別資訊於周邊背板之記憶體上。 e 上述之方法，在一實施例中，主機板通過内部整合電 路匯流排或系統管理匯流排來讀取識別資訊之步驟更包 括：主機板從記憶體讀取識別資訊。 本發明因採用周邊背板存放識別資訊與主機板通過 内部整合電路匯流排或系統管理匯流排來讀取識別資訊的 結構，因此主機板可以從周邊背板所讀取到的識別資訊來 自動匹配系統，使得主機板可以直接應用於所支援的不同 的機箱的系統。 為讓本發明之上述和其他目的、特徵和優點能更明顯 易懂，下文特舉本發明之實施例，並配合所附圖式，作詳 細說明如下。 【實施方式】 在下述諸實施例中，當元件被指為「連接」或「耦接」 至另一凡件時，其可為直接連接或耦接至另一元件，或可 能存於其間之元件。相對地，當元件被指為「直接連 接」或「直接耦接」至另一元件時，則不存在有介於其間 之元件。 8 200935225 ‘ •，知v840twf.doc/n 圖1與圖2為根據於本發明實施例的裝置方塊圖。對於 不同的機箱的系統’會有不同的周邊配置。我們根據這個 特點，讓主機板MLB通過識別接入的周邊設備來自動識別 所處的系統類別。上述的主機板MLB是指具有中央處理單 元（未繪示）、信號資料介面1〇以及匯流排之組件的電 路板’主機板MLB適用來與其他電路的背板來作組合。在 此’實施例以設計一塊主機板MLB相容於最常見的1U機架 ❹ 式或2U機架式的伺服器系統為例。當然熟悉本領域的普通 技術人員應當瞭解，系統型式可以為機架式或塔式，並且 此實施例可以應用於其他的電腦系統上，因此專利保護的 範圍不以實施例為限。 請參考圖1，對於1U和2U機架式系統，因為機箱的高 度不同，所能容納的硬碟個數也會不一樣，因此可以設計 相應的不同硬碟背板。此實施例的周邊背板可以為硬碟背 板’而主機板MLB與周邊背板HDBP間除了有信號資料介 面10相連外’會有另外的匯流排12，匯流排12可以是内部 ® 整合電路（Inter-Integrated Circuit, I2C )匯流排或系統管理 匯流排（System Management Bus，SMBus)。 因此’我們可以將1U機架式的資訊或是2U機架式的 資訊存放在周邊背板HDBP上，例如可以將系統識別或者 背板識別碼等可以區分的資訊存放在周邊背板HDBp的記 憶體ROM裏。此記憶體尺〇]^可以是唯讀記憶體，當然也 可以是其他種類的儲存媒體。主機板MLB對周邊背板 HDBP的硬體設定是主機板經由内部整合電路匯流 9 6840twf.doc/n 200935225 排或系統管理匯流排12來讀取識別資訊idm，主機板 MLB根據識別資訊IDM來識別出其本身與周邊背板 HDBP耦接之間的系統型式，並進行配置。 請參看圖2 ’主機板MLB可以包括晶片組（Chipset) 21 ’晶片組21耦接至周邊背板HDBP的記憶體尺〇]^。晶 片組21通過匯流排22耦接至記憶體R〇M，其中匯流排 22可以是内部整合電路匯流排或系統管理匯流排。 ❹ 主機板MLB還可以包括中央處理單元CPU以及基本 輸出輸入系統單元23。中央處理單元CPU耦接至晶片組 21。基本輸出輸入系統（Basic邮饥〇utpUt SyStem, BIOS ) 單元23麵接至晶片組21，並且主機板mlb與周邊背板 HDBP間有信號資料介面2〇相連。 在開機過程中，主機板MLB上的基本輸出輸入系統單 元23通過與周邊背板HDBP相連的匯流排22來讀取周邊背 板HDBP上的資訊idM。主機板MLB根據識別資訊IDM來 識別出系統型式，從而區分知道主機板1^1^當前所處的系 © 統是機架式或塔式，甚至還可以知道系統是機架式的11；還 疋2U等等’進而進行配置。 請參看圖3，圖3為根據於本發明另一實施例的裝置 方塊圖。除了基本管理控制器（Baseb〇ar(j Management Controller，BMC) 33，圖3的大部分組件和圖2相同。基 本管理控制器33用以提供和系統上的CPU溝通的管道， 還可以用來讀取系統偵測值及記錄相關資料。基本管理控 制器33的作用同於圖2的基本輪出輸入系統單元23 ,其 200935225 )840twf.doc/n 可以通過内部整合電路匯流排或系統管理匯流排讀取存放 於背板上的識別資訊IDM。 圖4為根據於本發明實施例的方法流程圖。步驟4〇1〜 步驟4_實施方式可⑽合上述的圖丨、02或圖3的實施 例說明來進行，在此不加以贅述。 上述實施例的作法不需要在主機板上設置不同的系統 識別區分，當主機板用在不同的系統中時，可以直接裝好 ❹硬體設備，開機時主機板會自動識別周邊背板上的資訊來 區分系統。由於上述實施例的方法可以不需要人為識別操 作’因此不會出現誤操作，也不需要在出薇時對應用於比 如是1U和2U系統的主機板進行區分。 綜上所述，對於不同的機箱的系統’會有不同的周邊 配置。本發明實施例根據這個特點，讓主機板通過識別接 入的周邊月板來自動識別所處的系統類別。本發明實施例 的主機板不需人為設定，並可以直接應用於所支援的不同 的機箱的系統，對於同一塊主機板，可以隨時直接應用二 11 所支援不同的機箱系統，因此方便靈活。 〜' 雖然本發明已以實施例揭露如上，然其並非用以限定 本發明，任何所屬技術領域中具有通常知識者，在不^二 本發明之精神和範圍内，當可作些許之更動與潤飾，因此 本發明之保護範圍當視後附之申請專利範圍所界定者為 〇 【圖式簡單說明】 圖1為根據於本發明實施例的裝置方塊圖。 11 200935225 >840twf.doc/n 圖2根據於本發明另一實施例的裝置方塊圖。 圖3根據於本發明再一實施例的裝置方塊圖。 圖4為根據於本發明實施例的方法流程圖。 【主要元件符號說明】 10、20 :信號資料介面 12、22 :匯流排 21 .晶片組 ^ 23 :基本輸出輸入系統單元 33 :基本管理控制器 401〜403 :方法流程的步驟 CPU :中央處理單元 HDBP :周邊背板 IDM :識別資訊 MLB :主機板 ROM :記憶體 12„There are quite a variety of types. The traditional servos are rack-mounted. The rack-mounted servers have 5, 6 and 6U servers. The manufacturer of the σ server is in design. When the motherboard is used, sometimes it is necessary to consider that the -block motherboard may be applied to the age of the various servers. Since different machines (four) will have the same circumference; in this case, the traditional practice is The messenger should (4) need to know what type of chassis the I-board is in, and then manually distinguish the configuration. The traditional approach is to set the identification code (identificati〇n, ID) on the motherboard to distinguish different configurations. We usually call it system ID. For example, the motherboard designed by the manufacturer is compatible with (1) machine type and 2U rack system. The traditional approach is to set the two-digit system identification to distinguish 'SYS- ID1 and SYS_ID0; when SYS_IDl/0 is 00, 'This board is used in the 1U rack system; and when sys_ID1/0 is 01, it means the board is applied in the 2U rack system. And changing the system identification The method usually has the following types: 1. Set the logic level recognized by the system directly through pull-up or pull-down, or change the system identification by changing the resistance pull-up or pull-down resistor. 200935225 v ..."...,-6840twf.doc/n 2. Identify the software storage system and change the system identification by refreshing the software. 3. Use the switch to control the pull-up or pull-down (Pull- Down) 'Turn the switch to change the system identification. These traditional methods require human identification and operation to change the system identification settings'. Therefore, the operation steps are added and errors are easy to make; and for different chassis systems. Since the artificial system identification has changed the state on the motherboard, it is impossible to use it at will, and the flexibility is limited. In the mass production, the motherboard of different systems must be treated differently. SUMMARY OF THE INVENTION An object of the present invention is to provide an apparatus for recognizing a system type. The hardware setting of the motherboard to the peripheral backplane is that the motherboard is internally integrated. The bus bar or the system management bus bar reads the identification information, and the motherboard recognizes the system type according to the identification information for configuration. ❹ The present invention further provides a method for recognizing the system type, the motherboard does not need to be manually set, and the motherboard The identification information read from the internal integrated circuit bus or the system management bus can be automatically matched to the system so that the motherboard can be directly applied to the system supported by the different chassis. The present invention proposes an identifiable system type. The device is adapted to identify the system type in which it is located for configuration. The device includes a motherboard and a peripheral backplane. The motherboard includes a central processing unit, a signal data interface, and an internal integrated circuit bus or system management bus. The motherboard is suitable for combining other backplanes. The peripheral backplane is connected to the motherboard through the signal data interface, and is also coupled to the main board through an internal integrated circuit bus or system management bus, and the identification information is stored on the peripheral backplane. The hard disk δ of the motherboard to the peripheral backplane and the motherboard are read by the internal integrated circuit bus or the system management bus, and the motherboard recognizes the system type according to the identification information for configuration. In the above embodiment, the peripheral backplane is a hard disk backplane. In the above embodiment, the peripheral backplane includes a memory, and the memory is used to store identification information. In the above apparatus, in one embodiment, the memory is read only memory. In the above described apparatus, in one embodiment, the motherboard further includes a chipset, and a basic output input system unit or a basic management controller. The chip set is coupled to the central processing unit. The chipset is coupled to the memory by an Inter-Integrated Circuit (I2C) bus or a System Management Bus (SMBus). The basic output input system unit or the basic management controller is lightly connected to the wafer group, and the communication is managed by an internal integrated circuit bus or system. In the above embodiment, the system type is a rack or a tower. From another point of view, the present invention further provides a method for recognizing a system type, which is suitable for identifying a system type in which the device is located to perform a device including a motherboard and a peripheral backplane, and the motherboard includes a central portion. Single 7〇, domain data interface, and internal integrated circuit bus or system & bus, the motherboard is suitable for combining other backplanes, peripheral backplane 200935225 __________ _j840twf.doc/n through the signal data interface coupling host The board is also coupled to the motherboard through an internal integrated circuit bus or system management bus. The method includes at least the following steps: storing identification information on the peripheral backplane; the motherboard is connected through an internal integrated circuit bus or system management bus. The identification information is read; and the motherboard is configured according to the identification information to identify the system type. In the above method, in an embodiment, the step of storing the identification information on the peripheral backplane further comprises: storing the identification information on the memory of the peripheral backplane. e The above method, in an embodiment, the step of the motherboard reading the identification information through the internal integrated circuit bus or the system management bus bar further comprises: the motherboard reading the identification information from the memory. The invention uses the peripheral backboard to store the identification information and the motherboard to read the identification information through the internal integrated circuit bus bar or the system management bus bar, so the motherboard can automatically match the identification information read from the peripheral backplane. The system allows the motherboard to be directly applied to systems supported by different chassis. The above and other objects, features and advantages of the present invention will become more <RTIgt; [Embodiment] In the following embodiments, when an element is referred to as being "connected" or "coupled" to another element, it may be directly connected or coupled to another element, or may be present in between. element. In contrast, when an element is referred to as being "directly connected" or "directly coupled" to another element, there are no intervening elements. 8 200935225 ‘, 知 v840twf.doc/n FIGS. 1 and 2 are block diagrams of devices in accordance with an embodiment of the present invention. There are different perimeter configurations for systems with different chassis. Based on this feature, we let the motherboard MLB automatically identify the system category in which it is located by identifying the connected peripherals. The above-mentioned motherboard MLB refers to a circuit board' motherboard MLB having a central processing unit (not shown), a signal data interface, and a busbar assembly, which is suitable for combination with backplanes of other circuits. In this example, the design of a motherboard MLB is compatible with the most common 1U rack or 2U rack server system. It will be understood by those of ordinary skill in the art that the system type can be rack or tower, and this embodiment can be applied to other computer systems, and thus the scope of patent protection is not limited by the embodiments. Please refer to Figure 1. For 1U and 2U rackmount systems, because the height of the chassis is different, the number of hard disks that can be accommodated will be different, so you can design different hard disk backplanes. The peripheral backplane of this embodiment may be a hard disk backplane' and the main board MLB and the peripheral backplane HDBP are connected with a signal data interface 10, and there will be another busbar 12, which may be an internal® integrated circuit. (Inter-Integrated Circuit, I2C) Bus or System Management Bus (SMBus). Therefore, we can store 1U rack-mounted information or 2U rack-mounted information on the peripheral backplane HDBP. For example, you can store information such as system identification or backplane identification code in the memory of the peripheral backplane HDBp. In the body ROM. This memory size can be a read-only memory, and of course it can be other kinds of storage media. The hard disk setting of the motherboard MLB to the peripheral backplane HDBP is that the motherboard reads the identification information idm via the internal integrated circuit sink 9 6840twf.doc/n 200935225 row or the system management bus 12, and the motherboard MLB recognizes according to the identification information IDM. The system type between itself and the peripheral backplane HDBP is coupled and configured. Referring to FIG. 2, the motherboard MLB may include a Chipset 21' chipset 21 coupled to the memory footprint of the peripheral backplane HDBP. The wafer group 21 is coupled to the memory R〇M through the bus bar 22, wherein the bus bar 22 can be an internal integrated circuit bus or a system management bus.主机 The motherboard MLB may also include a central processing unit CPU and a basic output input system unit 23. The central processing unit CPU is coupled to the chip set 21. The basic output input system (Basic mail utpUt SyStem, BIOS) unit 23 is connected to the chip set 21, and the motherboard mlb is connected to the peripheral backplane HDBP with a signal data interface 2〇. During the boot process, the basic output input system unit 23 on the motherboard MLB reads the information idM on the peripheral backplane HDBP through the bus bar 22 connected to the peripheral backplane HDBP. The motherboard MLB recognizes the system type according to the identification information IDM, thereby distinguishing that the system in which the motherboard 1^1^ is currently located is rack or tower, and even knows that the system is rack-mounted 11;疋 2U and so on 'and then configure. Referring to Figure 3, there is shown a block diagram of an apparatus in accordance with another embodiment of the present invention. In addition to the Basic Management Controller (BMC) 33, most of the components of Figure 3 are the same as Figure 2. The Basic Management Controller 33 is used to provide a conduit for communication with the CPU on the system. The system detection value is recorded and the related data is recorded. The basic management controller 33 functions the same as the basic wheel input system unit 23 of FIG. 2, and its 200935225) 840 twf.doc/n can manage the convergence through the internal integrated circuit bus or system. The row reads the identification information IDM stored on the backplane. 4 is a flow chart of a method in accordance with an embodiment of the present invention. Steps 4〇1 to 4: The embodiment may be carried out in combination with the above-described embodiments of Fig. 2, 02 or Fig. 3, and will not be described herein. The foregoing embodiment does not need to set different system identification distinctions on the motherboard. When the motherboard is used in different systems, the hardware device can be directly installed. When the motherboard is turned on, the motherboard automatically recognizes the peripheral backplane. Information to distinguish the system. Since the method of the above embodiment can eliminate the need for human identification operation, there is no erroneous operation, and it is not necessary to distinguish between motherboards for use in, for example, 1U and 2U systems. In summary, there are different peripheral configurations for systems with different chassis. According to this feature, the embodiment of the present invention allows the motherboard to automatically identify the type of system it is in by identifying the incoming perimeter. The motherboard of the embodiment of the present invention does not need to be manually set, and can be directly applied to the system supported by different chassis. For the same motherboard, the different chassis systems can be directly applied at any time, so it is convenient and flexible. The present invention has been disclosed in the above embodiments, but it is not intended to limit the invention, and any one of ordinary skill in the art may, in the spirit and scope of the invention, make some modifications. The scope of the present invention is defined by the scope of the appended claims. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram of a device according to an embodiment of the present invention. 11 200935225 >840twf.doc/n FIG. 2 is a block diagram of a device according to another embodiment of the present invention. Figure 3 is a block diagram of a device in accordance with still another embodiment of the present invention. 4 is a flow chart of a method in accordance with an embodiment of the present invention. [Main component symbol description] 10, 20: Signal data interface 12, 22: Bus bar 21. Chip group ^ 23: Basic output input system unit 33: Basic management controller 401 to 403: Process flow steps CPU: Central processing unit HDBP: Peripheral Backplane IDM: Identification Information MLB: Motherboard ROM: Memory 12