200932664 九、發明說明： 【發明所屬之技術領域】 本發明係關於一種奈米級鍺的製造方法，特別 是一種可以同時形成奈米點結構、奈米盤結構以及 奈米環結構之鍺金屬結構的製造方法。 【先前技術】 φ 形成奈米級結構鍺的習知技術係利用介電層， 例如：二氧化碎（Silicon Dioxide，Si〇2)、氮化碎 (Silicon Nitride，SisNO、二氧化給（Hafnium200932664 IX. Description of the Invention: [Technical Field] The present invention relates to a method for producing a nano-scale ruthenium, and more particularly to a ruthenium metal structure capable of simultaneously forming a nano-dots structure, a nano-disk structure, and a nano-ring structure Manufacturing method. [Prior Art] A conventional technique for forming a nanostructure structure φ utilizes a dielectric layer such as: Silicon Dioxide (Si 2), Nitride (Silicon Nitride, SisNO, Dioxide) (Hafnium)
Dioxide，Hf〇2)、氧化銘（Aluminum Oxide，AI2O3) 等，與紗（S i 1 i c ο n，S i)或鍺（G e r m a n i u m，G e)等半 導體材料之間性質的不同，以化學氣相沉積 (Chemical Vapor Deposition，CVD)法，直接在介 電層上沉積矽或鍺的奈米點，如美國專利公開號 藝 20040147098。此種方式會因為製程溫度條件不易 控制，因此形成的奈米點品質與均勻度不— 一，而 且，在每一次的化學氣相沉積製程中，只能形成 種奈米結構。 如美國專利公開號20020148727與歐盟裘 寻利號 EP 1 743 3 92所揭露形成奈米結構的技術，係 刊用驗 金屬（Alkali Metal)與矽或鍺形成合金，進而析出太 米結構級之矽或鍺。但此一技術可應用之拮 不 4又婀領域 較少，係僅用於電池或電極之材料，而不易應 ^ 於 5 200932664 包括：半導體產業、光電產業及/或生物感 領域。 【發明内容】 本發明之一目的在於提供一種奈米級鍺 構的製造方法，可以同時形成品質穩定且均 的奈米點結構。 本發明之又一目的在於提供一種奈米級 ® 結構的製造方法，同時形成奈米點結構、奈 構以及奈米環結構之鍺金屬結構的製造方法 本發明之又一目的在於提供一種奈米級 結構的製造方法，可以廣範的應用於包括： 產業、光電產業及/或生物感測器等領域。 本發明之又一目的在於提供一種奈米級 結構的製造方法，包括：提供一基板；形成 層於該基板上，履蓋該基板之表面；勉刻 Ο 層，形成不同尺寸之一第一開口、一第二開 第三開口；以及進行一化學氣相沉積製程， 鍺金屬層於該第一開口、第二開口及第三開 形成一第一鍺金屬結構、一第二鍺金屬結構 三鍺金屬結構。 本發明之又一目的在於提供一種奈米級 結構的製造方法，包括：提供一矽基板；以 潔製程以及1 %氫氟酸溶液對矽基板進行一 製程；利用高溫爐管形成一 10〜500奈米的介 測器等 金屬結 勻一致 緒金屬 米盤結 〇 鍺金屬 半導體 鍺金屬 一介電 該介電 口及一 沉積一 口 ，以 及一第 緒金屬 濕式清 預處理 電層， 200932664 例如：二氧化矽、氮化矽、二氧化铪於矽基板上； 以電子束直系統與活性離子微影蝕刻製程蝕刻該 介電層，形成150~350奈米的第一開口、400〜600奈 米的第二開口及650〜850奈米的第三開口；以及以 35 0〜550 °C進行一超高真空化學氣相沉積製程1〜3 小時，沉積一鍺金屬材料層，例如：純鍺金屬或矽 鍺合金，於該第一開口、第二開口及第三開口，以 形成奈米點結構、奈米盤結構以及奈米環結構的鍺 ❹ 金屬結構。 【實施方式】 以下係以不同實施例說明本發明，所述之組 成、排列及步驟等，用以說明實施之内容，僅為例 示而非用以限制本發明。另外，所揭露之内容中使 用”及/或”是為了簡要；”覆蓋’，或，，之上，，的敘述， 則可包含s亥直接接觸以及沒有直接觸等二種。 ❿ 如圖1 A〜1 E所示，係本發明之一實施例用以說 明本發明之奈米級鍺金屬結構的製造方法。 首先對基板1 1，例如：矽基板，以標準半導體 之濕式清潔製程清潔基板1 1，接著浸泡於1 %氫氟酸 溶液中，進行預處理製程以去除基板丨丨表面之原生 氧化層（圖未示）。 接著以高溫爐管進行常壓化學沉積法 (Atmospheric Pressure Chemical Vapor Deposition，APCVD)，在基板表面形成，例如是二 200932664 氧化矽、氮化矽、二氧化铪，厚度10〜500奈米 (nanometer，nm)的介電層21，但介電層較佳厚度為 1 00奈米，如圖1 B所示。經光阻塗佈與微影蝕刻製 程，在介電層21上形成圖案化光阻層31，如圖1C。 接著利用電子束直寫系統（E-beam Direct Writing)，例如：Leica E-beam weprint 200之設備 機台，與活性離子敍刻（Reactive Ion Etching， RIE)，例如：TEL TE-5000之設備，對介電層12進 β 行蝕刻後，移除圖案化光阻層31，在介電層21形成 三種不同尺寸之開口 A, B，C，包括：大小介於 150〜3 50奈米，例如為32〇奈米之第一開口 A ;大小 介於400-600奈米，例如為440奈米之第二開口 B; 大小介於650〜850奈米，例如為690奈米之第三開口 C，如圖1D所示。 在35〇〜55〇C的製程溫度下’進行1〜3小時的超 高真空化學氣相沉積（Ultra-High Vacuum Chemical ⑩ Vapor Deposition，UHVCVD)製程，較佳為 43〇〇c 進 行3小時，沉積鍺金屬材料於該第一開口、第二開 口及第三開口内，這裏所使用之鍺金屬材料，係可 選自純鍺金屬（100%Ge) ’或含鍺之金屬合金，例如 是南組成的石夕鍺合金（Si5Q%Ge5()%~Si5%(}e95%， Sii_xGex)。所形成的鍺金屬材料會因為開口的線寬 不同’使得鍺金屬材料在沉積時承受的應力影響不 同，因此會在第一開口 A内形成奈米點（nan〇_d〇t) 結構的鍺金屬結構41 ’在第二開口 b奈米盤 200932664 (nano-disk)結構的錯金屬結構42，以及在第三開口 C奈米環（nano-ring)結構的鍺金屬結構43。Dioxide, Hf〇2), Aluminium Oxide (AI2O3), etc., and the difference in properties between semiconductor materials such as yarn (S i 1 ic ο n, S i) or 锗 (G ermanium, G e) A chemical vapor deposition (CVD) method deposits a nano-dots of ruthenium or osmium directly on the dielectric layer, as disclosed in U.S. Patent Publication No. 20040147098. This method is difficult to control because of the process temperature conditions, so the quality and uniformity of the formed nano-dots are not uniform, and only a nano-structure can be formed in each chemical vapor deposition process. The technique for forming a nanostructure is disclosed in U.S. Patent Publication No. 2004008727 and the European Union No. EP 1 743 3 92. The alloy is formed by alloying with Alkali Metal and tantalum or niobium, thereby precipitating the structure or grade of Taimi structure. . However, the application of this technology is not limited to the field. It is only used for batteries or electrodes. It is not easy to respond to 5 200932664 including: semiconductor industry, optoelectronic industry and/or biological sensing. SUMMARY OF THE INVENTION An object of the present invention is to provide a method for producing a nano-scale structure which can simultaneously form a stable and uniform nano-dots structure. Still another object of the present invention is to provide a method for producing a nano-scale structure, which simultaneously forms a nano-structure, a nanostructure, and a nano-structure of a nano-ring structure. Another object of the present invention is to provide a nanometer. The manufacturing method of the hierarchical structure can be widely applied to fields including: industry, photovoltaic industry, and/or biosensor. Another object of the present invention is to provide a method for fabricating a nano-scale structure, comprising: providing a substrate; forming a layer on the substrate to cover a surface of the substrate; engraving the ruthenium layer to form a first opening of different size a second open third opening; and performing a chemical vapor deposition process, the base metal layer forming a first tantalum metal structure and a second tantalum metal structure in the first opening, the second opening and the third opening Metal structure. Another object of the present invention is to provide a method for fabricating a nano-scale structure, comprising: providing a germanium substrate; performing a process on the germanium substrate by a clean process and a 1% hydrofluoric acid solution; forming a 10-500 by using a high temperature furnace tube The metal of the nanometer is uniform and uniform. The metal rice plate is filled with a metal semiconductor, a metal, a dielectric, a dielectric port and a deposition, and a first metal wet-cleaning pretreatment layer, 200932664. The ruthenium oxide, the tantalum nitride, and the ruthenium dioxide are on the ruthenium substrate; the dielectric layer is etched by an electron beam direct system and an active ion lithography process to form a first opening of 150 to 350 nm, and 400 to 600 nm. a second opening and a third opening of 650 to 850 nm; and an ultra-high vacuum chemical vapor deposition process at 35 0 to 550 ° C for 1 to 3 hours to deposit a layer of a metal material such as pure base metal or A tantalum alloy is formed in the first opening, the second opening, and the third opening to form a nanowire structure, a nanodisk structure, and a tantalum metal structure of a nanoring structure. The present invention is described in the following by way of illustration of the embodiments of the invention. In addition, the use of "and/or" in the disclosed content is for the sake of brevity; the description of "overlay", or, above, may include two types of direct contact and no direct contact. A to 1 E, which is an embodiment of the present invention for explaining the manufacturing method of the nano-grade bismuth metal structure of the present invention. First, the substrate 1 1, for example, a ruthenium substrate, is cleaned by a standard semiconductor wet cleaning process. The substrate 1 1 is then immersed in a 1% hydrofluoric acid solution to perform a pretreatment process to remove the native oxide layer on the surface of the substrate (not shown). Next, a high pressure furnace tube is used for atmospheric pressure chemical deposition (Atmospheric Pressure Chemical) Vapor Deposition (APCVD), formed on the surface of the substrate, for example, 200932664 yttrium oxide, tantalum nitride, hafnium oxide, dielectric layer 21 having a thickness of 10 to 500 nanometers (nm), but the dielectric layer is preferably thick. It is 100 nm, as shown in Fig. 1B. A patterned photoresist layer 31 is formed on the dielectric layer 21 by a photoresist coating and photolithography process, as shown in Fig. 1C. Next, an electron beam direct writing system is used ( E-beam Direct Writing), for example : Leica E-beam weprint 200 equipment machine, with Reactive Ion Etching (RIE), for example: TEL TE-5000 equipment, after etching the dielectric layer 12, remove the patterned light The resist layer 31 forms three different sizes of openings A, B, and C in the dielectric layer 21, including: a first opening A having a size of 150 to 3 50 nm, for example, 32 〇 nanometer; and a size of 400- 600 nm, for example, the second opening B of 440 nm; the size is between 650 and 850 nm, for example, the third opening C of 690 nm, as shown in Fig. 1D. The process at 35 〇 55 55 C At a temperature of 1 to 3 hours, an Ultra-High Vacuum Chemical 10 Vapor Deposition (UHVCVD) process, preferably 43 〇〇c for 3 hours, depositing a base metal material in the first opening In the second opening and the third opening, the base metal material used herein may be selected from pure bismuth metal (100% Ge) or a metal alloy containing bismuth, such as a stellite alloy composed of south (Si5Q%). Ge5()%~Si5%(}e95%, Sii_xGex). The base metal material formed will be different due to the line width of the opening. The influence of the stress on the base metal material during deposition is different, so that a base metal structure 41' of a nano-point (nan〇_d〇t) structure is formed in the first opening A at the second opening b nanodisk 200932664 ( The metal-structure of the nano-disk structure 42 and the base metal structure 43 of the nano-ring structure in the third opening.
圖2〜4係以原子力顯微鏡（At〇mic Force Microscope，AFM) ’對利用本發明之奈米級鍺金屬結 構的製造方法所製造形成的奈米點（nano_dot)結構的 鍺金屬結構、奈米盤（nan〇-disk)結構的鍺金屬結構 以及奈米環（nano-ring)結構的鍺金屬結構，所進行 的量測結果。圖2的奈米點係為寬5〇奈米 (nanometer，run)與高21奈米；圖3的奈米盤係為寬 309奈米與南23奈米；以及圖4的奈卡環係為寬286 奈米與高3 0奈米。 雖然本發明已以較佳實施例揭露如上，然其並 非用以限定本發明，任何熟習此項技藝者，在不脫 離本發之精神和範圍内，可做各種變動、修改及潤 飾’因此本發明之保護管圍當視後附之巾請專利範 圍所界定者為準。2 to 4 are a base metal structure of a nano-dot structure formed by an atomic force microscope (AFM) 'manufactured by the method for producing a nano-grade bismuth metal structure of the present invention, and a nano-dot structure. The measurement results of the bismuth metal structure of the nan〇-disk structure and the ruthenium metal structure of the nano-ring structure. The nano-point of Figure 2 is a width of 5 nanometers (nanometer, run) and a height of 21 nanometers; the nano-panel of Figure 3 is 309 nanometers wide and 23 nanometers south; and the naika ring system of Figure 4 It is 286 nm wide and 30 nm high. While the present invention has been described in its preferred embodiments, the present invention is not intended to limit the invention, and various changes, modifications and refinements may be made without departing from the spirit and scope of the present invention. The protection of the invention shall be determined by the scope of the patent.
【圖式簡單說明】 為讓本發明之上述 4和其他目的、特徵、優點與 實施例能更明顯易懂，a „ t m , 所附圖式之詳細說明如下： 圖1 A〜1 E係本發明替_ ,, β實施例之奈米級鍺金屬結構 的製造方法之剖面流程圖。 圖2係本發明實梯； 包例之奈米點結構的鍺金屬結 構之原子力顯微鏡照片。 圖3係本發明實旃i 例之奈米盤結構的鍺金屬結 200932664 例之奈米環結構的鍺金屬結 構之原子力顯微鏡照， 圖4係本發明實施 構之原子力顯微鏡照， 【主要元件符號說明】 11 基 板 2 1 介 電層 3 1 光 阻層 41 第 一緒金 屬 結 構 42 第 二鍺金 屬 結 構 43 第 三鍺金 屬 結 構 A 第- 一開口 B 第- 二開口 C 第三開口BRIEF DESCRIPTION OF THE DRAWINGS In order to make the above 4 and other objects, features, advantages and embodiments of the present invention more obvious, a „tm, the detailed description of the drawings is as follows: Fig. 1 A~1 E BRIEF DESCRIPTION OF THE DRAWINGS FIG. 2 is a cross-sectional flow chart showing a method for producing a nano-grade ruthenium metal structure of the β embodiment. FIG. 2 is an atomic force microscope photograph of a ruthenium metal structure of a nano-point structure of the present invention. The atomic force microscope of the base metal structure of the nano ring structure of the example of the present invention is shown in Fig. 4, and Fig. 4 is an atomic force microscope photograph of the embodiment of the present invention. [Main component symbol description] 11 Substrate 2 1 dielectric layer 3 1 photoresist layer 41 first metal structure 42 second metal structure 43 third metal structure A first opening B second opening C third opening
1010