200926306 九、發明說明： 【發明所屬之技術領域】 本發明係關於主動式矩陣有機發光二極體（Active Matrix Organic Diode; AMOLED)顯示器，更明確而言， 係關於製造AMOLED顯示器所使用之不同薄膜電晶體 (TFT)之方法，以及包含該等薄膜電晶體之AMOLED顯 示器。 【先前技術】 有機發光二極體（OLED)已廣泛運用於顯示器，其中於 主動式矩陣有機發光二極體（AMOLED)顯示器中，發光 部分係利用驅動電路來驅動發光元件——有機發光二極 體（OLED)。AMOLED驅動電路係使用到薄膜電晶體，包 含一開關薄媒電晶體（Switch Thin Film Transistor)與一驅 動薄膜電晶體（Driving Thin Film Transistor)，其中該關關 薄膜電晶艎係以N型薄膜電晶體（NTFT)實施，用於切換顯 示器之次像素（sub-pixel)的開關狀態，而驅動薄膜電晶 體係以P型薄膜電晶體（ΡΊΤΤ)實施，用於驅動發光元件 (如OLED)。此外，AMOLED顯示器之週邊電路部分亦需 要用到N型薄膜電晶體（NTFT)與P型薄膜電晶體 (PTFT)。習知技術中，製作AMOLED驅動電路以及週邊 電路中的薄膜電晶體所使用的多晶矽均係以標準雷射結 晶化法使長在玻璃基板上的非晶矽結晶化成多晶矽。之所 以採用標準雷射結晶化法，是因為平面顯示器適用的玻璃 基板不像一般製造電晶體適用的矽晶圓如此耐高溫，必須 採用溫度低於玻璃基板溫度的結晶化技術。但是，標準雷 5 200926306 射結晶化技術在觸發結晶化過程中會因輸出雷射能量差 異等問題導致最後製成的顯示器有發光不均勻（Mura) 的現象。 此外，AMOLED驅動薄膜電晶體係以輸出電流驅動 OLED，OLED元件的發光結果對於驅動電流的差異是非常 敏感的。顯示區域係具有複數個次像素（sub-pixel)的驅動 薄膜電晶體矩陣，若各驅動薄膜電晶體間的電氣特性具有 某種程度上的差異，則該區域中OLED元件之發光強度便 產生相對應的差異，進而造成人類視覺上可察覺的差別。 當製成顯示器之後，相關於驅動薄膜電晶體的標準雷 射技術以及電流驅動等因素會導致條紋狀發光不均勻的 現象（Stripe Mura)，造成AMOLED產品的良率偏低。本 發明即意在解決此一問題。 【發明内容】 本發明之目的係提供一種OLED顯示器之薄膜電晶體 製造方法以製造OLED顯示器週邊電路部分的N型與P型 週邊電路薄膜電晶體以及顯示區域部分之驅動電路使用 的開關薄膜電晶體與驅動薄膜電晶體。藉由本發明之方法 所製造的週邊電路薄膜電晶體與開關薄膜電晶體以及驅 動薄膜電晶體分別具有符合其使用需求的特性。週邊電路 薄膜電晶體與開關薄膜電晶體具有優異電性性能，例如高 載子移動率。驅動薄膜電晶體則具有良好的穩定性，使得 最後製得之顯示器具有良好的發光均勻性。 本發明之另一目的係提供一種OLED顯示器，其包含 週邊電路部分以及顯示區域部分。週邊電路部分係具有週 200926306 邊電路薄膜電晶體。顯示區域部分係具有複數個次像素， 各次像素包含發光元件以及用於驅動發光元件之驅動薄 膜電晶體以及用於切換次像素狀態之開關薄膜電晶體。本 發明之OLED顯示器其週邊電路薄膜電晶體與開關薄膜電 晶體以及驅動薄膜電晶體分別具有符合使用需求的特 性《週邊電路薄膜電晶體與開關薄膜電晶體具有優異電氣 性能，例如高載子移動率。驅動薄膜電晶體則具有良好的 穩定性，使得最後製得之顯示器具有良好的發光均勻性。 ❹ 根據本發明’ 一種有機發光二極體（OLED)顯示器之薄膜電 晶體製造方法’包含步驟有提供一基板層，該基板層具有第一區域與 第二區域；於該基板層上形成一緩衝層；藉由第一結晶化製程於該緩 衝層上形成第一多晶矽層；圖案化該第一多晶矽層以於第一區域形成 第一薄膜電晶體的主動區；形成第一隔離層；藉由第二結晶化製程於 該第一隔離層上形成第二多晶矽層，該第二結晶化製程係不同於該第 一結晶化製程；圖案化該第二多晶矽層以於第二區域形成第二薄膜電 晶體之主動區；形成第二隔離層；以及於該第二隔離層上分別形成第 Q 一薄膜電晶體以及第二薄膜電晶體的閘極。 根據本發明之OLED顯示器具有週邊電路部分以及顯示區域部 分。顯示區域部分具有複數個次像素，各次像素包含發光元件以及用 於驅動發光元件的驅動薄膜電晶體，並包含開關薄膜電晶體。該OLED 顯示器包含一基板層；一第一薄媒電晶體形成於該基板層上’其包含 一第一緩衝層形成於該基板層上，一第一多晶矽層形成之主動區設置 於該緩衝層上，一第一閘極絕緣層覆蓋於主動區上以及一第一閘極設 置於該第一閘極絕緣層上；以及一第二薄膜電晶體形成於該基板層 上，其包含一第二緩衝層形成於該基板層上’一第二多晶矽層形成之 200926306 . 主動區設置於該緩衝層上，一第二閘極絕緣層覆蓋於主動區上以及一 第二閘極設置於該第二閘極絕緣層。該第一多晶矽層與該第二多晶矽 層係具有不同的晶粒特性，且該第一閘極絕緣層與該第二閘極絕緣層 具有不同的厚度。 【實施方式】 以下將參照所附圖式詳細說明本發明之技術内容。 第1圖係顯示一主動式矩陣有機發光二極體 (AMOLED)顯示器110之基本電路結構。該OLED顯示器 Φ 110包含有控制電路140、資料線驅動電路160、掃描線驅 動電路180以及一顯示面板200。該顯示面板200係具有 複數個次像素210，各像素210係與一條資料線（D1至 Dn) 165以及一條掃描線（S1至Sn) 187連接，從而構成 一矩陣。次像素210經由資料線165與掃描線接收資料線 驅動電路160之影像資料信號以及掃描線驅動電路180之 開關/定址信號。該資料線驅動電路160以及該掃描線驅動 電路180係由控制電路140加以控制。 φ 次像素之電路設計可包含多個薄膜電晶體，但一般而 言至少具有一驅動薄膜電晶體用於驅動發光元件以及一 開關薄膜電晶體用於切換該次像素之狀態，如第2圖所 示。第2圖係顯示第1圖中之次像素210的基本電路結構 示意圖。各次像素210係包含一發光元件212，如OLED， 以及用以驅動該發光元件212之驅動薄膜電晶體214，其 一般係由PTFT實施。該次像素210並包含一般係由NTFT 實施之開關薄膜電晶體216以及一電容器218。該開關薄 膜電晶體216之閘極係電氣耦接至對應之掃描線187，其 200926306 > 汲極則電氣耦接至對應之資料線165,其源極則與該電容 器218的一端以及驅動膜薄電晶體214之閘極連接。該電 容器218的另一端係與該驅動薄膜電晶體214之源極連接 並接至電壓源Vdd。該驅動薄膜電晶體214係與該發光元 件212連接。此電路結構之操作為此項技藝中所泛知者， 同時亦非本發明之重點，故在此不予贅述。 如前所述，為避免顯示區域發光不均勻現象，顯示面 板中各次像素的驅動薄膜電晶體的一致性要求相當嚴 φ 格。相對而言，關關薄膜電晶體係用於切換次像素的開關 狀態，與週邊電路所使用的薄膜電晶體同樣對於電氣性能 要求較高。換言之，對於主動式矩陣OLED顯示器而言， 驅動薄膜電晶體之需求與包含關關薄膜電晶體與週邊電 路薄膜電晶體的需求不同，而本發明係提供一種技術，可 於同一製程中製得符合不同需求的薄膜電晶體。 本發明係於同一玻璃基板上分不同區域同時製造用於 OLED顯示器週邊電路所需要使用的N型薄膜電晶體 ❹ （NTFT)、P型薄膜電晶體（PTFT)、OLED顯示器顯示區域 所需要使用的關關電晶體（Switch TFT，一般以NTFT實 施）以及OLED顯示器顯示區域用以驅動發光元件的驅動 薄膜電晶體（Driving TFT，一般以PTFT實施）。為便於敘 述，週邊電路所需要使用的N型薄膜電晶體（NTFT)、P 型薄膜電晶體（PTFT)、以及顯示區域所需要使用的關關 電晶體係統稱「非驅動用薄膜電晶體」。根據本發明，所 製造的非驅動用TFT與驅動TFT分別具有符合所屬區域使 用需求的性能。非驅動用TFT具有優異的電氣性能，而驅 9 200926306 .動TFT則使製成的平面顯示器具有良好的發光均勻性。 本發明之AMOLED顯示器TFT製造方法程序係顯示 於第3圖至第12圖，在本實施例中，第一區域的左邊的 部分係用於非驅動用薄膜電晶體之NTFT製程，右邊的部 分係用於非驅動用薄膜電晶體之PTFT製程，而第二區域 係驅動TFT製程。 請參照第3圖，其係顯示根據本發明之方法的第一步 驟。提供一基板層10,其材質可為透光材料如玻璃。於基 ❿ 板層10上係形成一緩衝層，於本實施例中，該緩衝層包 含材料為氮化物（如氮化矽）的氮化層21以及材料為氧 化物（如氧化矽）的氧化層23。於該緩衝層上係形成一非 晶矽層，該非晶矽層係利用第一結晶化製程轉化成第一多 晶矽層30。該第一結晶化製程為一種高功率雷射結晶化製 程，稱為標準雷射結晶化法，例如可採用例如準分子雷射 退火（Excimer Laser Anneal ; ELA)法。 請參照第4圖，將第一多晶矽層30加以圖案化 ❹ (patterning) 以及N型摻雜（N-doping)以及通道摻雜 (channel doping)之後，在NTFT部分，保留的多晶石夕層係 成為主動區36，其形成有汲極區36a、通道區36b、源極 區36c，而PTFT部分，保留的多晶矽層則為主動區34， 此時PTFT的主動區34尚未經過摻雜。應注意的是第二區 域的多晶矽層30被全部剝除。剝除的方式可採用任何適 當的技術，例如乾蝕刻法。接著，在整個結構上再形成第 一隔離層40。較佳而言，此第一隔離層40的厚度愈小愈 好，實作上大約為200至300埃。於本實施例中，該第一 200926306 . ⑮離層40之材料為氧化物，如氧化碎。較佳而言，其材 料係與隔離層之氧化層23為相同材質。 請參照第5圖，係在第4圖之結構上形成一非晶妙層 50。該非晶矽層係利用第二結晶化製程將之轉化成多晶 矽，亦即第6圖所示之第二多晶矽層51。根據本發明，該 第二結晶化製程係不同於第一結晶化製程。該第二結晶化 製程係利用非雷射結晶技術或是低功率雷射結晶技術。非 雷射結晶技術包括固相結晶化法（S〇lid phase ❹ Crystallization ; SPC)、金屬誘發結晶化法（Metal Induced200926306 IX. DESCRIPTION OF THE INVENTION: TECHNICAL FIELD The present invention relates to active matrix organic light emitting diode (AMOLED) displays, and more specifically to different films used in the manufacture of AMOLED displays. A method of a transistor (TFT), and an AMOLED display including the thin film transistors. [Prior Art] Organic light-emitting diodes (OLEDs) have been widely used in displays, in which an active matrix organic light-emitting diode (AMOLED) display uses a driving circuit to drive a light-emitting element - an organic light-emitting diode Body (OLED). The AMOLED driving circuit uses a thin film transistor, and includes a switch thin film transistor (Transistor Thin Film Transistor) and a driving thin film transistor (Driving Thin Film Transistor), wherein the off-film thin-film transistor is electrically formed by an N-type thin film. A crystal (NTFT) implementation is used to switch the switching state of the sub-pixel of the display, and the driving thin film electro-crystal system is implemented as a P-type thin film transistor (?) for driving a light-emitting element (such as an OLED). In addition, N-type thin film transistors (NTFTs) and P-type thin film transistors (PTFTs) are also required in the peripheral circuit portion of the AMOLED display. In the prior art, the polycrystalline germanium used in the fabrication of the AMOLED driving circuit and the thin film transistor in the peripheral circuit is crystallized into a polycrystalline germanium by a standard laser crystallization method. The standard laser crystallization method is adopted because the glass substrate to which the flat panel display is applied is not as high-temperature as the silicon wafer which is generally used for manufacturing the transistor, and the crystallization technique having a temperature lower than the temperature of the glass substrate must be employed. However, the standard Ray 5 200926306 crystallization technology in the trigger crystallization process due to the output laser energy difference and other problems caused by the final display has a phenomenon of uneven illumination (Mura). In addition, the AMOLED driving thin film electro-crystal system drives the OLED with an output current, and the luminescence result of the OLED element is very sensitive to the difference in driving current. The display region is a plurality of sub-pixel driving thin film transistor crystal matrices. If the electrical characteristics between the driving thin film transistors have a certain degree of difference, the illuminating intensity of the OLED element in the region is generated. Corresponding differences, in turn, cause human visually perceptible differences. When the display is made, factors such as standard laser technology and current drive that drive the thin film transistor cause uneven stripes (Stripe Mura), resulting in low yield of AMOLED products. The present invention is intended to solve this problem. SUMMARY OF THE INVENTION An object of the present invention is to provide a thin film transistor manufacturing method for an OLED display to manufacture a N-type and P-type peripheral circuit film transistor of a peripheral circuit portion of an OLED display and a switching film transistor used in a driving circuit of a display region portion. Drive the thin film transistor. The peripheral circuit thin film transistor and the switching thin film transistor and the driving thin film transistor which are manufactured by the method of the present invention each have characteristics in accordance with their use requirements. Peripheral circuits Thin-film transistors and switch-film transistors have excellent electrical properties, such as high carrier mobility. The driving film transistor has good stability, so that the finally produced display has good illuminance uniformity. Another object of the present invention is to provide an OLED display including a peripheral circuit portion and a display region portion. The peripheral circuit section has a perimeter 200926306 side circuit thin film transistor. The display area portion has a plurality of sub-pixels, and each sub-pixel includes a light-emitting element and a driving film transistor for driving the light-emitting element and a switching film transistor for switching the sub-pixel state. The OLED display of the present invention has peripheral circuit thin film transistor and switching thin film transistor and driving thin film transistor respectively having characteristics satisfying the use requirements. "Peripheral circuit thin film transistor and switching thin film transistor have excellent electrical properties, such as high carrier mobility. . The driving film transistor has good stability, so that the finally produced display has good illuminance uniformity. According to the present invention, a method for fabricating a thin film transistor of an organic light emitting diode (OLED) display includes the steps of providing a substrate layer having a first region and a second region; forming a buffer on the substrate layer Forming a first polysilicon layer on the buffer layer by a first crystallization process; patterning the first polysilicon layer to form an active region of the first thin film transistor in the first region; forming a first isolation Forming a second polysilicon layer on the first isolation layer by a second crystallization process, the second crystallization process being different from the first crystallization process; patterning the second polysilicon layer to Forming an active region of the second thin film transistor in the second region; forming a second isolation layer; and forming a gate of the Qth thin film transistor and the second thin film transistor on the second isolation layer, respectively. The OLED display according to the present invention has a peripheral circuit portion and a display region portion. The display area portion has a plurality of sub-pixels, each sub-pixel comprising a light-emitting element and a driving film transistor for driving the light-emitting element, and comprising a switching film transistor. The OLED display comprises a substrate layer; a first thin dielectric transistor is formed on the substrate layer, wherein a first buffer layer is formed on the substrate layer, and an active region formed by a first polysilicon layer is disposed on the substrate layer a first gate insulating layer overlying the active region and a first gate disposed on the first gate insulating layer; and a second thin film transistor formed on the substrate layer, the The second buffer layer is formed on the substrate layer by a second polysilicon layer formed by 200926306. The active region is disposed on the buffer layer, a second gate insulating layer covers the active region, and a second gate is disposed. And the second gate insulating layer. The first polysilicon layer and the second polysilicon layer have different grain characteristics, and the first gate insulating layer and the second gate insulating layer have different thicknesses. [Embodiment] Hereinafter, the technical contents of the present invention will be described in detail with reference to the accompanying drawings. Fig. 1 shows the basic circuit structure of an active matrix organic light emitting diode (AMOLED) display 110. The OLED display Φ 110 includes a control circuit 140, a data line driving circuit 160, a scan line driving circuit 180, and a display panel 200. The display panel 200 has a plurality of sub-pixels 210, each of which is connected to a data line (D1 to Dn) 165 and a scan line (S1 to Sn) 187 to form a matrix. The sub-pixel 210 receives the image data signal of the data line driving circuit 160 and the switching/addressing signal of the scanning line driving circuit 180 via the data line 165 and the scanning line. The data line drive circuit 160 and the scan line drive circuit 180 are controlled by the control circuit 140. The circuit design of the φ sub-pixel may comprise a plurality of thin film transistors, but generally there is at least one driving thin film transistor for driving the light emitting element and a switching thin film transistor for switching the state of the sub-pixel, as shown in FIG. 2 Show. Fig. 2 is a view showing the basic circuit configuration of the sub-pixel 210 in Fig. 1. Each sub-pixel 210 includes a light-emitting element 212, such as an OLED, and a drive film transistor 214 for driving the light-emitting element 212, which is typically implemented by a PTFT. The sub-pixel 210 further includes a switching thin film transistor 216 which is generally implemented by an NTFT and a capacitor 218. The gate of the switching thin film transistor 216 is electrically coupled to the corresponding scan line 187, and the 200926306 > gate is electrically coupled to the corresponding data line 165, the source of which is coupled to the end of the capacitor 218 and the driving film. The gate of the thin transistor 214 is connected. The other end of the capacitor 218 is connected to the source of the driving thin film transistor 214 and is connected to the voltage source Vdd. The driving thin film transistor 214 is connected to the light emitting element 212. The operation of this circuit structure is well known in the art and is not the focus of the present invention, and therefore will not be described herein. As mentioned above, in order to avoid uneven illumination in the display area, the uniformity of the driving film transistors of each sub-pixel in the display panel is quite strict. Relatively speaking, the off-film thin-film electro-crystal system is used to switch the switching state of the sub-pixels, and the optical performance of the thin-film transistors used in the peripheral circuits is also high. In other words, for an active matrix OLED display, the need to drive a thin film transistor is different from the requirement for including a thin film transistor and a peripheral circuit thin film transistor, and the present invention provides a technique that can be made in the same process. Thin film transistors with different needs. The invention relates to the N-type thin film transistor (NTFT), the P-type thin film transistor (PTFT) and the display area of the OLED display which are required for simultaneously manufacturing different circuits of the OLED display in different regions on the same glass substrate. A switching transistor (typically implemented in NTFT) and a driving film transistor (driving TFT, generally implemented as a PTFT) for driving a light-emitting element in an OLED display display region. For convenience of description, the N-type thin film transistor (NTFT), the P-type thin film transistor (PTFT), and the off-cell transistor system required for the display area are referred to as "non-driving thin film transistors". According to the present invention, the non-driving TFT and the driving TFT which are manufactured have performances that meet the needs of the respective regions. The non-driving TFT has excellent electrical properties, and the moving TFT enables the resulting flat panel display to have good uniformity of illumination. The procedure for fabricating the AMOLED display TFT of the present invention is shown in FIGS. 3 to 12. In the present embodiment, the left portion of the first region is used for the NTFT process of the non-driving thin film transistor, and the right portion is The PTFT process is used for a non-driving thin film transistor, and the second region is a driving TFT process. Please refer to Fig. 3, which shows the first step of the method according to the present invention. A substrate layer 10 is provided, which may be made of a light transmissive material such as glass. A buffer layer is formed on the substrate layer 10. In the embodiment, the buffer layer comprises a nitride layer 21 made of a nitride such as tantalum nitride and an oxide of a material such as hafnium oxide. Layer 23. A non-crystalline layer is formed on the buffer layer, and the amorphous layer is converted into the first polysilicon layer 30 by a first crystallization process. The first crystallization process is a high power laser crystallization process called standard laser crystallization, and for example, an Excimer Laser Anneal (ELA) method can be employed. Referring to FIG. 4, after patterning the first polysilicon layer 30 and N-doping and channel doping, the retained polycrystalline silicon is in the NTFT portion. The slab layer becomes the active region 36, which is formed with the drain region 36a, the channel region 36b, and the source region 36c, and the PTFT portion, the remaining polysilicon layer is the active region 34, and the active region 34 of the PTFT is not yet doped. . It should be noted that the polysilicon layer 30 of the second region is completely stripped. The stripping can be carried out by any suitable technique, such as dry etching. Next, a first isolation layer 40 is formed over the entire structure. Preferably, the thickness of the first spacer layer 40 is as small as possible, and is practically about 200 to 300 angstroms. In this embodiment, the first layer of the layer 200940 is an oxide, such as oxidized granules. Preferably, the material is the same material as the oxide layer 23 of the barrier layer. Referring to Fig. 5, an amorphous layer 50 is formed on the structure of Fig. 4. The amorphous germanium layer is converted into polycrystalline germanium by a second crystallization process, that is, the second polysilicon layer 51 shown in Fig. 6. According to the present invention, the second crystallization process is different from the first crystallization process. The second crystallization process utilizes non-laser crystallization techniques or low power laser crystallization techniques. Non-laser crystallization techniques include solid phase crystallization (SPC), metal induced crystallization (Metal Induced)
Crystallization ; MIC)、金屬誘發側向結晶化法（Metal Induced Lateral Crystallization ; MILC)、電場增強金屬誘 發側向結晶化法（Field Enhanced Metal Induced Lateral Crystallization ; FE-MILC)、電場增強快速熱退火法（Field Enhanced Rapid Thermal Annealing)、爐管退火製程 (furnace annealing process)、快速熱處理製程（rapid thermal process, RTP)等等。低功率雷射結晶化法包括低照 @ 射功率準分子雷射結晶化法、固態雷射結晶化法等等。在 此列舉的各種結晶化法僅為例示，本發明並不受限於此。 請參見第7圖，經過圖案化製程，第一區域的第二多 晶矽層51被剝除，而在第二區域的第二多晶矽層則留下 一部分作為主動區52。然後於整體結構上形成一第二隔離 層45。該第二隔離層45之材料可如同第一隔離層40 —樣 為氧化物，然而，為了電性考量等因素，於本實施例，該 第二隔離層45包含上下兩層不同材料，下層為氧化物， 上層為氮化物。實作上，在形成之後，該第二隔離層45 200926306 與第一隔離層40將難以區別。 請參照第8圖，在第一區域及第二區域的第二隔離層 • 45上分別形成閘極62、64、66,並實行輕度汲極摻雜（LightCrystallization; MIC), Metal Induced Lateral Crystallization (MILC), Field Enhanced Metal Induced Lateral Crystallization (FE-MILC), Electric Field Enhanced Rapid Thermal Annealing ( Field Enhanced Rapid Thermal Annealing), furnace annealing process, rapid thermal process (RTP), and the like. Low-power laser crystallization methods include low-light @射 power excimer laser crystallization, solid-state laser crystallization, and the like. The various crystallization methods enumerated herein are merely illustrative, and the present invention is not limited thereto. Referring to Fig. 7, after the patterning process, the second polysilicon layer 51 of the first region is stripped, and the second polysilicon layer of the second region leaves a portion as the active region 52. A second spacer layer 45 is then formed over the unitary structure. The material of the second isolation layer 45 may be an oxide like the first isolation layer 40. However, for the sake of electrical considerations and the like, in the embodiment, the second isolation layer 45 includes two layers of different materials, and the lower layer is Oxide, the upper layer is nitride. In practice, the second isolation layer 45 200926306 and the first isolation layer 40 will be difficult to distinguish after formation. Referring to FIG. 8, gates 62, 64, and 66 are formed on the second isolation layer 45 of the first region and the second region, respectively, and light doping is performed (Light).
Drain Doping ; LDD)，而形成 LDD 區 36d、36e。 由圖中可明顯看出，第二區域的主動區52底面到基層 板10頂面之前的緩衝材料（含氮化層21、氧化層23以及 第一隔離層40)的厚度比較厚，而第一區域的主動區34、 36底面到基板層10頂面之間的絕緣材料（含氮化層21以 φ 及氧化層23而無第一隔離層40)較薄。相反的，第二區 域的閘極62到主動區52之間的絕緣材料（稱為第二閘極 絕緣層）僅為第二隔離層45，而第一區域的閘極64、66 到主動區34、36之間的絕緣材料（稱為第一閘極絕緣層） 則包含第一隔離層40與第二隔離層45。因此，第二閘極 絕緣層較薄而第一閘極絕緣層較厚，兩者的厚度差異即為 第一隔離層40之厚度。考慮到各層膜厚誤差，一般而言 該厚度差異應會大於30埃。 q 請參照第9圖，第一區域的主動區之部分區域34a、34c 以及第二區域的主動區之部分區域52a、52c接受P型摻雜 (P-doping)而分別形成汲極34a’、52a’以及源極34c’、 52c，。 請參照第10圖，在第9圖的結構上形成第一保護層 70以及第二保護層80,並以任何適當方式形成電極92、 94、96。該第一保護層70之材料可為氮化物，而該第二 保護層80之材料可為氧化物。 請參照第11圖，於第10圖之結構上形成一中間層85, 12 200926306 .其材料可為氮化物，並於整體結構上形成一層厚厚的第一 平坦層100使整個結構的表面呈平坦狀。該平坦層100之 材料可為透光材質。如圖所不’並利用任何適當方式形成 接觸孔101。 請參照第12圖，於該接觸孔101之側壁形成OLED之 陽極103，並形成第二平坦層105。 根據本發明，第二區域的主動區52的多晶石夕層，係用 於驅動發光元件的驅動TFT以及第一區域的主動區34、36 〇 的多晶矽層，係用於非驅動用NTFT與PTFT(例如週邊電 路TFT及開關TFT) ’是採用兩種不同的結晶化方法結晶， 即第一結晶化製程以及第二結晶化製程，前者是使用標準 雷射結晶化法’例如ELA ’而後者則是使用非雷射結晶化 法如SPC或是低溫雷射結晶化法如低功率準分子雷射結晶 化法。兩種不同結晶化方式產生的多晶梦在晶粒特性上會 有明顯的差異。 第13圖係顯示藉由非雷射結晶化法令的fE_rta結晶 Q 化法形成的多晶矽晶粒結構。由圖可見經由此種方式形成 的晶粒很小，呈不規則狀’結構較紊亂，並且具有樹枝狀 紋理。第14圖係顯示藉由標準雷射結晶化法中的ela結 晶化法形成的多晶矽柱狀晶粒結構。由圖可見經由此種方 式形成的晶粒較大’呈規則狀’結構較整齊不具有樹枝狀 紋理。 又’一般而言，標準雷射與低功率雷射兩種結晶化法 所產生的晶粒大小之平均差異可達500埃以上》 藉由不同結晶化法形成特性不同的多晶矽作為主動 13 200926306 區，可使得對於電性性能要求較高的週邊電路TFT維持優 異的電性性能，舉例而言，標準雷射結晶化法製成之多晶 矽具有高載子移動率，例如約為1〇〇平方公分/伏特•秒 (cm2/V · s)，而載子移動率變異較大，亦即載子移動率標 準差較高；而對於電性性能要求相對較低的驅動TFT，免 除使用標準雷射結晶化法而採用非雷射結晶化法或是低 功率雷射結晶化法，而得以避免在製成顯示器之後產生條 紋狀發光不均勻的問題。藉由非雷射結晶化法或低功率雷 ❹ 射結晶化法製成之多晶矽的載子移動率較低，大約為 10-40平方公分/伏特•秒（cm2/V· s)，因此不適用於週邊 電路的TFT以及開關TFT之製作，但對於驅動OLED元 件的驅動TFT製作則已足夠，而使用此種多晶矽製成的 AMOLED驅動TFT之載子移動率標準差較低，亦即變異 較小較穩定，可使得組裝成顯示器之後，條紋狀發光不均 勻的現象得到明顯改善。 第15圖係顯示具有根據本發明之顯示器110的電子裝 Q 置600。具有如第12圖所示結構之驅動薄膜電晶體與開關 薄膜電晶體以及週邊電路薄膜電晶體的OLED顯示器110 可以是電子裝置600之一部分。該電子裝置600包括根據 本發明之OLED顯示器110和一電源供應器700，甚者， 電源供應器700耦接至OLED顯示器110以提供電源給 OLED顯示器110以產生影像。電子裝置600可以是：手 機、數位相機、個人數位助理、筆記型電腦、桌上型電腦、 電視、衛星導航、車上顯示器或可攜式DVD放影機。 本發明已就較佳實施例說明如上，然而該等說明僅為 200926306 闡釋而非用於限定本發明。在不脫離本發明之精神與範疇 内，熟悉此項技藝者當可進行各種更動與潤飾，本發明之 保護範圍當視後附之申請專利範圍所界定者為準，不應限 定於所揭示之具體形式。 【圖式簡單說明】 第1圖係係顯示一主動式矩陣有機發光二極體 (AMOLED)顯示器110之基本電路結構示意圖； 第2圖係顯示第1圖中之次像素的基本電路結構示意Drain Doping; LDD), forming LDD regions 36d, 36e. As is apparent from the figure, the thickness of the buffer material (including the nitride layer 21, the oxide layer 23, and the first isolation layer 40) from the bottom surface of the active region 52 of the second region to the top surface of the base layer 10 is relatively thick, and The insulating material between the bottom surfaces of the active regions 34, 36 of one region to the top surface of the substrate layer 10 (including the nitride layer 21 with φ and the oxide layer 23 without the first isolation layer 40) is relatively thin. Conversely, the insulating material (referred to as the second gate insulating layer) between the gate 62 of the second region to the active region 52 is only the second isolation layer 45, and the gates 64, 66 of the first region are to the active region. The insulating material between 34 and 36 (referred to as the first gate insulating layer) includes the first isolation layer 40 and the second isolation layer 45. Therefore, the second gate insulating layer is thin and the first gate insulating layer is thick, and the difference in thickness between the two is the thickness of the first isolation layer 40. Considering the film thickness error of each layer, the thickness difference should generally be greater than 30 angstroms. q, referring to FIG. 9, the partial regions 34a, 34c of the active region of the first region and the partial regions 52a, 52c of the active region of the second region receive P-doping to form the drain 34a', respectively. 52a' and source 34c', 52c,. Referring to Fig. 10, a first protective layer 70 and a second protective layer 80 are formed on the structure of Fig. 9, and electrodes 92, 94, 96 are formed in any suitable manner. The material of the first protective layer 70 may be a nitride, and the material of the second protective layer 80 may be an oxide. Referring to FIG. 11, an intermediate layer 85, 12 200926306 is formed on the structure of FIG. 10. The material may be nitride, and a thick first flat layer 100 is formed on the entire structure to make the surface of the entire structure Flat. The material of the flat layer 100 may be a light transmissive material. The contact hole 101 is formed as shown and used in any suitable manner. Referring to Fig. 12, an anode 103 of the OLED is formed on the sidewall of the contact hole 101, and a second planar layer 105 is formed. According to the present invention, the polycrystalline layer of the active region 52 of the second region is used to drive the driving TFT of the light-emitting element and the polysilicon layer of the active regions 34, 36 of the first region, and is used for the non-driving NTFT and PTFT (for example, peripheral circuit TFT and switching TFT) 'is crystallized by two different crystallization methods, that is, a first crystallization process and a second crystallization process, the former using standard laser crystallization method such as ELA' and the latter It is a non-laser crystallization method such as SPC or low temperature laser crystallization such as low power excimer laser crystallization. The polycrystalline dreams produced by two different crystallization methods will have significant differences in grain characteristics. Fig. 13 is a view showing the structure of a polycrystalline germanium crystal formed by the fE_rta crystal Q-formation method by a non-laser crystallization method. It can be seen from the figure that the crystal grains formed in this way are small, irregular in structure, and have a dendritic texture. Fig. 14 is a view showing a polycrystalline columnar grain structure formed by the ela crystallization method in the standard laser crystallization method. It can be seen from the figure that the crystal grains formed by such a method have a larger 'regular shape' structure which is more neat and has no dendritic texture. In addition, in general, the average difference in grain size between standard laser and low-power laser crystallization can reach 500 angstroms or more. Polymorphism with different characteristics is formed by different crystallization methods as active 13 200926306 It can maintain excellent electrical properties for peripheral circuit TFTs with high electrical performance requirements. For example, polycrystalline germanium made by standard laser crystallization has high carrier mobility, for example, about 1 〇〇 square centimeter. /Voseconds (cm2/V · s), while the carrier mobility has a large variation, that is, the standard deviation of the carrier mobility is high; and for a driving TFT with relatively low electrical performance, the standard laser is exempted. The crystallization method uses a non-laser crystallization method or a low-power laser crystallization method to avoid the problem of streaky uneven light emission after the display is formed. Polycrystalline germanium produced by non-laser crystallization or low-power Thunder crystallization has a low carrier mobility of approximately 10-40 cm 2 / volt • sec (cm 2 /V· s), so It is suitable for the fabrication of TFTs and switching TFTs of peripheral circuits, but it is sufficient for the fabrication of driving TFTs for driving OLED elements, and the standard deviation of carrier mobility of AMOLED driving TFTs made of such polycrystalline germanium is low, that is, the variation is relatively small. The small size is relatively stable, and the phenomenon that the stripe-like luminescence is uneven after being assembled into a display is significantly improved. Figure 15 shows an electronic device 600 having a display 110 in accordance with the present invention. The OLED display 110 having the driving thin film transistor and the switching thin film transistor and the peripheral circuit thin film transistor having the structure shown in Fig. 12 may be a part of the electronic device 600. The electronic device 600 includes an OLED display 110 and a power supply 700 according to the present invention. Further, the power supply 700 is coupled to the OLED display 110 to provide power to the OLED display 110 to generate an image. The electronic device 600 can be: a mobile phone, a digital camera, a personal digital assistant, a notebook computer, a desktop computer, a television, a satellite navigation, an on-board display, or a portable DVD player. The present invention has been described above with respect to preferred embodiments, but such descriptions are merely illustrative of 200926306 and are not intended to limit the invention. The scope of the present invention is defined by the scope of the appended claims, and should not be construed as being limited by the scope of the invention. Specific forms. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic diagram showing the basic circuit structure of an active matrix organic light emitting diode (AMOLED) display 110; FIG. 2 is a schematic diagram showing the basic circuit structure of the sub-pixel in FIG.
第3圖至第12圖係分別顯示根據本發明之OLED顯 示器TFT製造方法流程步驟的剖面示意圖； 第13圖係顯示藉由FE-RTA結晶化法形成的多晶矽 晶粒結構，以及 第14圖係顯示ELA結晶化法形成的多晶矽晶粒結 構；以及 第15圖係顯示包含根據本發明之OLED顯示器的電3 to 12 are schematic cross-sectional views showing the steps of the method for fabricating the TFT of the OLED display according to the present invention; Fig. 13 is a view showing the structure of the polycrystalline germanium formed by the FE-RTA crystallization method, and Fig. 14 Showing a polycrystalline germanium grain structure formed by ELA crystallization; and FIG. 15 showing electricity including an OLED display according to the present invention
子裝置之示意圖。 【主要元件符號說明】 10 基板層 21 氮化層 23 氧化層 30 第一多 34 主動區 34a ' 34a5 没極區 34b 通道區 晶妙層 15 200926306Schematic diagram of the sub-device. [Main component symbol description] 10 Substrate layer 21 Nitride layer 23 Oxide layer 30 First more 34 Active region 34a ' 34a5 Nom region 34b Channel region Crystal layer 15 200926306
34c ' 34c5 36 36a 36b 36c 36d ' 36e 40 45 50 51 52 52a 52b 52c 62、64、66 70 80 85 92、94 ' 96 100 101 103 105 110 140 源極區 主動區 没極區 通道區 源極區 LDD區 第一隔離層 第二隔離層 非晶矽層 第二多晶矽層 主動區 沒極區 通道區 源極區 閘極 第一保護層 第二保護層 中間層 電極 第一平坦層 接觸孔 陽極 第二平坦層 顯示器 控制電路 16 200926306 160 資料線驅動電路 165 資料線 180 掃描線驅動電路 187 掃描線 200 顯示面板 210 次像素 212 發光元件 214 驅動薄膜電晶體 216 開關薄膜電晶體 218 電容器 600 電子裝置 700 電源供應器 〇 1734c ' 34c5 36 36a 36b 36c 36d ' 36e 40 45 50 51 52 52a 52b 52c 62, 64, 66 70 80 85 92, 94 ' 96 100 101 103 105 110 140 Source region active region non-polar region channel region source region LDD region first isolation layer second isolation layer amorphous germanium layer second polysilicon layer active region non-polar region channel region source region gate first protective layer second protective layer intermediate layer electrode first flat layer contact hole anode Second flat layer display control circuit 16 200926306 160 data line drive circuit 165 data line 180 scan line drive circuit 187 scan line 200 display panel 210 sub-pixel 212 light-emitting element 214 drive thin film transistor 216 switch thin film transistor 218 capacitor 600 electronic device 700 Power supply 〇17