TW200914963A - Array substrate and liquid crystal display - Google Patents

Abstract

An array substrate with a display area and a peripheral area surrounding the display area. In one embodiment, the array substrate comprises a plurality of thin-film transistors (TFTs) disposed on the display area and at least one photovoltaic device disposed on the peripheral area, wherein the photovoltaic device comprises a second semiconductor layer having a p-type doped region, a n-type doped region and an undoped region between the p-type and the n-type doped regions, a first dielectric layer disposed on the second semiconductor layer and a reflective layer disposed on the first dielectric layer aligned to the undoped region.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an array substrate of a liquid crystal display, and more particularly to an array substrate having photoelectric conversion elements on a peripheral region of the array substrate. [Previous technology #f] In recent years, liquid crystal display panels have been widely used in display elements of various electronic products, which are provided with brightness by a backlight source to achieve display effect, and the required power of the backlight source occupies the liquid crystal display. Most of the power consumption, in order to achieve the purpose of reducing power consumption, it is desirable to have a device for generating electrical energy on the liquid crystal display. A conventional solar cell is fabricated after the completion of the thin film transistor in the display region and a vertical PIN type PIN diode is formed using an electrode and a transparent electrode such as an ITO device. The structure and material of the above solar cell are different from those of the thin film transistor in the display area, so an additional process is required to form, which is not only expensive in process, but also requires high cost. Therefore, there is a need in the industry for an array substrate having a solar cell, which can simultaneously manufacture a thin film transistor in a display region and a solar cell on a peripheral region, and achieve better light utilization efficiency to be converted into electric energy to reduce the liquid crystal display. power consumption. SUMMARY OF THE INVENTION The present invention provides an array substrate having a display area and a peripheral area surrounding the display area, including: a plurality of thin film transistors disposed on the display area,

Client's Docket No.: AU0612050 TT's Docket No: o632-A5io68TW/f/Kelly/2〇〇7〇4ii 5 200914963 and at least - the photoelectric conversion element is disposed on the peripheral region, and the body includes a ·-semiconductor layer having a channel a = / drain region on both sides of the region and the channel region, a gate dielectric layer overlying the first semiconductor layer; and a layer disposed on the gate dielectric layer 'and above the channel region. The optical element includes: a second semiconductor I' having a p-type doping 1, a doped region and an undoped region interposed between the P-type and the N-type doped region; the first human layer being disposed on the second semiconductor And a reflective layer disposed on the first dielectric reed and above the undoped region. In addition, the present invention further provides a liquid crystal display comprising: a first substrate; the second substrate has a display area and a peripheral area surrounding the display area, and is disposed opposite to the substrate; the liquid crystal layer is sandwiched between the first substrate and the first substrate Between the two base (four) display areas, and the backlight is disposed under the second substrate, wherein the second color plate comprises: a plurality of thin film transistors disposed on the display area, and including the "the first semiconductor layer having a channel a source/drain region on both sides of the region and the channel region; a gate dielectric layer overlying the first semiconductor layer; and a gate layer disposed on the gate dielectric layer and above the channel region, and at least one The electrical conversion element is disposed on the peripheral region and includes: a second semiconductor layer having a P-type doped region, an N-type doped region, and an undoped region interposed therebetween? Between the type 9 and the n' type doped region; the first dielectric layer is disposed on the second semiconductor layer; and the reflective layer is disposed on the first dielectric layer and above the undoped region, wherein the reflective layer will come from The light from the backlight is reflected to the photoelectric conversion element. In order to make the above-mentioned objects, features, and advantages of the present invention more obvious, the following description will be made in detail as follows: [Embodiment] FIG. 1 is a structural section of a solar cell known to the inventors.

Docket No.: AU0612050 s Docket No: o632-A5io68TW/f/Kelly/2〇〇7〇4ii (

Figure, which is a lateral PIN doped region 12, an N-type doped region "; a pole sign, between the substrate 1 夏 summer: N-type doped region, then: its upper and lower: miscellaneous region 16 is sandwiched in the electrical layer 18 to form a derivation L, a narrow dielectric layer, and a dielectric layer 18, and is connected to a P-type doped tooth, and a charging material to form a wire type 2 diode. == Area - Since the overall thickness of the crucible 16 is thin, it is usually about:: miscellaneous area 14 and undetected area

The light will penetrate the solar cell;;: Therefore, the light from the portion of the light source 22 cannot be approximated by the solar energy, so that in order to improve the above problem, the present invention is suitable for liquid crystal displays, > The substrate, which can be powered to supply the liquid crystal, and the light of the backlight is converted into a chopping board. Please refer to FIG. 2 , which is a plan view of the β 1 1 soil plate 10 , of the present invention, the array substrate 1 〇〇 has a display area 1 〇 2 and m around the display area of the peripheral area lQ4, in the display area (10) = = plural a thin film electric day and day body 1Q6 to control each of the pixel regions on the display area, and t to have at least one photoelectric conversion element such as a solar cell on the peripheral area 104, which can convert light from the backlight into electricity

The flow is supplied to the liquid crystal display panel to achieve energy saving effects. In one embodiment of the present invention, the structural cross-sectional view of the above-mentioned thin film transistor 丨06 is as shown in Fig. 3, which can be formed by a low temperature polysilicon (LTPS) process. First, a buffer layer 202 is covered on the substrate 200. The substrate 200 may be a glass substrate or a plastic substrate, and the buffer layer 202 may be made of tantalum nitride or hafnium oxide. Next, a semiconductor layer 208' is formed on the buffer layer 202 having a channel region 210 and source/drain regions 206/208 on both sides of the channel region. The material of the semiconductor layer 204 is, for example, polysilicon or amorphous germanium. Then, the gate dielectric layer 212' is overlaid on the semiconductor layer 204.

Client's Docket No.: AUo6i2〇5° „ , 7 TTs Docket No: o632-A5i〇68TW/f/KeIly/2〇〇7〇4ii 200914963 Figure 3 shows the two layers of the solution, the gate dielectric Acoustic 212,,, ° structure, familiar with this artist can be oxygen cut: the structure above the nitride layer, the material layer 212 and the poetry channel area ^; the combination of fans. Then, in the gate The electric metal material is formed, for example, a gate layer 214 ′ is formed over the titanium. The upper layer may also cover the insulating layer 2, 'mesh, nickel, sho or copper. </ br> in the gate layer 214 structure, or may be As shown in the figure, it can be two layers/hole, and is filled with U=212 and the insulating layer 216. The engraved conductor is formed to form the wire 218 respectively or the multilayer metal titanium, titanium minus, etc., thin film transistor 1〇 6. Connect to the source/drain region 206/208, that is, the source/drain region 206/208 in the early ^t ^ transistor 1〇6 can be doped by: implantation or diffusion process A substance such as phosphorus, arsenic, or p-type doped, such as a butterfly, is formed in the semiconductor layer, which may be a heavily doped region or a lightly doped region. The source/drain region in the thin film transistor 106 206/208 can be introduced into the Ν-type dopant to form Ν-type gold-oxygen (NM〇s) components, or both can be introduced into the P-type dopant to form a p-type MOS device, or One thin film transistor is introduced into the N-g dopant, and the other thin germanium transistor is introduced into the P-type dopant to form a complementary germanium gold-oxide half (CMOS) device. The channel between the source/drain region 206/208 The area 210 is an undoped region. In one embodiment of the present invention, the structural cross-sectional view of the photoelectric conversion element 1 is as shown in Fig. 3, and is a side θ-direction PIN type double body ( Lateral PIN diode), NIN type two doped or 疋PIP type - polar body, of which PIN type diode is preferred, photoelectric conversion part 1 〇 8 can be used with thin chess

Clienfs Docket No.: AU0612050 TT’s Docket No: 〇632-A5i〇68TW/f/Kelly/2〇〇7〇4ii 8 200914963 The same low temperature polysilicon process is formed for the transistor 106. A buffering germanium + conductor layer 222 is formed on the substrate 2 〇 0 of the μ jm film transistor 1 (four), which comprises a P-type doping region 224, an N-type doping region 2 26 and an undoped region 22 8 The material of the N-type dopant semiconductor layer 222 in the p-type doping region may be polycrystalline or amorphous. The second layer 'over the semiconductor layer 222 is covered with a dielectric layer 23, which may be a layer or a structure on which the material is, for example, oxygen cut, nitrogen cut or a combination of the foregoing. ί

Alternatively, a portion of the reflective layer 232' reflecting layer formed over the undoped region (10) on the dielectric layer 23G may be located? Above the doped region 224 and the n-doped region 226, which may be formed of a metallic material, such as a mask, face, mark, or copper, to reflect light from under the photoelectric conversion element 108. An insulating layer 234 may also be overlying the reflective layer 232, which may be one or more layers similar to the dielectric layer 230, and may be formed of a combination of oxidized oxide, nitrogen (tetra), or a combination of the foregoing in the dielectric layer 23〇. And forming a via hole in the 彖 layer 234 and filling a conductive material such as a first or a plurality of layers of metal titanium, titanium, titanium, etc., to form a guide wire 236 connected to the ? The type of the dummy region 224 and the N-doped region 226, that is, the photoelectric conversion element of the present invention has the advantages that the same process and material can be used to simultaneously fabricate the thin germanium transistor on the display area of the array substrate and the peripheral region. Photoelectric Conversion Element 'In the above-described thin film transistor 1〇6 and the photoelectric conversion element (10), the semiconductor layers 204 and 220 may be different portions of the same layer, and the P-type doping region η4 in the semiconductor layer 222 may utilize the semiconductor layer 2〇4 source/bungee area 206/208 lead p-type f-phase (four) shop_

Client's Docket No.: AU0612050 TTs Docket No: o632-A5i〇68TW/f/Kelly/2〇〇7〇4ii 9 200914963, and the N-type doping region 226 in the semiconductor layer 222 can also be utilized in the semiconductor layer 204 The same process in which the source/drain regions 206/208 are introduced into the N-type dopant simultaneously forms 'and the gate layer 214 and the reflective layer 232 may also be different portions of the same layer. - Similarly, the structures of other layers in the thin germanium transistor 106 and the photoelectric conversion element 1 8 such as the buffer layers 202 and 220, the dielectric layers 212 and 230 or the insulating layers 216 and 234 may also utilize the same process and The same material is formed. Therefore, the thin film transistor and the photoelectric conversion element can be simultaneously formed by the present invention, thereby achieving the effect of reducing cost and shortening the manufacturing time. In addition, the present invention also provides a liquid crystal display, please refer to FIG. 4, which is a cross-sectional view of a liquid crystal display (3) according to an embodiment of the present invention. The liquid crystal display 300 t includes an upper substrate 301 disposed opposite to the lower substrate 303, wherein the upper substrate 301 can be a color filter substrate. The lower substrate 3〇3 can be the array substrate 100 as described above, that is, having a display area thereon. A plurality of thin film transistors 106 as shown in Fig. 3 are provided, and at least one photoelectric conversion element 108 as shown in Fig. 3 is provided on the peripheral portion thereof. A liquid crystal layer 305 is interposed between the upper substrate 3 〇1 and the display area 102 of the lower substrate 303, and a pair of upper and lower polarizing plates 307 and 309 respectively sandwich the upper substrate 301 and the lower substrate 303, and the other is under A backlight 311 is further disposed under the polarizing plate 309. As described above, the photoelectric conversion element 108 on the peripheral region 104 of the array substrate 303 may be a solar cell, and the reflective layer 232 in the structure may pass the liquid crystal display panel in the backlight 311. The light is reflected to the semiconductor layer 222, and the light energy is converted into a current by the PIN type diode, and is supplied to the liquid crystal display panel. The light of the backlight is recovered by the photoelectric conversion element 108, and the light energy is converted into a current. It can save power consumption of the liquid crystal display panel and achieve energy saving effect.

Client s Docket No.: AU0612050 10

Docket No: o632-A5i〇08TW/f/Kelly/2〇〇7〇4ii 200914963 Fig. 5 is a comparison diagram of the photoelectric conversion output characteristics of the backlight of the photoelectric conversion element of the present invention and the solar cell of the second figure, in the figure Line A, the photoelectric conversion element ι 8 having the reflective layer of the present invention, and the line B represents the solar cell of Fig. 1, wherein the diode area of both is 15 〇 m*1 〇 / Zm, used The brightness of the backlight is 943 LUX. The photoelectric output characteristics of the photoelectric conversion element of the present invention can be obtained from the line A of FIG. 5, and the maximum voltage (Vmax) is about 15.15v, and the maximum current (Imax) is about 2.3E 10A. The maximum output power (pmax) is about 3.4e_i iw ; (By the line B, the photoelectric output characteristic of the solar cell of the f 1 is obtained, and the maximum voltage (Vmax) is about 〇16v. The maximum current (Imax) is about 6.6E-11A, and the obtained maximum output power (pmax) is about .1E 11W. As can be seen from the comparison result, the photoelectric output power of the photoelectric conversion element having the reflective layer of the present invention can be about The solar energy of the second figure is more than double. The eye is further referred to Figure 4, except for the array substrate 3〇3 In addition to the peripheral area ι〇4, it has an extension portion 11〇 with respect to the backlight 311, and has at least one photoelectric conversion element 1〇9 thereon, and the photoelectric conversion element 1〇9 and the photoelectric conversion I, 70 The structure of the device 1〇8 is similar, and each has a reflective layer, and the piN-type diode from which the light from the outer side of the same side as the backlight 311 is reflected, and the external light is converted into electric energy for reuse. The photoelectric conversion element 108 on the peripheral area 〇4 of the 303 can be used as a sensing element=, and the PIN type diode can convert the light of the backlight into electric energy, and can be sensed. Detecting the brightness of the backlight and converting it into a current value, thereby controlling whether the brightness of the backlight is degraded. Although the invention has been disclosed, the preferred embodiment is as described above, but it is not limited

Client's Docket No.: Αυ〇6ΐ2〇ς〇

IT's Docket No: The invention is based on the invention. Anyone skilled in the art can make some changes and refinements without departing from the spirit and scope of the present invention. The scope of protection is subject to the definition of the scope of the patent application attached.

Client's Docket No.: AU0612050 12 TT’s Docket No: 0632-A5io68TW/f/Kelly/2〇〇7〇4ii 200914963 [Simplified Schematic] $1 is a structural cross-sectional view of a solar cell known to the inventors. The f 2 diagram is a schematic plan view of the array substrate of the present invention. Fig. 3 is a cross-sectional view showing the structure of a thin film transistor and a photoelectric conversion element of the present invention. 4 is a cross-sectional view showing a liquid crystal display according to an embodiment of the present invention. Fig. 5 is a comparison diagram of the photoelectric conversion output characteristics of the backlight of the photoelectric conversion element of the present invention and the solar cell of the first embodiment. [Main component symbol description] 10, 200~ substrate; 12, 224~Ρ type doping region; 14, 226~N type doped region; 16, 228~ undoped region; 18, 230~ dielectric layer; , 218, 236 ~ wire; 22 ~ light source; 100 ~ array substrate; 102 ~ display area; 104 ~ peripheral area; 106 ~ thin film transistor; 108, 109 ~ photoelectric conversion element; 110 ~ array substrate extension 9 202, 220 to buffer layer; 204, 222 to semiconductor layer; 206, 208 to source/drain region; 210 to channel region; 212 to gate dielectric layer; 214 to gate layer; 216, 234 to insulating layer; ~ reflective layer; 300 ~ liquid crystal display; 301 ~ upper substrate; 303 ~ lower substrate; 305 ~ liquid crystal layer; 307 ~ upper polarizing plate; 309 ~ lower polarizing plate; 311 ~ backlight.

Client’s Docket No.: AU0612050 IT’s Docket No: 〇632-A5io68TW/f/Kelly/2〇〇7〇4ii 13

Claims (1)

200914963 X. Patent application scope: 1. An array substrate having a display area and a peripheral area surrounding the display area, comprising: a plurality of thin film transistors disposed on the display area, comprising: a first semiconductor layer, a channel region and a source/drain region on one side of the channel region; a dummy layer; an electrical layer overlying the _ semiconductor layer; and a gate layer disposed on the gate dielectric layer Up and above the channel area; and f' The at least one photoelectric conversion element is disposed on the peripheral region, and includes: σ a second semiconductor layer ′ having a p-type doping region, a Ν-type doping region, and an undoped region interposed between the p-type doping a region between the region and the doped region; a first dielectric layer disposed on the second semiconductor layer; and a reflective layer disposed on the first dielectric layer and above the undoped region . 2. The array substrate of claim 1, wherein the σ 卩 of the reflective layer is above the 掺杂-type doped region and the ν-type doped region. The array substrate of claim 1, wherein the first semiconductor layer and the first semiconductor layer are different portions of the same layer. 4. The array substrate of claim 1, wherein the material of the second semiconductor layer and the first semiconductor layer comprises polycrystalline germanium or amorphous. 5. The array substrate of claim 1, wherein the reflective layer and the gate layer are different portions of the same layer. 6. The array substrate according to claim 1, wherein the anti-CHenfs Docket No, AUo6i2〇5o Docket No: 〇632-A5i068TW/f/Kelly/2〇〇7〇4U 14 200914963 shot layer and the gate The material of the pole layer is metal. The array substrate of claim 1, wherein the first dielectric layer and the gate dielectric layer are different portions of the same layer. The array substrate according to claim 1, wherein the material of the first dielectric layer and the gate dielectric layer comprises a combination of tantalum nitride and oxidized. 9. The array substrate according to claim 1, wherein the thin film transistor comprises a -N type gold oxide half (NM〇s) element and a p type gold oxide half (PMOS). The array substrate of the first aspect of the invention, wherein the photoelectric conversion element is a lateral PIN type diode (lateral piN). The array substrate according to claim 1, further comprising a second dielectric layer disposed on the reflective layer and the gate layer at the same time. The array substrate of claim 11, wherein the material of the first dielectric layer comprises tantalum nitride, hafnium oxide or a combination thereof. The core substrate of the first aspect of the invention, including G The buffer layer is disposed under the second semiconductor layer and the first semiconductor layer. The array substrate according to claim 13, wherein the buffer layer material comprises tantalum nitride. Or yttrium oxide. A liquid crystal display comprising: a first substrate; The second substrate 'has a display area and a peripheral area surrounding the display area and is disposed opposite the first substrate; - a liquid crystal layer, the display Client's Docket No is sandwiched between the first substrate and the second substrate ·: AU0612050 IT's Docket No: o632-A5io68TW/f/Kelly/2〇o7〇4U 15 200914963 between the zones; and a backlight disposed under the second substrate, wherein the second substrate comprises: a plurality of thin films a crystal, disposed on the display area, and comprising: a first semiconductor layer having a channel region and a source/drain region on one side of the channel region; a gate "electric layer, covering the first" a semiconductor layer; and a gate layer disposed on the gate dielectric layer and located above the channel region; and a photoelectric conversion element disposed on the peripheral region, and comprising: a second a semiconductor layer having a doped region, an -N-doped region, and an undoped region interposed between the p-type doped region and the N-type region; 'a first dielectric layer disposed on the first On the second semiconductor layer; and the -reflective layer is disposed on the first On the dielectric layer, and above the unaltered area, the reflective layer will be a light-reflecting element from the backlight. The liquid crystal display according to claim 15 of the patent application, A pair of polarizing plates respectively sandwich the first substrate and the second substrate. The liquid crystal display according to claim 15, wherein the photoelectric conversion element comprises a solar cell. The liquid crystal display of claim 15, wherein the photoelectric conversion element comprises a sensing element for sensing the backlight. The liquid crystal display according to claim 15, wherein the second substrate is opposite to the liquid crystal display. The backlight further includes an extension portion (4) Client's Docket No.: AU0612050 TT's Docket No: o632-A5io68TW/f/Kdly/20〇7〇411 200914963 has at least one of the photoelectric conversion elements, and wherein the reflection The layer reflects light from the outer side of the same side as the backlight to the photoelectric conversion element. r K. Client’s Docket No,: AU0612050 IT’s Docket No: o632-A5io68TW/f/Kelly/2〇〇7〇4ii 17