200901136 九、發明說明: 【發明所屬之技術領域】 本發明是有關於一種驅動電路及其驅動電路單元,且 特別是有關於一種液晶顯示器中之閘極驅動電路及其驅動 電路單元。 【先前技術】BACKGROUND OF THE INVENTION 1. Field of the Invention This invention relates to a driving circuit and a driving circuit unit thereof, and more particularly to a gate driving circuit and a driving circuit unit thereof in a liquid crystal display. [Prior Art]
在近來用於液晶顯示器的閘極驅動電路中,其作法是 在玻璃基板上製作包含複數個驅動電路單元的閘極驅動電 路,並利用這些驅動電路單元依序輸出閘極驅動信號至掃 瞄線中,如此便可取代使用一般的閘極驅動積體電路(IC), 進而節省使用閘極驅動ic的昂貴成本。 第1圖係繪示習知閘極驅動電路中之驅動電路單元的 不意圖。在此係以第κ級的驅動電路單元為例,當電晶體 Ml接收來自第(K-1)級驅動電路單元所輸出的間極驅動信 號SNu之後,電晶體M1會因此導通,使得電壓源 的信號透過電晶體Ml傳送至節點P,藉以導通電晶體M2。 而後,待時序信號CLK為高位準時,時序信號CLK再透 過電晶體Μ 2輸出,以作為閑極驅動信號s n &。此種作法係 藉由拉抬電晶ft M2之間極端的電壓,進而縮短輸出之間 極驅動信號SNK的上升時間(士_ dme);亦即,在電晶體In a gate driving circuit for a liquid crystal display recently, a gate driving circuit including a plurality of driving circuit units is formed on a glass substrate, and the gate driving signals are sequentially output to the scanning lines by using the driving circuit units. This can replace the use of a general gate drive integrated circuit (IC), thereby saving the expensive cost of using the gate drive ic. Fig. 1 is a schematic view showing a driving circuit unit in a conventional gate driving circuit. In this case, the driving circuit unit of the κ level is taken as an example. After the transistor M1 receives the inter-pole driving signal SNu outputted from the (K-1)-th driving circuit unit, the transistor M1 is turned on, so that the voltage source is The signal is transmitted to the node P through the transistor M1, thereby conducting the transistor M2. Then, when the timing signal CLK is at a high level, the timing signal CLK is again output through the transistor Μ 2 to serve as the idle driving signal s n & This method shortens the rise time of the pole drive signal SNK (s_dme) between the outputs by pulling up the extreme voltage between the crystal ft M2; that is, in the transistor
Ml導通時先拉抬節點p的蛩两 -,, 曰曰 的電壓,而後在電晶體M2接收時 序信號CLK時,再次拉抬節 即點P的電壓,以加速電晶體 M2開啟的時間,而縮短輪出信號抓的上升時間。 6 200901136 ^然而,由於製作薄膜電晶體所使用的非晶矽(a-Si)其遷 私率非常小,且-般只使用n型的薄臈電晶體作為開關使 ' 肖’因此在祕驅動信號輪出之後,薄膜電晶體並無法迅 • $地立即關閉’使得輸出之閘極驅動信號的下降時間 (falling time)過長,而導致輸出的閘極驅動信號會盥下—級 輸出的間極驅動信號在時間上重疊;亦即,兩條掃瞄線會 因而破同時驅動,使得寫入資料可能發生不正綠的情形。 O ®此’有必要提出-種驅動電路單元,可藉以改善掃 晦線被同時驅動的問題,避免資料寫入錯誤的情形發生。 【發明内容】 本發明之-技術樣態係關於一種液晶顯示裝置之驅動 電路單元。此種驅動電路單元係製作於一玻璃基板上,並 用以輸出一驅動作號,盆匆人墙 +。止 社琥*包含一第-電晶體、-辅助輸入 早二以及-第二電晶體。第-電晶體之閘極端係接收一輪 〇 入仏號’其第-端係電性耦接於-電壓源,其第二端係用 以輸出-第一信號。輔助輸入單元係電性減於第一電晶 體=第二端,並接收第一信號以及一時序信號以輸出-ί ―㈣。第二電晶體之閘極端係電性㈣於辅助輸入單元 並接收第二信號,直篦一唑在拉 U ^係接收時序信號,其第二端係 用以輸出驅動信號。 本發明之另一技術樣態係關於一種閘極驅 電路係製作於-玻璃基板上,並包含複數個驅 動電路早几,用以驅動一液晶顯示器中之複數條掃猫線, 200901136 =電路單元依序分別輸出1極驅動 ㈣線之―。每一驅動電路單元另包含-第-電曰體 辅助輸入單元以及一第一带 电曰曰體、— 弟一屯曰日體。第一電晶體之 接收由上-級驅動電路單元所輪出之間極驅動第 -端係電性轉接於一電壓源,其第二端係 第弟 信號。輔助輸入單元係電性轉接於第-電晶體之第二^ 並接收苐-信號以及-時序信號以輸出一第二 ΠΓ極端係電性耗接於辅助輸入單元並接收第 U-端係接收時序信號,其第二端係用以輸出祕 驅動信號,並將閘極驅動信號傳送至下-級驅動電路單元。 種二:明ΐ另一技術樣態係關於—種液晶顯示裳置。此 料線驅動器以及一閘極=線:數條掃晦線、-資 成-顯示陣列,而資料線=則=與_交又形 個影像信號至資料線。閉㈣、貝枓線並產生複數When M1 is turned on, the voltage of the two-, and 曰曰 of the node p is first pulled, and then when the transistor M2 receives the timing signal CLK, the voltage of the node P is pulled again to accelerate the time when the transistor M2 is turned on. Reduce the rise time of the rounded signal capture. 6 200901136 ^However, the amorphous yttrium (a-Si) used in the fabrication of thin-film transistors has a very low privilege rate, and generally only uses n-type thin germanium transistors as switches to make 'Shaw' After the signal is turned on, the thin-film transistor cannot be turned off immediately. The falling time of the output gate drive signal is too long, and the gate drive signal of the output will be dropped. The pole drive signals overlap in time; that is, the two scan lines are thus broken and driven at the same time, so that the write data may be out of green. O ® this is necessary to propose a kind of driving circuit unit, which can improve the problem that the scanning line is driven at the same time, and avoid data writing errors. SUMMARY OF THE INVENTION The technical aspect of the present invention relates to a driving circuit unit of a liquid crystal display device. The driving circuit unit is fabricated on a glass substrate and used to output a driving number. Stop Sahu* contains a first-transistor, an auxiliary input, a second and a second transistor. The gate terminal of the first transistor receives a round of 仏's ’', the first end of which is electrically coupled to the -voltage source, and the second end of which is used to output a first signal. The auxiliary input unit is electrically reduced from the first transistor = the second terminal, and receives the first signal and a timing signal to output -ί - (4). The gate of the second transistor is electrically connected (4) to the auxiliary input unit and receives the second signal. The direct azole is used to receive the timing signal, and the second end is used to output the driving signal. Another technical aspect of the present invention relates to a gate drive circuit fabricated on a glass substrate and including a plurality of drive circuits for driving a plurality of sweeping cat lines in a liquid crystal display, 200901136 = circuit unit Output the 1-pole drive (four) line separately. Each of the driving circuit units further includes a --electrode body auxiliary input unit and a first electrified body, a younger body. The first transistor is received by the upper-stage driving circuit unit, and the first end is electrically connected to a voltage source, and the second end is a second signal. The auxiliary input unit is electrically connected to the second transistor of the first transistor and receives the 苐-signal and the timing signal to output a second ΠΓ extreme system electrically consuming the auxiliary input unit and receiving the U-terminal receiving The timing signal has a second end for outputting the secret driving signal and transmitting the gate driving signal to the lower-level driving circuit unit. Kind 2: Another technical aspect of Ming Hao is about liquid crystal display. The line driver and a gate = line: several broom lines, - resource - display array, and data line = then = _ intersection and form an image signal to the data line. Close (four), shellfish line and produce plural
U 上,並包含複數個驅㈣tr用作於玻璃基板 :皁序:別輸出-間極羅動信號至相對應之掃聪線 電:!元另包含一第一電晶體、-辅助輸 二-級驅動電路單元所輸出之閘極驅動信號,其第: 電性輕接於-電壓源,其第二端係用以輸出第一作於。辅 助輸=單元係電性稱接於第一電晶體之第二端,並純第 仏虎以及-時序信號以輸出第二信號 極端係電性竊接於辅助輸入單元並接收第二 200901136 端係接收時序信號,其第一端係用以輸出閘極驅動信號, 並將閘極驅動信號傳送至下一級驅動電路單元。 . —根據本發明,應用前述閘極驅動電路及其驅動電路單 元可藉以控制輸出之閘極驅動信號的上升時間,避免同時 驅動兩條掃瞄線而導致寫入資料不正確的情形發生。 【實施方式】 〇 請參照第2圖,其繪示依照本發明實施例之—種液晶 顯示裝置的示意圖。液晶顯示裝置2〇〇包含複數條資料線 〜·. dn、複數條_線Gl…Gn、—資料線驅動器搬以及 一閘極驅動電路204。資料線驅動器202輕接資料線Di.·. 仏’並傳送複.數個影像錢至資料❹广^閘極驅動電 路2〇4係製作於-玻璃基板(未緣示)上,並包含複數個驅動 電路單元210用以驅動掃瞒線&…⑸,且依序分別輸出間 極驅動信號SNi...SNn至相對應的掃瞒線。資料線 (J 〇1.鳴與掃晦線Gi...Gn交錯形成顯示陣列220,且此顯示 陣列2 2 0係根據資料線D (D N中傳送的影像信號以及掃晦 線心..G N中傳送的閉極驅動信號,將影像顯示出來。 第3圖係綠不第2圖中一種驅動電路單元的示意圖。 本實[·!係以第K級的驅動電路單元為例,且驅動電路 元包含一電晶體以、—電晶體Q2以及一辅助輸入單元 则a’其中電晶體Q4Q2在本實施例中係分別為一㈣ 金氧半導體(NMOS)雷曰雜 ^ η 上一級—即第叫電晶體Φ的閘極端係接收由 ’’ 驅動電路單元所輸出的閘極驅動信 200901136 號SNK_丨’其没極端係電 漶則用…山 电_接於-電壓源VCC’而其源極 接於電日:第—信號以。辅助輸入單元鳥係電性輕 源極端,並接收其所輪出的第-信號Μ Q2的門L端:號CLK ’藉以輸出一第二信號ss。電晶體 Q2的閘極知係電性耦接 甘、 文么稀助輸入早凡300a,並接收第二 么號S,其汲極端係接收 Ο Ο 以輸出_驅動信號叫二::而其源極端則用 信號S物至下一級二第=線Gk’並一 此外,輔助輸入單元二(:驅動電路單元中。 且電晶體Q3在本實:二= 含一電晶體& Q3的閘極端係電性鯉 电日曰體電日日體 伟接收日丰心, 體Q1的源極端,其没極端U, and contains a plurality of drives (four) tr used for the glass substrate: soap order: do not output - the interpole signal to the corresponding sweep line:! The element also contains a first transistor, - auxiliary input two - The gate driving signal outputted by the driving circuit unit is electrically connected to the voltage source, and the second end is used for outputting the first operation. The auxiliary transmission unit is electrically connected to the second end of the first transistor, and the pure third and the timing signal are outputted to the second signal terminal to electrically steal the auxiliary input unit and receive the second 200901136 end system. The timing signal is received, and the first end thereof is used for outputting the gate driving signal, and the gate driving signal is transmitted to the next-stage driving circuit unit. According to the present invention, the application of the gate drive circuit and the drive circuit unit thereof can control the rise time of the output gate drive signal, thereby avoiding the situation that the two scan lines are simultaneously driven and the written data is incorrect. [Embodiment] Referring to Figure 2, there is shown a schematic view of a liquid crystal display device in accordance with an embodiment of the present invention. The liquid crystal display device 2 includes a plurality of data lines 〜.. dn, a plurality of _ lines G1...Gn, a data line driver, and a gate driving circuit 204. The data line driver 202 is connected to the data line Di.·. 仏' and transmits the complex number of images to the data. The gate driving circuit 2〇4 is fabricated on the glass substrate (not shown) and includes plural numbers. The driving circuit unit 210 is configured to drive the broom lines & (5), and sequentially output the inter-pole driving signals SNi...SNn to the corresponding broom lines. The data line (J 〇1. 鸣 and the broom line Gi...Gn are interleaved to form the display array 220, and the display array 2 2 0 is based on the data line D (the image signal transmitted in the DN and the broom center: GN The closed-pole driving signal transmitted in the middle displays the image. Fig. 3 is a schematic diagram of a driving circuit unit in the green diagram. The actual [·! is based on the driving circuit unit of the K-th order, and the driving circuit The element comprises a transistor, a transistor Q2, and an auxiliary input unit, wherein a' of the transistor Q4Q2 is a (4) gold oxide semiconductor (NMOS) Thunder impurity η upper level in the present embodiment - that is, the first call The gate terminal of the transistor Φ receives the gate drive letter 200901136 number SNK_丨' output by the ''drive circuit unit'. It is not used for extreme poles. The mountain is connected to the voltage source VCC' and its source Connected to the electricity day: the first signal is. The auxiliary input unit is the bird's electrical light source terminal, and receives the first signal L of the first signal Μ Q2 that it is rotating: the number CLK 'by outputting a second signal ss. The gate of crystal Q2 is electrically coupled to Gan, Wenmi, and the help input is 300a, and receives the second. No. S, the 汲 extreme system receives Ο Ο to output _ drive signal called 2:: and its source terminal uses signal S to the next level 2 = line Gk' and one additional, auxiliary input unit 2 (: drive circuit unit And the transistor Q3 is in the real: two = a transistor with a transistor & Q3, the gate is extremely electric, the electricity is the day, the body is the day, the body is receiving the day, the source is extreme, and the source is extreme.
係接收時序㈣CLKL 的閉極端,並用以輪屮帛。 …生耦接於電晶體Q2 電晶體03 Μ '出弟-仏號…以較佳實施例而言, 電曰曰體Q3可為一大尺寸 大的通道寬度長度比(W/L)。電曰曰體’亦即其具有較 請參照第4圖,給干埜 的干音圖^ …'以2圖中另一種驅動電路單元 的不意圖。相較於第3圖, 平兀 可另包含H Ω4本,施例之辅助輪人單元3_ 和Q5在本二:广及—電晶體Q5,其”晶體Q4 Q在本貝施例中亦分別為一N 曰 師的間極端均電性為接於 二體。電晶師 二和Q5的及極端均接收時序信號咖,而電 Q5的源極端則均電性 a - Q4和 輸出第μ : Q的間極端,並用以 取弟—佗旒SS。以較佳實施例而言 可分別為-大尺寸的NM0 4 Q4和仍 电日日體且各為不同尺寸,亦 10 200901136 即具有不同的通道寬度長度比(W/L)。 Γ:It is the closed end of the CLKL that receives the timing (4) and is used for the rim. ... is coupled to the transistor Q2 transistor 03 Μ '出弟-仏号... In the preferred embodiment, the electrode body Q3 can be a large size channel width to length ratio (W/L). The electric raft body, i.e., it has the intention of referring to Fig. 4, to the dry sound map of the dry field, and to the other driving circuit unit in Fig. 2 . Compared with Figure 3, Pingyi can also contain H Ω4, and the auxiliary wheel units 3_ and Q5 of the example are in the second: Guanghe-Crystal Q5, and the crystal Q4 Q is also in the Benbe example. The extreme electrical uniformity of a N-strainer is connected to the two bodies. The electromorpho 2 and Q5 and the extremes all receive the timing signal, while the source terminal of the electric Q5 is electrically a-Q4 and the output μ: The extremes of Q are used to take the 佗旒-佗旒 SS. In the preferred embodiment, it can be - large size NM0 4 Q4 and still electric day and body and each of different sizes, also 10 200901136 has different Channel width to length ratio (W/L).
(J 以下將以一實施例說明驅動電路單元的操作情形,其 中第3圖的驅動電路單元與第4圖的驅動 上大致相同。第5圖係繪示第3圖中驅動電路== 時序圖。請參照第3圖及第5圖,當在時間u時,上一級一 即第(κ-υ級-驅動電路單元所輪出的閘極驅動信號si 會傳送至電晶體φ,使得電晶體Q1導通。此時電壓源作 號VCC會透過電晶體Q1的源極端輸出,以作為第一俨號 FS而儲存於電晶體q3的閘極端,且電晶體印係為導通^ 狀態。由於電晶體Q3此時所接收的時序信號咖係位於 低位準狀態,所以節點p亦位於低 Q2仍然呈現關閉的狀態。條丰狀怨,使得電晶體(J) The operation of the driving circuit unit will be described below with reference to an embodiment in which the driving circuit unit of Fig. 3 is substantially the same as that of Fig. 4. Fig. 5 is a diagram showing the driving circuit of Fig. 3 == timing chart Referring to FIG. 3 and FIG. 5, when at time u, the gate drive signal si that is rotated by the upper stage (ie, the κ-υ-drive circuit unit is transmitted to the transistor φ, so that the transistor Q1 is turned on. At this time, the voltage source VCC will be output through the source terminal of the transistor Q1, and stored as the first apostrophe FS at the gate terminal of the transistor q3, and the transistor is turned on. Since the transistor Q3 The timing signal received at this time is in the low level state, so the node p is also in the state of low Q2, which is still closed.
=時^時,由於電晶體Q3所接收的時序信號CLK ==狀態,因此時序信號CLK會透過電晶體Q3 的源極端輸出,以作為第二信號ss,且 準狀態,使得電晶體Q2導通。此時 方位於间位 透過電晶體Q2的源極端輸出,以作為間極驅脖號抓會 如此-來’便可藉由設計電㈣Q3的大 ^ 的充電速度,亦即藉由設計電晶體Q3的大】^即點P Q2的導通速度,進而決定間 .、來控制電晶體 間)。 社柄輪丨時間(上升時 由上述本發明之實施例可知,應 其驅動電路單元可藉以控制輸出之間極驅動電路及 時動兩條掃瞎線而導致寫入資料不正確的情 13 200901136 形發生。 太…發明已以實施例揭露如上’然其並非用以限定 本^明M壬何所屬技術領域中具有通常知識者,在不脫離 二月之精神和範圍内,當可作各種之更動與潤飾,因此 準。-月之保^圍當視後附之巾請專利範圍所界定者為 〇 【圖式簡單說明】 第1圖係繪示習知閘極驅動電路中之一驅動電路 的示意圖。 第2圖係繪示依照本發明液晶顯示褽置實施例的示竞 圖〇 *处 :3圖係繪示第2圖中-種驅動電路單元的示意圖。 第4圖係繪示第2圖中另一種驅動電路單元的示音圖。 第5圖係繪示第3圖中驅動電路單元動作的時序圖。 〇 … [主要元件符號說明】 200 : 液晶顯示裝置 220 :顯示陣列 202 : 資料線驅動器 300a、300b :輔助輸入單元 204 : 210 : 閘極驅動電路 驅動電路單元 電晶體When the timing signal CLK == state received by the transistor Q3, the timing signal CLK is output through the source terminal of the transistor Q3 as the second signal ss, and the quasi-state makes the transistor Q2 turn on. At this time, the square is output through the source terminal of the transistor Q2, so as to be able to grasp the charging speed of the electric (4) Q3, that is, by designing the transistor Q3. The large 】^ points the conduction speed of P Q2, which in turn determines the interval between the transistors. The rim time of the handle (when rising, it can be seen from the above embodiment of the present invention that the drive circuit unit can control the output of the pole drive circuit to move the two broom lines in time to cause the data to be incorrect. 13 200901136 Occurs. The invention has been disclosed in the above embodiments. However, it is not intended to limit the general knowledge in the technical field of the present invention, and various changes can be made without departing from the spirit and scope of February. And the retouching, and therefore the quasi--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- 2 is a schematic diagram of a liquid crystal display device according to an embodiment of the present invention: FIG. 3 is a schematic diagram showing a driving circuit unit in FIG. 2. FIG. 4 is a second drawing. Fig. 5 is a timing chart showing the operation of the driving circuit unit in Fig. 3. [... Main element symbol description] 200: Liquid crystal display device 220: Display array 202: Data Line driver 30 0a, 300b: auxiliary input unit 204 : 210 : gate drive circuit drive circuit unit transistor