200844778 - 九、發明說明： [發明所屬之技術領域] 本發明係有關於一種印刷電路板設計技術，更詳而言 之，係關於一種應用於透過資料處理裝置執行之印刷電路 板之佈線軟體中之印刷電路板設計方法。 [先前技術] 目前印刷電路板上多數佈設有具有不同功能之電子元 件，例如球柵陣列式（BGA)、覆晶式（FlipChip)、晶片尺寸 封裝（Chip size package ; csp)與多晶片模組（mcm，出 chipmodule)等之半導體封裝結構之電子元#，而且，印刷 電路板大多為多層板，各層板之間係透過通孔⑽）電性連 接，且該通孔通常係佈設於電子元件之複數個#腳之間， -般係佈設於該電子元件之每四顆接腳圍成之中間區域。 透過例如Allegro、Protel等現有各類佈線軟體程式設 計印刷電路板過程中，在設計電子元件時，目前之做法係 於該電子元件之所有接腳之間佈設通孔作業完成後，再藉 由手動方式刪除已佈設於該電子元件中心位置且位於二^ 座標（橫軸座標及縱軸座標）上垂直交又之區域之二排通 孔，以作為該電子元件所需之電源通道，進 = 元件特定之電流載量；接著，復需以手動方式連接該= 几件中具有電氣屬性之接腳至對應之通孔。 、㈣f由上述設計方式，將耗費大量人力及精力，以執行 通孔佈設、電源通道之預留及連線等作業，而且，由於不 间之電子元件所具有之複數個接腳之佈設方式可能不禽相 110203 5 200844778 .:’有有:電電子=各有該接腳係為均句分佈_分佈)方 則分佈㈣,：r述有二 亦不同，+ 式砥取通孔之佈設規則 了佈線效率s加了手料設通孔作業之難度，進而影響 刷電：ΐ::’如何提出一種可解決習知技術之缺失之印 居“路板设計方法，實為目前 [發明内容] 野戌之技術問碭。 供土述1知技術之缺點’本發明之主要目的在於提 :;種=_計方法，以節省時間、人力及精力的 耗費進而提咼佈線效率。 板执;=去这1的及其他目的’本發明提供一種印刷電路 ;二十方法。本發明之印刷電路板設計方法係應用於透過 -貝料處理裝置執行之印刷電路板之佈線軟體中，其中，該 印刷電路板係佈設有至少—具有複數個接腳㈣之電子/ 70件該印刷電路板設計方法係包括以下步驟：⑴選取 該印刷電路板之所有電子元件，以擷取該各電子元件中之 所有接腳之屬性訊息以及佈局方式，該屬性訊息包括各該 接腳之位置讯息、電氣屬性訊息以及網路（DM)屬性訊息； (2)依據所擷取之該電子元件中之各該接腳之佈局方$ : 計算該電子元件於二維座標上之排列數量；（3)依據所計 算之排列數量以及預設之運算規則，計算得到一第一限制 區域，以透過該第一限制區域將該電子元件分成四個區 塊；（4)依據所分成之各該區塊，設置各該區塊中的接腳 110203 6 200844778 .佈線方向，（5)依據所擷取之各該接腳之電氣屬性訊自> 制各該接腳是否具有電氣屬性，若是，則進至步卯）， 右否，則進至步驟（6);⑹依據該接腳對應之區塊所 之接腳佈線方向，設定第二限制區域；⑺於該電子元件 之各該接腳之間之非為該第一及第二限制區域的區域中， 2據所擷取之各該接腳之位置訊息，並透過—預設之通孔 佈設規則佈設通孔；以及⑻依據該電子元件之各該接腳 =應之區塊所設置之接腳佈線方向，並透過所擷取之各該 :::網路屬性訊息’於該接腳與對應之通孔之間執行連 明之印刷電路板設計方法中，該網路屬性訊息 二腳之佈線寬度訊息。該二維座標上之排列數量 %子元件之接腳於縱軸座標上排狀列數及橫轴座 列之仃數，相應地’該運算規則係為分別將所計算 域’具體而言，該第一限制區t二第Γ制區 通增之+宝、S、、’广丄 』匕次係作舄该電子兀件之電源 係：自二 外，各該區塊中的接腳佈線方向 ''為自該十子通道區域中心向外擴散之方向。 元件^者’該電子元件之各該接腳之間之區域係爲該電子 四顆接腳圍成之中間區域。該通孔佈設規則係依 之位置訊息’以確保該通孔佈設位置 ㈣i四顆接腳之間的間距均保持在一預設安全距離範圍 相車又於白知技術’應用本發明之印刷電路板設計方法 110203 7 200844778 係可於對電子元件佈設通孔作業前，預留一 件之電源通道之第一限制區域，並藉 =“子- _ ^ 稽田4昂一限制區域將 =子元件分成四個區塊，以設置各該區塊中的接聊佈線 向亦可透過操取該電子元件之各該接腳之電氣 屬性讯息’以設定無電氣屬性之接腳對應之區域為第二阳 制區域’進而供於該電子元件之非為 ^ 成之區域佈設通孔，並依據該電子元件之各該接腳對 區塊所設置之接腳佈線方向，透過所擷取之各該接狀 ，屬性訊息’於該接腳與對應之通孔之間執行連線作業、，。 藉此’即可避免習知技術中因預留作爲該電子元件之電 通逼之限制區域係於通孔佈設作業後執行，且通孔佈^、 電源通道之預留及連線等作業均透過手動方式實施，^ 增加佈線工作負擔，造成大量時間、人力及精力之耗費， 進一步影響了佈線效率之弊端。 [實施方式] ▲以下係藉由特定的具體實例說明本發明之實施方式， 、…此技衣之人士可由本說明書所揭示之内容輕易地瞭解 本發明之其他優點與功效。本發明亦可藉由其他不同的且 體實例加以施行或應用，本說明書中的各項細節亦可基ς 不同觀點與應用，在不_本發明之精神下進行各種修飾 /月爹閱第1圖’係顯示本發明之印刷電路板設計方法 之“作& 思圖。如圖所示，本發明之印刷電路板設計 方法係應用於透過⑽處縣置執行之㈣電路板之佈線 110203 8 200844778 該資料處縣置可例如為個人電腦、筆記型電腦、 J ^作站等，而該佈線軟體則可例如為Allegro、 且右1- Γ於本貫施例巾，該印刷1路板係佈設有至少一 具有稷數個接腳（pin)之電子元件， 吁不工- 件係為球柵陣列式（Ball Γ ° 。之，以毛子兀200844778 - IX. Description of the invention: [Technical field to which the invention pertains] The present invention relates to a printed circuit board design technique, and more particularly to a wiring software for a printed circuit board that is implemented by a data processing device The printed circuit board design method. [Prior Art] At present, most electronic components having different functions are disposed on a printed circuit board, such as a ball grid array type (BGA), a flip chip type, a chip size package (CSP), and a multi-chip module. (mcm, chipmodule), etc., the electronic component of the semiconductor package structure, and the printed circuit board is mostly a multi-layer board, and the layers are electrically connected through the through holes (10), and the through holes are usually disposed on the electronic components. Between the plurality of # feet, the general arrangement is placed in the middle of each of the four pins of the electronic component. In the process of designing a printed circuit board through various existing wiring software programs such as Allegro, Protel, etc., when designing electronic components, the current practice is to arrange through-hole operations between all the pins of the electronic component, and then manually The method removes two rows of through holes that are disposed at the center of the electronic component and are located in the vertical intersection of the two coordinates (horizontal coordinate and vertical coordinate) to serve as a power supply channel for the electronic component. The specific current load; then, the need to manually connect the pin with several electrical properties to the corresponding through hole. (4) f The above design method will consume a lot of manpower and energy to perform the operation of through-hole layout, power channel reservation and connection, and, because of the arrangement of multiple pins of the electronic components Not avian phase 110203 5 200844778 .: 'There are: electric and electronic = each pin is a uniform sentence distribution _ distribution) square distribution (four), : r said two are also different, + style draw through hole layout rules The wiring efficiency s adds the difficulty of the through-hole operation of the hand material, and thus affects the brushing power: ΐ:: 'How to propose a printing board design method that can solve the lack of the conventional technology, which is currently [invention content] The technical problem of the wild 砀. The shortcomings of the technical knowledge of the soil 1. The main purpose of the present invention is to provide a method of saving time, manpower and energy to improve the wiring efficiency. The present invention provides a printed circuit; a twenty-six method. The printed circuit board design method of the present invention is applied to a wiring software for a printed circuit board executed by a through-bead processing device, wherein the printing Circuit board Having at least - a plurality of pins (four) of electronic / 70 pieces of the printed circuit board design method comprises the following steps: (1) selecting all the electronic components of the printed circuit board to capture all of the pins of the electronic components Attribute message and layout mode, the attribute message includes location information, electrical attribute information and network (DM) attribute information of each pin; (2) according to the layout of each pin in the electronic component captured $ : calculating the number of the electronic components arranged on the two-dimensional coordinates; (3) calculating a first restricted area according to the calculated number of arrays and a preset operation rule to transmit the electronic component through the first restricted area Divided into four blocks; (4) According to the divided blocks, set the pins 110203 6 200844778 in each block. The wiring direction, (5) according to the electrical properties of each pin taken Whether or not the pin has electrical properties, if yes, go to step 卯), right to go to step (6); (6) according to the pin routing direction of the block corresponding to the pin, set Second restricted area (7) in the region between the pins of the electronic component that is not the first and second limiting regions, 2 according to the location information of each of the pins, and through the preset through hole Layout rules for routing the vias; and (8) according to the pin routing direction of each of the pins of the electronic component = the block to be disposed, and through the selected::: network attribute message 'on the pin In the method of designing a printed circuit board between the corresponding through-holes, the network attribute information is the wiring width information of the two legs. The number of the two-dimensional coordinates of the sub-components is arranged on the vertical axis coordinates. The number of columns and the number of turns in the horizontal axis, correspondingly 'the rule of operation is to calculate the domain respectively', specifically, the first restricted area t two Γ zone is increased by + treasure, S,, ' The 丄 丄 匕 系 舄 舄 舄 舄 舄 舄 舄 舄 舄 舄 舄 舄 舄 : : : : : : : : : : : : : : : : : : : : 电源 电源 电源 电源 电源 电源 电源 电源The area between the pins of the electronic component is the intermediate region surrounded by the four pins of the electronic component. The through-hole layout rule is based on the position information 'to ensure the through-hole layout position (4) i the spacing between the four pins is maintained within a preset safe distance range, and the printed circuit of the present invention is applied to Baizhi Technology Board design method 110203 7 200844778 It is possible to reserve a first restricted area of the power channel before the through hole operation of the electronic component, and borrow = "Sub-_^ 纪田4昂一限区=子子Divided into four blocks, to set the connection wiring in each block to the electrical attribute message of each pin of the electronic component to set the area corresponding to the pin with no electrical attribute as the second The yang area is further provided with a through hole for the non-formed area of the electronic component, and according to the direction of the pin arrangement provided by the pin of the electronic component, the selected one is In the shape, the attribute message 'to perform a connection operation between the pin and the corresponding through hole, thereby avoiding the limitation in the prior art by the reserved area as the electrical flux of the electronic component. Execute after laying out the work, Moreover, the operation of the through-hole cloth ^, the power channel reservation and the connection are all implemented manually, ^ increasing the wiring work burden, causing a lot of time, manpower and energy consumption, further affecting the drawbacks of the wiring efficiency. ▲ The following describes the embodiments of the present invention by way of specific specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention by the contents disclosed in the present specification. The present invention may also be through other different The details of the present invention may be applied or applied. The details of the present specification may also be based on different viewpoints and applications. Various modifications/months are not made in the spirit of the present invention. FIG. 1 shows a printed circuit of the present invention. The design method of the board is "Working & Thinking." As shown in the figure, the printed circuit board design method of the present invention is applied to the wiring of the (4) circuit board which is executed through the (10) county. 110203 8 200844778 The data section can be, for example, a personal computer, a notebook computer, or a station. Etc., and the wiring software can be, for example, Allegro, and the right one is in the present embodiment. The printing one-way board is provided with at least one electronic component having a plurality of pins. - The part is a ball grid array (Ball Γ °.
咖、…t rray ; BGA)、覆晶式(FliP 5日日Μ尺寸封裝（ChlP Size package ; CSP)等。以下 气方°第2A至2F圖詳細說明本發明之印刷電路板設 方法之具體操作步驟。 板之所^恭圖所不’百先執行步驟S10 ’選取該印刷電路 有接腳分佈_ t 件^ Γ㈣印刷電路板中所Coffee, ...t rray; BGA), flip-chip type (FliP 5 day size package (CSP), etc.. The following gas squares 2A to 2F diagrams detail the specific method of the printed circuit board design method of the present invention Operation steps. The board is not the same as the first step S10 'Select the printed circuit has pin distribution _ t pieces ^ 四 (four) printed circuit board
App、 U 早個电子兀件為例進行說明，但不以此 局 ':以擷取該電子元件中之所有接腳之屬性訊息以及佈 =以=訊息係包括各該接腳之位置訊息、電氣屬 t以及網路（net)屬性訊息。其中，該接腳之位置訊息 含兮垃卿，息’而該網路屬性訊息係包 〜卩之佈線寬度訊息。接著進行步驟S11。 ::驟S11中’依據所擷取之該電子元件中之各該接 量。：m算該電子元件於二維座標上之排列數 腳，維座標上之排列數量係為該電子元件之接 腳於縱轴座標上排狀舰 之接 著進行㈣S12。聽及⑽絲场狀行數。接 算規：步=中’：據所計算之排列數量以及預設之運 ^ ^十异知到一第一限制區域。φ 卜 為分別將所計算之行數及列數除以之^鼻規則係 Μ模之方式，以得到 110203 9 200844778 該第-限制區域。具體而言’係分別利用所計算之該電子 凡件之接㈣縱軸座標上㈣之列數⑴及橫轴座桿上排 狀订數⑷進行計算，以分㈣“ f子元件於縱轴座標 之預留區域问及橫軸座標上之預留區 k 或（Lr)及（Lc)之計算方式係如等式（1)所示： f (Lr)JA\ (Lc): ⑴ V丄7 有1() — j "如第Μ圖所不，該電子元件係均勻佈$ =仃XH)列之接腳，則藉由上述等式⑴計算得到（响 座桿^5即=該預留區域问係位於該電子元件縱軸 r,.. 亥電子兀件橫軸座標上之第5行間隙卢 (如弟2A圖所示之u區域 丁門隙處 成了該第-限制區域。且體而+ 區域與U區域構 該電子元件之電源通二：5、:该弟-限制區域係作爲 件特—夕帝Α Μ〜十子通道區域，以提供該電子元 、疋之电 >瓜載量。接著進行步驟。 於步驟S 13中，依據所計算之第一 子兀件分成四個區塊，如第2 。’將该電 及D。接著進行步驟SM。 @不之區塊A、B、c、 於步驟S 14中， D ’佈設各該區塊a 該區塊A、B、C、及 依據所分成之各該區塊A、B、C、及 、B、C、及D中的接腳佈線方向。各 D中的接腳佈線方向係為自該十字通 Π0203 10 200844778 運區域中心向外擴散之方向（如第 方向所示）。接著進行步驟S15。目之各该區域之箭頭 自=驟S15中’依據所擷取之各該接腳之 ςΐ7 ^ 疋否具有電氧屬性，若是，則進至步驟 S17 ’若否，則進至步驟si“ 迴主少驟 佈線：：驟Μ6中’依據該接腳對應之區塊所設置之接腳 Γ向，設定第二限制區域。更詳而言之，請表閱第si 圖：圖所示，該電子元件具有無電氣屬性之接腳 區塊D所設置之接:::方::依據如第2B圖所示之 .^ 卩布線方向，侍到該接腳P1對應之可 知设通孔區域係為如第2入圖 之了 …氣屬性，故I需於之：或Lp’由於該接腳 …、而於。亥區域Lp佈設通孔，則設定 ^域以為弟二限制區域。接著進行步驟以7。 於步驟S17中，於1& Μ ρ 於°亥包子兀件之各該接腳之間之非為 限制區域的區域中，依據所擷取之各該接腳 4置訊心，亚透過一預設之通孔佈設規則佈設通孔。其 —’該電子元件之各該接腳之間之區域係爲該電子元件中 母四顆接腳圍成之中間區域，相應地，該通孔佈設規則传 依據所操取之各該接腳之位置訊息，以確保該通孔佈設位 置與對應四顆接腳之間的間距均保持在一預設安全距離範 圍内為準。 /、肚而σ °亥通孔佈設規則係為當該電子元件中每四 顆接腳10分佈規則（均自分佈）時，則將該四顆接腳1〇之 二對角線之交點作為通孔1Η$設位置（如第2C圖之接腳規 110203 11 200844778App, U, an early electronic component as an example to illustrate, but not to use this: 'to extract the attribute information of all the pins in the electronic component and the cloth = to = message includes the location information of each pin, Electrical t and network (net) attribute messages. The position information of the pin includes the message of the 兮, and the network attribute message is the message width of the package. Next, step S11 is performed. :: Step S11 'depends on the respective quantities in the electronic component that are captured. :m counts the number of arranged electronic components on the two-dimensional coordinates, and the number of alignments on the dimensional coordinates is that the pins of the electronic component are connected to the row of the vertical axis coordinates (4) S12. Listen to (10) the number of lines in the silk field. The calculation rule: step = medium': according to the calculated number of permutations and the preset operation ^^10 is known to a first restricted area. φ 卜 is to divide the calculated number of rows and columns by the method of dividing the rule of the nose to obtain the first restricted area of 110203 9 200844778. Specifically, the calculation is performed by using the calculated number of the electronic components (4) on the vertical axis coordinate (4) and the horizontal coordinate on the seatpost (4) to divide (4) "f sub-components on the vertical axis. The reserved area of the coordinates and the reserved area k or (Lr) and (Lc) on the horizontal axis coordinate are calculated as shown in equation (1): f (Lr)JA\ (Lc): (1) V丄7 has 1() - j " as shown in the figure above, the electronic component is evenly distributed with the pin of $=仃XH), which is calculated by the above equation (1) (the seatpost ^5 is = The reserved area is located on the vertical axis r of the electronic component, and the 5th line of the horizontal axis coordinate of the electronic component is the clearance zone (as shown in the figure 2A, the u-zone doorway becomes the first-restricted area) And the body and the + area and the U area constitute the power supply of the electronic component 2: 5, the brother-restricted area is used as a special----------------------------------------- > melon load. Then proceed to step. In step S13, according to the calculated first sub-component is divided into four blocks, such as the second. 'This electricity and D. Then proceed to step SM. @不之Block A B, c, in step S 14, D' layout each block a, B, C, and each of the blocks A, B, C, and B, C, and D The direction of the pin wiring in the D. The direction of the pin wiring in each D is the direction in which the center of the transport area is outwardly diffused from the center of the cross-pass 0203 10 200844778 (as shown in the first direction). Then step S15 is performed. The arrow from the step S15 'depends on the ςΐ 7 ^ 各 of each of the extracted pins has an electric oxygen property, and if so, proceeds to step S17 'If no, proceeds to step si "back to the main less wiring: : In step 6, 'the second limit area is set according to the pin direction set by the block corresponding to the pin. More specifically, please refer to the figure si: as shown in the figure, the electronic component has no electrical The connection of the attribute block D is set to ::::: According to the wiring direction as shown in Fig. 2B, the wiring direction of the pin P1 corresponds to the setting of the through hole area as the second Into the map... gas attribute, so I need to be: or Lp' due to the pin..., and the hole area Lp is laid through the hole, then set the domain to the second Then, in step S17, in the region of the non-restricted area between each of the pins of the 1 amp 包 兀 , , , 依据 依据 依据 依据 依据 依据 依据 依据 依据 依据 依据 依据 依据 依据 依据 依据The heart is arranged, and the through hole is arranged through a predetermined through hole layout rule. The area between the pins of the electronic component is the middle area surrounded by the four mother pins of the electronic component. Correspondingly, the through-hole routing rule is based on the position information of each of the pins that are operated to ensure that the spacing between the through-hole layout position and the corresponding four pins is maintained within a preset safety distance range. quasi. /, belly and σ ° through hole layout rule is that when the four pins 10 of the electronic component are distributed (all self-distributed), then the intersection of the two pins 1 对Through hole 1 Η $ set position (such as the pin gauge 110203 11 200844778
•則分佈之狀況所示），此處需予以〜aSAA 置於該交點處之通孔u ° 〇是，復需確認待設 在一預設安全距離範圍， 之間的間距疋否 小之通孔11進行佈設；杏 '較預設之通孔尺寸 佈不規則(不均勾分佈):士田二电子7°件中每四顆接腳!〇分 角線中長度最短之對角線之中點取為^四顆接腳10之二對 以在該垂線12上確定盥节 〜 i成-垂線12， 出一預設安全㈣^之=接；^之間的間距均未超 圖之接聊不規則分佈之狀況所 =弟= u上無法確定滿足上述停你右於該垂線 执夕、s ^ f件之通孔佈设位置，則選取較預 二通：尺寸小之通孔11，重複上述步驟於該垂線12上 一二 使該點至該四顆接腳10之間的間距均未超出 距離範圍。透過上述預設之通孔佈設規則，即 .弟2Ε圖所示之已佈設有通孔}1之電 不思圖。接著進行步驟S18。 於步驟S18中’依據該電子元件之各該接腳ι〇對應 區塊所設置之接腳佈線方向，並透過所擷取之各該接腳 —之網路屬性訊息，於該接腳1〇與對應之通孔^之間執 :、、、友作業亦即，依據该電子元件之各該接1 〇 :2Β圖所不之各該區塊A、B、c、及〇所設置之接腳佈 :方向，亚透過所擷取之各該接腳1〇之佈線寬度訊息，於 该接腳10與對應之通孔11之間佈設訊號線13,以完成連 線作業。藉此，即完成對該電子元件之電源通道之預留、 通孔佈設及連線等作業。 110203 12 200844778 .承上所述，本發明之印刷電路板設計方法係為首先擷 •取該印刷電路板之電子元件中所有接腳之屬性訊息及佈局 方式；其次，依據上述佈局方式計算該電子元件於二維座 標上之排列數量，並透過預設之運算規則，據以得到一第 -限制區域’以供將該電子元件分成四個區塊；復次，設 置各該區塊中之接腳佈線方向；然後，設定無電氣屬性之 接腳對應之區域為第二限制區域；接著，依據所擷取之各 忒接腳之屬性訊息以及一通孔佈設規則，於該電子元件之 非=該第-及第二限制區域之區域佈設通孔；最後，依據 该電子元件之各該接腳對應之區塊所設置之接聊佈線方向 及所擷取之各5亥接腳之網路屬性訊息，於該接腳 通孔之間執行連線作業，藉此即可節省大量時間了人Γ及 精力的耗費，以提高佈線效率。 =述實施例僅例示性說明本發明之原理及其功效，而 ΐ =限制本發明。任何熟習此項技藝之人士均可在不違 月本叙明之精神及範轉下 爆丄 乾可下，對上述貫施例進行修飾與改 =圍=，本發叫__，應如後叙申請專利 [圖式簡單說明] 作流用賴示本發明之印刷電路板設計方法之操 好：二Γ系顯示本發明之印刷電路板中之電子元件之 季乂佺恶樣之平面分佈示意圖； 弟2B圖係顯示本發明之印刷電路板中之電子元件之 110203 13 200844778 各區塊接腳佈線方向之較佳 第2C與2D圖俜_ 一鹿 和之干面不意圖， 法執行通孔設定之本發明之印刷電路板設計方 第則㈣施態樣之平面示意圖; α你頭不應用本發明 佈設有通孔之電子 笔路板設計方法之 圖；以及 …較佳實施態樣之平面分佈示意 第2F圖係用以顯示靡用士 & 法之佈設有通孔及訊號二刷電路板設計方 面分佈示意圖。 之較佳實施態樣之平 [主要7〇件符號說明] 10 接腳 11 通孔 12 垂線 13 訊號線 A ' B ' c、D 區塊 U、Lr預留區域 P 第二限制區域 p1 接腳 S10至s 18步驟 110203 14• The status of the distribution is shown), where the ~aSAA is placed at the intersection of the through hole u ° 〇 Yes, the need to confirm the distance to be set in a preset safe distance, the distance between the gaps is small The hole 11 is arranged; the apricot 'the size of the through hole is irregular (uneven hook distribution): every four pins in the 7th piece of Shi Tian Er Electronics! The diagonal of the shortest length in the corner line The midpoint is taken as two pairs of four pins 10 to determine the 〜 〜 i i i - 垂 垂 , , , , , , , , 预设 预设 预设 预设 预设 预设 预设 预设 预设 预设 预设 预设 预设 预设 预设 预设 预设 预设 预设 预设 预设 预设 预设 预设 预设 预设 预设 预设 预设The situation of the irregular distribution of the chat = brother = u can not be determined to meet the above-mentioned stop right to the vertical line, s ^ f pieces of the through hole layout position, then select the second pass: small size through hole 11 Repeat the above steps on the vertical line 12 to make the distance between the point and the four pins 10 not exceed the distance range. Through the above-mentioned preset through-hole layout rules, that is, the electric wiring of the through hole}1 shown in the figure 2 is shown. Next, step S18 is performed. In step S18, 'in accordance with the pin routing direction set by the corresponding block of the electronic component, and through the network attribute information of each pin taken, the pin 1〇 The connection with the corresponding through hole ^:,,, friend operation, that is, according to the connection of the electronic components, the connection of each of the blocks A, B, c, and 〇 The foot cloth: the direction, the sub-channel through the extracted wiring width information of the pin 1 , the signal line 13 is arranged between the pin 10 and the corresponding through hole 11 to complete the connection operation. Thereby, the operation of the power channel of the electronic component, the through hole layout and the connection are completed. 110203 12 200844778. As described above, the printed circuit board design method of the present invention is to first select the attribute information and layout manner of all the pins in the electronic components of the printed circuit board; secondly, calculate the electronic according to the above layout manner. The number of components arranged on the two-dimensional coordinates, and through a preset operation rule, a first-restricted area is obtained to divide the electronic component into four blocks; and the connection is set in each block. The direction of the foot wiring; then, the area corresponding to the pin having no electrical property is the second restricted area; then, according to the attribute information of each of the picked-up pins and a through-hole layout rule, the electronic component is not = a through hole is arranged in the area of the first and second restricted areas; finally, according to the direction of the wiring of the connection corresponding to the block corresponding to the pin of the electronic component and the network attribute information of each of the captured 5 feet The connection operation is performed between the through holes of the pins, thereby saving a lot of time and effort and improving the wiring efficiency. The following examples are merely illustrative of the principles of the invention and its efficacy, and ΐ = limit the invention. Anyone who is familiar with this skill can revise and change the above-mentioned examples without violating the spirit and the paradigm of the moon. This is called __, which should be described later. Patent application [schematic description of the drawing] The operation of the printed circuit board design method of the present invention is shown in the following: the dichroic system shows a schematic diagram of the planar distribution of the electronic components in the printed circuit board of the present invention; 2B shows the electronic components of the printed circuit board of the present invention 110203 13 200844778 preferred block 2C and 2D drawings of the block routing directions _ _ a deer and dry surface is not intended, the method performs the through hole setting The printed circuit board design method of the present invention (4) is a schematic plan view of the aspect; the image of the electronic pen path design method with the through hole is not applied to the head of the present invention; and the planar distribution of the preferred embodiment The 2F figure is used to show the distribution diagram of the design of the through hole and the signal two-brush circuit board. The preferred embodiment is flat [main 7 符号 symbol description] 10 pin 11 through hole 12 vertical line 13 signal line A ' B ' c, D block U, Lr reserved area P second restricted area p1 pin S10 to s 18, step 110203 14