TW200839532A - Data transmission systems and methods - Google Patents

Abstract

Data transmission systems and methods are provided. The data transmission system comprises a bus, a slave, a master, and a master interface. The master transmits a request comprising transfer information comprising a start address and a length. The master interface receives the request from the master. The master interface determines a burst type of a first burst according to the transfer information, and transmits the first burst with the burst type to the slave via the bus, where the first burst is aligned to at least one address boundary of the slave. The master interface receives data corresponding to the first burst from the slave, and transmits the data to the master.

Description

200839532 IX. Description of the Invention: [Technical Field] The present invention relates to a data transmission, and in particular to a data transmission method and system for a specific length and address alignment (Burst) . [Prior Art] Data transmission has an important key to the performance of computer systems. Hardware designers must face the challenge of improving data transfer efficiency. For example, the operating software can use virtual addresses to indicate where the data is stored. The virtual address can be mapped to a corresponding physical address, which is used to indicate the location of the data in the hardware (memory). For security and other reasons, 'data stored in consecutive virtual addresses can be split into multiple data blocks mapped to different physical addresses. These data blocks can be randomly arranged in memory. When accessing data stored in consecutive virtual addresses, more jobs will be required and the efficiency of data transfer will be reduced. For example, the above data transmission can be performed in an AMBA (Advanced Microcontroller Bus Architecture), in which AMBA depreciates a bus standard on a wafer. In AMBA, a variety of system components, such as controllers, memory and peripheral interfaces, can be connected to the busbar. In AMBA, high-frequency wide bus arrays such as AHB (Advanced High-performance Buses) can be used to transfer data between a plurality of masters and slaves. For example, a controller (active device) can access a device (slave device) such as a memory through the AHB. This device

Client's Docket No.:VIC07-0002 TT^ Docket Ν〇:0608-Α41126-TW/Drafit-FinalYianhou/2007-12-18 200839532 Can support Daihatsu and Pipeline data transfer program DMA (Direct Memory Access, memory The bulk transfer program of the type direct access type device includes Grant, address/control, and resource period. In the consent period, the active device first requires access to the second row of the sink, and an arbiter receives the request by the active device and agrees to the active device to perform the transfer operation on the bus. In the address and control period, information such as the starting address, direction and size of the transmission, and f. the corresponding packet type are communicated. After that, the materials and materials are transferred in the data cycle. For example, one of the active devices can be agreed to the second level. The active device with the bus bar can transmit data to a slave device (write operation) through the bus bar, or request a burst of data (read operation) from the second slave device through the bus bar in a reverse direction. Similarly, one of the slaves can be agreed to own the bus. A slave device with a bus bar can transmit data through the bus bar so that the data is read by the master device that requests the data.习 Conventionally, when a material with a specific length is required, and the starting address of the data is aligned with the address of the § memory (not in the double-word (DW, Double-Word) boundary of the memory, For example, on 4DW/8DW/16DW, the active I can use a burst of non-specific length to request data from the memory. Since the start address of the data is not aligned, the active device will require a burst across the address boundary, and such a burst will reduce the access efficiency. Since the burst of non-specific length cannot provide length information, the performance of the slave device is also reduced. In addition, the active device can use more bursts of a specific length to request data from the memory. The active device will have one

Client's Docket N〇.:VIC07-0002 TT^ Docket No:0608-A41126-TW/Draft-FinalYianhou/2007-12-18 6 200839532 The score is divided into multiple small requirements, 怂&# ^ ^ ^ The efficiency of hunger is reduced. Similarly, the one: the more: Γ = ΓΓ ΓΓ Γ active device will require, large hair, such a burst will reduce access to the moon soap. SUMMARY OF THE INVENTION The data transmission method shown in the receiving embodiment is firstly requested by the active device, wherein the transmission information includes - start 2. According to the transmission information, it is determined that one burst of the first burst is aligned with at least the address boundary of the slave device. The data transfer method shown in the embodiment can also be used to transfer the poor material from a memory, and the medium is "" . The body is divided into a plurality of sections, and a plurality of address boundaries of the H data interval. Accepting the transmission of the poor material - when required, where the requirement includes the corresponding "; - the starting position and a length, according to the starting address, the second child takes the starting material address boundary, and according to the starting position and phase The decision of the selected section is the end of the selected section. According to the length boundary of the material, the address from the start address boundary to the end bit 5m is located at the start address boundary to the end of the address; the above method of the present invention can be processed through the process 4 = medium. in. When the code is loaded and executed by the machine, the machine;::: body media The device of the invention 0 item ^ used from the poor

Client's Docket No.: VIC07-0002 TT5s Docket N〇: 0608-A41126-TW/Draft-FinalYianhou/2007-12-l§ 200839532 In order to make the above objects, features and advantages of the present invention more apparent, the following The embodiments, in conjunction with the accompanying drawings, are described in detail below. [Embodiment] Referring to Fig. 1, a first embodiment is a data transfer system according to an embodiment of the present invention, wherein the data transfer system 100 can be an AMBA system. The data transmission system 100 includes an AHB active device 11 , an AHB active interface 120 , and an AHB slave device 130 . The AHB active device 110 is, for example, a USB (Universal Serial Bus) host controller. The AHB slave device 13 is, for example, a memory or the like, and the AHB master device no can communicate with the AHB slave device 13 using the AHB active interface 120 using the AHB. For example, the AHB master device no can access (read/write) data from the AHB slave device 130 through the AHB active interface 120. The AHB active interface 120 receives the request to transmit information from the AHB active device 11 and generates and transmits a burst to the AHB slave device 130. The AHB active interface 120 can also receive corresponding data from the AHB slave device 130 and transmit the data to the AHB active device 11A. The AHB active interface 120 includes a burst type controller 121 and a data manager 122. The burst type controller 121 can determine the burst type of at least one burst according to the transmission information, wherein the transmission information includes a start address and a length of the data to be accessed in the AHB slave device 13A. The data manager 122 can discard the excess data from the data received by the AHB slave device 13 in accordance with the transmission information. The reference figure 2 is shown in the figure according to the embodiment of the present invention.

Client’s Docket No.: VIC07-0002 TT^ Docket No: 〇6〇8-A41126-TW/Draft-FinalYianhou/2007-l2-18 8 200839532 Material transfer method. In step S210, a request for transmitting information is received by a bus active device such as the AHB active device 110; wherein the transmission information includes a starting position and a length. In step S220, a burst type of one burst is determined according to the transmission information. Note that this burst is aligned to the busbar slave, such as at least one address boundary of the AHB slave 130. In some embodiments, the address boundaries can be 4DW (double word), 8DW, and 16DW. It is worth noting that

C A requirement can generate multiple bursts. Thereafter, in step S230, a burst having this burst type is transmitted to the slave device through a bus, such as AHB. In step S240, it is determined whether or not data is received by the slave device. If not, the judgment of step S240 is continued. If the data of the corresponding burst is received by the slave device, in step S250, the excess data is found out from the received data according to the transmission information, and is discarded. It is worth noting that if there is no extra information in the received data, no data will be discarded. In step S260, the data is transmitted to the active device. Thereafter, as in step S270, the information is transmitted in accordance with the burst update. For example, the length of the transmission information is subtracted from the length of the corresponding current burst, and the starting address is added to the data length of the corresponding current burst. In step S280, it is judged whether the generated burst has completed the corresponding request (determining whether the corresponding requested data transmission has been completed), that is, determining whether the length in the updated transmission information is equal to zero. End if the length is equal to 〇

Client’s Docket No.: VIC07-0002 TT^ Docket No: 0608-A41126-TW/Draft-FinalYianhou/2007-12-l8 9 200839532 Data transfer program. If the length is not equal to 〇, the flow returns to step S220 until the data transfer program ends. It is noted that in some embodiments, the received data may be collected first and transmitted to the active device in one transmission.

In some embodiments, the burst type controller 121 can include a table 300 for recording the burst type of the corresponding different transmission information, as shown in FIG. Among them, the column represents the starting address (the last 4 bits), the row represents the length (DW), and the intersection of the column and the row is of the type of burst. In table 300, S r represents a burst having a DW length (or referred to as a data transmission); IN 4 (increment 4) represents a burst of four DW (4DWs) lengths starting from a single address boundary ( Or a data transmission); IN8 (increment 8) represents a burst of eight DW (8DWs) length starting from a single address boundary (or called a data transmission); and IN16 (increment 16) A burst of sixteen DW (16DWs) lengths (or a data transmission) starting from a single address boundary. Once the transmission information is received by the active device, the type of the first burst can be determined based on the transmission and transmission information through the inquiry form. Similarly, the type of subsequent burst is also i: can be determined based on the updated transmission information. It is to be noted that the table in Fig. 3 is an example, and the present invention is not limited thereto. Figure 4 shows a section in a memory in accordance with an embodiment of the present invention. The memory is divided into a plurality of sections, and each section has a plurality of units arranged in a column. In the embodiment shown in Figure 4, each cell is a DW material. For easy understanding, the starting address of the section in Figure 4 is mmO, mrnl, mm2, ···, mmf, where n is a six-digit number. For the efficiency of data transmission, the boundary of the address in the memory

Client's Docket N〇"VIC07-0002 TT5s Docket No:0608-A41126-TW/Draft-FinalYianhou/2007-12-18 10 200839532 The designation is based on the hardware design of the memory and the definition of the memory access protocol. In this embodiment, the IN16 burst is a burst of 16DW length starting from a single address boundary, such as a burst with an address [nnn0_nnnf]. The IN8 burst is terminated by an address boundary with a length of 8DW. For example, a burst with an address [nnn0_nnn7] or [nnn8-nnnf]. Similarly, an IN4 burst is a burst of 4DW length starting from a single address boundary, such as having an address [nnn0-nnn3], [nnn4-nnn7], [nnn8-nnnb] or [nηηοηηηηί] burst. Please refer to Fig. 5, which shows a data transfer method according to an embodiment of the present invention. In this embodiment, a burst type controller The type of the burst can be directly determined according to the transmission information. As shown in step S402, it is first determined whether the length in the transmission information is greater than or equal to 16DW. If the length is greater than or equal to i6DW, then in step S404, the start bit in the transmission information is determined. Whether the last $bit of the address is equal to 1 If the last 5th bit of the right start address is not equal to 1, then the step is as follows (S406' determines that the type of the burst is IN16 burst. If the last 5th bit of the start address is equal to 丨 (step S404) Then, as in step S408, it is determined whether the last 4th bit of the start address is equal to 0. If the last 4th bit of the start address is equal to 〇 (疋 of step S408), then step S410 The type of the burst is determined to be an in8 burst. If the last 4th bit of the start address is not equal to 〇 (No in step S408)', as in step S412, it is determined that the type of the burst is an IN4 burst. If the length is not greater than or equal to 16DW (No in step S402), then as in step S414, it is determined whether the length is greater than or equal to 8DW.

Clienfs Docket No.: VIC〇7-〇〇〇2 TT s DocketN〇*.〇608-A41126-TW/Draft-FinalYianhou/2007-12-18 11 200839532 Length greater than or equal to 8DW, then step dry start V S416 , to determine whether the starting position of the 5th position of the younger brother is equal to 〇, and ~ a - η : & ... the last 5th position of the beam address is not specific to 1, wherein the ending address is in the temple The starting address is added to the last 5th bit of the starting address, and the other is the same as the ι (step S41 ^ ^) ^ ^ 416 is), then, as in step S406, the type of the burst is determined to be an IN16 burst. = The last 5th bit of the starting address is not equal to 〇, or the 5th bit of the ending address is not equal to i (No in step (10)), if the step is missing, the final 4th of the pure address is judged. Whether a bit is equal to g. If the last 4th bit of the start address is equal to Q (step yes), then as in step S410, it is determined that the type of the burst is an IN8 burst. If the last 4th bit of the start address is not equal to 〇 (No of step S4 〇 8), then in step S412, it is determined that the type of the burst is an IN4 burst. Next, if the length is not greater than or equal to 8DW (NO in step S414), then in step S418, it is determined whether the length is greater than or equal to 4DW. If the length is greater than or exclusively for 4DW (YES in step S418), then in step S420, it is determined whether the last 5th bit of the start address is equal to 〇, and whether the last 5th bit of the end address is equal to 1. If the last 5th bit of the start address is equal to 0, and the last 5th bit of the end address is equal to 1 (YES in step S42), then in step S406, it is determined that the type of the burst is an IN16 burst. . If the last 5th bit of the right start address is not equal to 〇, or the last 5th bit of the end address is not equal to 1 (No of step S420), then in step S422, the last bit of the start address is determined. Whether 5 bits is equal to }, and

Clienfs Docket No. :VIC07-0002 TT^ Docket N〇:0608-A41126-TW/Draft-FinalYianhou/2007-12-18 12 200839532 Whether the last 4th bit of the starting address is equal to 1. If the last 5th bit of the start address is equal to 1, and the last 4th bit of the start address is equal to 1 (YES in step S422), as in step S412, it is determined that the type of the burst is an IN4 burst. If the last 5th bit of the start address is not equal to 1, or the last 4th bit of the start address is not equal to 1 (No in step S422), as in step S410, it is determined that the type of the burst is IN8. hair. If the length is not greater than or equal to 4DW (NO in step S418), as in step S424, it is judged whether the length is equal to 1DW. If the length is not equal to 1DW (NO in step % S424), as in step S426, it is judged whether or not the last 5th bit of the start address is equal to 0, and whether the last 5th bit of the end address is equal to 1. If the last 5th bit of the start address is equal and the last 5th bit of the end address is equal to 1 (YES in step S426), then in step S406, the type of the burst is determined to be an IN16 burst. If the last 5th bit of the start address is not equal to 〇, or the last 5th bit of the end address is not equal to 1 (No in step S426), then in step S428, the last of the start address is determined. Whether the 4th bit is equal to 〇 and whether the last 4th bit of the end address is equal to 1. If the last 4th bit of the start address is equal to 〇, and the last 4th bit of the end address is equal to 1 (YES in step S428), then in step S410, it is determined that the type of the burst is an IN8 burst. If the last 4th bit of the start address is not equal to 〇, or the last 4th bit of the end address is equal to 1 (NO in step S428), then in step S412, it is determined that the type of the burst is an IN4 burst. . If the length is equal to 1 DW (YES in step S424), then in step S430,

Client's Docket No:: VIC07-0002 TT's Docket No: 0608-A41126-TW/Draft-FinalYianhou/2007-12-18 13 200839532 The type of the burst is determined to be an S burst (single DW burst). It should be noted that when the type of the burst is an S burst, the flow ends. After the burst type is determined and the corresponding data is received, then in step S432, the excess data is determined and discarded according to the burst, and the length is updated. Next, in step S434, it is judged whether or not the corresponding requested data transmission has been completed (the updated length is equal to 〇). If not, the process returns to step S402; if the corresponding requested data transfer has been completed, the process ends. Please refer to Figure 6, which shows an example of data transfer f in the corresponding memory. The first segment 610 of memory is addressed by the address 0000 to 000f. The second section 620 of the memory is represented by addresses 0010 through 001f. Each data address has a capacity of 1 double word. When a bus active device wants to access data stored in the address 0009-0011 in the memory, such as 9 double-word data, the bus active device will issue a request for the corresponding data transmission to the sink. The interface. The corresponding data transmission requirements include transmission of information, such as the starting address of the data is 0009 and the data length is 9. The bus interface is located in the first sector 610 where the start address is located, and since the address boundary at the beginning of the address \ 0008 is the closest to the start address 0009, the selection is at the end of the address 0007. The start address boundary at the beginning of the address 0008. According to the start address and length of the data, other data can be known to be in other blocks. Therefore, the end address boundary is selected as the end of the address 000f. The address boundary and the end address boundary, the bus interface sends an IN8 burst to the memory, if the data transmission from the address 0008 to 000f is required. Since the burst length is 8DW and the start address is 0009, the convergence The interface can know that the access data includes extra 1DW data (ED) and

Clienfs Docket No.: VIC07-0002 TT5s Docket N〇: 0608-A41126-TW/Draft-FinalYianhou/2007-12-18 14 200839532 The poor material access length is 7DW. More specifically, the redundant data (ED) is the data with the address 0008 in the corresponding memory. After receiving the data from the memory, the sink/guyer interface ignores the excess data (ED) and then transfers the remaining data to the bus master. The bus interface also updates the transmission information based on the length of the access data. For example, the start address is updated to 〇〇1() and the length is updated to 2. The foregoing steps are repeated, since the start address 〇〇 1 〇 is in the segment 620, the bus segment interface selects the second segment 620. The start bit address boundary is selected as the start of the address, and the end address boundary is selected as the end of bit 1 address 013. Thereafter, the bus interface sends an IN4 burst to the memory to access the data from the address 〇〇1〇 to 〇〇13. Similarly, after receiving the data from the memory, the bus interface will ignore the 2DW excess data and transfer the remaining data to the bus master. Through the steps of this embodiment, an IN8 burst and an IN4 burst can be used to complete the data of the address 0009-0011. It is worth noting that all bursts are aligned to the address boundary. ί When the active slave is accessed, at least one burst with a specific length, such as s (single DW), IN4, IN8, and IN16 bursts, is generated. The 'starting address of the burst' will be aligned to the address boundary, such as 4DW, 8DW and 16DW. In this case, when the corresponding data transmission requirements span the cache line (Line) and the capacity, such as the ικ boundary, the active device does not need to split the corresponding data transmission requirements. In addition, the number of requirements for small amounts of data will be reduced, thereby improving bus efficiency and system performance. The method of the present invention, or a specific type or part thereof, may be included in the media in the form of a code, such as a floppy disk, a CD, a hard disk, or any

Client's Docket N〇.:VIC07-0002 TT^ Docket No:0608-A41126-TW/Draft-FinalYianhou/2007-12-18 15 200839532 Any other machine readable (such as computer readable) storage media, where When the code is loaded and executed by a machine, such as a computer, the machine becomes a device for participating in the present invention. The method and apparatus of the present invention can also be transmitted in a code format through some transmission medium such as a wire or cable, an optical fiber, or any transmission type, wherein the code is received, loaded, and executed by a machine such as a computer. At this time, the machine becomes a device for participating in the present invention. When implemented in a general purpose processor, the code in conjunction with the processor provides a unique means of operating similar to the application specific logic. The present invention has been described above by way of a preferred embodiment, and is not intended to limit the invention, and it is to be understood that those skilled in the art can make some modifications and refinements without departing from the spirit and scope of the invention. The scope of this issue is subject to the definition of the scope of the patent application. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic view showing a data transfer system in accordance with an embodiment of the present invention. ', (Fig. 2 is a flow chart showing the data, sending method according to the embodiment of the present invention.), and Fig. 3 shows the burst type for recording the corresponding transmission information. Fig. 4 is a schematic diagram showing the basis Sections in the memory of the embodiment of the invention. """"" Example. [Main component symbol description]

Client's Docket N〇.:VIC07-0002 TT s DocketNo:0608-A41126-TW/Draft-FinalYianhou/2007-12-18 16 200839532 100~ data transfer system; 110~AHB active device; 120~AHB active interface; 121~ Burst type controller; 122~ data manager; 130~AHB slave; AHB~ advanced high efficiency bus; S210, S220, ..., S280~ steps; 3 00~ table; S, IN4, IN8, IN16 ~ burst type; S402, S404, ..., S434~ steps; 610, 620~ memory segments; ED~ redundant data.

Clienfs Docket N〇.:VIC07-0002 TT5s Docket N〇:0608-A41126-TW/Draft-FinalYianhou/2007-12-18

Claims (1)

200839532 X. Patent application scope: 1. A data transmission method, comprising the following steps: receiving, by an active device (Master), a request including transmission information, wherein the transmission information includes a starting position and a length; determining according to the transmission information a burst type of a first burst, wherein the first burst is aligned with at least one address boundary of a slave device; the first type having the burst type through a bus bar Bursting to f the slave device; receiving, by the slave device, data corresponding to the first burst; and transmitting the data to the master device. 2. The method for transmitting data as described in item 1 of the patent application further includes the following steps: judging the excess information in the data based on the transmission information; and discarding the redundant data from the data. 3. The method for transmitting data according to item 1 of the patent application scope includes the following steps: determining whether the first burst completes the request; if the first burst does not complete the request, according to the first Summing up the transmission of the poor message; determining, according to the updated transmission information, a burst type of the second burst; transmitting, by the bus, the second burst having the burst type to the slave device; Clienfs Docket No.: VIC07-0002 TT, s Docket N〇: 0608-A41126-TW/Draft-FinalYianhou/2007-12-18 18 200839532 The slave device receives the data corresponding to the second burst; The data of the second burst should be transmitted to the active device. 4. The data transmission method according to claim 1, wherein the burst type includes a single burst, an increment 4 (IN4) burst, an increment 8 (IN8) burst, and an increase. The amount of 16 (IN16) burst. 5. For the data transmission method described in claim 4, the method further includes the following steps: Check whether the length is greater than or equal to 16 double words (DW); f 1 if the length is greater than or equal to 16 double words, check Whether the last fifth bit of the start address is equal to 1; and if the last fifth bit of the start address is not equal to 1, determining the burst type of the first burst is the increment of 16 bursts hair. 6. The data transfer method of claim 5, wherein when the length is not greater than or equal to 16 double blocks, the method further comprises the steps of: checking whether the length is greater than or equal to 8 double blocks; The length is greater than or equal to 8 double blocks, checking whether the fifth bit of the starting address is equal to 0, and whether the last fifth bit of an ending address is equal to 1, wherein the ending address Equal to the start address plus the length; and if the last fifth bit of the start address is equal to 0, and the last fifth bit of the end address is equal to 1, the first burst is determined The burst type is the burst of 16 increments. 7. For the data transmission method described in claim 6, the following steps are included: Clienfs Docket No.: VIC07-0002 TT^ Docket No: 0608-A41126-TW/Draft-FinalYianhou/2007-12-18 19 200839532 Check if the last fourth bit of the start address is equal to ο; and if the last fourth bit of the start address is not equal to 〇, determine the burst type of the first burst as the increase The amount of 4 bursts. 8. The data transmission method according to claim 6, wherein when the length is not greater than or equal to 8 double blocks, the method further comprises the steps of: checking whether the length is greater than or equal to 4 double words; The length is greater than or equal to 4 double blocks, checking whether the last fifth bit of the start address is equal to 0, and whether the last fifth bit of the end address is equal to 1; and if the start address The last fifth bit is equal to 0, and the last fifth bit of the end address is equal to 1, and the burst type of the first burst is determined to be the increment of 16 bursts. 9. The data transfer method of claim 8, wherein when the length is not greater than or equal to 4 double blocks, the method further comprises the steps of: checking whether the length is equal to 1 double word; and, if The length is equal to 1 double block, and the burst type of the first burst is determined to be the single burst. 10. The data transfer method according to claim 9, wherein when the length is not equal to 1 double block, the method further comprises the steps of: checking whether the last fifth bit of the start address is equal to 0, And whether the last fifth bit of the end address is equal to 1; and if the last fifth bit of the start address is equal to 0, and the last fifth bit of the end address is equal to 1, The burst type of the first burst is the burst of 16 increments. Clients Docket N〇.:VIC07-0002 TT^ Docket No:0608-A41126-TW/Draft-FinalYianhou/2007-12-18 20 200839532 11. A data transmission method for accessing data from a memory, wherein The memory is divided into a plurality of segments, and each segment has a complex address boundary of a data interval, the method comprising the steps of: receiving a request for data transmission, wherein the request includes a corresponding access data a start position and a length; selecting one of the segments according to the start address; determining, according to the start address, a start address boundary corresponding to the selected segment; f according to the start position and corresponding Accessing the length of the data, determining an end address boundary corresponding to one of the selected segments; and accessing data from the start address boundary to the end address boundary, wherein the start address falls The starting address boundary is in the boundary of the ending address. 12. The data transmission method described in claim 11 further includes determining a data access length according to the starting address and the ending address boundary. " 13. The method for transmitting data according to claim 11 of the patent application, further comprising discarding a redundant data from the data according to the start address and the start address boundary. 14. The data transfer method of claim 12, further comprising updating the corresponding start of the access data according to the data access length when the data access length is less than the length of the access data. The address and the extent. 15. For the data transmission method described in claim 11, the client5s Docket N〇.:VIC07-0002 TT^ Docket No:0608-A41126-TW/Draft-FinalYianhou/2007-12-18 21 200839532 The start address boundary is before the start address and is closest to the address boundary of one of the start addresses. 16. The data transfer method of claim 11, wherein each of the sections has a length of 16 double blocks and the data interval has a length of 4 double blocks. 17. The data transfer method of claim 16, wherein the material from the start address boundary to the end address boundary has 4 double words, 8 double words, or 16 double words. length. 1 18. The data transfer method of claim 11, further comprising accessing the data specified by the start address when the length of the access data is one. Client’s Docket No.:VIC07-0002 TT^ Docket Ν〇:0608-Α41126-TW/Draft-FinalYianhou/2007-12-18