200835250 - - · _ . - ..... · · · · ' . · · - - · .... • · " . . . .-九、發明說明： 【發明所屬之技術領域】 本發明疋有關於一種解調變裝置及其方法，且特別是 有關於種南新頻移鍵控(Gaussian FreqUenCy shift Keying ’ GFSK)之解調變裝置及其方法。 .'；Λ'' V : ：·.'· 【先前技術】 在一般的無線藍芽技術中，高斯頻移鍵控（Gaussian _ Frequency Shift Keying，GFSK)係為一種常見的訊號調變技 術，欲傳送的訊號通常會藉由此技術作調變為GFSK訊號。 ... ； - . . - . 然後，再於接收端藉由類比電路來實現GFSK的解調變技 術，以進行GFSK訊號的解調變。不過，由於使用數位式 ... . 的GFSK接收裝置比較簡便，而且也比較具有彈性，所以 數位式GFSK接收裝置的使用也愈來愈普遍。 ，... .. .... .. - 然而，當使用數位式的GFSK接收裝置搔收訊號時， 夺接收訊號的解調變過程中會產生頻率偏移（frequency @ offset)的效應，進而造成所接收到的訊號會具有一直流偏移 量（DC offset)。如此一來，解調變後的訊號便與原先所傳送 的訊號有所誤差。 因此，需要一種針對數位式GFSK接收裝置以解決頻 率偏移效應的解調變裝置，藉以產生正確的解調變訊號。 - · ..... . ； . 【發明内容】 本發明之目的是在提供一種用於數位式高斯頻移鍵控 之解調變裝置及其方法，藉以解決因頻率偏移而導致的直 200835250 :.- . \ .- 流偏移問題，使得訊號傳輸能更加地準確。 依照本發明一實施例，提出一種數位式高斯頻移鍵控 訊唬接收系統之解調變裝置。此解調變裝置包含一相移鑑 低通濾波斋、一第二開關以及一減法器。祖移鐘別器用以 接收一中頻訊號，並輸出一不歸零訊號，其中不歸零訊號 具有一直流偏務量。第一數位低通遽波器係為一寬頻帶之 :濾波器，並電性耦接於相移鑑別器，用以過濾不歸零訊號 瞻 而得出直流偏移量，且第一開關電性耦接於第一數位低通 濾波器。第二數位低通濾波器係為一窄頻帶之濾波器，並 電性耦接於相移鑑別器，並用以過濾不歸零訊號而得出直 流偏移量，且第二開關電性耦接於第二數位低通濾波器。 減法器係電性麵接於第一開關、第二開關以及相移鑑別 器，並輪出一解調變訊號，其中第一開關在藍芽接收系統 接收封包之存取碼期間導通而連接第一數位低通濾波器與 減法器，第二開關在藍芽接收系統接收資料期間導通而連 擊 接第二數位低通濾波器與減法器。 依照本發明另—實施例，提出一種用於數位式高斯頻 移鍵控訊號接收系統之解調變之方法。此方法包含接收由 傳送端所傳輸之一中頻訊號；將中頻訊號經由一相移鏗別 器轉換為一不歸零訊號，其中不歸零訊號具有一直流偏移 量；過濾不歸零訊號以得出直流偏移量；將直流偏移量自 •不歸零訊號中移除，以轉換成一解調變訊號。 如此一來，便可藉由本發明上述之實施例將接收到的 訊號作正確的解調變，使得接收訊號中的直流偏移量降到 200835250 最小，藉以最佳化所接收到的訊號，使解調變後之訊號更 加正確。 【實施方式】 請參照第1圖，係繪示板據本發明一實施例之一種解 調變裝置之示意圖。此解調變裝置100係用於數位式的高 斯頻移鍵控（GFSK)訊號接收糸統，並包含一相移鑑別器 102、一第一數位低通濾波器104、一第二數位低通濾波器 106、一第一開關108、一第二開關110、一減法器112以 及一判別器114。相移鑑別器102係用以接收一中頻訊號 IF，並將其作轉換而輸出一不歸零（non-return-to-zero)訊號 NRZ。其中，由於在GFSK訊號接收系統内，傳送端與接 收端之間會出現載波頻率偏移（frequency offset)的效應，因 此使得不歸零訊號NRZ會具有一直流偏移量（DC offset)。 此外，，第一數位低通濾波器104以及第二數位低通濾 波器106均電性耦接於相移鑑別器102,並用以過瀘不歸零 訊號NRZ而得出直流偏移量。其中，第一數位低通濾、波器 104以及第二數位低通濾波器106均為一無限脈衝響應低 通濾波器，且第一數位低通濾波器104係為一寬頻帶之無 限脈衝響應低通濾波器，而第二數位低通濾波器106係為 一窄頻帶之無限脈衝響應低通濾波器。 第一開關108以及第二開關110分別電性耦接於第一 數位低逍濾波器104以及第二數位低通濾波器106。而減法 器112係電性耦接於第一開關108、第二開關110以及相移 鑑別器102，並輸出一解調變訊號。其中，第一開關108 200835250 係在GFSK訊號接收系統接收封包之存取碼(access code) 期間導通，以連接第一數位低通濾波器104與減法器112， 而第二開關110係在GFSK訊號接收系統接收資料期間導 通，以連接第二數位低通濾波器106與減法器112。此外， 判別器114係電性耦接於減法器112 ,用以接收由減法器 112所輸出之解調變訊號，並決定解調變訊號的數位狀態， 亦即其位元值係為”0”或”1”。 _ 器122、一第二乘法器124、一 7Γ/2相移器126、一壓控 振盪器128、一第一低通濾波器130、一第二低通瀘波器 係用以接收中頻訊號IF，並將中頻訊號IF轉換為一基頻訊 號BF。第一乘法器ί22以及第二乘法器124分別電性耦接 於降頻器120，並接收基頻訊號BF，而7Γ/2相移器126 則電性耦接於第二乘法器124。 壓控振盪器128係用以提供一本地振盪訊號傳送至第 0 —乘法器122,並經由ττ/2相移器126傳送至第二乘法器 124。此外，第一低通濾波器130以及第二低通瀘波器132 分別電性耦接於第一乘法器122以及第二乘法器124,其中 第一低通濾波器130係接收基頻訊號BF與本地振盪訊號在 經由第一乘法器122作相乘之後的訊號，以輸出一同相訊 … 號IS，而第二低通濾波器132則是揍收基頻訊號BF與經 - 過ττ/2相位移之本地振盪訊號在經由第二乘法器124作 相乘之後的訊號，以輸出一正交訊號QS。 另外，反正切器134電性耦接於第一低通濾波器130 200835250 以及第二低通濾波器132，藉以接收同相訊號IS以及正交 訊號QS，並萃取出一相位訊號。而相位微分器136則電性 耦接於反正切器134，並將由反正切器134萃取出的相位訊 號作微分，藉以輸出不歸零訊號NRZ，且不歸零訊號NRZ 由相位微分器136輸出之後，會分別傳送至第一數位低通 滤波器104、第二數位低通濾波器106以及減法器112。 八 第一開關1⑽關閉導通而第二開關110打開，使不歸零訊 響 j NRZ得以藉由第一數位低通濾波器104過濾，以獲得不 歸零訊號NRZ中的直流偏移量，然後不歸零訊號NRZ再 經由減法器112減去直流偏移量，以轉換成解調變訊號输 ' 心出’.V.:. ： 接著，一旦GFSK訊號接收系統偵測出已接收到封包 的存取碼之後，第一開關108轉換成打開，而第二開關110 轉換成關閉導通，且在GFSK訊號接收系統接收資料期間， 不歸零訊號NRZ得以藉由第二數位低通濾波器106過濾， @ 以獲得不歸零訊號NRZ中的直流偏移量，然後不歸零訊號 NRZ再經由減法器112減去直流偏移量，以轉換成解調變 訊號輸出。200835250 - - · _ . - ..... · · · · ' . · · - - · .... · · " . . . . - Nine, invention description: [Technical field to which the invention pertains] There is a demodulation device and a method thereof, and in particular, a demodulation device and a method thereof for a Gaussian FreqUenCy Shift Keying (GFSK). .'; V': V: :·.'· [Prior Art] In the general wireless Bluetooth technology, Gaussian _ Frequency Shift Keying (GFSK) is a common signal modulation technology. The signal to be transmitted is usually converted into a GFSK signal by this technique. ... ; - . . - . Then, the GFSK demodulation technique is implemented by the analog circuit at the receiving end to perform demodulation of the GFSK signal. However, the use of digital GFSK receivers is becoming more common due to the ease of use and the flexibility of GFSK receivers. ,... .. . . . . - However, when using the digital GFSK receiver to receive the signal, the frequency offset (frequency @ offset) effect occurs during the demodulation of the received signal. In turn, the received signal will have a DC offset. As a result, the demodulated signal is in error with the originally transmitted signal. Therefore, there is a need for a demodulation device for a digital GFSK receiving device to address the frequency offset effect, thereby producing a correct demodulation signal. - The object of the present invention is to provide a demodulation device for digital Gaussian frequency shift keying and a method thereof, thereby solving the problem caused by frequency offset 200835250 :.- . \ .- Stream offset problem makes signal transmission more accurate. According to an embodiment of the invention, a demodulation device for a digital Gaussian frequency shift keying receiving system is proposed. The demodulation device includes a phase shift low pass filter, a second switch, and a subtractor. The ancestral clock is used to receive an IF signal and output a non-return to zero signal, wherein the non-return to zero signal has a constant flow. The first digital low-pass chopper is a broadband: filter, and is electrically coupled to the phase shift discriminator to filter the non-return-to-zero signal to obtain a DC offset, and the first switch It is coupled to the first digital low pass filter. The second digital low-pass filter is a narrow-band filter electrically coupled to the phase shift discriminator and used to filter the non-return-to-zero signal to obtain a DC offset, and the second switch is electrically coupled. In the second digit low pass filter. The subtractor is electrically connected to the first switch, the second switch and the phase shift discriminator, and rotates a demodulation signal, wherein the first switch is turned on during the access receiving code of the Bluetooth receiving system to connect A digital low pass filter and a subtractor, the second switch being turned on during the reception of the data by the Bluetooth receiving system and connected to the second digital low pass filter and the subtractor. In accordance with another embodiment of the present invention, a method for demodulating a digital Gaussian frequency shift keying signal receiving system is presented. The method comprises: receiving an intermediate frequency signal transmitted by the transmitting end; converting the intermediate frequency signal into a non-returning zero signal via a phase shifting discriminator, wherein the non-returning zero signal has a constant current offset; the filtering does not return to zero The signal is used to obtain a DC offset; the DC offset is removed from the non-return to zero signal to be converted into a demodulation signal. In this way, the received signal can be correctly demodulated by the above embodiment of the present invention, so that the DC offset in the received signal is reduced to the minimum of 200835250, thereby optimizing the received signal, so that the received signal is optimized. The signal after demodulation is more correct. [Embodiment] Referring to Figure 1, there is shown a schematic diagram of a demodulation device according to an embodiment of the present invention. The demodulation device 100 is used for a digital Gaussian frequency shift keying (GFSK) signal receiving system, and includes a phase shift discriminator 102, a first digital low pass filter 104, and a second digital low pass. The filter 106, a first switch 108, a second switch 110, a subtractor 112 and a discriminator 114. The phase shift discriminator 102 is configured to receive an intermediate frequency signal IF and convert it to output a non-return-to-zero signal NRZ. In the GFSK signal receiving system, a carrier frequency offset (frequency offset) effect occurs between the transmitting end and the receiving end, so that the non-returning signal NRZ has a DC offset. In addition, the first digital low pass filter 104 and the second digital low pass filter 106 are electrically coupled to the phase shift discriminator 102 and used to pass the non-return to zero signal NRZ to obtain a DC offset. The first digital low pass filter, the wave device 104 and the second digital low pass filter 106 are both an infinite impulse response low pass filter, and the first digital low pass filter 104 is a broadband infinite impulse response. The low pass filter and the second digital low pass filter 106 are a narrow band infinite impulse response low pass filter. The first switch 108 and the second switch 110 are electrically coupled to the first digital low pass filter 104 and the second digital low pass filter 106, respectively. The subtracter 112 is electrically coupled to the first switch 108, the second switch 110, and the phase shift discriminator 102, and outputs a demodulation signal. The first switch 108 200835250 is turned on during the access code of the GFSK signal receiving system to receive the packet, to connect the first digital low pass filter 104 and the subtractor 112, and the second switch 110 is connected to the GFSK signal. The receiving system is turned on during reception of the data to connect the second digital low pass filter 106 and the subtractor 112. In addition, the discriminator 114 is electrically coupled to the subtractor 112 for receiving the demodulation signal outputted by the subtractor 112, and determining the digital state of the demodulation signal, that is, the bit value is “0”. "or" 1". _122, a second multiplier 124, a 7 Γ/2 phase shifter 126, a voltage controlled oscillator 128, a first low pass filter 130, and a second low pass chopper are used to receive the intermediate frequency The signal IF converts the intermediate frequency signal IF into a fundamental frequency signal BF. The first multiplier ί22 and the second multiplier 124 are electrically coupled to the downconverter 120 and receive the baseband signal BF, and the 7Γ/2 phase shifter 126 is electrically coupled to the second multiplier 124. The voltage controlled oscillator 128 is configured to provide a local oscillator signal to the 0th-multiplier 122 and to the second multiplier 124 via the ττ/2 phase shifter 126. In addition, the first low pass filter 130 and the second low pass chopper 132 are electrically coupled to the first multiplier 122 and the second multiplier 124, respectively, wherein the first low pass filter 130 receives the fundamental frequency signal BF. The signal after the local oscillation signal is multiplied by the first multiplier 122 to output the same phase signal ... IS, and the second low pass filter 132 is the received fundamental frequency signal BF and the pass-through ττ/2 The phase-shifted local oscillation signal is multiplied by the second multiplier 124 to output an orthogonal signal QS. In addition, the inverse tangent 134 is electrically coupled to the first low pass filter 130 200835250 and the second low pass filter 132 to receive the in-phase signal IS and the quadrature signal QS, and extract a phase signal. The phase differentiator 136 is electrically coupled to the inverse tangent 134, and differentiates the phase signal extracted by the inverse tangent 134 to output a non-return-to-zero signal NRZ, and the non-return-to-zero signal NRZ is output by the phase differentiator 136. Thereafter, it is transmitted to the first digital low pass filter 104, the second digital low pass filter 106, and the subtractor 112, respectively. The first switch 1 (10) is turned off and the second switch 110 is turned on, so that the non-returning signal j NRZ can be filtered by the first digital low pass filter 104 to obtain a DC offset in the non-returning signal NRZ, and then The non-returning signal NRZ then subtracts the DC offset from the subtractor 112 to convert it into a demodulated variable signal to transmit 'heart out'. V.:.: Next, once the GFSK signal receiving system detects that the packet has been received After the access code, the first switch 108 is switched to be turned on, and the second switch 110 is switched to be turned off, and the non-returning signal NRZ is filtered by the second digital low pass filter 106 during reception of the data by the GFSK signal receiving system. , @ obtains the DC offset in the non-return-to-zero signal NRZ, and then subtracts the DC offset from the zero-return signal NRZ to be converted into the demodulated signal output.
請參照第2圖，係繪示根據本發明一實施例之一種解 調變方法之流程圖。首先在步驟200中，接收由傳送端所 •傳輸之一中頻訊號。接著在步驟202中，將中頻訊號經由 _ 一相移鑑別器轉換為一不歸零訊號。其中，由於在GFSK 訊號接收系統内，傳送端與接收端之間會出現載波頻率偏 移（frequency offset)的效應，因此使得不歸零訊號會具有一 200835250 ' ' - . . - —. . 直流偏移置（DC offset)。接著在步驟2〇4中，將不歸零訊號 過遽’藉以獲得不歸零訊號中的直流偏移量。最後在步驟 206中’將直流偏移量自不歸零訊號中移除，.以轉換成一解 調變訊號。此外，上述之解調變方法更可包含藉由一判別 器判別解調變訊號，以決定解調變訊號的數位狀態，亦即 其位元值係為”〇，，或”1”。 b 直流偏移量可藉由一無限脈衝響應數位低通濾波器蔣 _ 不歸零訊號過濾而獲得，且在GFSK訊號接收系統接收封 包的存取碼期間，此、無限脈衝響應數位低通濾波器係為一 寬頻帶之濾波器，而在GFSK訊號接收系統接收資料期間， 此無限脈衝響應數位低通濾波器係為一窄頻帶之濾波器。 此外，不歸零訊號可藉由一減法器移除其中的直流=移 量，以轉換成解調變訊號。 由上述本發明之實施例可知，應用上述實施例之解調 變裝置及其方法可在數位式GFSK接收系統中，將頻率偏 移效應所導致的直流偏移量減少，藉以最佳化所接歧到的 I 訊號，提升接收訊號經解調變後的正確性，使得訊號傳輸 能更加地準確。 ^ 雖然本發明已以實施例揭露如上，然其並非用以限定 本發明，任何所屬技術領域中具有通常知識者，在不^離 本發明之精神和範圍内，當可作各種之更動與潤飾，因此 本發明之保護範圍當視後附之申請專利範圍所界定者為 準。 〆 【圖式簡單說明】 π 200835250 .- ... · ./ ·. - 為讓本發明之上述和其他目的、特徵、優點與實施例 能更明顯易懂，所附圖式之詳細說明如下： - · . . - ' . ' - . ， —— ... - ..... .； . . .... .....· 弟1圖係繪示根據本發明一實施例之一種解調變裝置 之示意圖。 .·. . . .: . ...... 第2圖係繪示根據本發明一實施例之一種解調變方法 ·· ； 之流程爵。 ...- . ...... . ' .. . ....... ； . ； · . ........ .... · ..... 麵^ 【主要元件符號說明】 100 :解調變裝置 120 : 降頻器 102 :相移鑑別器 122 ： 第一乘法器 104 :第一數位低通濾波器 124 ： 第二乘法器 106 :第二數位低通濾波器 126 ： 7Γ / 2相移器 108 :第一開關 128 ： 壓控振盪器 110 :第二開關 130 ： 第一低通濾波器 112 :減法器 132 ： 第二低通濾波器 114 :判別器 134 ： 反正切器 136 :相位微分器 200〜206 :步驟 12Referring to FIG. 2, a flow chart of a method for modulating a modulation according to an embodiment of the present invention is shown. First, in step 200, one of the intermediate frequency signals transmitted by the transmitting end is received. Next, in step 202, the intermediate frequency signal is converted to a non-return to zero signal via the _ phase shift discriminator. Among them, in the GFSK signal receiving system, the effect of carrier frequency offset (frequency offset) between the transmitting end and the receiving end, so that the non-returning signal will have a 200835250 ' ' - . . . Offset (DC offset). Then, in step 2〇4, the non-return-to-zero signal is over-subscribed to obtain the DC offset in the non-return-to-zero signal. Finally, in step 206, the DC offset is removed from the non-return to zero signal to convert to a demodulated signal. In addition, the demodulation method described above may further comprise determining, by a discriminator, the demodulation signal to determine the digit state of the demodulation signal, that is, the bit value is “〇,, or “1”. The DC offset can be obtained by filtering an infinite impulse response digital low-pass filter, and the infinite impulse response digital low-pass filter is used during the GFSK signal receiving system receiving the access code of the packet. The filter is a wide-band filter, and the infinite impulse response digital low-pass filter is a narrow-band filter during reception of data by the GFSK signal receiving system. In addition, the non-return-to-zero signal can be shifted by a subtractor. In addition to the DC = shift amount, it is converted into a demodulation signal. According to the embodiment of the present invention described above, the demodulation device and the method thereof using the above embodiments can shift the frequency in the digital GFSK receiving system. The DC offset caused by the effect is reduced, so as to optimize the I signal that is connected to improve the correctness of the received signal after demodulation, so that the signal transmission can be more accurate. ^ Although the invention has been The present invention is disclosed in the above embodiments, and is not intended to limit the present invention. Any one of ordinary skill in the art can make various changes and refinements without departing from the spirit and scope of the present invention. The scope of protection is subject to the definition of the scope of the patent application. 〆 [Simple description of the schema] π 200835250 .- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . The embodiment can be more clearly understood, and the detailed description of the drawings is as follows: - · . . - ' . ' - . , —— ... - ..... . . . . . . . . . 1 is a schematic diagram of a demodulation device according to an embodiment of the present invention. FIG. 2 is a diagram showing an embodiment of the present invention. A kind of demodulation method ·· ; The process of the triumph ..... . . . . . . . . . . . . . . . . . . ... · ..... Face ^ [Main component symbol description] 100 : Demodulation device 120 : Down converter 102 : Phase shift discriminator 122 : First multiplier 104 : First digital low pass filter 124 : Second multiplier 106: second Bit low pass filter 126: 7Γ / 2 phase shifter 108: first switch 128: voltage controlled oscillator 110: second switch 130: first low pass filter 112: subtractor 132: second low pass filter 114 : discriminator 134 : inverse tangent 136 : phase differentiator 200 to 206 : step 12