TW200835169A - Decoder for performing error correction decoding by repetition decoding method - Google Patents

Abstract

A decoder (5) performs an error correction decoding to encoding data X(n) transmitted to a communication path in order to obtain decoded data. This decoder (5) is provided with a decoding processor (7) for performing the error correction decoding of the encoding data X(n) by a repetition decoding method which repeats decoding computation, and a frequency determining portion (12) for determining a repeated frequency based on a transmission characteristic of the communication path.

Description

[Technical Field] The present invention relates to a decoder or the like which performs error correction decoding by a repeated decoding method. [Prior Art] In the case of a communication system in which data is constructed, high-speed communication, low power consumption, high communication quality (low bit error rate), and the like are required. An error correction technique for detecting an error in a received code and performing correction is widely used as a technique for satisfying these requirements in wireless, cable, and recording systems. In recent years, as one of the mistakes, one of the positive technologies, low-density parity check

The (LDPC: Low-Density Parity-Check) code and the SUm-pr〇duct decoding method have attracted attention. At S.Y.Chiing et al., "〇n the Design of Low-Density Parity-Check Codes within 0.0045dB of the Shannon Limit ’, IEEE COMMUNICATIONS

LETTERS, VOL. 5, No. 2. Feb. 2001, ρρ·58-60 (Non-Patent Document 1) discusses the decoding operation using this LDPC code. Non-Patent Document 1 shows that a 0.004 dB decoding characteristic can be obtained by using an irregular LDPC code of a coding rate of 1/2 to a Shannon limit of a white Gaussian communication path. The irregular LD PC code represents the column weighting of the parity check array (the number in the column, 1 holds) and the row weight (the number in the row, 1 holds) is not a fixed code. Column weighting and row weighting LDPC codes fixed in columns and rows are called regular LDPC codes. Further, since the sum-product decoding method performs the decoding process by the parallel processing, the code length can be lengthened and the processing performance can be improved. In this non-patent document 1, although the mathematical algorithm for decoding the LDPC code according to the sum-product decoding method 200835169 is not shown, the circuit configuration for specifically performing such a large calculation is not shown. E. Y e 〇 e t al., VLSI Architectures for Iterative Decoders in Magnetic Recording Channels” , IEEE Trans. On

Magnetics, V〇L.37, No. 2, March, 2001, pp. 748-7 5 5 (Non-Patent Document 2) The circuit configuration of the decoding device for reviewing the LDPC code. Non-patent literature

2. Calculate the probability of the information token based on the received series and based on the trellis-based MAP (Maximum After Incident) algorithm, the BCIR algorithm. In this trellis, the front and rear directions of each state are calculated, and then the repetition rate of these front and rear directions is used to obtain the probability of the event. In this calculation, the calculation is performed using the addition/comparison/selection/addition means. In the calculation of the LDPC code, an inspection array is generated according to the s u m - p r 〇 d u c t decoding method, and the circuit of the inspection node is calculated by using the 値 of the check node from the difference. In addition, in the field of the low-density parity check code and its decoding method, the letter technology bulletin, MR200 1-83, December, 2001 (Non-Patent Document 3), explains the min_sum decoding method in the logarithmic region. Non-Patent Document 3 shows that, according to the mi η - sum decoding method, only four basic operations of addition, minimum, positive and negative, and multiplication of positive and negative signs can be assembled according to Gallager's f function, and assembly can be simplified. Circuit construction. In Non-Patent Document 3 and Haotian Zhang et al. “The Design

Structured Regular LDPC Codes With Large Girth", IEEE Globecom 2003, pp. 4022-4027 (Non-Patent Document 4), sum-product decoding method and mi η-sum decoding method, based on the logarithm of the received signal from 200835169 Sex ratio, repeatedly performing the decoding operation of the column processing and the row processing, thereby performing error correction. In the column processing, the external parity log ratio α is updated using the parity check array, and in the row processing, the token is calculated based on the external logarithm ratio α The logarithmic ratio /3 before the transaction. The decoding device for performing the error correction decoding of the LDPC code reveals

Japanese Patent Publication No. 2005-269535 (Patent Document 1). In the decoding device described in Patent Document 1, the arithmetic processing of the column processing and the line processing is repeatedly repeated. On the other hand, when the number of repetitions of the column processing and the row processing reaches a predetermined level, the column processing and the line processing are repeatedly ended. However, as described above, in the sum-product decoding method and the min-sum decoding method, the logarithmic probability ratio calculated from the received signal (encoded data) is used in the decoding operation. In the case of multi-turn modulation of the received signal, there are the following methods for calculating the logarithmic probability ratio. First, as defined, there is a method of correctly calculating the log likelihood ratio (conventional method 1). In this mode 1, the distance between the received signal and each constellation point is calculated for all constellation points. In addition, in the review of the structure of the LDPC coded space multi-communication method, the scholastic technique, MW2004-239, March 2005 (Non-Patent Document 5), describes a method (known method 2) ), which calculates and receives the distance of the signal only for the constellation points located in the vicinity of the hypersphere centered on the received signal, thereby calculating the log likelihood ratio 値. In addition, in the case of the "Low-density parity check code and its decoding method", TRICAPS, ISBN 4 -8 865 7-222-7C305 5, June 5, 2008, 200835169 (Non-Patent Document 6), A method (known method 3), which calculates a log likelihood ratio by calculating a distance between a received signal and a constellation point that is a candidate, and reselects the candidate point according to the result of the error correction decoding in the subsequent stage. The log likelihood ratio is also calculated repeatedly. Patent Document 1: JP-A-2005-2695 35 Non-Patent Document 1: S.Y. Chung et al., "On the Design of Low-Density Parity-Check Codes within 0.0045 dB of the

Shannon Limit ” , IEEE COMMUNICATIONS

LETTERS, V〇L. 5, No2. Feb. 200 1, pp. 5 8-60 Non-Patent Document 2: E.Yeo et al., "VLSI Architectures for Iterative Decoders in Magnetic Recording Channels", ΙΕΕΕ Trans.On Magnetics , VOL.37, No2.March.2001, pp.748-755 Non-Patent Document 3: Wadayama Masahiro, "About Low Density Parity Check Codes and Their Decoding Methods", Xin Xue Technical Journal, MR2001-83, 2001 12 Non-Patent Document 4: Haotian Zhang et al. “The Design

Structured Regular LDPC Codes With Large Girth" ,ΙΕΕΕ Globecom 2003, pp.4022-4027 Non-Patent Document 5: Qiujiang Yousuke et al., “Review on the Structure of LDPC Coding ΜΙΜΟ Space Multiple Communication Method”, Xin Xue Technical Journal, MW2004-239 , March 2005 Non-Patent Document 6: Hetian Shanzheng, "Low Density Parity Check Code and Its Decoding Method", TRICAPS, ISBN 4-88657-222-7C3055, June 2002 200835169 [Invention] [Invention [Problems to be Solved] However, in Patent Document 1 and Non-Patent Documents 丨 to 6, it is not considered to appropriately set the number of repetitions as the repeated termination condition. Here, the number of repetitions of the decoder should be set to be reliably decoded. In general, in the case of repeated decoding, the more the number of repetitions, the better the decoding characteristics become. From this point of view, it is preferable to set the number of iterations of the repeated end condition to be larger.

On the other hand, when the number of repetitions of the repeated end condition is set to be too large, unnecessary decoding processing is performed unnecessarily, and waiting time (delay) or unnecessary power consumption occurs. However, when the number of repetitions of the repeated termination condition is set to be too small, the necessary decoding characteristics cannot be obtained. Therefore, if a certain number of repetitions is fixedly loaded into the decoder, the number of repetitions becomes too large or too small. As a result, decoding cannot be performed surely, or waiting time (delay) or unnecessary power consumption occurs. Accordingly, a first object of the present invention is to provide a new technique which makes it possible to arbitrarily adjust a repetition end condition such as the number of repetitions of a decoding operation. Moreover, the conventional methods 1 to 3 for calculating the log likelihood ratio described above have the following problems. First, in the conventional method 1, it is necessary to calculate an index and a logarithm for all constellation points, and the amount of calculation becomes enormous. In particular, as the number of constellation points increases, 200835169 and the amount of calculation increases explosively. In the conventional mode 2, as in the conventional mode 1, the index and the logarithm need to be calculated. In the conventional method 2, it is different from the conventional method 1, although it is only necessary to calculate the nearby constellation points, but in order to find the nearby constellation points, it is necessary to investigate whether the constellation points are included by the hypersphere, and the calculation amount becomes huge. Further, in the conventional method 3, although only one candidate constellation point is calculated, 'because the approximation is rough, the accuracy of the error correction processing in the latter stage is poor. Therefore, it is necessary to repeatedly calculate the logarithmic probability ratio, and the amount of calculation is still large. Accordingly, a second object of the present invention is to provide a new technique which makes it possible to obtain a logarithmic probability ratio used for decoding operations with a small amount of calculation. [Means for Solving the Problem] A certain aspect of the present invention is a decoder that performs error correction decoding on encoded data transmitted by a communication path to obtain decoded data, and the decoder includes a decoding processing unit that repeatedly performs The error decoding method of the decoding operation performs error correction decoding of the coded data; and the number determining unit determines the number of repetitions of the decoding operation based on the transmission characteristics of the communication path. According to the decoder, the number determining unit can determine the number of iterations of the decoding operation by the decoding processing unit based on the transmission characteristics of the communication path. Therefore, the number of repetitions of the decoding operation can be adjusted in accordance with the state of the communication route. Therefore, it is possible to prevent the decoding of a predetermined quality from being too small due to the number of repetitions, or the waiting time or unnecessary power consumption due to too many repetitions, and -10- 200835169 can efficiently perform error correction by repeated decoding. decoding. Preferably, the transmission characteristic of the communication route is a noise characteristic of the coded data, and the number determination unit determines the number of repetitions of the decoding operation based on the noise characteristic of the coded data calculated using the guidance signal included in the coded data. In addition, the noise characteristics of the encoded data can be evaluated by the number of noises mixed in the communication route, for example, of course, including signal miscellaneous

The signal ratio (SNR) also includes noise power or noise. According to the decoding benefit, since the noise characteristic of the coded data of the parameter used to determine the number of repetitions of the decoding operation is calculated using the index fg number included in the coded data, it can be independently determined in the decoder. The noise characteristics of the number of repetitions are determined, and the assembly system is simple. Preferably, there is an input port for inputting an error characteristic of the decoded data from the outside; a transmission characteristic of the communication route is an error characteristic of the decoded data input by the input; and the number determining unit is based on the error characteristic of the decoded data. Determine the number of iterations of the decoding operation. According to this configuration, the noise characteristic of the encoded data is obtained from the encoded data before decoding, and even if the number of iterations of the decoding operation is determined only based on the noise characteristics, the problem that the decoding result cannot be fed back can be solved. In addition, the error characteristics of the decoded data may be evaluated by the number of errors included in the decoded data. For example, the error rate is included, and the error amount included in the decoded data is also included. - Preferably, there is an input port for inputting the error characteristics of the decoded data from the outside; the transmission characteristic of the communication route is the noise characteristic of the encoded data of the encoded data -11-200835169 and the error characteristics of the decoded data input by the input port; The number determining unit selects the number of repetitions of the decoding operation specified by the noise characteristic of the encoded data, and the number of repetitions of the number of repetitions of the decoding operation specified by the error characteristic of the decoded data. According to this configuration, since the number determining unit selects the relatively many iterations, the number of iterations of the decoding operation is not pinned only by the change of one parameter, and the decoding quality can be maintained.

Furthermore, the present invention is a receiving apparatus that receives and decodes encoded data transmitted by a communication path, the receiving apparatus including: a demodulator for digitally demodulating the received encoded data; and the decoder The digital signal of the demodulated encoded data is decoded. Furthermore, the present invention is a decoding method for encoding data, which performs error correction decoding on the encoded data transmitted by the communication route by using a repeated decoding method to obtain decoded data, and the decoding method includes: a determining step, which is based on a communication route. The number of repetitions of the decoding operation is determined by the transmission characteristic; and the step of performing the error correction decoding by the repeated decoding method is performed based on the determined number of repetitions. Furthermore, the present invention is a communication system including a transmitting device that transmits encoded data to a communication path, and a receiving device that receives and transmits the transmitted encoded data, and the receiving device has a decoder that receives the encoded data. The decoding method is performed to obtain the decoded data, and the receiving device determines the number of iterations of the decoding operation based on the transmission characteristics of the communication path, and then performs error correction decoding by the repeated decoding method. -12- 200835169 According to the receiving device, the decoding method, and the communication system, since the number of iterations of the decoding operation is determined according to the transmission characteristics of the communication route, the error correction decoding is performed by the repeated decoding method, so that it can be adapted to the situation of the communication route. Adjust the number of iterations of the decoding operation. Therefore, it is possible to prevent the decoding of a predetermined quality from being performed due to too few repetitions, or to wait for a waiting time or unnecessary power consumption due to too many repetitions, and to efficiently perform error correction decoding by the repeated decoding method.

Furthermore, the present invention is a decoder that performs error correction decoding on encoded data transmitted by a communication path to obtain decoded data, and includes a decoding processing unit that performs encoded data by repeatedly performing decoding processing by repeated decoding. The error correction decoding is performed; the determination unit determines that the repetition of the decoding operation by the decoding processing unit is completed; and the termination condition input is used to receive the repeated termination condition from the outside of the decoder, and the determination unit is input based on the termination condition. The repeated end condition is input, and the end of the repetition of the decoding operation by the decoding processing unit is determined. According to this decoder, since the repetition end condition can be accepted from the outside of the decoder from the end condition input, the repeated end condition can be arbitrarily adjusted. Further, the decoding system of the present invention includes: a decoder that performs error correction decoding on the code and data transmitted by the communication path to obtain decoded data; and a repetition end condition setting unit that externally connects to the decoder; The decoder includes: a decoding processing unit that performs error correction decoding of the encoded data by repeating the decoding method of the decoding operation; and a determination unit, -13-200835169 determines the end of the repetition of the decoding operation by the decoding processing unit; And the end condition input 璋 is configured to receive the iterative end condition from the outside of the decoder. The repeating end condition setting unit is configured to input the adjusted end condition to the end condition of the decoder, and the determining unit is based on the The end condition is input to the repeated end condition input, and the end of the repetition of the decoding operation by the decoding processing unit is determined. According to this configuration, the decoder can repeatedly perform the decoding operation based on the iterative end condition set by the iteration completion condition setting unit.

Furthermore, the present invention is a receiving apparatus that can receive encoded data via a communication path, and includes a decoder that performs error correction decoding on the encoded data to obtain decoded data, and the decoder includes a decoding processing unit that repeatedly Performing a decoding decoding method to perform error correction decoding of the encoded data; the determining unit determines the end of the repetition of the decoding operation by the decoding processing unit; and the end condition input 埠 is for receiving the repeated end from the outside of the decoder. The determination unit determines that the repetition of the decoding calculation by the decoding processing unit is completed based on the repeated termination condition input from the end condition input, and the receiving device further includes a repetition end condition extraction unit that receives the transmission via the communication route. The end condition is repeated, and the end condition is supplied to the end condition of the decoder. According to this configuration, the decoder can repeatedly perform the decoding operation based on the repetition termination condition specified by the other communication device. Further, the transmission device of the present invention includes: a repeat completion condition setting unit that sets a decoding completion error when the error correction decoder decodes the encoded data - and a transmission unit that decodes the error correction The device repeats the repeated termination condition set by the repeated termination condition setting unit. According to this configuration, the transmitting device can specify an iterative end condition at the error correction decoder. Preferably, the transmitting device further has a database for storing information for determining the communication quality when transmitting the encoded data; and the repeated termination condition setting unit refers to the database to determine the communication quality when transmitting the encoded data, and responds to the communication quality. And set the repeated end condition.

According to this configuration, the repeating condition can be appropriately set by referring to the database. Preferably, the transmission unit transmits the information segment including the header portion and the actual data portion, describes the repeated termination condition in the header portion, and describes the encoded data that is decoded and decoded according to the repeated termination condition in the actual data portion, or is used to specify the repeated basis. Conditional information on the encoded data of the decoding operation. Furthermore, the present invention is a communication quality adjustment method for transmitting communication quality of a data to be encoded to a user-side communication device having an error correction decoder that repeatedly performs decoding calculation, and the method includes: a setting step Setting a repetition end condition of a decoding operation when the error correction decoder decodes the encoded data; and transmitting a step of transmitting the set repetition end condition to the error correction decoder; the setting step includes communication corresponding to the user The procedure of setting the repeated end condition for quality. According to this configuration, the communication quality available to the user can be adjusted by making the repeated end conditions different. -15- 200835169 Another aspect of the present invention is a decoder that performs error correction decoding on encoded data transmitted by a communication path to obtain decoded data, and the decoder includes a logarithmic probability ratio calculating unit according to An approximation formula representing a theoretical approximation of the relationship between the coded data and the logarithmic probability ratio, and calculating a logarithmic probability ratio of the input coded data X; and a decoding process section 'approximate 对λ i based on a log likelihood ratio , and the error correction decoding of the encoded data X is performed.

Preferably, the approximation of the coded data X is closer to the decision 値, the more accurately the theoretical formula is approximated; the 値 is in the theoretical form, the probability of the coded data X is 0, and the coded data X is the system 1 The chances of becoming equal. Preferably, the approximation is a formula in which the theoretical formula is determined to perform Taylor expansion. Furthermore, the present invention is a decoder that performs error correction decoding on encoded data transmitted by a communication path to obtain decoded data, and the decoding device φ is provided with a likelihood calculation unit for encoding data X according to (A) 1) Calculate the approximate 値λ i (i = 1 to L) of the logarithmic probability ratio; and λ i = - gxKiX(x - Ci) (A 1) (i = l~L) The decoding processing unit is based on the logarithm The probability ratio is approximated by 値λ i(i = l~L), and the error correction decoding of the encoded data X is performed, wherein the number of modulation bits of the L-coded data X, g-system constant, Ki, -16-200835169

Ci is the number of the data x, the coordinates of its constellation points, and the number of L-dependent. Take the coded data X to gray code the g-cycle signal. Preferably, in the (A 1)th formula, g is a constant 2/ σ 2 ; the decoding processing unit performs error correction decoding according to the sum-product decoding method, wherein σ 2 is a divergence of the noise component included in the encoded data X. . Preferably, in the (A 1)th formula, 2 is a positive number that does not depend on the encoded material, and the decoding processing unit performs error correction decoding according to the simplified decoding method.

Preferably, the coordinate of the constellation point of the coded data X is axp, where the number other than the a system is p, the p system is (2"-1) or more, and the odd number is below (2"-1), in the (A1) Formula, Ki is represented by the formula (A2),

,x^CM B# K.= (2gi^L) +*j—X <C丨时 K丨=一 ...(Α2) |a丨 |a|

In the formula (A1), Ci is represented by the formula (A3).

Cj =0 ^ c; =CM +.axKi χ2α'ι+ι> .-(A3) (2^i^L) Preferably, the coded data x is s expressed by 2's complement (S g 2 -17- 200835169 The bit indicates 'when a is a negative number, the probability calculation unit compares the coded data X from the topmost first bit to the first log likelihood ratio 値λ 1 The symbol output unit includes a first absolute 値 calculation circuit that calculates the absolute 値 of the coded data X and outputs an absolute 値 of the first log likelihood ratio 値λ 1 .

Preferably, the coded data X is expressed by s (S 2 2) bits expressed by 2's complement. When a is a positive number, the possibility calculation unit includes: a first logical OR circuit, which encodes The data \ changes from the first bit of the uppermost level to the inversion, and outputs the symbol of the first logarithmic probability ratio 値λ 1; and the first absolute 値 calculation circuit calculates the absolute value of the encoded data 値And output the absolute probability of the first logarithm likelihood ratio 値λ 1 . Preferably, in the case of S^3, the likelihood calculation unit further includes: a second logical OR circuit that calculates the first bit from the topmost order of the encoded data, or its inverse 値 and from the top The second bit 値 is mutually exclusive logical OR, and outputs the second logarithmic probability ratio 値λ 2 symbol; and φ the second absolute 値 calculation circuit, which is calculated from the top of the top The bit 値 and the second bit from the top are used as the encoded data, and the second bit from the top is inverted, and the first bit from the top is used as the encoded data. From the absolute 値 of the S-bit of the first-order first-order 値, the second logarithm likelihood ratio is approximately the absolute 値 of 値λ 2 . Among them, I is the natural number that satisfies all of (3^1'S). Preferably, in the case of S 2 4, the possibility calculation unit further includes: a κth logical OR circuit for calculating the coded data from the top (第 - 1) -18 - 200835169 bits and From the mutually exclusive logical OR of the Kth bit of the uppermost order, and output the symbol of the third log likelihood ratio 値λ k; and the third absolute 値 calculation circuit, the calculation will be from the top 1 bit 値 and the 2nd bit 最 from the top order are used as the inverse 値 of the gamma bit of the highest order from the uppermost order, and the Jth bit 最 from the top order is used as the encoding resource.

From the uppermost U + K - 2) the absolute 値 of the (S - K + 2) bit of the bit 値, and then output the Kth log likelihood ratio is approximately 値 λ k absolute 値. Among them, the K system satisfies all the natural numbers of (3 S (S-1)), and the j system satisfies all the natural numbers of (3 ‘(S — K + 2)). Furthermore, the present invention is a decoding method for performing error correction decoding on encoded data transmitted by a communication path to obtain decoded data, and a coordinate system axp of a constellation point of the encoded data X, wherein a number other than the a system , P system - (2 " -1) or more, and (2L - 1) below the odd number, wherein the number of modulation bits of the L-coded data X, the decoding method includes: the possibility calculation step 'for the coded data X, in order to calculate the log likelihood ratio 値λ i (i = l~L) in order from i = 1 to L; and the decoding step, based on the log likelihood ratio 値' to encode the data X The error correction decoding includes a setting step of setting the constant K1 to an a/丨a 丨 and setting the constant Ci to 〇; the calculating step is based on the constant C i _ , and the (A4) Formula, calculate Ki (U2~L); -19- 200835169 ... (A4) χ ^ €μι ==~^, x<Cn when Kj=一"·- Ia| .丨·1 ! |a| (2^i^L) The calculation step 'calculates Ci (i = 2 to L) according to the constant Ki and the formula (A5);

C^C^+axKjXl^1^ (2^i^L) (A5) The calculation step is based on the constants K i and Ci, and according to the formula (A6), the log likelihood ratio is approximated 値λ i ( i=l~L),

Ai = -gxKi x(x-Cj) (i = 1 to L) (A6) where g is a constant. Further, the present invention is a computer readable recording medium for recording a decoding program, and the program is used for error correction decoding of encoded data transmitted by a communication route to obtain decoded data, and the decoding program is used to make a computer The function calculation unit is configured to calculate the logarithmic probability ratio approximation i(i = l to L) based on the equation (A7) for the coded data X; and -20 - 200835169 ... (A7 )

Ai = -gxK丨 χ(χ-CJ (i = l~L)

The decoding processing unit performs error correction decoding of the encoded data based on the approximate 値λ i(i=l~L)' of the log likelihood ratio, where 1 is the number of modulated bits of the encoded data X, g system The constant, Ki, Ci, and the coded data X, the coordinates of the constellation points, and the L-dependent number. [Effect of the Invention] According to the present invention, it is possible to arbitrarily adjust the repetition end condition such as the number of repetitions of the decoding operation, and to perform error correction decoding efficiently by the repeated decoding method. Further, according to the present invention, it is possible to perform error correction decoding with a small amount of calculation. [Embodiment] Hereinafter, embodiments of the present invention will be described with reference to the drawings. [First Embodiment] Fig. 1 is a view showing a configuration example of a communication system having a decoder according to a first embodiment of the present invention. Referring to Fig. 1, the communication system is provided with a transmitting device S1 for transmitting encoded data, and a receiving device R1 for receiving and decoding encoded data. The transmitting device S1 includes: an encoder 丨, which adds 多余 bits to the transmission information of the κ bit, and generates a transmission code (encoded data) for the error correction of the ι bit, and the modulator 2 is determined according to the predetermined The modulation of the (Κ + Μ) (= Ν) bit from the encoder i-21-200835169 is modulated and output to communication 3. The encoder 1 adds the extra bit Μ bit for the parity calculation to the information of the Κ bit, and generates LDPC (low density parity check) coded data of the (Κ + Μ) (= Ν) bit. In the low-density parity check array, the column corresponds to the extra bit, and the row corresponds to the code bit. Further, which bits of the LD PC-encoded data of the (Κ + Μ) bits are arranged with one information bit and one extra bit can be configured as long as it is determined by the transmitting side and the receiving side.

The modulator 2 performs modulation such as amplitude modulation, phase modulation, code demodulation, frequency modulation, or orthogonal frequency division multiple modulation in response to the configuration of the communication path 3. For example, in the case of the communication route 3 series optical fiber, in the modulator 2, the intensity of the light is modulated (a type of amplitude modulation) by changing the brightness of the laser diode in response to the transmission of the information bit. That is, in the case where the transmission data bit is "0", it is converted into "+1", so that the luminous intensity of the laser diode is made strong and then transmitted, and in the case where the data bit is transmitted, "the case is converted. Into "-Γ, the luminous intensity of the laser diode is weakened and transmitted. The receiving device R1 includes a demodulator 4 that applies demodulation processing to the modulated signal transmitted via the communication path 3, and demodulates the digital code of the (K + M) bit; and the decoder 5 is paired The symbol from the (K + M) bit of the demodulator 4 is applied based on the decoding process of the parity check array to generate the original K bit information. The demodulator 4 performs demodulation processing in response to the transmission mode of the communication route 3. For example, in the case of amplitude modulation, phase modulation, code modulation, frequency modulation, and orthogonal frequency division multiplexing, amplitude demodulation, -22-200835169 phase demodulation, code demodulation, and frequency solution are performed in the demodulator 4. The processing of the adjustment. Fig. 2 is a view showing a correspondence relationship between the output data of the modulator 2 and the demodulator 4 in the case where the communication route 3 series optical fiber is shown in a list. In Fig. 2, as shown above, in the case of the communication line 3 type optical fiber, in the modulator 2, when the transmission data is "〇", it is converted into "Γ", and the laser diode for transmission ( The luminous intensity of the light-emitting diode is increased, and when the data bit is "1", it is converted into "one-one", and the luminous intensity of the laser diode is weakened and transmitted.

Due to the transmission loss or the like in the communication path 3, the light intensity transmitted by the demodulator 4 has an analogous intensity distribution from the strongest intensity to the weakest intensity. At the demodulator 4, the input optical signal is quantized (analog/digital conversion), and its photosensitive level is detected. Fig. 2' shows the received signal strength in the case where the photosensitive level is quantized into eight stages. That is, when the photosensitive level is the data "7", the luminous intensity is strong, and when the photosensitive level is "0", the luminous intensity is weak. Each of the photosensitive levels is assigned to the material having the symbol and is output from the demodulator 4. The output of the demodulator 4 outputs the data "3" when the photosensitive level is "7" and the output data "4" when the photosensitive level is ". Therefore, from the demodulator 4, to the 1 bit. The received signal of the element outputs a signal that has been multi-quantized. The decoder 5 accepts input of the received encoded data (the bits containing the information) from the (K + M) bits supplied from the demodulator 4, and then According to the sum-product decoding method or the min-surn decoding method and applying the LDPC parity test -23-200835169 to check the array, the original K-bit information is restored. In addition, in the second figure, in the demodulator 4, the quantum has been generated. In the demodulator 4, a bit that is quantized into L値 (L 2 2) can be used for decoding processing. Further, in FIG. 2, a comparator can also be used, and A certain threshold is used to determine the level of the received signal, and a second signal is generated. Fig. 3 is a schematic diagram showing the structure of the receiving device R 1 of the first embodiment. Here, Fig. 3 also shows the communication route. 3.

Referring to Fig. 3, the demodulator 4 includes a demodulation circuit 4a for demodulating a signal supplied from the communication path 3, and an analog/digital conversion circuit 4b' which is generated by the demodulation circuit 4a. The analog demodulation signal is converted into a digital signal, and the output data (encoded data) Xn of such a ratio/digital conversion circuit 4b is supplied to the decoder 5. The decoder 5 is constituted by a decoding circuit composed of a semiconductor wafer or a plurality of electronic circuits arranged on a substrate. The decoder 5 has a data input port (data input terminal) 5 a for encoding data X n , which is connected to the output of the analog/digital conversion circuit 4b. The data of the coded data X η supplied to the decoder 5 is L値(L - 2). For this reason, the encoded data Xn is more than the quantized data, and in the following, the data Xn is also referred to as a symbol. The decoder 5 is a soft decision decoder, and performs decoding processing on the input symbol Χn series according to the decoding method such as the sum-pr 〇duct decoding method or the mi η -sum decoding method, and generates a code bit CDn as Decode the data. From the decoding -24- 200835169 sub-end delivery material (0 璋Dn out of the C transmission material resource code, the 5 code code solution outside the power transmission and output section to the fourth picture shows the decoding of the first embodiment Referring to Fig. 4, the decoder 5 includes a logarithmic probability ratio calculating unit 6 that generates a logarithmic probability ratio λ η of the demodulated symbol Xn from the demodulator 4; and a decoding processing unit 7 The decoding process is performed by the logarithmic probability ratio calculating unit 6 and the noise information of the received signal. Generally, in the case of considering the noise information, the log likelihood ratio is λ η. Here, σ 2 represents the divergence of the noise. However, in the present embodiment, the log likelihood ratio calculation unit 6 is formed by a snubber circuit or a constant multiplication circuit, and the logarithmic possibility The ratio λ η is obtained by Xnxf. Here, f is a non-zero positive number. Also, in the min-sum decoding method, in the decoding process according to the inspection array (column processing), since the calculation is performed using the minimum 値, the signal is Processing remains linear. Therefore, there is no need to The information is normalized and processed, etc. In this case, the circuit configuration is simplified and the calculation process is simplified by calculating the log likelihood ratio without using the noise information. The decoding processing unit 7 is based on the logarithm possibility. The error correction decoding of the demodulation symbol Xn is performed in units of the code length N by the ratio λ η. The decoding processing unit 具备 includes a column processing unit 9 for performing column processing of the parity check array, and a line processing unit 10 for performing the parity check. The row processing of the array repeats the calculation of the column processing and the row processing, and supplies the output of the row processing unit 1 to the column processing unit 9. The column processing unit 9 and the line processing unit 1 are connected in a loop. 25-200835169 In the case of the decoding method-sum-product decoding method, the column processing unit 9 and the line processing unit 10 perform calculation processing based on the following equations (1) and (2), and repeatedly perform the parity check array. The processing of each element in the column (column processing) and the processing of each element of the row (row processing) Specifically, the column processing unit 9 performs the calculation of the external 値 log ratio (first variable) according to the formula (1). a rnn Calculation, line processing unit 10 based on the calculated beforehand Zhi (2) The formula for calculating / 3 mn number ratio.

Π sign(^+^) xf Σ f(l々, + u) yn'eACm^n ...(1)

Ann ·Starting as 〇, 〇 Ann = Σ mreB(n)\m ...(2)

Here, in the above formulas (1) and (2), n' e A(m)\n and m' e B(n)\m mean elements other than itself. The external 値 logarithm ratio a mn is η' Yin η, and the logarithm of the logarithm θιηη is m' #m. Further, the addition of the position "m η " in the position of the array of α and 々 is generally indicated by the following standard text, but is described in the "horizontal arrangement of characters" for ease of reading. Here, the function f(x) is defined by the following formula (3). eA+l f(x) = ln~3r-7 ...(3)

C - I Further, the function s i g n (X) is defined by the following formula (4). -26- 200835169 (4) In the case of the inspection array of the LDPC code in which the binary Ν·Ν array H = [Hmn] is used, the set A(m) and the B(n) system set [1, N] = a partial collection of { 1,2,...,N}. A(m) = {n: Hmη = 1 } Β(η) ={m : Hmn=l}

That is, the partial set A(m) means a set of row indicators for which the mth column 1 (non-zero element) of the inspection array 成立 is established, and the partial set B(n) means the nth column 1 of the inspection array ( ( A collection of non-zero elements that are established. More specifically, for example, the inspection array 所示 shown in Fig. 5 is considered. In the inspection array of Figure 5, the first row to the third row of the first column "1" is established, and the third row and the fourth row "1" of the second column are established, and the third column is Lines 4 to 6 are established. Therefore, in this case, the partial set A(m) becomes as shown below.

Sign(x)=

x^〇x<〇A(l) = { 1,2,3} A(2)={3,4} A(3)={4,5,6} Same as 'About part set B(n) It becomes as shown below. B(1)=B(2)= {1} B(3)={1,2} B(4)={2,3} B(5)= B(6)={3} Check the array here Η In the case of using a Tanner graph, the use of this -27-200835169 "1" indicates the connection relationship of the variable node corresponding to the row and the check node corresponding to the column. This patent specification refers to it as "" r established". That is, as shown in Fig. 6, the variable nodes 1, 2, and 3 are connected to the inspection node X (the first column), and the variable nodes 3 and 4 are connected to the inspection node Y (the second column). The variable nodes 4, 5, 6 are connected to the check node Z (column 3),

This variable node corresponds to checking the row of the array, while the check nodes X, γ and Ζ correspond to the columns of the inspection array Η. Therefore, the inspection array shown in Fig. 5 is applicable to symbols in which the information bit is 3 bits and the extra bit is 3 bits in total. In the inspection array of LDPC, the number of "1" is small, which is a low-density inspection array, thereby reducing the amount of calculation. The conditional probability P(Xi I Yi) is transmitted between the variable node and the inspection node, and the symbol with the highest probability is determined for each variable node according to the MAP algorithm. Here, the conditional probability P(Xi | Yi) indicates the probability of becoming Xi under the condition of Yi. As shown in Fig. 4, the decoder 5 is provided with a determination unit 1 for determining the end of the decoding operation including the column processing and the line processing. The determination unit 11 determines whether or not the number of repetitions of the column processing and the line processing has reached the number of completions, and if the number of repetitions of the column processing and the line processing has reached the number of completions, the repetition of the decoding operation by the borrowing decoding processing unit 7 is ended. Further, after the repetition of the decoding operation, the determination unit 1 1 generates an estimated code word composed of a plurality of codes using the external 値 log ratio a mn (or the preceding logarithm ratio / 3 mn) and the log likelihood ratio λ η. . The number of codes corresponds to the number of rows in the inspection array. -28- 200835169 Specifically, the determination unit 11 calculates Qn based on the following formula (5).

Qn:, Ζα_ (5) meB(n) Further, the determination unit 1 1 calculates the estimated code CDn of the decoded data based on the following formula (6). The speculative code words (CD1, ..., CDN) are output as decoded data.

CD., [0, signQn = l [l, signQn = ... (6)] The decoder 5 is provided with the number determining unit 12, which is a signal miscellaneous data according to one of the parameters of the transmission characteristic of the communication line 3 The signal ratio (SNR) determines the number of iterations of the decoding operation; and the table 13 is the table to be referred to by the number-of-times determining unit 12. The determination unit 1 1 acquires the iteration number information In determined by the number determining unit 丨2.

The number determining unit 12 includes: an extracting circuit that extracts a guidance signal included in a header portion of the encoded data Χn; and an arithmetic circuit that counts the positive or negative of the guidance signal extracted by the extraction circuit and calculates a signal noise of the encoded data Χη The signal (noise ratio) (SNR) is independently calculated from the coded data η η input from the demodulator 4 by the ratio (SNR). Fig. 7 shows an example of the lookup table 13. In the example shown in Fig. 7, if the signal-to-noise ratio (SNR) is 2 dB or less, since the transmission characteristic of the communication path 3 is poor, the number of repetitions is set to 20 times. Further, if the signal to noise ratio (SNR) is in the range of 2 to 6 dB -29 to 200835169, since the transmission characteristic of the communication route 3 is normal, the number of repetitions is set to 8 times in general. Further, if the signal noise ratio (SNR) is 6 dB or more, since the transmission characteristic of the communication route 3 is good, the number of repetitions is set to be relatively small four times.

As described above, according to the decoder 5 of the present embodiment, the number determining unit 12 determines the decoding operation by the decoding processing unit 7 based on the signal noise ratio (SNR) of the encoded data χη indicating the transmission characteristic of the communication path. Since the number of repetitions is repeated, the number of iterations of the decoding operation can be modulated in response to the communication route. Therefore, it is possible to prevent the number of repetitions from being too small to perform decoding of a predetermined quality, or to wait for a long time or excessive power consumption, and to efficiently perform error correction decoding by the repeated decoding method. Further, according to the decoder 5 of the present embodiment, the parameter for determining the number of repetitions of the decoding operation is the signal-to-noise ratio (SNR) of the encoded data χη, because the signal is detected using the guidance signal included in the encoded data Χη. The ratio (SNR)' can be obtained in the decoder 5 by itself to determine the φ signal noise ratio (SNR) of the number of repetitions, and has the advantage that the assembly system is simple. Further, in the present embodiment, as the noise characteristic of the encoded data X11, the noise power or noise amount can be calculated instead of the signal noise ratio (SNR), and the number of repetitions can be determined based on the index. [Second Embodiment] Fig. 8 is a schematic view showing the structure of a device on the receiving side according to the second embodiment. Fig. 9 is a view showing the structure of the decoder 95 of the second embodiment. The decoder 9.5 of the second embodiment and the decoder -30-200835169 5 of the first embodiment have a error rate input 埠5c for inputting the decoded data CDn from the outside. The error rate, the number determining unit 15 not only uses the signal-to-noise ratio nr) of the noise characteristic of the encoded data Xn, but also determines the repetition of the decoding operation using the error rate of the decoded data CDn input by the error rate input 埠5c. frequency. Further, in the present embodiment, the data output port 5b of the decoder 95 of the receiving device R2 is connected to the communication control unit 30, and the communication control unit 30 is connected to the terminal device 40, which is capable of calculating the error rate of the decoded data CDn.

The terminal device 40 transmits the information Tx of the error rate calculated from the decoded data CDn to the communication control unit 30, and this information Tx is input from the error rate input 埠5c to the number determining unit 15 of the decoder 95. Fig. 10 is a table 14 showing the decoder 95 of the second embodiment, and Fig. 1 is a view showing an example of the relationship between the signal noise ratio (S N R) and the error rate. For example, as shown in Fig. 11, the signal-to-noise ratio (SNR) of the encoded data Xn and the error rate of the decoded data CDn are generally reduced by one-to-one correspondence if the former is increased. Therefore, in the look-up table 14 shown in FIG. 10, the range of the error rate of the decoded data CDn corresponding to the range of the signal-to-noise ratio (SNR) of the encoded data Xn is determined separately, and those parameters are located in the range. The number of iterations of the decoding operation. The number determining unit 15 selects one of the number of repetitions of the decoding operation specified by the signal noise ratio (SNR) of the encoded data Xn and the number of repetitions of the decoding operation specified by the error rate of the decoded data CDn-31 - 200835169 The number of iterations. As described above, according to the decoder 95 of the present embodiment, since the number of repetitions of the decoding operation can be determined from the error rate of the decoded data CDn, the decoding processing unit 7 can be determined at the time of determining the number of repetitions of the decoding operation. The decoding result is fed back.

Further, in the present embodiment, the number determining unit 15 selects the number of iterations of the decoding operation specified by the signal noise ratio (SNR) of the encoded data Xn and the number of iterations of the decoding operation specified by the error rate of the decoded data CDn. Since the number of repetitions of the more ones is larger, the number of repetitions of the decoding operation is not pinned only by the variation of the parameters of the single side, and the decoding quality can be appropriately maintained. Further, in the present embodiment, it is also possible to determine the number of iterations of the decoding operation based only on the error rate of the decoded data CDn. Further, in the present embodiment, as an error characteristic of the decoded material CDn, an error rate may be calculated instead of the error rate, and the number of errors included in the decoded data CDn may be calculated, and the number of iterations may be determined based on the index. [Variation of the first and second embodiments] In the communication system according to the first and second embodiments, the communication quality is improved when the number of repetitions of the decoding operation is increased, but the number of repetitions is too large and the delay is caused. The transfer speed cannot be changed to a high speed, and therefore, the transfer speed and the number of iterations are in a trade-off relationship. Therefore, it is also possible to select a mode from a plurality of modes as shown below depending on the communication environment and the characteristics to be emphasized. -32- 200835169 (1) The trade-off mode uses the transfer speed χ (1 - error rate) as an evaluation function, and causes the number determining unit to perform control logic for determining the transfer speed and the number of iterations of the decoding operation in such a manner that the evaluation function becomes maximum. . In this case, since the number of repetitions is determined in such a manner that the number of bits of the normally arrived data becomes maximum, the relationship with the transmission speed is also considered, and the number of repetitions can be more appropriately determined. However, in this case, on the receiving device side, because not only the decoding operation

Since the number of repetitions and the transmission speed are also independently changed, it is necessary to attach a function to the receiving apparatus to notify the transmission apparatus side of the information on the transmission speed determined on the receiving apparatus side. (2) Speed priority mode If a one-way communication environment such as broadcast communication is envisaged, in this case, it is more important to play the same information on the transmission device side as it considers the communication quality on the receiving device side. Therefore, in this case, the transmission speed is prioritized over the quality of each receiving device, and a communication system in which the following control is recommended is recommended. φ is the first upper limit of the number of iterations in which the transmission device determines the predetermined transmission rate and the transmission rate determined by the transmission device can be implemented as the number of repetitions of the decoding operation by the receiving device. This upper limit can be described in the header portion of the encoded data Xn and notified to the receiving device side. Further, the number of repetitions is determined in such a manner that the receiving apparatus ' obtains the desired communication quality within the range of the upper limit determined by the transmitting apparatus. Further, in the case where the reduction in power consumption is emphasized, it is also possible to set the number of repetitions to the minimum within the range of the above-mentioned upper limit 値. -33- 200835169 (3) Quality priority mode If one-to-one bidirectional communication is assumed, the communication quality is emphasized in this case. Therefore, in this case, first, the number of repetitions is determined so that the desired communication quality can be obtained, and the transmission speed can be determined based on the number of repetitions of the determination. [Third embodiment]

Fig. 12 is a view showing the structure of a decoder 85 of the third embodiment. Referring to Fig. 12, the difference between the decoder 85 of the third embodiment and the decoder 95 of the second embodiment is that the decoder 85 does not include the LUT 14 and the number determining unit 15 but has a register (repeated). The termination condition storage unit 82 holds the iteration number information In of the end condition of the end of the repetition of the decoding calculation, and the determination unit 1 1 acquires the iteration number information In from the register 82. In the present embodiment, the repetition end condition is not limited to the number of repetitions itself, and any information may be used as long as the decoder 85 is available to determine the number of iterations. Further, the decoder 85 is provided with an end condition input 璋 (end condition input terminal) 35c instead of the error rate input 璋 5c for accepting the iteration number information In from the outside of the decoder 85 so that the number of repetitions can be obtained. Information (repeated end condition) In and as an external input. The register 82 holds the iteration number information In supplied from the end condition input 璋 35c, and can supply the determination unit 1 1 as needed. The number-of-repetitions information In supplied by the end condition input 埠3 5 c is set by the repetition end condition setting unit connected to the external connection of the decoder 85 as shown in -34 - 200835169. FIGS. 13 to 15 show examples of the receiving devices R3, R4, and R5 having the repeated termination condition setting units 20, 120, and 220. Further, the decoder 85 and the iterative termination condition setting sections 20 and 120 constitute the decoding systems DEC1 and DEC2 of the present invention. Further, the receiving devices R3, R4, and R5 shown in Figs. 13 to 15 are connected to the terminal devices 91, 92, and 93 such as a PC, and the decoded data can be supplied to the terminal device 91 via the communication control unit 30. , 92, 93.

In the example of Fig. 3, the iterative completion condition setting unit 20 is configured by a switch. This switch is provided, for example, in the housing of the receiving device R3. From the switch to the end condition input 璋 35c of the decoder 85, the electric wiring 21a is connected. As the switch, various types of switches such as a dial switch and a slide switch can be used. The number of times of repeated information In can be adjusted by the user operating the switch. For example, it is possible to select three types of 反复 which are many times of repetition (low quality, high speed mode) U, number of repetitions (medium quality, medium speed mode) Ib, and number of repetitions (high quality, low speed mode) I c . Here, the number of repetitions of the decoding operation affects the communication quality (decoding quality), and if the number of repetitions is large, the communication quality is improved, and if the number of repetitions is small, the communication quality is deteriorated. On the other hand, if the number of repetitions is large, the waiting time (delay) becomes long, and if the number of repetitions is small, the waiting time (delay) becomes short. Further, if the number of repetitions is large, the power consumption of the decoder 85 is increased, and if the number of repetitions is small, the power consumption of the decoder 85 is small. -35 - 200835169 Therefore, when attention is paid to the quality of communication without paying attention to waiting time or power consumption, it is only necessary to operate the switch to select Ia with a large number of repetitions. Further, even if the communication quality is slightly increased, attention is paid to the case where the waiting time is short, or when the power consumption is small, the user can operate the switch to select Ic with a small number of repetitions. In this way, by adjusting the number of repetitions, the communication quality, waiting time, or power consumption can be adjusted as needed.

In the example of Fig. 14, the repeated termination condition setting unit 1 2 is included in the terminal device 92 connected to the receiving device R 4 . The terminal device 92 is constituted by, for example, a computer on which a computer program for the number of repetitions is installed. The terminal device 92 can transmit the iteration number information in to the receiving device R4. The receiving device R4 can receive the iteration number information in by the communication control unit 30. The communication control unit 30 of the receiving device R4 and the end condition_input 3 5 c of the decoder 85 are connected by the electric wiring 22, and the communication control unit 30 can supply the end condition input 埠35c of the decoder 85 to the slave terminal device 92. The number of iterations received is In. In addition, the repeat completion condition setting unit 120 of the terminal device 92 may automatically generate the iteration number information In by using a predetermined algorithm, or may function as an input interface for inputting the number of times of repetition information In from the user. . The number of iterations can be adjusted regardless of the situation, and the communication quality, waiting time, or power consumption can be adjusted according to needs. Further, the -36-200835169 repeated termination condition setting unit 120 that automatically generates the iteration number information In using a predetermined algorithm may be located inside the receiving device R4 instead of the terminal device connected to the outside of the receiving device R4. For example, the repeating end condition setting unit 120 may be configured by a microcomputer incorporated in the receiving device R4 and a computer program for adjusting the number of iterations.

In the example of Fig. 15, the iterative completion condition setting unit 220 is included in the transmission device S5 that transmits the encoded material. In the example of Fig. 13 and Fig. 14, the receiving side (user side) of the encoded data sets the iteration number information In, but in the example of Fig. 5, the transmitting side (information distributing side) of the encoded data can be set repeatedly. The number of times information In. The transmitting device S5 transmits the information segment in which the iteration number information In has been stored in the header portion to the receiving device R5 (decoder 85) as shown in Fig. 16. The information section of Figure 16 is provided with a header section and an actual data section for storing user data 'stored in the actual data section. The iteration number information I η included in the header section indicates the number of iterations when the coded data of the actual data section of the information section is decoded. Further, in the case of using the information segment of Fig. 16, the repeated termination condition transmitted from the transmitting device S5 is transmitted integrally with the encoded material, but the repeated termination condition and the encoded material can be separately transmitted. Further, the repeating end condition may be transmitted not by the transmitting means for transmitting the encoded material but by a transmitting means (e.g., a means for specifically setting the repeating end condition) different from the transmitting means S 5 for transmitting the encoded data. In addition, in the case of not transmitting the encoded data and the repeated termination condition as a piece of information as in the information section of FIG. 16, the case of separately transmitting the funds 37-200835169 includes the transmission of the repeated termination condition. The information (information segment), in place of the encoded material, and the information containing the encoded material that is specifically applicable to the repeated end condition are preferred. By transmitting the information of the coded material for specifying the application of the repeated end condition to the decoder 85 together, the iterative end condition can be arbitrarily adjusted for each coded material.

Further, in this embodiment, the repeated termination condition is stored in the header portion of the information segment of the i-th diagram, but may be the actual data portion. For example, when the repeated termination condition is specified from the application software side, the repeated termination condition is inserted into the user data section of the IP (Internet Protocol) layer or higher. The receiving apparatus R5 shown in Fig. 15 is provided with a repeating end condition extracting unit 50 which extracts the number-of-reverse times information In from the information section when receiving the information section shown in Fig. 16. The iterative end condition extracting unit 50 extracts the header portion from the information segment of the digital signal converted from the analog/digital conversion circuit 4b, and obtains the iteration number information In in the header portion. The iterative end condition extracting unit 50 outputs the iteration number information In to the decoder 85. The end condition input 埠3 5c of the iterative completion condition extracting unit 50 and the decoder 85 is connected by the electric wiring 23, and the repetitive number information In, which is output from the iteration end condition extracting unit 50, is supplied to the end condition input 埠35〇. In the example of Fig. 5, since the number of repetitions can be adjusted from the side of the transmission device S5 of the transmitter of the information, the communication quality that can be obtained by the user can be adjusted as needed, and the reception device can be adjusted (the user side) Waiting time or power consumption on the R5 side of the communication device. Further, the transmission device S 5 side of the information transmitter can control the quality of the content (image, sound, etc.) to be transmitted by adjusting the number of repetitions. For example, 'the case where the quality of the image transmitted from the transfer device is different' is generally prepared in advance for high-quality (high-quality) images and low-quality (low-quality) images, and the transfer device transmits any of the images. On the other hand, in the present embodiment, the transmitting apparatus S5 can transmit the same video (encoded material) with high quality or by low quality by adjusting the number of repetitions. Further, since the number of repetitions is easily changed in various ways, the communication quality can be adjusted for each user. In addition, 'communication quality can be adapted to other conditions.

Hereinafter, details of the transport device S 5 as described above will be described. Figure 17 shows the distribution model of the content. This distribution model consists of the following components: Users A and B receive content materials such as images and sounds (: 1, 02, 01, 02; content providers (:, 0, provide content; and communication) A carrier provides a communication service for transmitting content to a user.

In the delivery model of Fig. 17, the communication company has a transmitting device S5, which can encode the transmitted content data and transmit it to the user's receiving device (portable terminal, etc.) R5. Further, the communication device R5 on the user side can request the transmission of the desired content from the transmission device S5 of the communication company and receive the encoded material of the content. Here, the transmission device S5 is constituted by a communication server having the following functions, a transmission function 'encoding and transmitting the content; a transmission function, adjusting the number of repetitions of the decoding operation at the decoder 85, and to the user Connected to -39- 200835169 Receiver R5 (Decoder 85) transmits. The transmitting device S5 has a computer on which a computer program for determining the number of iterations of the decoding operation at the decoder 85 is installed. The eighth embodiment shows the work of the transfer device S5 realized by a computer program or the like. The transfer device S5 is provided with a repeat completion condition setting unit 2200. Further, in the present embodiment, at least the repeating condition setting unit 220 and the transmission information generating unit 250 which will be described later are functions realized by a computer program.

The iterative end condition setting unit 220 refers to the communication quality related database DB 1, and determines the number of times of repetition as a condition for repeating the decoding operation of the encoded data transmitted to the user. The communication quality related database DB 1 is constructed, for example, as shown in Fig. 19. This database DB 1 has information about the communication quality (maximum number of repetitions) DB1 - 1 set between the communication company and the content provider, and information DB 1 about the communication quality set between the user and the content provider. 2. Information about the communication quality set by the user-communication company DB 1 - 3, etc. The information DB 1 - 1 between the content companies of the communication company registers the maximum number of repetitions for each content material C1, C2, D1, and D2 of the content companies C and D. For example, the maximum number of repetitions is set to five times for the content material c1, and the maximum number of repetitions for each of the content data C2, D1, and D2 is set to three, ten, and two times. The maximum number of repetitions indicates the upper limit of the number of repetitions that can be set by each user, and each user can set the number of repetitions up to the maximum number of repetitions. -40- 200835169 The more repetitions, the more content that can be delivered with high quality. If the number of repetitions is at most, it means that the content can only be transmitted with low quality.

Also, the maximum number of iterations can be set instead of the maximum number of iterations, or together with the maximum number of iterations. The minimum number of repetitions indicates the lower limit of the number of repetitions that can be set by each user, and each user can set the number of repetitions of the minimum number of repetitions or more as the number of repetitions. The more the minimum number of repetitions means the content delivered with high quality, and the least the number of repetitions, the content that can be transmitted even with low quality. In this way, the information DB1-1 between the communication company and the content business mainly indicates the information on the range of quality that can be obtained for each content. The information DB 1-2 between the user and the content business user registers information on the quality of the content that the user accepts the delivery. For example, the quality of the content that the user A receives from the content provider C is set to "low", and the quality of the content that the user B receives from the content provider C is set to "high". In this case, even if the users A and B φ receive the distribution of the same content data C 1 and C 2 , the number of repetitions is set to be small for the user A, and the quality (communication quality) of the content is lowered. On the other hand, for the user B, the number of repetitions is set to be 'and the quality of the content (communication quality) is high. In the information D B 1 - 3 between the user and the communication company, information about the quality of the communication service accepted by the user from the communication company is registered. For example, the communication service of the user A is set to "the quality of the communication service of the user B is set to "high". In this case, even if the user-41-200835169 A, B accepts the distribution of the inner valley of the question, the number of repetitions is set to be small for the user a, and the communication quality becomes relatively low, on the other hand, User B, the number of repetitions is set to be large, and the communication quality is high. The iteration completion condition setting unit 220 refers to one of the communication quality related database DB1 or a plurality of information DBs 1-1 to DB _3, and based on the information, determines the communication quality when the content is transmitted to each user, and appropriately determines the response. The number of repetitions of this communication quality.

According to the information of the database DB 1, the number of repetitions is actually set, and these conditions can be considered and appropriately determined depending on the charging system of the content company and the communication company or the contractual conditions of the user. Specifically, when the user A downloads the content C1 of the content provider C, the maximum number of repetitions of the content C 1 is five times, but the user A and the content business 0 only sign a low-quality contract, and the communication is The communication quality of the company's contract is also "medium", so the communication quality is low. Therefore, the iteration completion condition setting unit 220 can set the number of repetitions to "2" within the range of the maximum number of repetitions = 5 times, so as to become a slightly lower communication quality. In addition, when the user B downloads the content C1 of the content company C, the user B and the content company C sign a high-quality contract, and the communication quality contracted with the communication company is "high", so the user B is repeatedly ended. The condition setting unit 220 can set the number of repetitions to "5" within the range of the maximum number of repetitions of the content C1 = 5 times, so as to become the optimum communication quality. The transmission device S5 is further provided with a transmission information generating unit 250. The transmission information generating unit 250 generates the transmission information segment shown in FIG. -42-200835169, that is, the 'transmission information generating unit 250 generates a header portion including the number-of-repetitions information in which is set by the iterative completion condition setting unit 220, and has the header portion and the content transmitted as the encoded material. The actual data department is combined to generate a transmission information segment. The transmission unit 61 of the transmission device S5 transmits the generated information segment to the communication device R5 on the user side. Figure 20 is a flow chart showing the steps of content distribution.

Referring to Fig. 20, when the transmission device S 5 of the communication company receives the download request from the communication device R5 of the user A (step S20 1 ), the communication quality related database DB1 is referred to (step S202), and the communication quality is determined (step). 32〇3). Next, the transmission device S 5 determines the number-of-repetition times information In in accordance with the communication quality (step S204), and generates the information segment header portion in which the iteration number information In has been stored (step S205). Then, the transmitting device S5 combines the header portion with the actual data portion including the encoded material, generates an information segment (step S206), and transmits it to the communication device R5 of the user A (step S207). The communication device 115 of the user A extracts the iteration number information In included in the header portion of the information segment, and repeats the decoding operation in response to the number of times In to obtain the content of the predetermined quality. Fig. 21 shows another example of the communication quality related database D B 1 . Referring to Fig. 21, information about the communication company-content business DB1-1, regardless of the content, is set by the content provider to the maximum number of iterations. In this case, the content quality that can be obtained by the user can be determined by each content provider who provides the content desired by the user. -43- 200835169 [Modification of the third embodiment] It is also possible to use a part of the information to determine the communication quality without using all of the information shown in Fig. 19 or Fig. 2 to determine the communication quality or the maximum number of repetitions. Or up to the number of iterations. In other words, when determining the communication quality that the user can obtain, the content quality can be determined by each content provider who provides the content desired by the user, and the communication quality can be determined by each content desired by the user, and the communication quality can be determined by each user. .

Further, in the above description, although the content data is exemplified as the encoded material, the content of the data is not particularly limited, and for example, other communication materials such as video data and video data required for a videophone may be used. Further, the type of information stored in the communication quality related database D B 1 is not limited to the above-described form, and any information is useful as long as it is useful for determining the number of repetitions. Further, the repeating completion condition setting unit 2 2 0 of the transmitting device S 5 may assign a priority order to the user in addition to the information of the database d B 1 shown in Fig. 9 and give priority to this. The information of the database DB 1 is integrated, and then the number of iterations is determined. [Fourth Embodiment] The fourth embodiment relates to a decoder that performs error correction decoding by the sum-pr〇duci decoding method. Fig. 22 is a view showing an example of the configuration of a system using the decoding apparatus according to the present embodiment. The difference between the communication system of Fig. 2 and the communication system of the second embodiment of the second embodiment is as follows. The modulator 72 of the transmitting device S6 is based on a multi-turn QAM (Quadrature 200835169

The Amplitude Modulation method modulates the symbol from the (Κ + Μ) ( = Ν) bit of the encoder 1 and outputs it to the communication line 3. The modulator 72 converts the serially input transmission data into parallel data of (2xL) bits, and maps to the constellation points of the signal line graph of the multi-turn QAM, and then outputs the modulated signal modulated by the orthogonal carrier. . Therefore, the modulation signal is modulated into L bits for each of the I channel component and the Q channel component.

The demodulator 74 of the receiving device R6 performs quadrature detection on the received modulated signal (hereinafter also referred to as a received signal), and combines the I channel component (in-phase component) x1 of the received signal with the channel component of the received signal (positive channel component) The component 1) is used as the coded data (demodulation symbol) and output to the decoder 75. The decoder 75 of the receiving device R6 inputs the I channel component x1 and the Q channel component xQ supplied from the demodulator 74, and The sum-product decoding method applies the LDPC parity check array to restore the original K bit information. Fig. 23 is a schematic diagram showing the structure of the decoder 75 of the embodiment of the present invention. The different phase points of the decoder 5 according to the first embodiment of the fourth embodiment are as follows. The log likelihood ratio calculation unit 76 calculates the approximate logarithmic probability ratio λ η of the coded data x1 and xQ, and supplies it to the decoding processing unit 7 and the determination. The details of this processing will be described later. The decoding processing unit 7 performs error correction decoding of the encoded data χΐ and XQ in units of the code length 根据 based on the approximate log likelihood ratio λ η. The determining unit 8 1 uses the column processing unit 9 Outside of production The partial logarithm ratio a mn and the approximate logarithmic probability ratio λ η, -45- 200835169 from the log likelihood ratio calculating unit 7 generate a speculative word, and check whether the speculative word constitutes a code word. (Syndrome) does not become "〇", and the processing is repeated. If the number of repetitions of this processing reaches a predetermined level, the speculative word at that time is used as the decoded data and output. The 24th figure is not the determination unit. Flowchart of the processing operation of 8.1. The processing operation of the determination unit 81 will be described below with reference to Fig. 24 .

First, as the initial action, the initial setting of the number of loops and the logarithmic 事 log ratio /3 m η is performed. This loop number indicates the number of calculations of the loop using the logarithmic logarithm ratio Θ mn generated in the row processing unit 1 and then generating the external logarithm ratio a mn in the column processing unit 9. In this loop number, the maximum 値 is predetermined. The preceding logarithm Θ mn initial is set to "0" (step SP1). The receiver's logarithm likelihood ratio calculation unit 76 and column processing unit 9 generate an approximate log likelihood ratio λ η and an external 値 log ratio a mn based on the series of received demodulation payouts (coded data XI, XQ). And supplied to the determination unit 81 (step SP2). The determining unit 8 1 calculates λ η + Σ a m ' η based on the approximate logarithmic probability ratio λ η and the external 値 log ratio a m η of these supplies, and calculates the estimated received word Qn (step SP3). Here, the sum is performed on the element m ′ of the partial set B(n). The sign of the 値Qn calculated in the step SP3 is determined (step SP4), and the speculative code CDn is generated again (step SP5). In the positive/negative determination of the symbol, for example, when the estimated received word Qn is expressed by 2's complement, the positive and negative decisions can be made by looking at the bit 値 of the uppermost bit. -46- 200835169 When all the speculative codes CDn are generated and the speculative code words (CD1, ..., CDN) are generated, 'the parity check is performed next (step SP6). In this parity check, use the front of the inspection array Η's transposed array H1 to calculate (CD1,...,CDN) · ΗΆ. With this calculation, if the generated failure system is generated, the speculative code words (CD1, ..., CDN) are used as decoded data and output (step SP9).

On the other hand, in the case where the generated failure system differs from 0, it is determined whether or not the number of loops is the maximum 値 (step SP7). That is, the number of occurrences of the speculative codeword is counted, and when the number of generations reaches a predetermined maximum number, the calculation of the larger code is stopped, and the speculative codeword generated now is used as the codeword and output (step SP9). . Therefore, it is necessary to prevent unnecessary calculation processing time for the symbol of the noise which is poor in convergence. When it is determined in step SP7 that the number of loops has not reached the maximum value, the number of loops is incremented by one (step SP8), and the processing by the column processing unit 9 and the line processing unit 10 is started, and the processing from step SP2 is executed again. Next, the details of the processing by the logarithmic probability ratio calculation unit 76 will be described. (Logarithmic Possibility Ratio of Conventional Mode 1) First, the logarithmic probability ratio of the conventional mode 1 will be described. Assume that the transmission line is an additive white noise line. An example of the case where the received signal is modulated by 16 6AM. Figure 25 shows the constellation diagram of 16QAM. In this case, using the I channel component 接收 of the received signal, the first log likelihood ratio λ Γ is expressed by the following theoretical formula. -47- ...(7) 200835169

Xt =Iog^!^AV) exp a (x bu u0)2 2σ2 V) exp a (xl - ul) 2σ2

k2N ' represents a set of constellation points of the ith position of the I buccal component xI, which is "0", by (〇, 氺, *, *). Also, βΐε(ι, *, *, *)

^ A set of constellation points of the first bit "1" of the channel component xl. The equation (7) shows the logarithm of the probability of the first bit system "0" of the I channel component x1 of the received signal and the probability of the system "1". σ 2 is the divergence of the noise component contained in the I channel component XI of the received signal. Further, the I channel component x1' using the received signal indicates the second log likelihood ratio λ 2° in the following theoretical formula.

Λ20 = log Σ exP u〇g(*,〇,V)Σ exP ld€(*,l,") two (xl - uO)2 ~2σ2~ two (xl - ul)~2? 2\ ...(8) Here, #〇E(0, 〇, *, *) indicates that the first bit of the I channel component 系 is “0”, and the second bit of the I channel component x1 is a set of constellation points of “〇”. Further, #le(0, 1, *, *) indicates that the first bit of the I buccal component is "〇", and the second bit of the I channel component xl is "-" -48-200835169 constellation point The collection. Further, μ〇Ε(1, 〇, *, *) indicates the first bit system "1" of the I channel component ,, and the second bit of the I channel component XI is a set of constellation points of the "〇". Further, "1 has (1, 1, *, *) indicates the first bit of the I channel component XI is "1", and the second bit of the I channel component XI is a set of constellation points of "1". The equation (8) indicates the logarithm of the probability of the second bit system "〇" of the I channel component xI of the received signal and the probability of the "1".

Similarly, using the Q channel component XQ of the received signal, the third log likelihood ratio λ 3 is expressed by the following theoretical formula. .

Σ exPA30=l〇g^^!L_ Σ exP - (xQ-uO)2 one (xQ - ul) 2σ2 2\ ...(9)

Here, //〇E(*,*,〇,*) indicates a set of constellation points of the first bit system "〇" of the Q channel component (10). Further, *, 1, and *) indicate a set of constellation points of the first bit system "1" of the Q channel component XQ. The equation (9) indicates the logarithm of the probability of the first bit system "〇" of the Q channel component xQ of the received signal and the probability of the "1". σ 2 is the divergence of the noise component included in the Q channel component XQ of the received signal. Further, using the Q channel component XQ of the received signal, the fourth log likelihood ratio λ 4 is expressed by the following equation. . -49- 200835169 A4°

A〇g-4〇): XP ~(xQ a u0)2 2σ2

uJ^(l)eXP - (xQ - 111)2 2σ2 ...(10)

Here, //Oe (*, *, 〇, 0) indicates that the k-th order of the Q channel component xQ is "0", and the second bit of the q-channel component is the set HiE of the constellation points of "〇" (*, *, 〇, υ indicates that the first channel of the Q channel component is "0", and the second bit of the Q channel component xQ is the set of constellation points of "work". Also, μ〇[(* , *, "〇) The table $ q channel becomes the collection of the constellation points of the xQ brother If乂兀 is "1", and the second bit of the q channel component is "0". Also, (*, *, i And 丨) indicates that the first bit of the q channel component xQ is "丨", and the second bit of the q channel component xq is a set of constellation points of "1". The equation (10) indicates the Q channel component of the received signal. The logarithm of the probability of the second "0" of xQ and the probability of "1". (Approximate logarithmic probability ratio) Next, the approximate logarithmic probability ratio of the embodiment of the present invention will be described. In the embodiment, an approximate logarithmic probability ratio as shown below is used. The I channel component XI of the received signal is used to approximate the I channel component by an approximate expression approximating the theoretical expression shown below. The probability ratio λ I(i). -50- ...(11) 200835169 λ I(i) = X Kj (xl) X {Xl - Ci (xl)} σ (i = 1~L) Here, the l system The number of modulation bits L of each of the i channel component x1 and the Q channel component xQ of the received signal. In the case where the received signal is modulated by 16QAM

In the case of L system 2, the case of modulation by 64QAM is L system 3, the case of modulation by 256QAM is L system 4, the case of modulation by 1024QAM is L system 5, and the case of modulation by 4096QAM is L system 6. Generally, in the case of modulation at 22χ4AM, the number of modulation bits of the I channel component is L. Further, Ki(xl) and CiUI) are constants of the 値 of the I channel component x1 and the coordinates of the constellation point and the number of modulation bits L. More specifically, the approximate expression (1 1) is such that the logarithmic probability of the i-th bit of the I channel component x1 of the received signal is expanded to one time in the vicinity of the decision 値Ci(xl) Φ by the theoretical expression. Formula. It is determined that 値Ci(xl) is the 値 of the theoretical 値 becomes x1 of "0". In other words, in this XI, the probability that the i-th bit of the I channel component x1 of the received signal is "1" and the probability of being "〇" become equal. Therefore, the closer the approximate expression (1 1) is to the decision 値Ci(xl), the more accurately the theoretical formula is approximated. Similarly, the Q channel component XQ of the received signal is used to represent an approximate logarithm likelihood ratio λ Q(i) of the Q channel component to an approximate expression approximating the theoretical expression as shown below. -51- ... (12) 200835169 AQ(i) = ll X KiCxQ) X {xQ Ci (xQ)} (i = 1 ~ L) In this ' KUxQ ) and Ci (xQ) and Q channel component xQ The coordinates of the constellation points and the constants of the number of modulation bits L are dependent on each other.

More specifically, the approximate expression (12) is a formula in which the logarithmic probability of the i-th bit of the q-channel component xQ of the received signal is expanded to one time in the vicinity of the determination 値Ci(xQ). child. It is determined that 値Ci(xQ) is the x of the theoretical formula 値 becomes "〇". In other words, in this case of x Q , the probability that the i-th bit of the Q channel component xQ of the received signal is "1" and the probability of being "0" become equal. Therefore, the closer the approximate expression (1 2) is to the decision 値Ci(xQ), the more the theoretical formula is approximated with high precision. Using the approximate log likelihood ratio of the I channel component to the approximate logarithmic probability ratio λ Q (i ) of the λ I (i) and Q channel components, the following equation represents the approximate log likelihood ratio λ i . : AI(i) (i = 1~L)

Ai: AQ(i - L) (i = L +1~2 x L) In addition, in the case of a constellation point-specific configuration, Ki(xl), Ci(xl), Ki(xQ), and Ci(xQ) Can be expressed in a simple formula. - 52- 200835169 Figure 26 is a graph showing the i channel components and Q channel components at a particular constellation point at 25 6Q AM. Referring to Fig. 26, the coordinates of the I channel component and the Q channel component of the constellation point are a 7, 5, a 3, - 1, +1, +3, +5, +7.

Further, although not shown, in the case of 4QAM, the coordinates of the I channel component and the Q channel component of the constellation point are set to 1, 1 and +1, and in the case of 16Q AM, the I channel component and the Q channel of the constellation point are used. The coordinates of the components are set to -3, -1, +1, +3. In the case of 1024QAM, the coordinates of the I channel component and the Q channel component of the constellation point are set to -3, -29, ... - 3, — 1, +1, +3, ..., +29, +31. In the case of 4096QAM, the coordinates of the I channel component and the Q channel component of the constellation point are set to one 63, —61,...—3, —1 , +1, +3, ..., +61, +63. Generally, when the number of modulation bits of each of the channel component and the Q channel component is L, the coordinate of the constellation point of each channel component is one (2 " - 1) or more, and the odd number below (2 " - 1) . In the case of this particular configuration, Ki(xl) and CiUI) are expressed by the following equations. Time & (late) = +1, XI < CM · hour K / x I): -1 - (14) , (2USL) -53- ... (15) 200835169

Cr(xI) = 〇4 (Xl 卜 c w 〇d) + A (xl) X 2α, (2^i^L) Similarly, Ki(xQ) and Ci(xQ) are expressed by the following formula.

KJxQ): -1, Ki(xQ) = +l, xQ<Cmi, K/xQh-l (2^i^L) (16) C1(xQ) = 〇^ C^xQ) = Cm(xQ) + K^xQ) x 2(W+1) (2 ^ i ^ L) (17) Figure 27(a) shows the i-th ratio λ Γ and the first approximate log probability in the case of 16QAM A graph than λ 1.篸照弟27(a), the curve al shows the logarithmic probability ratio λ 1 in a conventional manner. The curve a2 indicates a log-like probability ratio λ 1 in the above manner. The slope of the line a2 is the same as the differential coefficient of the curve plane (XI = 0). That is, the approximate logarithm likelihood is judged 値(xl = 0), and the log likelihood ratio is λ丨. The higher the accuracy, the 27th (b) diagram shows that the second logarithm in the case of 16QAM may be calculated by the calculation of the nearest 11 which is closer to the determination than λ 1 . The logarithm may be -54- 200835169 Sex ratio λ 2° and the second approximate log likelihood ratio λ 2 plot. Referring to Fig. 27(b), the curves bl and cl indicate the logarithmic probability ratio λ 2° calculated in the conventional manner 1. The straight lines b2 and c2 indicate the approximate logarithmic probability ratio λ 2 calculated by the above method. The slope of the line b2 is the same as the differential coefficient of the curve b 1 at the decision surface (XI = - 2). The slope of the line c 2 is the same as the differential coefficient of the curve c1 at the decision surface UI = 2). That is, the closer to the logarithm likelihood ratio λ 2 is closer to the decision 値 (xl = 2 or -2), and the log likelihood is more accurately approximated than λ 2°.

Next, the structure of the logarithmic probability ratio calculating unit 76 for calculating the approximate logarithmic probability ratio will be described. Fig. 28 is a structural diagram showing the logarithmic probability ratio calculating unit 76 of the fourth embodiment. The logarithm likelihood ratio calculation unit 76 is configured to have the arrangement of the specific constellation points described above, that is, the case where the number of modulation bits of the I channel component and the Q channel component is L. A device that calculates an approximate logarithmic probability ratio is obtained by using a coordinate system of one of the channel components (2 " The log likelihood ratio calculation unit 76 first derives an approximate log likelihood ratio λ I based on the I channel component 接收 of the received signal, and then derives an approximate log likelihood ratio λ Q based on the Q channel component xQ of the received signal. Referring to Fig. 28, the logarithmic probability ratio calculating unit 76 includes an approximated constant determining unit 43, an addition and subtraction unit 41, a constant memory unit 44, and a multiplication unit 42. -55-200835169 The approximation constant determination unit 43 calculates the 常数 of the constants KiUI), Ci(xl), Ki(xQ), and Ci(xQ) based on the equations (14) to (17). The addition and subtraction unit 41 subtracts the constant Ci(x1) from the I channel component x1 of the received signal. Further, the addition and subtraction unit 41 subtracts the constant Ci(xQ) from the Q channel component xQ of the received signal. The constant memory unit 44 memorizes the 常数 of a constant (a 2/σ 2). Here, σ 2 assumes that the transmission line is the divergence of the noise component contained in each of the I channel component x1 and the Q channel component xQ of the received signal when the transmission line is an additive white noise line.

The multiplication unit 42 calculates the product of the calculation result of the addition and subtraction unit 41, the constant Ki(xl) or Ki(xQ), and the constant (a 2/σ 2) in the constant memory unit 44, and outputs an approximate log likelihood ratio λ I , λ Q. Fig. 29 is a flow chart showing the procedure of the calculation process of the logarithmic probability ratio of the I channel component of the received signal in the fourth embodiment. Referring to Fig. 29, first, the approximation constant determining unit 43 sets the control variable i to 1 (step S1 0 1). Next, the approximation constant determination unit 43 sets the constant Ki(x1) to one, and sets the constant Ci(x1) to 0 (step S102). Then, the addition and subtraction unit 41 subtracts the constant CiUI) from the I channel component 接收 of the received signal. Further, the multiplication unit 42 calculates the product of the subtraction result, the constant KiUI) and the constant (a 2/σ 2) in the constant memory unit 44, and uses the result as the approximation of the first bit of the I channel component x1 of the received signal. The logarithmic probability ratio is outputted as λ 1 (1) (step S103). Then, the approximation constant determining unit 43 increases the control variable i by only one (step-56-200835169 step S104, when the approximation constant determining unit 43 is below the control system L of the variable i (YES in step S105), The approximate log likelihood ratio λ I(i) of the first bit is derived by the following processing. Here, L is the number of modulation bits of the I channel component.

The approximation constant determination unit 43 sets the constant Ki(xl) to +1 when the constant Ci-iUI) 算出 calculated by the enthalpy of the I channel component x1 of the received signal is equal to or greater than the previous time (YES in step S106). The constant calculated by the last time has been -Kxl) 値 and 2 i + 1), and the constant Ci 〇 cI) is set as the result of the addition (step S 1 0 7). On the other hand, when the 式 system of the I channel component x1 of the received signal is smaller than the constant Ci-Jxl) 前 calculated by the previous time (NO in step S106), the approximate constant constant determining unit 43 sets the constant Ki(xl) to -1, 2 i + 1 is subtracted from the last calculated constant Ci - ! (χΙ), and the constant Ci (xl) is set as the result of the subtraction (step S108). Next, the addition and subtraction unit 41 subtracts the constant Ci (U) from the I channel component x1 of the received signal. Further, the multiplication unit 42 calculates the product of the subtraction result, the constant KiUI), and the constant (-2/σ 2) in the constant memory unit 44, and uses the result as the i-th bit of the I channel component x1 of the received signal. The log likelihood ratio is λ I(i) and is output (step S109). Then, the processing from step S104 is repeated, and the approximate logarithmic probability ratios λ 1(1) to λ I(L) are calculated and output as approximate log likelihood ratios λ 1 to λ L . -57- 200835169 Similarly, the approximate log likelihood ratio λ Q(l) λλ(L) is calculated from the Q channel component xQ of the received signal, and is output as an approximate log likelihood ratio λ L+1 〜2L. In this way, 2L approximate log likelihood ratios λ 1 λ λ 2L are obtained from one received signal. Then, in the decoding processing unit 7 of the subsequent stage, the error correction ratio is performed in units of the code length 每 for each log probability ratio λ of the code length 得到. (Specific example)

Fig. 30 is a view for explaining setting examples of the constants Ki U1) and Ci (xl). Referring to Fig. 30, the received signal is modulated by 64QAM, and the I channel component xl 接收 of the received signal is set to "-5.5". Since the received signal is modulated by 64Q AM, the number of modulation bits L of the I channel component is three. First, set Ki (xl)= — 1, and Ci (xl) = 0. Then, since xl(=—5·5)値 is smaller than Ci(xl)(= 0), set K2 (xl)= — 1, and set C2UI)= CiUI) — 2 (L- 2+" =0 — 2 2= — 4. Then, since xl(=- 5·5)値 is less than C2(xl)(= - 4), set K3(xl)= — 1, and set C3(xl)= C2( Xl) — 2(L-3 + 1)=− 4-2^- 6. (Calculation) Fig. 3(a) shows the reception of the conventional mode 1 and the above-described embodiment of the present invention. A comparison of the log likelihood of the I channel component xl of the signal compared to the calculated amount.

Referring to Fig. 31(a), the addition and subtraction are in the conventional mode 1 system {L - 58 - 200835169 χ 4 χ 2 ο ), and the embodiment of the present invention is UxL - 1}. Regarding the multiplication and division, the conventional method 1 is {Lx6x2, and the mode according to the embodiment of the present invention is 丨3xL-1}. Regarding the index calculation, the conventional method 1 is {Lx2x2, and the mode in the embodiment of the present invention is 0. Regarding the logarithmic calculation, there are L in the conventional method 1 and 0 in the embodiment of the present invention. Further, regarding the IF description, there are 0 in the conventional method 1 and {L - 1 } in the embodiment of the present invention.

When the calculation amount of one calculation or IF narration processing is set to ^1", the total calculation amount of the conventional mode 1 is {Lx (12x2 +1)}, and the total calculation amount of the mode of the embodiment of the present invention. System { 6xL — 3 }. As described above, in the embodiment of the present invention, the amount of calculation is smaller than that of the conventional method 1. Further, in the embodiment of the present invention, since the index calculation and the logarithmic calculation which take too much calculation time are not required, the calculation time can be greatly shortened compared to the conventional method 1. Fig. 3(b) is a diagram showing an example of the relationship between the number of modulation bits L and the total calculation amount of the 31st (a) figure. Referring to Fig. 31(b), in the case where the number of modulation bits L is "2", the conventional calculation amount is "50", and the embodiment of the present invention is "9". Further, in the case where the number of modulation bits L is "6", the conventional calculation amount is "2430", and the embodiment of the present invention is "33". Thus, the larger the number of modulation bits L, the more significant the effect of reducing the amount of calculation by the embodiment of the present invention. -59-200835169 (Simulation result) Fig. 3 is a view showing simulation results of the conventional mode 1 and the embodiment of the present invention. Referring to Fig. 32, each simulation uses 10000 sets of coded data. Each coded data sets the code length N to 96, the information bit number K to 48, and the parity bit number to 48. The modulation method uses 16〇8”, and the error correction decoding method uses sum-product decoding.

The curve d 1 represents the bit error rate of the conventional mode 1 in the case of no error correction. The curve d2 indicates the bit error rate of the embodiment of the present invention in the case where no error is corrected. The curve d3 indicates the bit error rate of the conventional mode 1 in the case of the error correction by the sum-product decoding method. The curve d4 indicates the bit error rate in the embodiment of the present invention in the case where the error correction by the sum-product decoding method is performed. As shown in Fig. 32, the curve d1 and the curve d2 are similar to the extent that there is no difference in the surface, and the curve d3 and the curve d4 are similar or even indistinguishable from the surface. Therefore, according to the result of the simulation, the mode showing the embodiment of the present invention has the same performance as the conventional mode 1. As described above, according to the present embodiment, since the approximate 値 of the logarithmic probability ratio is calculated by a simple calculation formula, it is possible to perform the error with the same precision as the conventional method 1 and with less calculation amount than the conventional method 1. Corrected decoding. In particular, in the case where the reception signal is in a specific configuration as shown in Fig. 26, the constants Ki and Ci can be calculated in a simple manner. Further, in the present embodiment, since the error correction decoding is performed based on the sum-product decoding method, it is possible to perform -60-200835169 high-accuracy error correction. [Fifth Embodiment] The fifth embodiment relates to a decoder which is intended to reduce the processing load of decoding and to perform error correction decoding by a decoding method of a simplified column process or a row process.

In this simplified erroneous correction decoding, the logarithmic probability is greater than the use of the 信号 or received signal of the received signal to become a constant multiple (this constant is independent of the dispersion of the noise components contained in the received signal). As a representative decoding method for simplifying the column processing, instead of calculating the Gallager function of the equation (3), there is a min-sum decoding method (Non-Patent Document 3) for obtaining a minimum 値 which excludes itself (Non-Patent Document 3), (5 — Min decoding method (Sakai et al., "Easy Decoding Method of LDPC Code and Its Discrete Density Development Method", IEICE Technical Report, RCS2005 — 42, (2005 — 7), ρρ·13 — 18), A — Min decoding method (Jones C., E. ValT es, M. S mi th, an d J.Villasenor.13 — 16 Oct.2003). u Approximate — Min * Constraint Node Updating for L dp c code Decoding ” ,Military Communications

Conference, 200 3, MILCOM 2003·ΙΕΕΕ·), and λ — min decoding method (Guilloud F., Sept.l — 5, 2003b. “ λ — min Decoding

Algorithm of Regular and Irregular LDPC Codes. ", 3rd

International Symposium on Turbo Codes & related topics.) As another decoding method for simplifying column processing, there is a method (Japanese Patent Application No. 2006-1 62646) which performs a logical operation of a bit unit and approximates -61-200835169 to calculate a minimum 除外 which excludes itself.

Further, as a representative decoding method for simplifying line processing, there is an APP decoding method (MarcP.C. Fossorier, "Redundant Complexity Iterative Decoding of Low - Desity Parity Check Codes Based on Brief Propagation", IEEE Trans. ON

Communications, Vol. 47, No. 5, May 1 999, ρρ·673 — 680), and a method of using the virtual logarithmic probability ratio of the improved APP decoding method (Japanese Patent Application No. 2006 - 1 6493 5). In the method of using the virtual log likelihood ratio, the results of the column processing of each row block are all added together, and then the addition result is added to the virtual log likelihood ratio of the previous time to sequentially update the virtual log likelihood ratio. Moreover, the above simplified methods can also be combined and used. Hereinafter, the m i η - s U m decoding method of the representative decoding method among the simplified decoding methods as described above will be described as an example. In the present embodiment, the column processing unit and the logarithmic possibility ratio calculating unit are different from the fourth embodiment, and the other systems are the same as those in the fourth embodiment. In the error correction decoding by the min-sum decoding method, the column processing unit 9 performs calculation processing in accordance with the equation (18) instead of the equation (1). f \ Π S (four) person, +An, 1 ... (10): initial 値 is ο In the case of using min-sum decoding method, the approximate log likelihood ratio of the I channel component 接收 of the received signal is λ I(i) is the following formula To replace the formula -62- 200835169 (11). (i: 1 to L) Similarly, the approximate logarithm of the Q channel component Xq of the received signal may be expressed as φ Q(i) instead of the following equation (12). ...(20) AQ(i) = -f XK|(xQ) χ |xQ - Cj (xQ)} (i = lL) In equations (19) and (20), f is not and the received signal A positive number of the I channel component xl and the Q channel component XQ.

Further, in the equations (13) to (17), the min-sum decoding method is also used in the same manner. Next, the structure of the logarithmic probability ratio calculating unit 51 which calculates the approximate logarithmic probability ratio will be described. Fig. 3 is a structural diagram showing the logarithmic probability ratio calculating unit 5 1 of the fifth embodiment. This logarithm likelihood ratio calculation unit 5 1 is the same as the fourth embodiment, and the received modulation signal has the above-described arrangement of the specific constellation points - in the case of the I channel component and the Q channel. In the case where the number of modulation bits of each component is 1, the approximate logarithmic probability ratio is calculated when the coordinate system of each channel component has a coordinate system of one (2b - 1) or more and an odd number of (2b - 1) or less. Device. Further, the logarithmic probability ratio calculating unit 5 1 is similar to the fourth embodiment. First, the approximate log likelihood ratio λ I is derived from the I channel component XI of the received signal, and then the approximation is derived based on the Q channel component XQ of the received signal. The log likelihood is greater than λ Q.

Referring to Fig. 3, the logarithmic probability ratio calculating unit 5 1 includes an approximate type constant determining unit 43, an addition and subtraction unit 41, a multiplication unit 52, and a constant memory unit 54. The approximation constant determining unit 43 and the addition and subtraction unit 4 1 are the same as those of the fourth embodiment. The constant memory unit 54 stores the 常数 of the constant (-f). The constant f is a positive number in which the channel component x1 and the Q channel component xQ of the received signal are not dependent. The multiplication unit 52 calculates the product of the calculation result of the addition and subtraction unit 41, the constant 1 (xl) φ or Ki (xQ), and the constant (-f) in the constant memory unit 54, and outputs the approximate log likelihood ratio λ I, λ Q . . Fig. 34 is a flow chart showing the procedure of the calculation process of the approximate logarithmic probability ratio of the I channel component of the received signal in the fifth embodiment. Referring to Fig. 34, first, the approximation constant determining unit 43 sets the control variable i to 1 (step S1 0 1). Then, the approximated constant constant determining unit 43 sets the constant Ki(xI) to one, and sets the constant Ci(x1) to 0 (step Si〇2). -64- 200835169 Then, the addition and subtraction unit 4 1 subtracts the constant CiUI) from the channel component of the received signal. Further, the multiplication unit 52 calculates the product of the subtraction result, the constant KiUI), and the constant (-f) in the constant memory unit 54, and uses the result as the approximate logarithm of the first bit of the I channel component xI of the received signal. The sex ratio λ 1 (!) is output (step S 2 0 3 ). Next, the approximation constant determining unit 43 increases the control variable i by only 1 (step S104).

When the approximation constant determining unit 43 controls the variable L of the variable i or less (YES in step S105), the approximate log likelihood ratio λ I(i) of the i-th bit is derived by the following processing. Here, L is the number of modulation bits of the I channel component. When the constant constant determining unit 43 receives the constant Ci-Kxl) of the I channel component x1 of the received signal from the previous time (YES in step S106), the constant KiUI is set to +1, and then the upper limit is determined. The calculated constant G - Kxl) 一次 and 2 i + 1) are added at a time, and the constant GUI) is set as the result of the addition (step S 1 0 7). On the other hand, when the 式 system of the I channel component χΐ of the received signal is smaller than the constant Ci-i(xl) 前 calculated by the previous time (NO in step S106), the approximation constant determining unit 43 sets the constant ΚΚχΙ) It is -1, and 2 (Λ - i + 1) is subtracted from the last calculated constant Ci - ΚχΙ), and the constant C, (xl) is set as the result of the subtraction result (step S108). Next, the addition and subtraction unit 41 subtracts the constant CiUI from the I channel component xI of the received signal. Further, the multiplication unit 52 calculates the product of the subtraction result, the constant KKxI), and the constant (a f) in the constant memory unit 54, and uses the result as the i-th bit of the I channel component x1 which receives the signal of -65-200835169. The approximate log likelihood ratio is λ I(i) and is output (step S209). Then, the processing from step S104 is repeated, and the approximate logarithmic probability ratio λ 1(1) 〜; I I(L) is calculated and output as the approximate log likelihood ratio λ 1 λ λ L .

Similarly, the approximate log likelihood ratio λ Q(1) to λ Q(L) is calculated from the Q channel component xQ of the received signal, and is output as the approximate log likelihood ratio λ L+ 1 to λ 2L. In this way, 2L approximate log likelihood ratios λ 1 λ λ 2L are obtained from one received signal. In the decoding processing unit 7, for each logarithm likelihood ratio λ of the code length 得到, the error correction decoding is performed in units of the code length 。. As described above, according to the present embodiment, as in the fourth embodiment, it is possible to perform error correction decoding in the same manner as the conventional method 1 with the same accuracy as the conventional method 1, and the received signal is as described in the first embodiment. In the case of the specific arrangement of φ shown in Fig. 26, the constants Ki and Ci can be calculated in a simple manner. Further, in the present embodiment, since the error correction decoding is performed according to the min-sum decoding method, the processing of the approximate logarithmic probability ratio calculation and the error correction decoding can be simplified as compared with the s u m - p r q d u c t decoding method. [Sixth embodiment] The sixth embodiment relates to a logarithm possibility ratio calculation unit including a hardware structure capable of simultaneously calculating a plurality of approximate logarithmic probability ratios. Fig. 35 is a structural diagram showing the logarithmic probability ratio calculating unit 60-66-200835169 of the sixth embodiment. The logarithm likelihood ratio calculation unit 60 is similar to the fourth and fifth embodiments in that the received modulation signal has the arrangement of the specific constellation points described above, that is, the I channel component and the Q channel component. In the case where the modulation bit number L is 'in the case where the coordinates of the constellation points of the respective channel components are one (21^ - 1) or more, and the odd number is equal to or less than (2b - 1), the approximate logarithmic probability ratio device is calculated. . Further, the logarithmic probability ratio is similar to that of the fourth and fifth embodiments. First, the approximate log likelihood ratio λ I is derived from the I channel component xI of the received signal, and then, based on the Q channel of the received signal. The component xQ derives an approximate log likelihood ratio λ Q . This circuit outputs an approximate logarithmic probability ratio λ I, λ Q which is the absolute coefficient of the coefficient of the sum-product decoding method (― 2/ σ 2) or the coefficient of the min-sum decoding method (a f). And the symbol, but the 値 which is excluded from this coefficient is expedient as an approximate logarithm probability ratio λ.1, λ Q . When the received signal is modulated by any one of 4QAM, 16QAM, 64QAM, 256QAM, 1 024Q AM, and 409 6Q AM, the logarithm likelihood ratio calculating unit 60 can calculate the approximate logarithm as follows. Sex ratio. (In the case of 4QAM) At the input terminal II, the I channel component x1 of the received signal is input. The I channel component xl is represented by a 2-bit signal Data[6:5]. The signal Data[6:5] is expressed in 2's complement. The 2-bit signal Data[6:5] is from the uppermost first bit (bit -67-200835169 yuan 6), via the bus width adjustment bus bus 1 and the overflow prevention bus bus Bus2 The uppermost bit is sent to the logic inverse circuit NOT1 by the signal line extraction unit EX1. The 2-bit signal Data[6: 5] is sent to the absolute 値 calculation circuit via the bus bar width adjustment bus bus Bus1 and the overflow prevention bus bar Bus2.

The logic inverse circuit NOT1 changes the 2-bit signal Data[6:5] from the uppermost first bit (bit 6) to the inversion, and uses it as the first approximate log likelihood ratio λ 1 ( The symbol of 1) is output to the output terminal Ο 1 via the bus width adjustment bus bar B us 3 . The absolute 値 calculation circuit Magi calculates the absolute 値 of the 2-bit signal Data[6 : 5], and uses it as the absolute 値 of the first approximate log likelihood ratio λ 1( 1), and via the overflow prevention bus The Bus 1 5 and the busbar width adjustment busbar Bus9 are output to the output terminal 07. The first φ approximate log likelihood ratio λ 1 (1) sign output from the output terminal 01 and the first approximate log likelihood ratio λ 1 outputted from the output terminal 07 by a multiplication circuit (not shown) 1) The absolute 値 is multiplied (ie, via a circuit that adds a sign to the absolute )) and is output as an approximate log likelihood ratio λ 1( 1). Similarly, the Q channel component xQ of the received signal is input to the input terminal II, and the approximate logarithmic probability ratio λ Q(l) is output. When the decoding processing unit 7 performs error correction decoding based on the sum-pro duct decoding method, the approximate logarithmic probability ratio λ -68 - 200835169 1(1), λ Q(l) is multiplied by a multiplication circuit (not shown) ( In the case of ―2/ σ 2), the result of the multiplication is approximated to the logarithmic probability ratio (considered coefficient) and sent to the decoding processing unit 7. When the decoding processing unit 7 performs error correction decoding based on the min-sum decoding method, the approximate logarithmic probability ratio λ I (1 ) and λ Q (1) are multiplied by (-f) by a multiplication circuit (not shown). The multiplication result is approximated to the log likelihood ratio (considered coefficient) and sent to the decoding processing unit 7. (in the case of 16QAM)

At the input terminal Π, the I channel component x1 of the received signal is input. The I channel component xl is represented by a 3-bit signal Data[6:4]. The signal Data[6:4] is expressed in 2's complement. The 3-bit signal Data[6:4] is transmitted from the uppermost first bit (bit 6) via the bus width adjustment bus bus 1 and the overflow prevention bus bus 2 to the uppermost bit. Then, it is sent to the logic counter circuit NOT1 via the signal line extracting unit EX1. The 3-bit signal Data[6:4] is from the topmost second bit (bit φ element 5), and the bus bar width adjustment bus bar Bus1 and the overflow prevention bus bar Bus2 are from the topmost level. The second bit is sent to the exclusive OR circuit XOR2 via the signal line extracting unit EX2, and is sent to the logic counter circuit NOT3. The output of the logic inverse circuit NOT3 is sent to the first bit from the topmost order and the second bit from the topmost stage of the built-in bus bar BL2. The 3-bit 兀 signal D ata [ 6 : 4 ] is from the top third bit (bit 4) 'By the bus bar width adjustment bus bus 1 and the overflow prevention bus bar Bus2 from the top The third bit is sent to the third bit from the top of the built-in bus bar BL2 via the signal line extraction unit -69-200835169 EX3. The 3-bit signal Data[6:4] is sent to the absolute 値 calculation circuit M ag 1 via the bus width adjustment bus bus Bus1 and the overflow prevention bus bar Bus2 〇 the logic inverse circuit NOT1 is a 3-bit signal Data [6: 4] changes from the first bit (bit 6) of the top to the inversion, and then outputs it to the mutually exclusive logic OR circuit X0R2, and uses it as the first approximate log likelihood ratio λ. 1 (1) symbol, and through bus bar width adjustment bus Bus3 to the output terminal

〇1 output. The mutually exclusive logic OR circuit X0R2 calculates the inverse of the first bit (bit 6) and the signal of the 3-bit signal Data[6:4] of the 3-bit signal Data [6:4]. From the mutually exclusive logical OR of the second bit (bit 5) of the uppermost order, it is used as the symbol of the second approximate logarithm logarithm energy ratio λ 1(2), and is adjusted by the bus width adjustment. The row Bus4 is output to the output terminal 02. The absolute 値 calculation circuit Magi calculates the absolute 値 of the 3-bit signal Data[6: 4] φ and uses it as the absolute 値 of the first approximate log likelihood ratio λ 1( 1), and the sink for overflow prevention The row Bus 1 5 and the bus bar width adjustment bus bar Bus9 are output to the output terminal 07. The built-in bus bar BL2 integrates three bus bars (4th to 6th bits) into one bus. The absolute 値 calculation circuit Mag2 calculates the inverse of the second-order bit (bit 5) of the 3-bit signal Data[6:4] as the uppermost bit, and the signal of the 3-bit data. [6: 4] The inverse of the second bit from the top (bit -70-200835169 5) is the second bit from the top and the signal of the 3-bit Data[6: 4] The third bit from the top (bit 4) is the absolute 値 of the 3-bit 从 from the third bit of the top, and then it is taken as the second approximate log likelihood ratio A 1 The absolute enthalpy of (2) is output to the output terminal 〇8 via the overflow prevention bus bar Bus16 and the bus bar width adjustment bus bar BuslO.

The first approximate logarithmic probability ratio λ 1 (1) of the output from the output terminal 01 and the first approximate log likelihood ratio λ 1 (1) output from the output terminal 07 by a multiplication circuit (not shown). The absolute 値 is multiplied (ie, via a circuit that adds a sign to the absolute )) and is output as an approximate log likelihood ratio λ I (1). The second approximate logarithmic probability ratio λ 1 (2) from the output terminal 02 and the second approximate log likelihood ratio λ 1 outputted from the output terminal 以 8 by a multiplication circuit (not shown). 2) The absolute 値 is multiplied (ie, via a circuit that adds a sign to the absolute ))' and is output as an approximate log likelihood ratio λ 1(2). Similarly, the Q channel component XQ of the received signal is input to the input terminal II, and the approximate log likelihood ratios λ Q(l) and λ Q(2) are output. When the decoding processing unit 7 performs error correction decoding based on the sum-product decoding method, the multiplication circuit (not shown) multiplies the approximate logarithmic probability ratios λ 1 (1), 1 (2), AQ (1), and AQ (7). The result of the multiplication is approximated to the logarithmic probability ratio (considered coefficient) by the (((2/σ2) 并 and sent to the decoding processing unit 7. When the decoding processing unit 7 performs the error correction solution-71-200835169 code according to the mi η - sum decoding method, the approximate log likelihood ratios λ 1(1), λ 1(2), and λ are used by a multiplication circuit pair (not shown). When Q(l) and λ Q(2) are multiplied by (f), the multiplication result is approximated to the logarithmic probability ratio (considered coefficient) and sent to the decoding processing unit 7. (In the case of 64QAM) At the input terminal II, the I channel component x1 of the received signal is input. The channel component χΐ is represented by a 4-bit signal Data[6 ·· 3]. The signal DaU[6:3] is expressed in 2's complement.

The 4-bit signal Data[6:3] is transmitted from the uppermost first bit (bit 6) via the bus width adjustment bus bus 1 and the uppermost bit of the overflow prevention bus bus Bus2. Then, it is sent to the logic counter circuit NOT1 via the signal line extracting unit EX1. The 4-bit signal Data [6:3] is from the topmost second bit (bit 5), and the bus bar width adjustment bus bus Bus1 and the overflow prevention bus bar Bus2 are the highest order. The two bits are sent to the exclusive OR circuit XOR2 and the exclusive OR circuit φ XOR3 via the signal line extraction unit EX2, and are sent to the logic inverse circuit NOT3. The output of the logic inverse circuit NOT3 is sent to the first bit from the top stage and the second bit from the top stage of the built-in bus bar BL2. The 4-bit signal Data[6:3] is transmitted from the topmost third bit (bit 4) through the bus bar width adjustment bus bus 1 and the overflow prevention bus bar Bus2 from the topmost The third bit is further supplied to the exclusive logic OR circuit XOR3, the third bit from the uppermost stage, and the logical inverse circuit NOT4 via the signal line extracting unit EX3. Logic Inverse Circuit -72- 200835169 The output of NOT4 is sent to the first bit from the top and the second bit from the top of the built-in bus BL3. The 4-bit signal Data[6:3] is from the topmost fourth bit (bit 3), via the bus bar width adjustment bus bar Bus 1 and the overflow prevention bus bar Bus2 from the topmost The fourth bit is further sent to the fourth bit from the top of the built-in bus bar BL2 and the third bit from the topmost stage of the built-in bus bar BL2 via the signal line extracting portion EX4.

The 4-bit signal Data[6:3] is sent to the absolute 値 calculation circuit Mag 1 via the bus width adjustment bus bus Bus1 and the overflow prevention bus bus Bus2. The logic counter circuit NOT1 will be the 4-bit signal Data. [6: 3] changes from the first bit (bit 6) of the top to the inversion, and then outputs it to the mutually exclusive logic OR circuit XOR2, and uses it as the first approximate log likelihood ratio λ 1 (1 Γ symbol ' is output to the output terminal 经由1 via the bus width adjustment bus bus Bus3. The exclusive logic OR circuit XOR2 calculates the 4-bit signal Data [6: 3] from the uppermost first bit The inverse 値 of the element (bit 6) and the mutually exclusive logical OR of the second bit (bit 5) of the signal Data[6:3] of the 4-bit, and then the second The sign of the approximate logarithmic probability ratio λ 1(2) is output to the output terminal 〇2 via the bus width adjustment bus bus Bus4. The exclusive logic OR circuit X〇R3 calculates the 4-bit signal Data [6: 3 From the top-level second bit (bit 5) and the 4-bit signal Data [6:3] from the top-order third bit (bit 4) of the mutually exclusive logical OR, and then will -73- 200835169 As the symbol of the third approximate logarithmic probability ratio λ 1 (3), it is output to the output terminal 03 via the bus bar width adjustment bus bar Bus5. The built-in bus bar BL2 will have 4 bus bars (0th The bit to the third bit are concentrated into one bus. The built-in bus BL3 concentrates three bus bars (the third bit to the second bit) into one bus. Absolute 値 calculation circuit Magi calculation 4 The absolute 値 of the bit signal Data[6:3] is taken as the absolute 値 of the first approximate logarithmic probability ratio λ 1(1), and via the overflow prevention bus bar Bus 1 5 and the bus bar width Adjustment

It is output to the output terminal 07 by the busbar Bus9. The absolute 値 calculation circuit Mag2 calculates the inverse of the second bit (bit 5) of the 4-bit signal Data[6:3] from the uppermost 値 to the uppermost bit, and the 4-bit signal Data. [6:3] The inverse of the second bit (bit 5) from the top is the second bit from the top and the signal of the 4-bit signal Data[6:3] The first (3 S IS 4) bit 最 of the uppermost order is the absolute 値 of the 4-bit 値 from the first-order first bit, and is used as the second φ approximate log likelihood ratio λ 1 ( The absolute enthalpy of 2) is output to the output terminal 〇8 via the overflow prevention bus row Bus 16 and the bus bar width adjustment bus bar Bus 10. The absolute 値 calculation circuit Mag3 calculates the inverse of the third bit (bit 4) of the 4-bit signal Data[6:3] as the uppermost bit and the 4-bit signal Data. [6:3] The inverse of the third bit (bit 4) from the top is the second bit from the top and the signal of the 4-bit signal Data[6:3] The fourth bit of the topmost level is the absolute 値 of the 3-bit 第 from the top of the 3rd - 74th to the 200835169 bits, and is taken as the 3rd approximation log likelihood ratio λ 1(3) Absolutely, the bus bar Bus 17 for overflow prevention and the bus bar Busll for bus bar width adjustment are output to the output terminal 09.

The first approximate logarithmic probability ratio A 1 (1) of the output from the output terminal 0 1 and the first approximate log likelihood ratio λ 1 outputted from the output terminal 07 by a multiplication circuit (not shown). 1) The absolute 値 is multiplied (ie, via a circuit that adds a sign to the absolute )) and is output as an approximate log likelihood ratio λ 1( 1). The second approximate log likelihood ratio λ 1 (2) from the output terminal 02 and the second approximate log likelihood ratio λ 1 (2) output from the output terminal 08 by a multiplication circuit (not shown). The absolute 値 is multiplied (ie, via a circuit that adds a sign to the absolute )) and is output as an approximate log likelihood ratio λ 1(2). The third approximate logarithmic probability ratio λ 1 (3) from the output terminal 03 and the third approximate log likelihood ratio λ 1 from the output terminal 09 are multiplied by a multiplication circuit (not shown). 3) The absolute 値 is multiplied (g卩, via a circuit that adds a sign to the absolute )) and is output as an approximate log likelihood ratio λ 1(3). Similarly, the Q channel component xQ of the received signal is input to the input terminal II, and the approximate logarithmic probability ratios λ Q(l), λ Q(2), and λ Q(3) are output. When the decoding processing unit 7 performs error correction decoding based on the sum-product decoding method, the approximate logarithmic probability ratios λ 1 (1), 1 (2), λ Ι (3), and AQ (for the multiplication circuit pair (not shown) are used. 1), ; IQ(2), ; IQ(3) are multiplied by (一2/ -75- 200835169 σ 2), and the multiplication result is approximated to the logarithmic probability ratio (considered coefficient) and sent to the decoding processing unit. 7. In the case where the decoding processing unit 7 performs error correction decoding based on the min-sum decoding method, the approximate logarithmic probability ratio λ 1(1), Λ 1(2), λ 1(3), λ is performed by a multiplication circuit pair (not shown). Q(l) ' λ Q (2) and λ Q (3) are multiplied by (f), and the result of the multiplication is approximated to the log likelihood ratio as (considered coefficient) and sent to the decoding processing unit 7. (in the case of 256QAM)

At the input terminal II, the I channel component x1 of the received signal is input. The I channel component is represented by a 5-bit signal Data[6:2]. The signal Data[6:2] is expressed in 2's complement. The 5-bit signal Data [6: 2] is transmitted from the uppermost first bit (bit 6) via the bus width adjustment bus bus Bus1 and the overflow prevention bus bar Bus2. Then, it is sent to the logic counter circuit NOT1 via the signal line extracting unit EX1. The 5-bit signal Data[6:2] is from the topmost second bit (bit 5), via the bus bar width adjustment bus bar Bus 1 and the overflow prevention bus bar Bus2 from the topmost The second bit is sent to the exclusive OR circuit X〇R2 and the exclusive OR circuit XOR3 via the signal line extraction unit k EX2 and sent to the logic inverse circuit NOT3. The output of the logic inverse circuit NOT3 is sent to the first bit from the top stage and the second bit from the top stage of the built-in bus bar BL2. The 5-bit signal Data[6:2] is from the top third bit (bit 4), and the bus bar width adjusting bus bus Bus1 and the overflow preventing bus sink-76 - 200835169 bus bar Bus2 From the third bit of the uppermost level, and then to the exclusive OR circuit XOR3, the exclusive logic OR circuit XOR4, and the third bit from the topmost stage of the built-in bus bar BL2 via the signal line extracting unit EX3. And the logic inverse circuit NOT4. The output of the logic inverse circuit NOT4 is sent to the first bit from the top stage and the second bit from the top stage of the built-in bus bar BL3.

The 5-bit signal Data[6:2] is from the top 4th bit (bit 3), and the bus bar width adjustment bus bus Bus1 and the overflow prevention bus bar Bus2 are the highest order. 4 bits are then sent to the exclusive logic OR circuit XOR4 via the signal line extraction unit EX4, the fourth bit from the topmost level of the built-in bus bar BL2, and the uppermost stage from the built-in bus bar BL3. 3 bits and logical inverse circuit NOT5. The output of the logic inverse circuit NOT5 is sent to the first bit from the top stage and the second bit from the top stage of the built-in bus bar BL4. The 5-bit signal Data [6: 2] is from the top 5th bit (bit 2), and the bus bar width adjustment bus bus 1 and the overflow prevention bus φ bus bar Bus2· The fifth bit of the uppermost order is sent to the fifth bit from the topmost stage of the built-in bus bar BL2, and the fourth bit from the topmost stage of the built-in bus bar BL2 via the signal line extracting portion EX5. The third and the third bit from the top of the built-in bus bar BL4. The 5-bit signal Data[6: 2] is sent to the absolute 値 calculation circuit M ag 1 via the bus width adjustment bus bus Bus1 and the overflow prevention bus bar Bus2 〇 the logic inverse circuit NOT1 is a 5-bit signal The first bit (bit 6) of Data[6: 2] from the top-77-200835169 becomes inverted, and then outputs it to the mutually exclusive logic OR circuit XOR2, and uses it as the first approximate logarithm The symbol of the probability ratio λ 1 (1) is output to the output terminal 01 via the bus bar width adjustment bus line Bus3.

The mutually exclusive logic OR circuit XOR2 calculates the inverse phase 从 of the first bit (bit 6) and the signal of the 5-bit signal Data[6: 2] of the 5-bit signal Data[6:2] From the mutually exclusive logical OR of the second bit (bit 5) of the uppermost order, it is used as the symbol of the second approximate log likelihood ratio λ 1(2), and is adjusted by the bus width adjustment bus Bus4 Output to the output terminal 02. \ Mutually exclusive logic or circuit XOR3 calculates the 5-bit signal Data [6: 2] from the top second bit (bit 5) and the 5-bit signal Data [6: 2] from the top The mutually exclusive logical OR of the third bit (bit 4) is used as the symbol of the third approximate log likelihood ratio λ 1 (3), and is connected to the output terminal via the bus width adjustment bus bus Bus5 03 output. The mutually exclusive logic OR circuit X0R4 calculates the 5-bit signal Data[6: 2] φ from the uppermost third bit (bit 4) and the 5-bit signal Data[6: 2] from the topmost The mutually exclusive logical OR of the 4th bit (bit 3) is used as the symbol of the 4th approximate logarithmic probability ratio λ 1(4), and is connected to the output terminal via the bus width adjustment bus bus Bus6 04 output. The built-in bus bar BL2 integrates five bus bars (0th bit to 4th bit) into one bus bar. The built-in bus bar BL3 concentrates four bus bars (the third bit to the third bit) into one bus bar. The built-in bus bar BL4 concentrates three bus bars (0th bit to 2nd bit) into one bus bar. -78- 200835169 The absolute 値 calculation circuit Magi calculates the absolute 値 of the 5-bit 兀 signal Data[6: 2], and then uses it as the absolute value of the first approximate log likelihood ratio λ 1(1), and overflows The bus bar Bus 1 5 and the bus bar width adjustment bus bus 9 are output to the output terminal 07.

The absolute 値 calculation circuit Mag2 calculates the 5-bit signal Data[6: 2] from the uppermost second bit (bit 5), the inverse 値 is the uppermost bit, and the 5-bit signal Data [6 ·· 2] The inverse of the second bit (bit 5) from the top is the second bit from the top and the signal of the 5-bit data [6: 2] The first (3S 5)-bit from the top is the absolute 値' of the 5-bit 从 from the first-order first-order bit, and then it is taken as the second approximate log likelihood ratio λ 1(2) The absolute 値 is output to the output terminal 〇 8 via the overflow prevention bus cradle 16 and the bus width adjustment bus BUS 1 . The absolute 値 calculation circuit Mag3 calculates the signal of the 5-bit signal Data[6: 2] from the uppermost third bit (bit 4), the inverse 値 to the uppermost bit, and the φ to the 5-bit signal. The inverse of the third bit (bit 4) from the top of Data[6:2] is the second bit from the top and the signal of the five bits Data[6: 2] The first (3SJ'4) bit from the top is the absolute 値 of the 4-bit 从 from the top of the top, and then the third approximate log likelihood ratio λ 1(3) Absolutely, it is output to the output terminal 09 via the overflow prevention bus bar Busl7 and the bus bar width adjustment bus bar Bus1. Absolute 値 calculation circuit Mag4 calculates the 5-bit signal Data[6: 2] -79- 200835169 from the uppermost fourth bit (bit 3), the inverse 値 is the highest order bit, with 5 bits The inverse of the fourth signal (bit 3) of the signal Data[6:2] from the top is the second bit from the top and the signal of the 5-bit data[6: 2] The 5th bit from the top is the absolute 値 of the 3rd bit from the 3rd bit of the top, and then the 4th nearest logarithm likelihood ratio λ 1(4) Absolutely, it is output to the output terminal 010 via the overflow prevention bus bar 18 and the bus bar width adjustment bus bus Bus1.

The first approximate logarithmic probability ratio λ 1 (1) from the output terminal 01 and the first approximate log likelihood ratio output from the output terminal 07 are 以 Ι (1) by a multiplication circuit (not shown). The absolute 値 is multiplied (ie, via a circuit that adds a sign to the absolute )) and is output as an approximate log likelihood ratio λ 1( 1). The second approximate log likelihood ratio λ 1 (2) from the output terminal 02 and the second approximate log likelihood ratio λ 1 (2) output from the output terminal 08 by a multiplication circuit (not shown). The absolute 値 is multiplied (ie, a circuit that adds a sign to 値 to absolute 经由) and is output as an approximate log likelihood ratio λ 1(2). The third approximate logarithmic probability ratio λ 1 (3) of the output from the output terminal 03 and the third approximate log likelihood ratio λ 1 (3) output from the output terminal 09 by a multiplication circuit (not shown). The absolute 値 is multiplied (ie, via a circuit that adds a sign to the absolute )) and is output as an approximate log likelihood ratio λ 1(3). The fourth logarithmic probability ratio of the 4th - 80th - 200835169 approximate log likelihood ratio λ 1 (4) outputted from the output terminal 04 and the 4th approximate logarithm outputted from the output terminal οιο by a multiplication circuit (not shown) The absolute 値 multiplication of λ 1(4) (g卩, via a circuit that adds a sign to the absolute )) is output as an approximate log likelihood ratio into 1(4). Similarly, the Q channel component XQ of the received signal is input to the input terminal II, and the approximate log likelihood ratios λ Q (1), λ Q (2), λ Q (3 ), and λ Q (4) are output, that is, When the decoding processing unit 7 performs error correction decoding according to the sum-product decoding method, the approximate logarithmic probability ratios λ Ι (1), λ Ι (2), λ Ι (3), λ Ι (4), and the multiplication circuit pair (not shown). AQ(1), AQ(2), AQ(3), λ Q(4) are multiplied by (一2/σ 2) 値, and the multiplication result is taken as (considered coefficient) approximate log likelihood ratio and sent to decoding Processing unit 7. In the case where the decoding processing unit 7 performs error correction decoding based on the min-sum decoding method, the approximate logarithmic probability ratios λ 1(1), λ 1(2), λ 1(3), λ are multiplied by a multi-circuit circuit (not shown). 1(4), Q(l), λ Q(2), λ Q(3), and Q(4) multiplied by (a f), the multiplicative result is taken as the (considered coefficient) approximate logarithm probability The ratio is sent to the decoding processing unit 7. (In the case of 1024QAM) At the input terminal 11, the I channel component XI of the reception signal is input. The I channel component is represented by a 6-bit signal Data[6:1]. The signal Data[6:1] is expressed in 2's complement. The 6-bit signal D ata [ 6 : 1 ] is the first bit from the top (bit 6), and the bus bar Busl and the overflow prevention bus are adjusted via the bus bar width adjustment -81- 200835169 The uppermost bit is sent to the logic counter circuit NOT1 via the signal line extracting unit EX1.

The 6-bit signal Data[6:1] is from the topmost second bit (bit 5), and the bus bar width adjustment bus bus Bus1 and the overflow prevention bus bar Bus2 are the highest order. The two bits are sent to the exclusive OR circuit XOR2 and the exclusive OR circuit XOR3 via the signal line extraction unit EX2, and are sent to the logic inverse circuit NOT3. The output of the logic inverse circuit N〇T3 is sent to the first bit from the top stage and the second bit from the top stage of the built-in bus bar BL2. The 6-bit signal Data[6:1] is transmitted from the topmost third bit (bit 4) through the bus bar width adjustment bus bus 1 and the overflow prevention bus bar Bus2 from the topmost The third bit is sent to the exclusive logic OR circuit XOR3, the exclusive logic OR circuit XOR4, the third bit from the topmost stage, and the logic inverse circuit via the signal line extraction unit EX3. NOT4. The output of the logic inverse circuit NOT4 is sent to the first bit from the top stage and the second bit from the top stage of the built-in bus bar BL3. The 6-bit signal Data[6:1] is from the top 4th bit (bit 3), and the bus bar width adjustment bus bus 1 and the overflow prevention bus bar Bus2 are from the topmost level. The fourth bit is sent to the exclusive logic OR circuit XOR4, the exclusive logic OR circuit XOR5, the fourth bit from the topmost stage, and the built-in confluence via the signal line extraction unit EX4. The third bit from the top of the row BL3 and the logic inverse circuit NOT5. The output of the logic inverse circuit NOT5 is sent to the first block of the built-in bus bar BL4 from the top -82-200835169 and the second bit from the top. The 6-bit signal Data[6:1] is from the topmost fifth bit (bit 2), and the bus bar width adjustment bus bar Bus 1 and the overflow prevention bus bar Bus2 are from the topmost level. The fifth bit is sent to the mutually exclusive logic or circuit X〇R5 via the signal line extraction unit EX5, and the fifth bit from the topmost stage of the built-in bus bar BL2 and the built-in bus bar BL3 are from the top. 4th of the order

The bit, the third bit from the top of the built-in bus BL4, and the logic counter circuit NOT6. The output of the logic inverse circuit NOT6 is sent to the first bit from the top stage and the second bit from the top stage of the built-in bus bar BL5. The 6-bit signal Data [6:1] is from the top 6th bit (bit 1), and the bus bar width adjustment bus bus 1 and the overflow prevention bus bar Bus2 are from the topmost level. The sixth bit is sent to the sixth bit from the top of the built-in bus bar BL2, and the fifth bit from the topmost row of the built-in bus bar BL3 via the signal line extracting portion EX6. The fourth bit from the top of the bus bar BL4 and the third bit from the top of the built-in bus bar BL5. The 6-bit signal Data[6:1] is sent to the absolute 値 calculation circuit via the busbar width adjustment busbar Busl and the overflow prevention busbar Bus2.

Mag 1 〇 logic inverse circuit NOT1 changes the 6-bit signal Data [6: 1] from the uppermost first bit (bit 6) to invert, and then outputs it to the mutually exclusive logic OR circuit XOR2. Further, this is taken as the sign of the first approximate logarithmic probability ratio λ 1 (1), and is output to the output terminal -83 - 200835169 Ο 1 via the bus bar width adjustment bus line Bus3. The mutually exclusive logic OR circuit XOR2 calculates the inverted 値 and 6-bit signals of the 6-bit signal Data[6:1] from the highest-order first bit (bit 6).

The mutually exclusive logical OR of the second bit (bit 5) of Data[6:1], which is used as the symbol of the second approximation log likelihood ratio λ 1(2), and is connected via the confluence The row width adjustment bus bar Bus4 is output to the output terminal 02.

The mutually exclusive logic OR circuit XOR3 calculates the 6-bit signal Data[6:1] from the topmost second bit (bit 5) and the 6-bit signal Data[6:1] from the topmost The mutually exclusive logical OR of the third bit (bit 4) is used as the symbol of the third approximate logarithmic probability ratio λ 1(3), and is connected to the output terminal 03 via the bus width adjustment bus bus Bus5 Output. The mutually exclusive logic OR circuit XOR4 calculates the 6-bit signal Data[6:1] from the uppermost third bit (bit 4) and the 6-bit signal Data[6:1] from the topmost The mutually exclusive logical OR of the 4th bit (bit 3) is used as the sign of the 4th approximate logarithmic probability ratio λ 1(4), and is output to the output terminal via the bus width adjustment bus bus Bus6. 4 output. The mutually exclusive logic OR circuit X0R5 calculates the 6-bit signal Data[6:1] from the topmost 4th bit (bit 3) and the 6-bit signal Data[6:1] from the topmost The mutually exclusive logical OR of the 5th bit (bit 2) is used as the symbol of the 5th approximate logarithmic probability ratio λ 1(5), and is connected to the output terminal via the bus width adjustment bus bus Bus7. 5 output. The built-in bus bar BL2 integrates six bus bars (the third bit to the fifth bit) into one bus. The built-in bus bar BL3 concentrates five bus bars (0th bit 200835169 to 4th bit) into one bus bar. The built-in bus bar BL4 concentrates four bus bars (0th bit to 3rd bit) into one bus bar. The built-in bus bar BL5 concentrates three bus bars (0th bit to 2nd bit) into one bus bar. The absolute 値 calculation circuit Magi calculates the absolute 値 of the 6-bit signal Data[6 : 1], and uses it as the absolute 値 of the first approximate log likelihood ratio λ 1(1), and via the overflow prevention bus The Bus 1 5 and the busbar width adjustment busbar Bus9 are output to the output terminal 07.

The absolute 値 calculation circuit Mag2 calculates the inverted phase 从 from the uppermost second bit (bit 5) of the 6-bit signal DaU[6:1] to the uppermost bit, and the signal of the 6-bit data. [6:1] The inverse of the second bit (bit 5) from the top is the second bit from the top and the signal of the 6-bit data [6: 1] The first (3 € IS 6) bit 最 of the uppermost order is the absolute 値 of the 6-bit 第 from the highest-order I-th bit, and then it is taken as the second approximate log likelihood ratio λ 1 (2 The absolute 値 is output to the output terminal 〇8 via the overflow prevention bus bar 16 and the bus bar width adjustment bus bus 10 . The absolute 値 calculation circuit Mag3 calculates the inverse of the third bit (bit 4) of the signal of the 6-bit data [6: 1], which is the uppermost bit, and the signal of the 6-bit data. [6: 1] The inverse of the third bit (bit 4) from the top is the second bit from the top and the signal of the 6-bit data [6: 1] The J + 1 (3SJS5) bit 最 of the uppermost order is the absolute 値 of the octet 第 from the top octet, and then it is the third approximate log likelihood ratio λ 1(3) Absolutely, it is output to the output terminal 09 via the overflow prevention bus-85 - 200835169 bus bar Busl7 and the bus bar width adjustment bus bar Busll. The absolute 値 calculation circuit Mag4 calculates the signal of the 6-bit signal Data[6:1] from the uppermost fourth bit (bit 3), the inverse 値 to the uppermost bit, and the 6-bit signal DaU. [6: 1] The inverse of the fourth bit (bit 3) from the top is the second bit from the top and the signal of the 6-bit data [6: 1] The top J + 2 (3 € 4) bits are

From the absolute 値 of the 4-bit 第 of the J-th bit of the top, and then it is the absolute 値 of the fourth approximate logarithmic probability ratio λ 1(4), and the busbar Bus8 and the sink are prevented by the overflow. The row width adjustment bus bus Bus1 is output to the output terminal 0 1 0. The absolute 値 calculation circuit Mag5 calculates the inverse of the fifth-order bit (bit 2) of the signal of the 6-bit data [6: 1], which is the uppermost bit, and the signal of the 6-bit data. [6: 1] The inverse of the fifth bit (bit 2) from the top is the second bit from the top, and the letter φ with 6 bits Data [6: 1] The 6th bit from the top is the absolute 値 of the 3rd 从 from the 3rd bit of the top, and then it is the absolute value of the 5th approximate logarithm probability ratio λ 1(5) And output to the output terminal 01 1 via the overflow prevention bus bar 19 and the bus bar width adjustment bus bus Bus1. The first approximate logarithmic probability ratio λ 1 (1) of the output from the output terminal 01 and the first approximate log likelihood ratio λ I (outputted from the output terminal 〇 7) by a multiplication circuit (not shown) 1) The absolute 値 is multiplied (ie, via a circuit that adds a sign to the absolute )) and is output as an approximate log likelihood ratio λ 1( 1) -86- 200835169. The second approximate log likelihood ratio λ 1 (2) from the output terminal 02 and the second approximate log likelihood ratio λ 1 (2) output from the output terminal 08 by a multiplication circuit (not shown). The absolute 値 is multiplied (ie, via a circuit that adds a sign to the absolute )) and is output as an approximate log likelihood ratio λ 1(2).

The third approximate logarithmic probability ratio λ 1 (3) of the output from the output terminal 03 and the third approximate log likelihood ratio λ 1 (3) output from the output terminal 09 by a multiplication circuit (not shown). The absolute 値 is multiplied (ie, via a circuit that adds a sign to the absolute )) and is output as an approximate log likelihood ratio λ 1(3). The fourth approximate logarithmic probability ratio λ 1 (4) from the output terminal 04 and the fourth approximate log likelihood ratio λ 1 output from the output terminal 以1 以 are outputted by a multiplication circuit (not shown). The absolute 値 multiplication of (4) (i.e., via a circuit that adds a sign to the absolute )) is output as an approximate log likelihood ratio λ φ 1(4). The fifth approximate logarithmic probability ratio λ 1 (5) from the output terminal 05 and the fifth approximate log likelihood ratio λ 1 output from the output terminal 〇1 1 by a multiplication circuit (not shown) (5) The absolute 値 is multiplied (ie, via a circuit that adds a sign to the absolute )) and is output as an approximate log likelihood ratio to 1 (5). Similarly, the Q channel component xQ of the received signal is input to the input terminal 11, and the approximate log likelihood ratios λ Q(l), λ QC2), λ QC3), λ -87 - 200835169 Q(4) , λ Q ( 5) When the decoding processing unit 7 performs error correction decoding based on the sum-prodiict decoding method, the approximate logarithmic probability ratio λ is used by a multiplication circuit (not shown).

1(1), λ 1(2), λ 1(3), λ 1(4), again 1(5), λ Q(l), λ q(2), AQ(3), AQ(4) When AQ(5) is multiplied by (-2/σ2), the multiplication result is approximated to the logarithmic probability ratio (considered coefficient) and sent to the decoding processing unit 7. When the decoding processing unit 7 performs error correction decoding based on the mi η · sum decoding method, the approximate logarithmic probability ratios λ 1 ( 1 ), λ 1 (2), λ Ι (3), and human are obtained by a multiplication circuit pair (not shown). 1(4), λΙ(5), AQ(1), ;IQ(2), AQ(3), λ Q(4), λ Q(5) are multiplied by (—f), and the multiplication result is taken as (The coefficient has been considered) The approximate logarithmic probability ratio is sent to the decoding processing unit 7. (In the case of 4096QAM) At the input terminal II, the I channel component x1 of the received signal is input. The channel component xl is represented by a 7-bit signal Data [6: 0]. The signal Data [6 : 0] is expressed in 2's complement. The 7-bit signal Data[6··0] is transmitted from the uppermost first bit (bit 6) via the bus width adjustment bus bus 1 and the overflow prevention bus bus 2 to the uppermost bit. The element is further sent to the logic inverting circuit N0T1 via the signal line extracting portion EX1. The 7-bit signal Data[6:0] is from the topmost second bit (bit 5), and the bus bar width adjustment bus bus Bus1 and the overflow prevention bus bar Bus2 are the highest order. The two bits are then sent to the exclusive logic OR circuit X0R2 and the exclusive OR circuit -88-200835169 X〇R3 via the signal line extraction unit EX2, and are sent to the logic inverse circuit NOT3. The output of the logic inverse circuit NOT3 is sent to the first bit from the top stage and the second bit from the top stage of the built-in bus bar BL2. .

The 7-bit signal Data[6:0] is from the uppermost third bit (bit 4), and the bus bar width adjustment bus bus Bus1 and the overflow prevention bus bar Bus2 are the highest order. The three bits are then sent to the exclusive logic OR circuit XOR3, the exclusive logic OR circuit XOR4, the third bit from the topmost stage, and the logic inverse circuit NOT4 via the signal line extraction unit EX3. . The output of the logic inverse circuit NOT4 is sent to the first bit from the top stage and the second bit from the top stage of the built-in bus bar BL3. The 7-bit signal Data [6:0] is from the top 4th bit (bit 3), via the bus bar width adjustment bus bus Bus1 and the overflow prevention bus bar Bus2. The fourth bit is sent to the exclusive logic OR circuit XOR4, the exclusive logic OR circuit XOR5, the fourth bus from the top of the built-in bus bar BL2, built in via the signal line extraction unit EX4, built-in The third bit from the top of the bus bar BL3 and the logic inverse circuit NOT5. The output of the logic inverse circuit NOT5 is sent to the first bit from the top stage and the second bit from the top stage of the built-in bus bar BL4. The 7-bit signal Data[6 ·· 0] is from the topmost fifth bit (bit 2), and the bus bar width adjustment bus bus Bus1 and the overflow prevention bus bar Bus2 are from the topmost level. The fifth bit is sent to the mutually exclusive logic or circuit XOR5, the exclusive circuit OR circuit X〇R6, and the built-in bus bar BL2 from the topmost fifth bit, via the signal line extraction unit EX5. Jianhui-89- 200835169 The third bit from the top of the row BL3, the third bit from the top of the built-in bus BL4, and the logical inverse circuit NOT6. The output of the logic inverse circuit NOT6 is sent to the first bit from the top stage and the second bit from the top stage of the built-in bus bar BL5.

The 7-bit signal Data[6:0] is from the top 6th bit (bit 1), and the bus bar width adjustment bus bus Bus1 and the overflow prevention bus bar Bus2 are the highest order. 6 bits are then sent to the exclusive OR circuit XOR6 via the signal line extraction unit EX6, the sixth bit from the topmost stage of the built-in bus bar BL2, and the uppermost stage from the built-in bus bar BL3. 5 bits, the 4th bit from the top of the built-in bus bar BL4, the 3rd bit from the top of the built-in bus bar BL5, and the logical inverse circuit NOT7. The output of the logic inverse circuit NOT7 is sent to the first bit from the top stage and the second bit from the top stage of the built-in bus bar BL6. The 7-bit signal Data[6:0] is from the uppermost 7th bit (bit 0), and the bus bar width adjustment bus bus Bus1 and the overflow prevention bus bar Bns2 are the highest order. 7 bits, and then, via the signal line extraction unit EX7, are sent to the 7th bit from the top of the built-in bus bar BL2, and the 6th bit from the top of the built-in bus bar BL3. The fifth bit from the topmost level of the bus bar BL4, the fourth bit from the top of the built-in bus bar BL5, and the third bit from the top of the built-in bus bar BL6. The 7-bit signal Data[6:0] is sent to the absolute 値 calculation circuit via the bus width adjustment bus bus 1 and the overflow prevention bus bus Bus2. 逻辑-90- 200835169 The logic inverse circuit NOT1 will The 7-bit signal Data[6:0] is inverted from the first bit (bit 6) of the uppermost order, and is output to the mutually exclusive logic OR circuit X0R2, and is taken as the first approximation. The sign of the logarithmic probability ratio λ 1(1) is output to the output terminal 〇1 via the bus bar width adjustment bus line Bus3.

The mutually exclusive logic OR circuit XOR2 calculates the inverted phase 从 of the 7-bit signal Data[6:0] from the uppermost first bit (bit 6) and the 7-bit signal D at a [6 : 0 The mutually exclusive logical OR of the second bit (bit 5) from the top, and then used as the sign of the second approximate log likelihood ratio λ 1(2), and the bus through the bus width adjustment The row Bus4 is output to the output terminal 02. The mutually exclusive logic OR circuit XOR3 calculates the 7-bit signal Data[6:0] from the uppermost second bit (bit 5) and the 7-bit signal Data[6:0] from the topmost The mutually exclusive logical OR of the third bit (bit 4) is used as the symbol of the third approximate log likelihood ratio λ 1 (3), and is connected to the output terminal via the bus width adjusting bus bus 5 03 output. The mutually exclusive logic OR circuit X0R4 calculates the 7-bit signal Data[6: 〇] from the uppermost third bit (bit 4) and the 7-bit signal Data[6 ·· 0] from the top The mutually exclusive logical OR of the 4th bit (bit 3) is used as the symbol of the 4th approximate logarithmic probability ratio λ 1(4), and is connected to the output terminal via the bus width adjustment bus bus Bus6 〇 4 output. The mutually exclusive logic OR circuit X0R5 calculates the 7-bit signal Data[6 ··〇] from the uppermost fourth bit (bit 3) and the 7-bit signal Data[6:0] from the topmost The 5th bit (bit 2) of the mutually exclusive logical OR, and then its -91-200835169 as the 5th approximate logarithmic probability ratio λ 1 (5) symbol, and through the bus width adjustment bus B us 7 outputs to output terminal 0 5 . The mutually exclusive logic OR circuit XOR6 calculates the 7-bit signal Data[6:0] from the topmost 5th bit (bit 2) and the 7-bit signal Data[6:0] from the topmost The mutually exclusive logical OR of the sixth bit (bit 1) is used as the sign of the sixth approximate logarithmic probability ratio λ 1 (6), and is connected to the output terminal via the bus width adjustment bus bar BuS8. 6 output.

The built-in bus bar BL2 integrates 7 bus bars (0th bit to 6th bit) into one bus bar. The built-in bus bar BL3 concentrates 6 bus bars (0th bit to 5th bit) into one bus bar. The built-in bus bar BL4 concentrates five bus bars (0th bit to 4th bit) into one bus bar. The built-in bus bar BL5 concentrates four bus bars (0th bit to 3rd bit) into one bus bar. The built-in bus bar BL6 concentrates three bus bars (0th bit to 2nd bit) into one bus bar. The absolute 値 calculation circuit Magi calculates the absolute 値 of the 7-bit signal Data[6: 0] φ, and uses it as the absolute 値 of the first approximate log likelihood ratio λ 1(1), and the sink by the overflow prevention The row Bus 1 5 and the bus bar width adjustment bus bar Bus9 are output to the output terminal 07. The absolute 値 calculation circuit M ag 2 calculates the inverse of the second bit (bit 5) of the signal of the 7-bit signal D ata [ 6 : 0 ] from the highest order to the highest order bit, 7 bits The signal [6:0] is inverted from the topmost second bit (bit 5), the second bit from the top, and the 7-bit signal Data [6:0] The 1st (3 S 1$ 7) bit from the top is the absolute 値 of the 7-bit 第 from the top of the top-92-200835169, and then the second approximation The absolute probability of the logarithmic probability ratio λ 1 (2) is output to the output terminal 〇 8 via the overflow prevention bus bar Bus16 and the bus bar width adjustment bus bar Bus1O.

Absolute 値 calculation circuit Mag3 calculates the 7-bit signal Data [6: 0] from the uppermost third bit (bit 4), the inverse 値 is the highest order bit, and the 7-bit signal Data [6: 0] The inverse of the third bit from the top (bit 4) is the second bit from the top and the signal of the 7-bit data [6: 0] The J+1th (3S:i S 6) bit 最 of the uppermost order is the absolute 値 of the 6-bit 从 from the highest order of the first bit, and then it is taken as the third approximate log likelihood ratio λ. The absolute enthalpy of 1 (3) is output to the output terminal 〇 9 via the overflow prevention bus bar Bus 17 and the bus bar width adjustment bus bar Bus1 1 . The absolute 値 calculation circuit Mag4 calculates the signal of the 7-bit signal Data[6:0] from the uppermost fourth bit (bit 3), the inverse 値 to the uppermost bit, and the φ to the 7-bit signal. The inverse of the fourth bit (bit 3) from Data[6:0] is the second bit from the top and the signal of Data[6:0] with 7 bits. From the top-level J + 2 (3S5) bits 値 is the absolute 値 of the 5-bit 从 from the highest-order ary bit, and then use it as the fourth approximate log-probability ratio λ 1 ( The absolute 値 of 4) is output to the output terminal 010 via the overflow prevention bus bar B us 1 8 and the bus bar width adjustment bus bar B us 1 2 . Absolute 値 calculation circuit Mag5 calculates the 7-bit signal Data [6: 0] -93- 200835169 from the uppermost 5th bit (bit 2), the inverse 値 is the highest order bit, 7 bits The inverse of the fifth signal (bit 2) of the signal Data[6:0] from the top is the second bit from the top and the signal of the 7-bit Data[6: 0] The J + 3 (3SJS4) bit from the top is the absolute 値 of the 4-bit 从 from the top of the first bit, and then it is the 5th approximate log likelihood ratio λ The absolute enthalpy of 1 (5) is output to the output terminal 〇1 1 via the overflow prevention bus BUS 1 1 and the bus width adjustment bus BUS 1 1 .

The absolute 値 calculation circuit Mag6 calculates the 7-bit signal (6: 0) from the uppermost 6th bit (bit 1) as the uppermost bit, and the 7-bit signal. [6: 0] The inverse of the sixth bit (bit 1) from the top is the second bit from the top and the signal of the 7-bit data [6: 0] The third bit 最 of the uppermost order is the absolute 値 of the 3-bit 从 from the third bit of the uppermost order, and is taken as the absolute 値 of the sixth approximate log likelihood ratio λ 1(6), and The bus bar Bus20 for overflow prevention and the bus bar B us 1 4 for bus bar width adjustment are output to the output terminal 〇1 2 . The first approximate logarithmic probability ratio λ I (1) of the output from the output terminal 01 and the first approximate log likelihood ratio λ 1 outputted from the output terminal 〇7 by a multiplication circuit (not shown). 1) The absolute 値 is multiplied (ie, via a circuit that adds a sign to the absolute )) and is output as an approximate log likelihood ratio λ 1( 1). The second approximate logarithmic probability ratio λ 1(2) of the output from the output terminal 〇2 and the second approximate logarithm of -94-200835169 output from the output terminal 〇8 may be obtained by the multiplication circuit not shown. Sex ratio; ί 1(2) is the absolute 値 multiplication (ie, via a circuit that adds a sign to the absolute )) and is output as an approximate log likelihood ratio λ 1(2). The third approximate logarithmic probability ratio λ 1 (3) of the output from the output terminal 03 and the third approximate log likelihood ratio λ 1 (3) output from the output terminal 09 by a multiplication circuit (not shown). The absolute 値 is multiplied (g卩, via a circuit that adds a sign to the absolute )) and is output as an approximate log likelihood ratio λ 1(3).

The fourth approximate logarithmic probability ratio λ 1 (4) from the output terminal 04 and the fourth approximate log likelihood ratio λ 1 from the output terminal 010 are multiplied by a multiplication circuit (not shown). The absolute 値 is multiplied (g卩, via a circuit that adds a sign to the absolute )) and is output as an approximate log likelihood ratio λ 1(4). The fifth approximate logarithmic probability ratio of the fifth approximate logarithmic probability ratio λ 1 (5) outputted from the output terminal 05 and the fifth approximate logarithmic probability outputted from the output terminal 〇1 1 by a multiplication circuit (not shown) The absolute 値 multiplication of λ I (5 ) (ie, via a circuit that adds a sign to the absolute )) is output as an approximate log likelihood ratio λ 1(5). The sixth approximate logarithmic probability ratio λ 1 (6) of the output from the output terminal 06 and the sixth approximate log likelihood ratio λ 1 (6) output from the output terminal 012 by a multiplication circuit (not shown). The absolute 値 is multiplied (ie, via a circuit that adds a sign to the absolute )) and is output as an approximate log likelihood ratio λ 1 (6). -95- 200835169 Similarly, input the Q channel component XQ of the received signal at the input terminal ,, and output the approximate log likelihood ratio λ Q (1), λ Q (2), λ Q (3 ), λ Q(4) , λ Q(5) , λ Q(6).

When the decoding processing unit 7 performs error correction decoding based on the sum-product decoding method, the approximate logarithmic probability is compared with 1(1), λ 1(2), λ 1(3) , λ by a multiplication circuit (not shown). 1(4), person 1(5), λ 1(6), λ, Q(l), AQ(2), AQ(3), AQ(4), AQ(5), AQ(6) multiplied by In the case of (a 2/σ2), the result of the multiplication is approximated to the logarithmic probability ratio (considered coefficient) and sent to the decoding processing unit 7. When the decoding processing unit 7 performs error correction decoding based on the min-sum decoding method, the approximate logarithmic probability ratios λ 1 (1), λ 1 (2), and λ 1 (3) are obtained by a multiplication circuit (not shown). λ 1(4), λ 1(5), λ 1(6), λ Q(l), λ Q(2), λ Q(3), λ Q(4) , λ Q (5), λ Q (6) When 乘 is multiplied by (f), the multiplication result is approximated to the logarithmic probability ratio (considered coefficient) and sent to the decoding processing unit 7. As described above, according to the sixth embodiment, as in the first and second embodiments, the error correction decoding can be performed with the same precision as the conventional method 1 and with less calculation amount than the conventional method 1. Further, since the reception signal is placed at a specific constellation point as shown in Fig. 26, and the constants Ki and Ci are calculated based on the equation of 2, the calculation can be performed by using a hardware circuit based on the bit operation. The approximate logarithmic probability ratio of signals modulated by 4QAM, 16QAM, 64QAM, 25 6QAM, 1024QAM, and 409 6QAM. Moreover, according to the hardware circuit, a plurality of approximate logarithmic probability ratios can be calculated for signals modulated by 16QAM, 64QAM, 256QAM, 1024QAM, and 4096QAM, and at the same time, •96-200835169. [Modifications of the fourth to sixth embodiments] (1) Arrangement of specific constellation points In the fourth to sixth embodiments, the number of modulation bits of the I channel component and the Q channel component is specified as a specific constellation. In the case of the case of the L, the coordinate system P (P system - (/1) or more, and the odd number of (21^-1) or less) in the constellation point of each channel component indicates that the constant Ki and the constant Ci become the first (14)

Equation ~ (17), but is not limited to this. For example, it may be a times the coordinate system P of the constellation point of each channel component. Where a is a number other than 0. In this case, the constant KiUI) is not represented by the formula (14) but by the formula (21), and the constant CiUI) is not represented by the formula (15) but by the formula (22). The same is true for the Q component. KJxI): -1~- la| ...(21) |a| |a| (2^i^L)

Ct(xl) = 0 ^ Cl(xI) = Cw(xI) + axKi(xI)x2(LW) (22) (2^i^L) -97- 200835169 (2) Although the gray code is in the 4th~ In the sixth embodiment, the case where the reception signal is modulated by the multi-turn QAM method will be described, but the present invention is not limited thereto. In general, in the case where the received signal is modulated by a gray code, that is, in a case where only one bit is changed between adjacent constellation points (marked points) of the received signal, the present invention can be 4 to the method described in the sixth embodiment, the approximate logarithmic probability ratio is calculated.

(3) Logarithmic Possibility Ratio of mi η - sum Decoding Method In the fifth embodiment, when f 値 is set to "1", the constant memory unit 54 and the multiplication unit 52 are unnecessary, and the logarithm possibility can be simplified. Calculated by comparison. (4) Logarithm likelihood ratio calculation unit In the fourth to sixth embodiments, the log likelihood ratio calculation unit first extracts the approximate log likelihood ratio λ I from the I channel component x1 of the received signal, and then based on the received signal The Q channel component XQ leads to an approximate logarithm possible φ sex ratio λ Q , but is not limited thereto. The logarithmic probability ratio calculation unit for the I channel component and the log likelihood ratio calculation unit for the Q channel component may be simultaneously operated, and the approximate logarithmic probability ratio may be derived in parallel. (5) Approximate formula In the fourth to sixth embodiments, the approximate logarithmic probability ratio is calculated based on the equation in which the logarithm possibility is compared with the theoretical expression in the vicinity of the determination of the 値 to Taylor, but the approximate equation is not limited. in this way. The approximate logarithmic probability ratio can also be calculated based on the formula that compares the logarithm probability to the theory or the Taylor to the nearest n (η is 2 to the natural number on 98-200835169). Further, instead of formulating the Taylor expansion of the theoretical expression, the approximate logarithmic probability ratio may be calculated from another equation in which the accuracy is determined to be higher, or an arbitrary equation other than the above. (6) Logarithmic probability ratio calculation unit of the sixth embodiment

The log likelihood ratio calculation unit of Fig. 35 described in the sixth embodiment can be used when the parameter a of the equations (21) and (22) is a positive number. When the parameter a is a negative number, the log likelihood ratio calculation unit becomes as shown in Fig. 36. The logarithmic probability ratio calculation unit of Fig. 3 deletes the structure of the logical inverse circuit NOT1 of Fig. 5 . In this case, the X-bit signal Data[6: (7-X)] is transmitted from the uppermost first bit (bit 6) via the bus width adjustment bus BU s 1 and overflow prevention. The highest order bit of the bus bar B us 2 is sent to the mutually exclusive logic OR circuit XOR2, and as the sign of the first approximate log likelihood ratio λ 1( 1), via the bus width adjustment bus bar Bus3 Output terminal 01 output. The mutually exclusive logic OR circuit XOR2 calculates the signal of the X bit element Data [6 : (7 - X)] from the topmost bit (bit 6), and the signal of the X bit Data[6 : (7 - X)] The mutually exclusive logical OR of the second bit (bit 5) from the top, and the second approximation log likelihood ratio λ 1 (2) symbol, via the bus width adjustment convergence The row Bus4 is output to the output terminal 02. (7) The number of modulation bits of the received signal is assumed to be a multi-turn adjustment of the received signal in the fourth to sixth embodiments. However, the present invention is not limited thereto, even if the received signal is 2 値 (0 - 99) - 200835169 and l) For the modulation, the invention can also be applied. (8) Transmission method Although the case of using the baseband method has been described in the fourth to sixth embodiments, the present invention is not limited thereto. The present invention can be applied in the same manner as the transmission method of the signal for multi-tone modulation, even in the case of using the baseband method but the frequency band transmission. (Modification of the whole)

The present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the scope of the invention. For example, the following modifications are also included. (1) Decoding program The decoder described in the embodiment of the present invention is not limited to a dedicated hardware device. It is also possible to externally install the decoding program on the memory, and the computer reads the decoding program from the memory and executes it, thereby realizing the function of the decoder. For example, in the fourth to sixth embodiments, the decoding program becomes each step including a flowchart of Figs. 24, 29, and 34. (2) Error Correction Code Although the LDPC decoder is described as a decoder by the repetition decoding method in the first to sixth embodiments, the present invention is not limited thereto. The methods described in the first to sixth embodiments can also be applied to other decoders such as a Viterbi decoder or a turbo decoder. It should be considered that the embodiments disclosed herein are exemplified in all matters, and are not intended to be limiting. The scope of the present invention is defined by the scope of the claims and the scope of the claims and the scope of the claims. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic structural view of a communication system according to a first embodiment. Fig. 2 is a view showing a correspondence example of transmission data and demodulation data. Fig. 3 is a schematic view showing the configuration of the apparatus on the receiving side of the first embodiment.

Fig. 4 is a structural diagram showing a decoder of the first embodiment. Figure 5 is a diagram showing an example of an inspection array. Figure 6 is a diagram of the Tanner graph of the inspection array shown in Figure 4. Fig. 7 is a view showing an example of a look-up table according to the first embodiment. Fig. 8 is a view showing a structure of a device on the receiving side according to the second embodiment. Fig. 9 is a view showing a structure of a decoder according to a second embodiment. Fig. 10 is a view showing a table of the table according to the second embodiment. Figure 11 is a graph showing the relationship between signal noise ratio (SNR) and error rate. Fig. 1 is a view showing the structure of the decoder of the third embodiment. 1° Fig. 3 is a diagram for explaining an example of the repeated termination condition setting unit. Fig. 14 is a diagram for explaining the repeated termination condition setting unit. A diagram of other examples. Fig. 15 is a view for explaining another example of the repeated termination condition setting unit. -101- 200835169 Figure 16 shows a data structure diagram containing the information segment of the iteration information In. Figure 17 shows a content distribution model diagram. Figure 18 is a block diagram of a conveyor. Fig. 19 is a view showing the data structure of the communication quality related database D B 1 Fig. 20 is a flow chart showing the transfer processing procedure of the transfer device.

Fig. 2 is a view showing another example of the data structure of the communication quality related database DB 1. Fig. 22 is a schematic structural view showing a communication system of the fourth embodiment. Fig. 23 is a view showing the configuration of a decoder of the fourth embodiment. Fig. 24 is a flow chart showing the processing operation of the determination unit in the fourth embodiment. Figure 25 shows the constellation diagram of 16Q AM. Figure 26 is a graph showing the coordinates of the I channel and the Q channel components at a particular constellation point of 256QAM. Fig. 27(a) is a graph showing the first log likelihood ratio λ Γ and the first approximate log likelihood ratio λ 1 in the case of 16Q AM. (b) The graph shows a graph of the second log likelihood ratio λ 2° and the second approximate log likelihood ratio λ 2 in the case of 16QAM. Fig. 28 is a structural diagram showing a logarithmic probability ratio calculating unit in the fourth embodiment. Fig. 29 is a flow chart showing the procedure of the calculation process of the logarithmic probability ratio of the I-band -102-200835169 channel component of the received signal in the fourth embodiment. Fig. 30 is a view for explaining a setting example of the constants Ki(xl) and Ci(xl). Fig. 3 (a) is a view showing a comparison of the logarithmic probability of the I channel component of the received signal in the conventional mode 1 and the fourth embodiment as compared with the calculated amount. (b) A diagram showing an example of the relationship between the number of modulation bits L and the total calculation amount of the U) map.

Fig. 32 is a view showing simulation results of the modes of the conventional mode 1 and the fourth embodiment. Fig. 3 is a structural diagram showing a logarithmic probability ratio calculating unit in the fifth embodiment. Fig. 34 is a flow chart showing the procedure of the calculation process of the approximate logarithmic probability ratio of the I channel component of the received signal in the fifth embodiment. Fig. 35 is a structural diagram showing a logarithmic probability ratio calculating unit in the sixth embodiment. Fig. 3 is a structural diagram showing a logarithmic possibility ratio calculating unit according to a modification of the sixth embodiment. [Main component symbol description] 72 74 4a 4b Encoder Modulator Communication path Demodulator Demodulation circuit Analog/digital conversion circuit 103- 200835169 5, 75, 85, 95 Decoder 5a Encoded data input埠

5b 5 c 6 , 76 , 51 , 60 , 65 7 , 9 10 11 , 81 12 , 15 13 , 14 20 ^ 120 ^ 220 21a , 22 , 23 30 35c Decoding data output 埠 error rate input 埠 logarithmic probability ratio Part decoding processing unit column processing unit row processing unit determination unit number determining unit table repeating completion condition setting unit electric wiring communication control unit end condition input埠

40, 91, 92, 93 41 42, 5 2 4 3 44, 54 50 250 61 82 Terminal device addition and subtraction unit multiplication unit approximation constant determination unit constant memory unit repetition end condition extraction unit transmission information generation unit transmission unit register (End of condition memory section) Input terminal -104-

II 200835169

〇1~〇1 7 Output editor Magi ~ Mag7 Absolute 値 calculation section XOR2~XOR6 Mutual exclusion logic or circuit N 0 T 1 ～N 〇T 7 Logic inverse circuit BL 2 ~BL 6 Built-in busbar Busl, Bus3~Busl4 Busbar width adjustment busbar Bus2, Busl5~Bus20 Overflow prevention busbar SI, S5, S6 Transmitter R1 to R6 Receiver DB 1 Communication quality related database DB2 Content database In Repeat number information Xn Coded data CDn decoding Information EX1~EX7 signal line extraction section

105-

Claims (1)

200835169 X. Patent application scope: 1. A decoder that performs error correction decoding on the encoded data transmitted by the communication path to obtain decoded data. The decoder is provided with: a decoding processing unit that repeatedly performs decoding operations. The error correction method is performed by repeating the decoding method, and the number determining unit determines the number of repetitions of the decoding operation based on the transmission characteristics of the communication path. 2. The decoder of claim 1, wherein the transmission characteristic of the communication route is a noise characteristic of the coded data; the number determination unit is calculated based on a guidance signal included in the coded data. The noise characteristics of the encoded data determine the number of iterations of the decoding operation. 3. The decoder of claim 1 of the patent application, further comprising an input port for inputting an error characteristic of the decoded data from the outside; the transmission characteristic of the communication route is the decoded data input by the input channel Error characteristic; The number determining unit determines the number of iterations of the decoding operation based on the error characteristic of the decoded data. 4. The decoder of claim 1, wherein the decoder further has an input port for inputting an error characteristic of the decoded data from the outside; a transmission characteristic of the communication route is a noise characteristic of the coded data and the -106- 200835169 Enter the error characteristic of the decoded data input by the input unit; the number determining unit selects the number of repetitions of the decoding operation specified according to the noise characteristic of the encoded data, and is specified according to the error characteristic of the decoded data. The number of iterations among the number of iterations of the decoding operation. 5. A receiving device that receives and decodes encoded data transmitted by a communication path, the receiving device having: The demodulator performs digital demodulation on the received encoded data; and the decoder of any one of claims 1 to 4 decodes the demodulated digital signal of the encoded data. 6. A decoding method for encoding data, which performs error correction decoding on a coded data transmitted by a communication route by using a repeated decoding method to obtain decoded data, the decoding method comprising: a determining step, which is based on the transmission of the communication route The number of iterations of the decoding operation is determined by the characteristics; and the step of performing the error correction decoding by the repeated decoding method is performed according to the number of iterations of the decision. 7. A communication system comprising: a transmitting device for transmitting encoded data to a communication path; and a receiving device for receiving and decoding the transmitted encoded data, the receiving device having a decoder for receiving the received data The coded data performs a repeated decoding method to obtain decoded data. The receiving device determines the number of iterations of the decoding according to the transmission characteristics of the communication path, and then performs error correction decoding by the repeated decoding method. 8. A decoder that performs error correction decoding on the coded data transmitted by the communication path to obtain decoded data, and includes: a decoding processing unit that performs the coded data by repeatedly decoding the decoding operation Error correction decoding The determination unit 'determines the end of the repetition of the decoding operation by the decoding processing unit; and the termination condition input 璋 is for receiving a repetition end condition from the outside of the decoder, and the determination unit inputs the 从 根据 according to the termination condition The input of the repeated termination condition 'determines the end of the repetition of the decoding operation by the decoding processing unit. 9. A decoding system, comprising: a decoder that performs error correction decoding on the encoded data transmitted by the communication path to obtain decoded data; and an iterative termination condition setting unit that externally connects to the decoder. The decoder includes: a decoding processing unit that performs error correction decoding of the encoded data by a repeated decoding method that repeatedly performs a decoding operation, and the determination unit determines that the decoding operation by the decoding processing unit ends the repetition of the decoding operation, and 108-200835169 End condition input 埠 is for receiving a repeating end condition from the outside of the decoder, and the repeating end condition setting unit is configured to input the adjusted end condition to the end condition of the decoder. The determination unit determines the end of the repetition of the decoding operation by the decoding processing unit based on the repeated termination condition input from the end condition input. 10. A receiving device that can receive encoded data via a communication route. A decoder is provided, which performs error correction decoding on the encoded data to obtain decoded data. The decoder includes: a decoding processing unit that performs error correction decoding of the encoded data by repeatedly decoding the decoding operation. The determination unit determines that the end of the repetition of the decoding operation by the decoding processing unit and the end condition input are for receiving a repetition end condition from the outside of the decoder, and the determination unit inputs the condition based on the end condition. The repeated termination condition is input, and the end of the repetition of the decoding operation by the decoding processing unit is determined. The receiving device further includes a repeated termination condition extracting unit that receives the repeated termination condition transmitted via the communication path, and the The end condition input 该 is supplied to the decoder by the end condition. -109- 200835169 11. A transmission device comprising: a repetition end condition setting unit that sets a repetition end condition of a decoding operation when an error correction decoder decodes encoded data; and a transmission unit that is to the error correction decoder The repeated termination condition set by the repeated termination condition setting unit is transmitted. 12. The transfer device of claim 11, wherein Further, a database is provided, which stores information for determining the communication quality when the encoded data is transmitted; the repeated termination condition setting unit refers to the database, determines the communication quality when the encoded data is transmitted, and sets the communication quality according to the communication quality. End the condition repeatedly. The transfer device of claim 11, wherein the transfer unit transmits an information segment including a header portion and an actual data portion; wherein the repeated termination condition is described in the header portion; and the actual data portion is described The coded data subjected to the decoding operation based on the iterative end condition or the information for specifying the coded data subjected to the decoding operation based on the iterative end condition. 1 4 A communication quality adjustment method for adjusting a communication quality when transmitting a coded material to a user side communication device having an error correction decoder that repeatedly performs decoding calculation, the method comprising: a setting step And setting a repetition end condition of the decoding operation when the error correction decoder converts the encoded data into -110·200835169 lines; and transmitting a step of transmitting the setting to the error correction decoder, the setting step includes The step of repeating the end condition is set in response to the communication quality obtained by the user. 1 5 - a decoder that performs error correction decoding on the encoded data transmitted by the communication path to obtain decoded data, and the decoder has: The logarithm likelihood ratio calculating unit calculates an approximation 对 of a logarithmic probability ratio of the input coded data X based on an approximation formula that approximates a theoretical expression indicating a relationship between the coded data x and a log likelihood ratio; and a decoding processing unit; The error correction decoding of the encoded data X is performed according to the log likelihood ratio 値λ i . 1 6 · The decoder of claim 15 wherein the approximation is that the closer the code x is closer to the decision, the more accurately the theoretical formula is approximated; the decision is based on the theoretical expression The probability of the system of the encoded data x is equal to the probability that the coded data X is 値1. 1 7 - The decoder of claim 16 of the patent application, wherein the approximation is a formula in which the theoretical formula performs Taylor expansion in the determination. a decoder that performs error correction decoding on the encoded data transmitted by the communication path to obtain decoded data, and the decoder includes: a likelihood calculation unit for encoding the data X according to the formula (A1) Calculate the logarithm likelihood ratio approximation 値λ i(i = l~L); and -111- 200835169 -(AD ^i = -gxKj x(x-Cj) (i = 1~L) The decoding processing unit is based on The approximate ratio of the logarithmic probability ratio is i(i=l~L), and the error correction decoding of the encoded data X is performed. Where L is the number of modulation bits of the coded data x, the g-system constant, the KI, the CI system, the 値 of the coded data X, the coordinates of the constellation points, and the number of the l-dependent. 19. The decoder of claim 18, wherein the coded data X is a gray coded signal. 20. The decoder of claim 18, wherein in the formula (A1), g is a constant 2/σ 2 ; the decoding processing unit performs error correction decoding according to a sum-product decoding method, wherein 1 2 is the divergence of the noise component contained in the encoded data x. 2: The decoder of claim 18, wherein in the formula (A1), g is a positive number that does not depend on the encoded data x; the decoding processing unit performs error correction according to a simplified decoding method decoding. 22. The decoder of claim 18, wherein the coordinate of the constellation point of the encoded data X is axp, wherein a is a number other than 0, p is - (2L - 1) or more, and (2L - 1) The following odd number, in the formula (A1), Ki is expressed by the formula (A2), -112-200835169 κ.=--1 la! (A2) ... (A3) ' x 2 Cw when K! =+y~j*,x <hκ· =一-1» |a| la| (2^i^L) In the (Al) formula, Ci is represented by the formula (A3), Ci =0, Cj = Cw + ax K丨x 2 (1/·1+1) (2SigL) 23· as claimed in the 22nd item a decoder in which the coded data X is represented by S (S^2) bits expressed by 2's complement, and when a is a negative number, the probability calculation unit reads the coded data X The first bit of the uppermost order is the symbol output of the first logarithmic probability ratio 値λ 1 ; the likelihood calculating unit includes a first absolute chirp computing circuit that calculates the absolute value of the encoded data値, and output the first logarithm probability ratio is approximately 値λ 1 absolute 値. 24 · $α Patent Application No. 22 decoder, where -113- 200835169 The coded data x is represented by S (S^2) bits expressed by 2's complement, when a is a positive number The possibility calculation unit includes: the first logic OR circuit that changes the first bit of the coded data X from the top to the inversion, and outputs the first log likelihood ratio 値λ 1 Symbol; and The first absolute 値 calculation circuit calculates the absolute 値 of the coded data X and outputs an absolute 値 of the first log likelihood ratio 値λ 1 . 25. The decoder of claim 23 or 24, wherein, in the case of S 2 3, the possibility calculation unit further includes: a second logic or circuit for calculating the highest order of the encoded data X The first bit 値 or its inverse 値 and the second octet from the topmost 値 逻辑 logical OR, and output the second log likelihood ratio 値 λ 2 symbol; and the second The absolute 値 calculation circuit calculates the inverse of the second bit from the topmost bit and the second bit from the top, and the second bit from the topmost bit of the encoded data X, and The first bit from the top is used as the absolute 値 of the S bit from the uppermost first bit of the encoded data X, and then the absolute of the second log likelihood ratio λ 2 is output.値, where I is the natural number of all (3SISS). 26. The decoder of claim 25, wherein -114-200835169 in the case of S^4, the likelihood calculation section further comprises: a Kth logical OR circuit for calculating the slave data x a mutually exclusive (K-1)-bit 値 and a mutually exclusive logical OR from the uppermost κ-bit 値, and output a symbol of the Kth log likelihood ratio 値λ k; and The Kth absolute 値 calculation circuit calculates the inversion of the first bit from the uppermost level and the second bit from the uppermost level as the Kth bit from the uppermost order of the encoded data X.値, and the Jth bit from the top of the order is the absolute value of the (S - K + 2) bit of the U + K - 2) bit from the top of the encoded data X And then output the Kth logarithmic probability ratio to the absolute 値 値 λ k , where the K system satisfies all the natural numbers of (3 S KS (S — 1)), and the J system satisfies (3SJS(S—K + 2 )) All natural numbers. 27 - a decoding method, which performs error correction decoding on the encoded data transmitted by the communication route, and obtains decoded data, and the coordinate of the constellation point of the encoded data X is axp, wherein the number other than the a system is P, and the P is one ( 2L-1) or more, and an odd number below (2L - 1), wherein L is the number of modulation bits of the coded data X, and the decoding method includes: a possibility calculation step for the coded data X, according to Calculate the log likelihood ratio 値λ i(i = l~L) from i = 1 to L; and -115- 200835169 The decoding step is based on the log likelihood ratio, and the encoding is performed. The error correction decoding of the data X, the possibility calculation step includes: a setting step of setting the constant Κι to an a/ | a | and setting the constant Ci to 0; the calculation step is based on the constant c i- ! In the formula (A4), the constant Ki (i = 2 to L) is calculated; i=+RX<Ci-丨K丨=_il] (A4) The calculation step is based on the constant K ^ and the formula (A5), and Ci (i = 2 to L); and (A5) ^ CM + a X Kj X 2(W4*l) l (2gigL) The calculation step is based on the system constants K i and Ci and calculates the log likelihood ratio 値 λ i(i = l~L) ' 〜gxK丨χ(χ〇...(10) (i) according to the equation (A6) = l~L) where g is a constant. 28·~ A computer-readable recording medium that records the decoding program, and the program is used to correct the encoded data transmitted by the communication route-116-200835169 The code is used to obtain the decoded data. The decoding program is used to cause the computer to function as the following component. The likelihood calculation unit calculates the log likelihood ratio based on the equation (A7) for the coded data X; I 1 ( i=l~L); and ^ = -gxKix(x~Ci) ...(10) (i = l~L) 角军码Μ Ϊ 部 ' is based on the approximation of the logarithm probability ratio 1 (1 - 丨~丄)' and the error correction correction of the coded data X is performed, where 'L is the number of modulation bits of the coded data X, g is a constant, Ki 'Ci and the code 廿B+e 丨, 丨XL T 1 枓 値 X 値, its constellation point coordinates and L dependent number. -117-