200825693 九、發明說明： 【發明所屬之技術領域】 特別是有關於具有即時 本發明係有關於手持式裝置 時鐘與重置電路之手持式裝置。 【先前技術】 -般而言’各式電腦系 置内部皆有1時 A丨符式裝置，其糸統或裝 寻寸 ^里（Real Time Clock，RTC )曰 Θ 式雪 路。例如，個人電腦rp 日日片或电 含-即時心士 （ _1 CGmputer，PC)主機板包 里電路’其為電腦系統計算時間之依據。每電 «機時’將由主機板之電池供應電源至RTC依 己錄時間’使系統不致於每次重新開機時，均必 /、H統㈣預設時間，造成使用者困擾。 RTC之傳輸拉式大多使用i2c( the inter ic)方式傳於， =㈣輸通道，序列資料線(一心 %脈線（Semi Clock Line, SCL)做為傳輪路徑。 歹％脈線用於傳輸時脈,；而序列資料線，為雙 腳，用於傳送或接收資料。 寻輸接 RTC之4間為系統時間，故其準確度為必要考量。— 般:言，由於具有RTC電路之系統或裝置通常具有—自给 之電源供應，故於系統未開機時，RTC也能正確計數時間. 當系統進行重置動作或重新啟動系統時：並不會改變其曰内 4之RTC h•間。只有當系統或裝置喪失電源供應時，恭 重新設定其RTC時間。 ^ 然而，先前技術存有一問題，困擾著吾人已夂， 八 外即 5 200825693 若中央處理器之重置動作與中央處理器内部之rtc無法 同時發生：因此，極易導致手持式系統無法正常運作:舉 例而言，參照第-圖，其顯示應用於手持式裝置之中央處 理單元（CPU ) i i 〇以及電源管理單元（心㈣二 U^nit，PMU) 12〇’其中，中央處理單以1()内包含即時時 釦（RTC )之電路，用以設定系統内部之時間。電源管理 單元120耦合中央處理單元（cpu) 11〇，以提供中央處理 ， 單元110所需之電源。 、 t 央處理單元 110之〇16 (GPI〇3〇)、R8 (gpi〇9) 以及W15 (GPIO40)接腳為通用輸入輸出（Gpi〇)接腳。 可由公用周邊匯流排（public peripheral bus )存取或控制。 D16接腳透過電阻R393連接至電源管理單元12〇之I輸出 接腳34 (nPWRFAIL)，此接腳34為開汲極輸=端 (Open-Drain 〇utput )，當手持式裝置之電池（vb Ατ )電 量過低或因過熱導致系統關閉（Shutd〇wn )或移除電池: (時。則此接腳設為低位準.,。 ^ 中央處理單元110之接腳R8連接至電源管理單元12〇 之接腳35 (nINT)，電源管理單元12〇輸出接腳35作用 為表示充電缺陷（ChargeFault)或終止，或當輸出低於— 較低允許量時，則將作動至低位準。W15連接至電源開關 S17之端點2與一電阻值4.7K之電阻，電源開關S17之端 點1連接至電池（VB AT )。 電源管理單元120之接腳32 ( nMPU一RESET )為開 汲極重置輸出端，連接至中央處理單元U0之接腳丄二 6 200825693 (nMPU一RESET)，此接腳32藉由使用者設定而產生之開 汲極重置# 5虎輸出，而U2 0接腳為中央處理單元之重 置輸入端（MPU Reset Input)接收自電源管理單元之 接腳32之非同步輸入信號而作動，並重置中央處理單元 11 〇及其内部之RTC時間。 中央處理單元110之接腳丁 2〇 (low 一 PWR)為中央 處理單元U0之低電源請求輸出端（L〇w_—p〇wer Re㈣s、t200825693 IX. INSTRUCTIONS: [Technical field to which the invention pertains] In particular, there is a hand-held device having a clock and a reset circuit for a hand-held device. [Prior Art] - As a general rule, there are 1 hour A-style devices in various computer systems, and the system is equipped with a Real Time Clock (RTC) Θ 雪 snow road. For example, a personal computer rp day or a circuit containing an instant-in-kind (_1 CG mpmp, PC) motherboard package is the basis for calculating the time for the computer system. Every time the «machine time' will be supplied by the battery of the motherboard to the RTC according to the recording time ', so that the system will not be restarted every time, the system must be /, H system (four) preset time, causing user trouble. RTC transmission pull mode is mostly transmitted by i2c (the inter ic) method, = (four) transmission channel, sequence data line (Semi Clock Line (SCL) as the transmission path. 歹% pulse line is used for transmission The clock, the serial data line, is the two feet for transmitting or receiving data. The four channels of the homing and RTC are system time, so the accuracy is a necessary consideration. - General: Because of the system with RTC circuit Or the device usually has a self-supplied power supply, so the RTC can also correctly count the time when the system is not turned on. When the system performs a reset action or restarts the system: it does not change the RTC h• between the 4s. Only when the system or device loses power supply, Christine resets its RTC time. ^ However, there is a problem with the prior art, which is bothering us, and it is 5th, 20085693. If the central processor resets and the internal processor The rtc cannot occur at the same time: therefore, it is very easy to cause the handheld system to malfunction: for example, refer to the figure, which shows the central processing unit (CPU) ii and the power supply tube applied to the handheld device. Unit (heart (4) 2 U^nit, PMU) 12〇', where the central processing unit contains a real-time deduction (RTC) circuit in 1() to set the time inside the system. The power management unit 120 is coupled to the central processing unit. (cpu) 11〇, to provide central processing, power required by unit 110. t16 (GPI〇3〇), R8 (gpi〇9), and W15 (GPIO40) pins of universal processing unit 110 are general-purpose inputs The output (Gpi〇) pin can be accessed or controlled by a public peripheral bus. The D16 pin is connected to the I-output pin 34 (nPWRFAIL) of the power management unit 12 via a resistor R393, which is 34 For Open-Drain 〇utput, when the battery of the handheld device (vb Ατ) is too low or the system is shut down due to overheating (Shutd〇wn) or remove the battery: (When this is the case) The pin is set to a low level., ^ The pin R8 of the central processing unit 110 is connected to the pin 35 (nINT) of the power management unit 12, and the power management unit 12 〇 the output pin 35 functions to indicate a charging fault (ChargeFault) or Terminate, or when the output is below - lower allowable amount, it will act To the low level, W15 is connected to the end of power switch S17 and a resistor of 4.7K, and the end of power switch S17 is connected to the battery (VB AT). Pin 32 of power management unit 120 (nMPU-RESET) ) for the open bucker reset output, connected to the central processing unit U0 pin 丄 2 6 200825693 (nMPU RESET), this pin 32 is created by the user to open the bungee reset # 5 tiger output And the U2 0 pin is activated by the MPU Reset Input receiving the asynchronous input signal from the pin 32 of the power management unit, and resetting the central processing unit 11 and its internal RTC. time. The pin 1 of the central processing unit 110 (low one PWR) is the low power request output end of the central processing unit U0 (L〇w_-p〇wer Re(4) s, t
Output)。表不中央處理單元j〗〇處於低電源休眠模式，中 央處理單元110之接腳T20接收電源管理單元12〇'之接腳 3 6 ( LOW—P0 WER )之信號後，使中央處理單元⑽進入 休眠模式。 電源管理單元120之接腳47 (pB〇n一〇ff)與電源開 關S17之端點2連接’當電源開關S17導通，觸發接腳叼， 使之電源管理單元12{)自低電源模式開啟。 電源g理單tl 12〇之接腳33 ( nRESpwR〇N)為開汲 極系統重置輸出端’連接至中央處理單元ιι〇之接腳川 』cm:〇FF)’中央處理單元11〇之接腳接收來自電源 官理早兀120之接腳33之重置信號時，只重置中央處理單 % 110内部之狀態’而不重置中央處理單幻1G之 時間。 第圖中匕3 延遲電路丨30,此延遲電路接腳5(Cd) 垃接1 a⑶8至接地線，其用途為設定延遲之時間用； 腳（IN )為電池偵測輸入端（Battery Detect Input )， 與電池（VBAT)妓因## 门連接一電容C368連至接地線；接腳 200825693 3 (GND)連接至接地線；接腳4 (NC)為空接狀態，並 未連接任何元件。接腳i為低位準（Active L〇w)重置信 號輸出端，連接至中央處理單元11〇之接腳Ri2。 此延遲電路130其主要功能為延遲時間，當手持式妒 置之電池（VBAT)第〜欠放人手持式裝置時，延遲電路 130之接腳i自動延遲約2秒時間，接著，接腳i再輸出 一重置信號至中央處理單元丨丨〇。 若於延遲電路13G延遲之時間内（自動延遲約2秒時 間）’使用者按下S17之電源開關鍵，電源管理單元12〇 之接腳33端也會同時發送一重置信號至給中央處 =接腳Y12!，由於中央處理單元η。之電源為電源 €理早元120所提供，故當中央盧 。一 ，Λ 夹處理早70 110電源穩定後， 延遲電路"。輸出之重置信號早已消失，意即中央處理後 元110並未檢測到重置信號。 因此，上述先前技術極易造成中央處理單S110 正吊，運作，而導致手持式裝置無法 广 須先移除手持式裝置之電池後 =t作法必 欠更新裝载電池至手牲—壯 置内，再嘗試重新開啟手持式裝 夺式破 ^ Al 表置電源，再視得否正當弘 動。然而上述電路配置’常造成使用者之不便。吊啟 【發明内容】 為解Μ述之問題，本發明主要係揭露 0姻重置電路之手持式裝置，其包含一電池。 理單元，内部具有-即時時鐘，此中 中央處 其手持式裝置内之邏輯與處理且、早匈斷 /、私序。一電源管理單元， 8 200825693 耦合於中央處理單元，提供並管理 應。-電源開關，其一端連接至該電：持^之電源供 源管理單元與中央處理單元: 端連接其電 理單元，此重置電:係::生：第重置重電：’連接至中央處 其中，當電池剛置入此“C號。 關時，其中央處理單元同時置’亚開啟該電源開 及自電源管理單元接收;路=-重置信號 '=作，並清除中央處理單元之即時時： 虽中央處理單元已完成重置動才里 開關時，中央處理單元僅自電源管理單元啟：電源 號，該中央處理單元内部進行—重 重置信 置電路包括：正反哭電踗 乍。其中所述之重 態;反向電路耦合;::中==器電路之輸出狀 藉以提供反向之信號輸出至正反器器電路間， 於正反器電路與中央严f时-σ私 5閘電路，耦合 (〇r)邏輯。值得注:以提供布林代數之或 -重置端點，藉以重：二，所述之中央處理單元包括第 輸入端連接至上述第-重置端點。且中；處η之一 -重置端點，藉以重置令央處理單元应m弟 述之=電路輸出端連接至第一重置端點。、、，里、、中所 時間電以改善先前技術之即時時㈣ 被確認正常開機前，手持式裝置及元未 輸入能於下次開啟時，得，時正常 200825693 正常開機後，於下次開啟系統 置系統，並不重置即時時中央處理早兀僅早純重 覆蓋，俾以達到正常開啟系里日=，_保其Rtc時間不被 【實施方式】 ，、、’，亚能確保正確RTC之時間。 -：：：：：：：：：：：；：- 此除文中之較佳實 =貫施例僅為例示之用，因 實施例中。且本發明並^ 明亦可廣泛地應用在其他 中請，圍及其同等領=:任何實施例，應以隨附之 佳實: = = 書:構= 實施例數目，至少為:構或特性，在本發明中，其較佳 實祐你丨由 為一個。因此，本說明書中出現「較佳 姓構戈特I不必完全參照同—實施例。再者，其特殊特徵、 ίΓ使用任何適當方法渡合於較佳實施例中= 手持’根縣”讀佳㈣例，為本發明之 26Γ Λ=0構圖。其手持式裝置200包括一電池 示)，中#理t 2丨0’内部具有-即時時鐘（未顯 輯#理ί早疋210用以判斷該手持式裝置綱内之邏 元2、=，，、耘序；一記憶體單元240,耦合至中央處理單 r 用以错存該手持式裝置200之資料内容；-通吨 :組，，麵合至中央處理單元21〇，用以通訊信息至;卜 持式:理單元⑽，透過電池鳩提供並管理其手 中之電源供應，其電源管理單元220轉合於其 、处早70 2〗0;以及一重置電路230,連接至中央處理 200825693 單元其重置電路23G係以產生—第—重置信號。 參恥第二圖，為依據本發明概 ς 例圖，用以說明本發明創斬夕置之電路貫施 (Reset)雷拉，μ 年時鐘（RTC)與重置 即時時鐘功能之手持通W “ 於具有 818 央處理輩开知連接其電源管理單元220與中 、处里早TC210。當電池26〇 (未 置細’並開啟該電源開關S18時，其中央處二= 同時自該重置電路23〇接 处里早凡210 單元220第二重置"产中：考重置^虎及自該電源管理 置仏就，中央處理單元210内部進行一重 動作，亚清除中央處理單元21G之即時時鐘。 ，、當中央處理單元210已完成重置動作，且重新開啟該 電源開關S18時，中央處理輩开？〇拉 人 、、―了 η處理早接收電源管理單元22〇 I之弟—重置j§號’該中央處理單元内部進行—重 作，但並未清除中央處理單元210之即時時鐘。 在本實施例中，重置電路230包括正反器電路232、 反向電路ΠΠ以及或閘電路〇R1。反向電路ινι第5端盥 第：端、正反器之第8端與第4端以及或閘電路⑽：第 5端與第3端分別為其電路之電源端與接地端。亦即， VDD—DRTC一0MAP標示為手持式裝置2〇〇系統之電源 端:連接至反向電路IV1之電源端第5端、或閘電路⑽ 之第5端、正反器之電源端8 ( Vcc)以及電阻幻66。口 要其手持式裝置200之電池260未自手持式裝置2〇〇内^ 除，VDD—DRTC_OMAP持續供給電源至上述各元件。 11 200825693 電源管理單元220轉合至中央處理單元2i〇以提供中 央處理單it 210所需之電源。中央處理單元21〇之 ㈣〇則、R8 (GPI09)、P18 (GPI〇〇3)以及㈣ (GPI〇4〇)接腳為通用輸入輸出（Gpi〇)接腳，可由公 用周邊匯流排（Publie PeHpheral Bus)存取或控制。㈣ 接腳透過電阻R393連接至電源管理單元22〇之輸出接腳 34 ( nPWRFAIL )，此接腳34為開沒極輸出端（咖❿心 ⑽PU〇,當手持式裝置之電池電量過低，或因過熱導 致糸統即將關閉（Shutdown) g移除電池2〇6之蓋時，則 此接腳作動為低位準。接腳R8連接至電源管理單元22〇 之接腳35 ( nINT)。 電源官理早to 220輸出接腳35作用為表示充電缺陷 (Charge Fault)或終止，或當輸出低於一較低允許量時， 作動至電位之低位準。接腳m連接至反向電路m之輸 入端2。W15連接至電源開關S18之端點2與一電阻，其 端點1連接至電池。 ’、 電源g理單x 220之接腳32 (nMPUjRESET)為開 汲極重置輸出端，連接至中央處理單元21〇之接腳u2〇 (HMPU_RESET)。而接腳U20接收由電源管理單元22〇 之接腳32端輸出之非同步輸入信號，中央處理單元 產生相對應之動作。 不、接腳T20 (L0W_PWR)端為中央處理單元之低電源 需求輸出端（Low-power Request Output )，表示中央處理 單元210處於低電源休眠模式，中央處理單元2i〇之接腳 12 200825693 T20接收電源管理單元22Q之接腳％ (l〇w—卿 信號後，使中央處理單元210進入休眠模式。 :原，理單元22〇之接腳47 (pB〇n—〇ff)與電源開 f之端點2連接’當電源開關s 18導通，觸發接腳47， 使之電源管理單元22〇自低電源模式開啟。 /電源5理單70 220之接腳33 (nRESPWRON)為開汲 極系統重置輸出端，連接至中央處理單元210之第二重置 端點（接腳Y12 (〇N/〇FF)，第二重置端點（接腳YU) 為低位準非同步重置信號輸入端（ASynchronc)us Reset)， 當中央處理單元210接收來自電源管理單元220之接腳33 之重^戒時’則重置（reset)巾央處理單元210内部所 有狀態；但並不會清除中央處理單元210内部之RTC時間。 中央處理單元210之接腳R12 (nRESpwR〇N)為第 二重置端點。第二重置端點（R12)為中央處理單元⑽ 之重置輸入端。當當中央處理單元210之R12接收來自重 置電路23G輸出之重置信號時，中央處理單元210不僅重 置内。卩内。卩所有狀態，也將一併清除中央處理單元2丨〇内 部之RTC時間。 ^當手持式裝置200之電池260 (未顯示於第三圖）首 j置入手持式裝置内之電池座後，VDD供給電源維持一預 π電位，則Rl66以及C37〇形成一電阻/電容（rc)充放 電電路，因此，正反器電路24〇之接腳6 (CLR)將維持 二低準位（Low)脈衝由其接腳6輸入至正反器内，使之 清除先前正反器電路232之接腳5(Q)狀態，設定為低準 13 200825693 位（正反器電路232之資料輸入端2端（D )與時脈輸入 端1端（CLK)接地，故不需考慮）。當正反器電路232 之輸出接腳5為低準位，則由其接腳5連接至或閑電路〇以 之接腳2也為低準位。再者，當或閘電路〇Rl之接腳二為 低準位，則或閘電路OR1之輸出接腳4狀態，依照或閉電 路OR1之接腳1狀態而定。 _ w仍孓荻置於于符式裝置 2 0 0之電池座内，則中本虛裡话一 甲兴恿理早兀210之接腳R12與Y12 必須同時被重置電路230 兩、、is - 乂 电峪及电源官理系統220輸出之第一 =…所重置。此時’電源管理系統220由接腳 置信號至中央處理單元210之接腳Yl2,中 央處理單元210内部進行一番罢 、， ^ 7Τ ? 1 Π 置動作，並h除該中央處理 早兀210之即時時鐘（RT ^ ^ ^ 210已宗#舌罢门4，备该中央處理單元 .,^ σ ，且重新開啟該電源開關S18時，該 中央處理單元21〇僅自哕帝 才 ^ 置作f卢，兮由官理單元220接收該第二重 不清除該中央處理單元210之丁一重置動作，而 早10之即時時鐘（RTC)。 因此，本發明之創新設計得以 鐘與重置時間電路。先則技術之即時時 正當問題，解決中央處理單元未祐 正吊開機月”其接腳R12i * 早几未被 常開機後，於下次門啟糸紅士靶正㊉啟動，並於系統正 4啟系、、先日守，中央處 。 糸統，並不重置其 錢理以僅早純重置 p itilf τ ^ 蚪間，確保其RTC時間不被舜# 已達到正常開啟系統，並能 了门不被设盍’ 對熟悉此領域技藝者， 丁门 X明雖以較佳實例闌明如 200825693 上然其亚非用以限定本發明之精 精神與範圍内所作之修改 f。在不脫離本發明之 之申請專利範圍内，：乂〜以的配置’均應包含在下述 嫌 乾圍應覆墓所有類似修改盘 構，且應做最寬廣的轉。 *仙修改與類似結 元、=本發明提及之中央處理單元、電源管理單 ::他的選擇名稱。再者，各種相同 ::i二二之與其較佳實施例所揭露其他變化與修 亚不迷月本發明之範圍與精神。 【圖式簡單說明】 為了更完整了解本發明及其優點，以上 明且配合_’其中相同數字表示相^件，其中： 第-圖係依據先前技術之重置（Reset) (RTC)電路。 丁里 第二圖，根據本發明之較佳實施例，為本發明之手持 式裝置之架構圖。 ， ' 第三圖係根據本發明較佳實施例之即時時鐘與重置電 路之電路圖。 ％ 【主要元件符號說明】 110 中央處理單元 120 電源管理單元 130 延遲電路 200 手持式裝置 210 中央處理單元 15 200825693 220 電源管理單元 230 重置電路 232 正反器電路 240 記憶體單元 250 通訊模組 260 電池 16Output). The central processing unit j is in the low power sleep mode, and the pin T20 of the central processing unit 110 receives the signal of the pin 3 6 (LOW_P0 WER ) of the power management unit 12, and then causes the central processing unit (10) to enter. Sleep mode. The pin 47 of the power management unit 120 (pB〇n-〇ff) is connected to the terminal 2 of the power switch S17. When the power switch S17 is turned on, the pin is triggered, so that the power management unit 12{) is turned on from the low power mode. . The power supply g tl 12 〇 pin 33 ( nRESpwR 〇 N) is the open 系统 system reset output 'connected to the central processing unit ι 〇 〇 』 』 』 cm ) ) ) 中央 中央 中央 中央 中央 中央 中央 中央 中央 中央 中央 中央 中央When the pin receives the reset signal from the pin 33 of the power supply manager 120, it only resets the state of the internal processing unit % 110 without resetting the time of the central processing single magic 1G. In the figure, 匕3 delay circuit 丨30, the delay circuit pin 5 (Cd) is connected to 1 a (3) 8 to the ground line, and its purpose is to set the delay time; the foot (IN) is the battery detection input (Battery Detect Input) ), and the battery (VBAT)妓## gate is connected to a capacitor C368 connected to the grounding wire; the pin 200825693 3 (GND) is connected to the grounding wire; the pin 4 (NC) is empty, and no component is connected. The pin i is a low level (Active L〇w) reset signal output terminal and is connected to the pin Ri2 of the central processing unit 11〇. The main function of the delay circuit 130 is the delay time. When the battery of the handheld device (VBAT) is placed under the hand-held device, the pin i of the delay circuit 130 is automatically delayed by about 2 seconds, and then, the pin i Then output a reset signal to the central processing unit. If the delay is delayed by the delay circuit 13G (automatic delay of about 2 seconds), the user presses the power switch of S17, and the pin 33 of the power management unit 12 also sends a reset signal to the center. = pin Y12!, due to central processing unit η. The power supply for the power supply is provided by the 120 Yuan, so it is the Central Lu. First, Λ clip processing early 70 110 power supply stability, delay circuit ". The output reset signal has long since disappeared, meaning that the reset signal is not detected by the central processing unit 110. Therefore, the above prior art is very likely to cause the central processing unit S110 to hang and operate, and the handheld device cannot be removed from the battery of the handheld device. Then try to re-open the hand-held device to break the power of the Al table, and then see if it is right. However, the above circuit configuration ' often causes inconvenience to the user. [Invention] In order to solve the problem, the present invention mainly discloses a handheld device of a zero-reset circuit, which comprises a battery. The unit has an internal-time clock, in which the logic and processing in the handheld device at the center, early, and/or private. A power management unit, 8 200825693, is coupled to the central processing unit and is provided and managed. - A power switch, one end of which is connected to the power: the power supply source management unit and the central processing unit: the terminal is connected to its power unit, the reset power: system:: raw: the first reset power: 'connected to In the central part, when the battery has just been placed in this "C number. Off, its central processing unit is simultaneously set to 'Asia open the power supply and receive from the power management unit; Road = - Reset signal' =, and clear the central processing Immediate time of the unit: Although the central processing unit has completed the reset switch, the central processing unit only starts from the power management unit: the power supply number, the central processing unit internally performs the reset signal circuit including: positive and negative crying乍. The above-mentioned heavy state; reverse circuit coupling;:: the output of the == circuit is provided to provide a reverse signal output to the positive and negative circuit, and the positive and negative circuit and the central strict f-σ Private 5 gate circuit, coupled (〇r) logic. Worth note: to provide the Boolean algebra - reset the endpoint, by weight: second, the central processing unit includes the first input connected to the above - reset Endpoint and middle; one at η - reset endpoint By means of the reset, the central processing unit should be connected to the first reset terminal. The power of the time, the middle, the middle, and the middle of the time to improve the instant time of the prior art (4) is confirmed to be normally turned on, hand-held The device and the element are not input when it is next turned on. When it is normal, 200825693 is normally turned on. After the system is turned on next time, the system is not reset, and the central processing is only early and purely heavy, so as to reach normal. Open the system in the day =, _ keep its Rtc time is not [implementation], ,, ', Ya can ensure the correct RTC time. -:::::::::::;:-佳实=本实施例 is for illustrative purposes only, as in the embodiment, and the invention can also be widely applied to other applications, and its equivalents =: any embodiment, should be attached Real: = = Book: Structure = Number of embodiments, at least: structure or characteristics, in the present invention, it is better to use one for you. Therefore, in this specification, "the preferred surname Got I does not have to be Full reference to the same - embodiment. Moreover, its special features, use any suitable The method of bonding the transition to a preferred embodiment of the handheld = 'Shimane Prefecture "good read iv embodiment, 26Γ present invention Λ = 0 patterning. The handheld device 200 includes a battery display), and the internal control unit has an instant clock (not shown in the figure) to determine the logic element 2 in the handheld device. a memory unit 240 coupled to the central processing unit r for erroneously storing the data content of the handheld device 200; the ton: group, which is integrated into the central processing unit 21 〇 for communication information To: a unit (10) that provides and manages the power supply in its hands through the battery pack, its power management unit 220 is switched to its location, and a reset circuit 230 is connected to the central processing unit. 200825693 The unit reset circuit 23G is used to generate the -first reset signal. The second figure is a schematic diagram according to the present invention, which is used to illustrate the circuit of the present invention. The μ-year clock (RTC) and the hand-held pass function for resetting the instant clock function "have connected the power management unit 220 to the middle and early TC210 with the 818 central processing. When the battery is 26 〇 (not thinned out) When the power switch S18 is turned on, the center of the power switch S = 2 is simultaneously connected from the reset circuit 23 In the second phase of the 210 unit 220, the second reset "production: test reset ^ tiger and from the power management settings, the central processing unit 210 internally performs a heavy action, sub-clearing the instant processing clock of the central processing unit 21G. When the central processing unit 210 has completed the resetting operation and re-opens the power switch S18, the central processing unit opens, and the η handles the early receiving power management unit 22〇I's brother-reset j§ 'The central processing unit internally performs - redo, but does not clear the instant clock of the central processing unit 210. In the present embodiment, the reset circuit 230 includes a flip-flop circuit 232, a reverse circuit ΠΠ, and or a gate circuit 〇 R1 The reverse circuit ινι 5th end: the end, the 8th and 4th ends of the flip-flop and the OR gate circuit (10): the 5th end and the 3rd end are respectively the power supply end and the ground end of the circuit. VDD-DRTC_0MAP is marked as the power supply end of the handheld device 2〇〇 system: connected to the 5th end of the power supply terminal of the reverse circuit IV1, or the 5th end of the gate circuit (10), and the power supply terminal 8 of the flip-flop (Vcc And the resistance of the illusion 66. The mouth wants the power of its handheld device 200 The pool 260 is not self-contained, and VDD_DRTC_OMAP continuously supplies power to the above components. 11 200825693 The power management unit 220 is coupled to the central processing unit 2i to provide the power required for central processing of the single unit 210. The central processing unit 21 (4), R8 (GPI09), P18 (GPI〇〇3), and (4) (GPI〇4〇) pins are general-purpose input/output (Gpi〇) pins that can be connected by a common peripheral bus ( Publie PeHpheral Bus) Access or control. (4) The pin is connected to the output pin 34 (nPWRFAIL) of the power management unit 22 via the resistor R393. The pin 34 is the open output terminal (the coffee core (10) PU〇, when the battery of the handheld device is too low, or When the system is about to close due to overheating (Shutdown) g, when the cover of the battery 2〇6 is removed, the pin is actuated to the low level. The pin R8 is connected to the pin 35 (nINT) of the power management unit 22. The early to 220 output pin 35 acts to indicate a charge fault or termination, or when the output is below a lower allowable amount, the low level is actuated to the potential. The pin m is connected to the input of the reverse circuit m Terminal 2. W15 is connected to the end point 2 of the power switch S18 and a resistor, and its end 1 is connected to the battery. ', the power supply unit x 220 pin 32 (nMPUjRESET) is the open drain reset output, the connection The pin U2〇 (HMPU_RESET) is connected to the central processing unit 21, and the pin U20 receives the asynchronous input signal outputted from the pin 32 end of the power management unit 22, and the central processing unit generates a corresponding action. Pin T20 (L0W_PWR) is the low power of the central processing unit The output terminal (Low-power Request Output) indicates that the central processing unit 210 is in the low power sleep mode, and the pin 12 of the central processing unit 2i is receiving the pin % of the power management unit 22Q (l〇w-qing signal) The central processing unit 210 enters the sleep mode. The original unit 22 (pB〇n-〇ff) is connected to the terminal 2 of the power supply opening f. When the power switch s 18 is turned on, the trigger pin 47 is turned on. , the power management unit 22 is turned on from the low power mode. / The power supply 5 controller 70 220 pin 33 (nRESPWRON) is the open drain system reset output, connected to the second reset end of the central processing unit 210 Point (pin Y12 (〇N/〇FF), second reset terminal (pin YU) is low level asynchronous reset signal input (ASynchronc) us Reset), when central processing unit 210 receives power management When the pin 33 of the unit 220 is reset, it resets all states inside the towel processing unit 210; however, it does not clear the RTC time inside the central processing unit 210. The pin R12 of the central processing unit 210 ( nRESpwR〇N) is the second reset endpoint. The second reset The endpoint (R12) is the reset input of the central processing unit (10). When the R12 of the central processing unit 210 receives the reset signal from the output of the reset circuit 23G, the central processing unit 210 not only resets the internals. The status will also clear the RTC time inside the central processing unit 2丨〇. ^ When the battery 260 of the handheld device 200 (not shown in the third figure) is placed in the battery holder in the handheld device, the VDD supply power source maintains a pre-π potential, and Rl66 and C37〇 form a resistor/capacitor ( Rc) charge and discharge circuit, therefore, the flip-flop circuit 6 (CLR) of the flip-flop circuit 24 will maintain the second low-level (Low) pulse input from its pin 6 into the flip-flop to clear the previous flip-flop The pin 5 (Q) state of the circuit 232 is set to the low level 13 200825693 bit (the data input terminal 2 terminal (D) of the flip-flop circuit 232 is grounded to the clock input terminal 1 (CLK), so no need to consider) . When the output pin 5 of the flip-flop circuit 232 is at a low level, its pin 5 is connected to the idle circuit 〇 and the pin 2 is also at a low level. Furthermore, when the pin 2 of the OR circuit R1 is at a low level, the state of the output pin 4 of the OR circuit OR1 is determined according to the state of the pin 1 of the OR circuit OR1. _ w is still placed in the battery holder of the symbol device 2000, then the pin R12 and Y12 of the zhongxieli 一 甲 兀 兀 兀 210 must be reset circuit 230 two, is - The first output of the power supply and power supply system 220 is reset. At this time, the power management system 220 sends a signal from the pin to the pin Y12 of the central processing unit 210, and the central processing unit 210 performs a certain internal operation, and then the central processing unit 210 The instant clock (RT ^ ^ ^ 210 has been # 舌 罢 , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , f, the second unit does not clear the resetting action of the central processing unit 210, and the instant clock (RTC) is 10 early. Therefore, the innovative design of the present invention can be reset and clocked. Time circuit. Firstly, the right time and right issue of the technology, solve the problem that the central processing unit is not welcoming the boot month. Its pin R12i * is not activated after the first time, and the next time the door is opened, the red target is started. In the system is 4, the system is first, and the center is at the center. The system does not reset its money to reset the p itilf τ ^ only early, to ensure that its RTC time is not 舜# has reached the normal opening system And can the door not be set 盍' to those skilled in the field, Ding 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 The configuration 'should be included in all the similar modified discs in the following tombs, and should be the most widely changed. *Improved and similar elements, = the central processing unit mentioned in this invention, power management sheet:: His choice of name. Further, the same is true: the other changes disclosed in the preferred embodiment and the scope and spirit of the invention are not included in the preferred embodiment. [Simplified description of the drawings] And the advantages thereof, and the same numerals indicate the components, wherein: the first diagram is based on the prior art Reset (RTC) circuit. The second diagram of Dingli is preferred according to the present invention. The embodiment is a structural diagram of the handheld device of the present invention. 'The third figure is a circuit diagram of an instant clock and a reset circuit according to a preferred embodiment of the present invention. % [Description of Main Components] 110 Central Processing Unit 120 Power Supply Processing unit 130 delay circuit 200 of the handheld device 210 the central processing unit 15200825693220 power management unit 230 resets the flip-flop circuit 240, circuit 232 of memory unit 250 communication module 16 of the battery 260