200823655 九、發明說明： 【發明所屬之技術領域】 本發明係有關於一種主機板測試程序設定技術，更詳 而口之係有關於一種應用於具有複數個測試站之主機板 測試程序之主機板測試程序設定系統以及方法。 【先前技術】 隨者電路板以及電子元件的集成度大幅提升，電腦主 機板所此夠提供的功能也隨之增加。主機板可謂電腦裝置 的主要骨架，其上用以接置中央處理器、匯流排、記憶體、 ，接琿以及透過該連接埠接置的儲存與資料輸出入單元 H组件透過主機板的整合，藉以依據指令執行 負料處理工作。 承前所述，為確保主機板能成功接置 並令該独件於_板上4料。故於料 =機板上後’製造商必須經過許多階段的;試 γ 又的κ站可能針對該主機板的特定功能予 =而言，某些測制仙㈣m該主機板上所接置的^ 正常運作，某些測試站係用以測試該主 传用以；二：ΐ埠是否能正常運作;而某些測試站則 心、用以測_建的顯示驅動器是否能正f運作。、】 用者商所需要執行的主機板測試可能跟終端使 在大旦 仃的開機測制容不同。舉例言之，製造商 里的主機板測試程序中，不广° 全部記㈣進行測試，可能只要測試 19904 5 200823655 P 1 $ 0 區塊即為已足，如此方能增加測試的速度。此外，有些測 試模式是終端使用者需要而製造商不需要進行測試者，這 些測試模式在製造商測試程序予以跳過或隱藏不執行，亦 會增加製造商測試的效率。要言之，主機板測試模式會因 不同的使用者目的而有不同的内容。 曰 承珂所述，習知的主機板測試系統均係結合於基本輸 出入系統（BIOS)中，該些測試程序通常是在開機的過程 中由BIOS予以執行。為滿足製造商對測試模式的要求， 主機板上會設有一個跳線（Jumper)，若將該跳線導通， 則該2機後該BI0S將執行製造商所需要的主機板測試。 丽述之測試方式固然可以將製造商不需要的測試模 式予以排除’進而較有效率的執行主機板測試。然而不同 的測试模式通常更包含許多的測試選項，在製造商的主機 板測試程序中，通常由不同的測試站負責不同的測試選 項。故僅透過跳線將主機板測試模式設定為製造商所需 者-仍有不足之處，且若有超過二個以上的測試站，便需 要二組以上的跳線，硬體上更增加成本，同時也佔去主機 板的位置。因為，製造商不同的測試站不能僅依據該站所 需的主要測試.選項進行測試，應屬於其他測試站而非屬本 測ί站的其他非必要或無需完全測試的測試項目，仍必需 重不夂進仃’導致每一個測試站因需重覆該測試站不必要的 測試項目，故使得主機板測試效率無法提升。 1上料，如何錢提供—種能依據製造商不同的主 4板測減站而設定不同的測試模式及其载選項，進而縮 19904 6 200823655 短每一個測試站的測試時間，以增加主機板測試的效率， 貫為目前亟待解決之課題。 【發明内容】 為解決别述習知技術之種種缺失，本發明提供一種主 機板測試程序設定系統以及方法，係能依據不同的測試站 口又疋不同的測試模式及其測試選項，進而達到提昇具有複 數個測試站之主機板測試程序的測試效率。 、本叙明之主機板測試程序設定系統，係應用主機板測 #I序中’其主要包括：第—儲存模組，儲存有對應複數 個測試站個別所需要的複數個BIOS程式；第二儲存模 M儲存句對應各該B程式的複數個測試模式值；設 疋杈組’係用以設定該主機板測試程序之該複數個測試站 所需要的測試模式值，並將設定的測試模式值存入第二儲 存模組L讀取模組，係用以自第二儲存模組中讀取已設定 的測試模式值；載人模組，依據讀取模組讀取到的已設定 ^測減板式值，自第—儲存模組中，載人對應的聽程 式0 =上’錢透過設定模組將次—個測試站所需要的 式值選定並存人第二儲存模組成為—已設定的測 _式值’當系統重新開機’在開機階段，讀取模植會自 弟-儲存模組中讀取已設定的職模式值，再由載入模植 :龍_試模式值的議程式載人“，職站的工 即可針對所f要的BIQSm進行對應的測 19904 7 200823655 鳙 * » 1 相較於習知的訊息標示技術，本發明之主機板 序設定系統以及方法，透過前述第—館存模組、第二儲存 Μ組、設定模組、載入模組以及讀取模組的相互運作，妒 依據不同的測試站設定不同的測試模式及其bi〇s程此 進而達到提昇整體的測試效率。 一 【實施方式】 以下係藉由特^的具體實施例說明本發明之實施方 式’熟悉此技藝之人士可由本說明書所揭示之内容輕易地 瞭解本發明之其他優點與功效。本發明亦可藉由其他不同 的具體實施例加以施行或應用’本說明書中的各項細節亦 可基於不同觀點與應用，在不悻離本發明之精神下進行久 種修飾與變更。 ^ σ 請參閱第1圖，其係本發明之主機板測試程序設定么 統的應用架構示意圖。如圖所示，本發明之主機板測試： 序设定系統係應用於主機板測試程序中，該主機板測試程 序包括至少-個測試站。於本實施例中，本發明之主機板 測試程序設定系統1包括：第一儲存模組u、第二儲存 模組12、設定模組13、讀取模組14以及载入模組15。 第一儲存模組11及第二儲存模組12設於主機板4。 第一儲存模組11中儲存有對應第一至第四測試站31~34 所需要的四種BIOS程式2卜24,具體實施上，第一儲存 模組11也可以存有BI0S主程式及對應第一至第四測試站 3卜34所需要的不同的BI〇s副程式，其中主程式是四個 測試站3卜34所共同需要的部份，副程式則因四個測試站 19904 8 200823655 的需求不同而有所調整，以求較小的儲存μ，但 主雖以四種不同的刪程式2卜24作為範例， ㈣5兄明’亚不以此為⑯。於本實施例中，該第 子核.、且11係叹置於該主機板4之非揮發性記憶體， 二可例如但不限定為EP_、EEP_或快閃記憶體巧之 :者:該複數個職程式21〜24係指習知刪所提供之 化對體二主機板晶片組、顯示卡及週邊裝置執行初始 心體、主機板晶片組、顯示卡及週邊裳置等組 仃初始化；提供作㈣統或應用程切叫的巾斷常駐 私式。 於本實施例中，該些娜程式2卜24測試模式可例 如但不限定於針對不同的組件所執行的測試模式，該組件 可例^但不限^為中央處理器、匯流排、記憶體、連接槔 以及透過該連接埠接置的儲存與資料輸出入單元等組 件^較佳者，該些測試模式進—步包括至少—個測試選 項試選項係為對應不同組件之測試模組所旦有的细 部測試項目，其得例如但職U巾錢判的處理靖 中1處理器散熱風扇的轉速，記憶體之全部或局^記 憶區塊是否完整正f，連接琿是否能夠正常連接周邊裳 置、連接埠之資料傳輸速率等。 ^第二儲存模組，儲存有對應該各BIOS程式2卜24的 複數個測試模式值，該第：料模組12係設置於該主機 板4之非揮發性§己憶體，其可例如但不限定為Ep麵、 EEPR0M或快閃記憶體其中之一者。 19904 9 200823655 該設定模組13係用以設定該主機板測試程序之該第 一至第四測試站31〜34所需要的測試模式，並將對應該設 定的測試模式所對應之測試模式值存入第二儲存模組 12。於本實施例中，該設定模組13係將對應第一測試站 31所需要的BIOS程式21所對應的測試模式值予以選取 亚存入第二儲存模組12中。讀取模組14，係用以自第二 儲存模組12中讀取已設定的測試模式值，載入模組15， 則依據讀取模組14讀取到的已設定的測試模式值，自第 一儲存模組11中，載入對應的BI〇s程式21來供第一測 試站31使用。 “具體實施上，該設定模組13、讀取模組14及/或載 =核組15係建置於該主機板4巾，更進一步言，該設定 ，士且13 „貝取核組14及/或載入模組15可整合於主機板 、、-能對第二儲存模組12進行存取的控制晶片中，俾 =该控制晶片來完成儲存、讀取第二儲存模組η中所 。子=已设定的測試模式值，本實施例中，該控制晶片可 ρ (Baseboard Management200823655 IX. Description of the Invention: [Technical Field] The present invention relates to a motherboard test program setting technique, and more particularly to a motherboard for a motherboard test program having a plurality of test stations. Test the program setting system and method. [Prior Art] The integration of the board and the electronic components has been greatly improved, and the functions provided by the computer main board have also increased. The motherboard is the main skeleton of the computer device, and is used for connecting the central processing unit, the bus bar, the memory, the interface, and the storage and data input and output unit H components connected through the connection port through the motherboard. In order to perform the negative processing work according to the instructions. As mentioned above, in order to ensure that the motherboard can be successfully connected and the single piece is on the board. Therefore, after the material=machine board, the manufacturer must go through many stages; the gamma station that tests γ may be specific to the motherboard. For some measurements, the four (4) m are connected to the motherboard. ^ Normal operation, some test stations are used to test the main transmission; second: whether the 能 can operate normally; and some test stations are used to test whether the display driver can operate positively. The motherboard test that the user needs to perform may be different from the terminal's power-on measurement. For example, in the motherboard test procedure in the manufacturer, it is not necessary to fully test (4) the test, as long as the test 19904 5 200823655 P 1 $ 0 block is sufficient, so that the test speed can be increased. In addition, some test modes are required by the end user and the manufacturer does not need to perform the test. These test modes are skipped or hidden in the manufacturer test program and will increase the efficiency of the manufacturer test. In other words, the motherboard test mode will have different content for different user purposes. As stated, the conventional motherboard test system is integrated into the BIOS, which is usually executed by the BIOS during boot. In order to meet the manufacturer's requirements for the test mode, a jumper is provided on the motherboard. If the jumper is turned on, the BI0S will perform the motherboard test required by the manufacturer after the 2 machines. The test method of the Lissay can eliminate the test patterns that the manufacturer does not need to perform the motherboard test more efficiently. However, different test modes usually include many test options. In the manufacturer's motherboard test program, different test stations are usually responsible for different test options. Therefore, only the motherboard test mode is set to the manufacturer's requirements through jumpers - there are still some shortcomings, and if there are more than two test stations, more than two sets of jumpers are needed, which increases the cost on the hardware. At the same time, it also takes up the position of the motherboard. Because different test stations of the manufacturer can't be tested based on the main test options required by the station, it should belong to other test stations, not other test items that are not necessary or need to be fully tested. If you don't push in, it will cause each test station to repeat unnecessary test items of the test station, so the test efficiency of the motherboard cannot be improved. 1 loading, how to provide money - can set different test modes and their loading options according to different main 4 board testing stations of the manufacturer, and then reduce the test time of each test station in 19904 6 200823655 to increase the motherboard The efficiency of testing is a topic that needs to be solved urgently. SUMMARY OF THE INVENTION In order to solve various shortcomings of the prior art, the present invention provides a motherboard test program setting system and method, which can improve according to different test sites and different test modes and test options thereof. Test efficiency of the motherboard test program with multiple test stations. The motherboard test program setting system of the present description is applied to the motherboard test. The main method includes: a storage module, which stores a plurality of BIOS programs corresponding to a plurality of test stations; The modulo M storage sentence corresponds to a plurality of test mode values of each of the B programs; the set ' group is configured to set a test mode value required by the plurality of test stations of the motherboard test program, and set the test mode value The second storage module L reading module is configured to read the set test mode value from the second storage module; the manned module is read according to the read module. Reduce the value of the board, from the first - storage module, the corresponding listener of the manned 0 = on the 'money through the setting module to select the value of the test station and the second storage module becomes - has been set The test_type value 'when the system is rebooted' in the boot phase, the read model will read the set job mode value from the brother-storage module, and then load the model: the dragon_test mode value The program manned ", the job of the station can be targeted at the BIQSm Performing the corresponding test 19904 7 200823655 鳙* » 1 Compared with the conventional message marking technology, the host board setting system and method of the present invention pass through the aforementioned first-store module, the second storage group, and the setting module. , the loading module and the reading module interact with each other, and set different test modes according to different test stations and their bi〇s process to improve the overall test efficiency. [Embodiment] The following is by special DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT(S) EMBODIMENT OF THE INVENTION The person skilled in the art can readily appreciate other advantages and utilities of the present invention from the disclosure of the present disclosure. The invention may also be practiced by other different embodiments. The details of the present specification can also be modified and changed based on the different viewpoints and applications without departing from the spirit of the invention. ^ σ Please refer to FIG. 1 , which is a test procedure of the motherboard of the present invention. The application architecture diagram of the system is set. As shown in the figure, the motherboard test of the present invention: the sequence setting system is applied to the motherboard test program, the host The test program includes at least one test station. In this embodiment, the motherboard test program setting system 1 of the present invention includes: a first storage module u, a second storage module 12, a setting module 13, and a reading module. 14 and the loading module 15. The first storage module 11 and the second storage module 12 are disposed on the motherboard 4. The first storage module 11 stores the corresponding first to fourth test stations 31-34. In the implementation, the first storage module 11 can also store the BI0S main program and different BI〇s subprograms corresponding to the first to fourth test stations 3, 34, wherein the main program The program is the common part of the four test stations 3, 34, the sub-program is adjusted due to the different needs of the four test stations 19904 8 200823655, in order to find a smaller storage μ, but the main difference is four The deletion of the program 2 Bu 24 as an example, (4) 5 brother Ming 'Asia does not use this as 16. In this embodiment, the first sub-core and the 11-series are placed on the non-volatile memory of the motherboard 4, and the second can be, for example but not limited to, EP_, EEP_ or flash memory: The plurality of job programs 21 to 24 refer to the group initialization of the body board, the display card and the peripheral device, and the initialization of the initial body, the motherboard chipset, the display card, and the peripherals. Provided as a (four) system or application process called the towel to break the resident private. In this embodiment, the test mode may be, for example but not limited to, a test mode performed for different components, and the component may be, but not limited to, a central processing unit, a bus, and a memory. Preferably, the connection module and the storage and data input and output unit connected through the connection port are further configured to include at least one test option test option for the test module corresponding to the different component. There are some detailed test items, such as the speed of the processing of the Jingzhong 1 processor cooling fan, the memory of all or the memory block is complete and positive f, whether the connection can be connected to the surrounding Set, connect, data transfer rate, etc. The second storage module stores a plurality of test mode values corresponding to the respective BIOS programs 2, and the first material module 12 is disposed on the non-volatile § memory of the motherboard 4, which can be, for example, However, it is not limited to one of the Ep surface, the EEPR0M, or the flash memory. 19904 9 200823655 The setting module 13 is configured to set a test mode required by the first to fourth test stations 31 to 34 of the motherboard test program, and save the test mode value corresponding to the test mode to be set. The second storage module 12 is inserted. In the embodiment, the setting module 13 selects and selects the test mode value corresponding to the BIOS program 21 required by the first test station 31 into the second storage module 12. The reading module 14 is configured to read the set test mode value from the second storage module 12, and load the module 15 according to the set test mode value read by the reading module 14. From the first storage module 11, the corresponding BI〇s program 21 is loaded for use by the first test station 31. In a specific implementation, the setting module 13, the reading module 14 and/or the loading group 1 are built on the motherboard 4, and further, the setting is 13 and the core group 14 and The load module 15 can be integrated into the motherboard, the control chip that can access the second storage module 12, and the control chip can be used to store and read the second storage module η. . Sub = set test mode value, in this embodiment, the control chip can be ρ (Baseboard Management
Controller， BMC)。 序2圖’其係透過前述本發明之主機板測試程 糸統執行本發明之主機板測試程序設定方法時的 机紅圖〇如圖所示， S201中，透過設定模組將次 一個測試站所需要的測气 人 ^7而罟的/則忒杈式值選定並存入第二儲存模 組成為一已設定的測試 Λ姨式值。接者進至步驟S202。 於步驟S202中，於兮士拖』』 、ϋ亥主钱板4進入第一測試站3 i 19904 10 200823655 4 ，« « 並與該第-測試站31完成執行測試所必要之機構及/或 電性連接後，透過該第一測試站31針對該主機板4執行 開機程序。接著進至步驟S2〇3。 “於步驟S203中，於開機階段令讀取模組自第二儲存 ^中讀取已狀的測試模式值，於本實施例中，該測試 •吴式值係對應至該第-測試站31所需要的娜程式ΗController, BMC). Figure 2 is a machine diagram of the motherboard test program setting method of the present invention through the foregoing motherboard test system of the present invention. As shown in the figure, in S201, the next test station is passed through the setting module. The required gas metering value is selected and stored in the second storage module to become a set test value. The process proceeds to step S202. In step S202, the first test station 3 i 19904 10 200823655 4 , « « and the first test station 31 completes the necessary mechanisms for performing the test and/or After the electrical connection, the booting process is performed on the motherboard 4 through the first test station 31. Then proceed to step S2〇3. "In step S203, the reading module reads the measured test mode value from the second storage in the booting phase. In the embodiment, the test value corresponds to the first test station 31. The required nava
St/ —測試站31所需要的職副程式。接著進至 步驟S204。 於步驟S204中’令載入模組將該讀取模組自第二儲 子吳組中言買取已設定的測試模式值對應該測試模式值的 程式21以及對應第—贼站31所需要的刪副程 式載入系統。接著進至步驟S2〇5。 於步™中，令系統執行透過該載入模組載入至 =統的娜程式21以及對應的編 對應的測試工作。 干适仃 :宗上所述，本發明之主機板測試程序設定系統 運去作透過前述儲存模組、設㈣組以及調整模組間的相互 Sit據I同的測試站設定不同的測試模式及其測； 的測試效率昇具有複數個測試站之主機板測試程序 ▲上述實施例僅為例示性說明本發明之原理及 而非用於限制本發明。任何熟f此項人士 在不違背本發明之精神及範疇下，人士均了 鱼變化。+ I ’貝方也例進行修飾 因此，本發明之權利保護範圍，應如後述之申請 19904 11 200823655 • ，* f 專利範圍所列。 【圖式簡單說明】 第1圖係本發明之主 架構示意圖；以及 機板測試程序 設定系統的應用 第2圖係本發明之主機板測試程序設定方法透過本 發明之主機板職程序設Μ統執行時的流程圖。 【主要元件符號說明】 11 第一儲存模組 12 第二儲存模組 13 設定模組 14 讀取模组 15 載入模組 21 〜24 BIOS程式 31-34 第一〜第四測試站 4 主機板 S201-S205 步驟 12 19904St/ — The sub-program required for the test station 31. Proceeding to step S204. In step S204, the loading module is configured to purchase the programmed test mode value corresponding to the test mode value from the second storage subgroup, and the corresponding deletion required by the first thief station 31. The program loads the system. Then proceed to step S2〇5. In StepTM, the system executes the test program loaded into the system by the load module and the corresponding test work. Dry-type: As described above, the motherboard test program setting system of the present invention is configured to set different test modes through the aforementioned storage module, the set (4) group, and the mutual test station between Test efficiency of the test board with a plurality of test stations. The above-described embodiments are merely illustrative of the principles of the present invention and are not intended to limit the present invention. Anyone who is familiar with this person has changed the fish without departing from the spirit and scope of the present invention. + I ‘Beifang is also modified. Therefore, the scope of protection of the present invention should be as listed in the application of 19904 11 200823655 • , * f . BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic diagram of a main structure of the present invention; and an application of a board test program setting system. FIG. 2 is a method for setting a test board of a motherboard according to the present invention. Flowchart at the time of execution. [Main component symbol description] 11 First storage module 12 Second storage module 13 Setting module 14 Reading module 15 Loading module 21~24 BIOS program 31-34 First to fourth test station 4 Motherboard S201-S205 Step 12 19904