200809491 九、發明說明： 【發明所屬之技術領域】 本發明係關於一種基於I2C匯流排之監視電路。 【先前技術】 I2C ( Inter-Integrated Circuit，内部積體電路）匯流排 是一由PHILIPS公司開發之兩線式串列匯流排，用於連接 一微控制器及其週邊設備。I2C匯流排是由一資料線SDA 及一時鐘線SCL構成之串列匯流排，可發送和接收資料。 SDA和SCL線都是雙向傳輸線，它們可藉由一電阻連接到 一正電源端，當匯流排處於空閒狀態時，兩條線均爲高電 平。I2C匯流排必須由一主器件（通常爲微控制器）控制， 主器件産生串列時鐘（SCL)控制匯流排之傳輸方向，並 産生起始和停止條件。SDA線上之資料狀態僅在SCL爲低 電平之期間才能改變；SCL爲高電平之期間，SDA狀態之 改變被用來表示起始和停止條件。 „ I2C匯流排上允許連接多個微處理器及各種週邊設 備。爲了保證資料可靠地傳送，任一時刻I2C匯流排只能 由一偭主器件在匯流排空閒時發啓資料，以妥善解決多台 主器件同時發啓資料傳送（匯流排控制權）之衝突，並藉 由一匯流排控制器決定由哪一個主器件控制匯流排。I2C 匯流排上之每一器件均可設置一個唯一地址，然後根據所 設之功能進行資訊之發送或接收。 目前在電腦系統之製造過程中，通常使用I2C匯流排 來獲取各個電腦設備之資訊，比如溫度、風扇轉速以及可 200809491 用之圯憶體容量等硬體資訊，但是調試人員要查看這些硬 體負訊必須調用BI〇s ( Basic Input 〇卿似Systein，基本 輸t輸出系統）’而且在BI0S裡不容易方便快速之查找硬 體資訊，不但費時且使用不便。 因是，實有必要對習知之電腦系統狀態監視電路進行 改良，以消除上述缺失。 【發明内容】 鑒於以上内容，有必要提供一種電腦系統狀態監視電 一種電腦系統狀態監視電路，用於監視少一 統設備之狀態，包括-I2C匯流排、—用於控制該 流排控制權之I2C匯流排控制器，該電腦系統設備與該I2c 匯流排連接，該電腦系統狀態監視電路還包括一與該· 匯流排連接之顯示設備，該顯示設備用於顯示該電腦系統 設備藉由該I2C匯流排傳送之硬體資訊。 相較習知技術，該電腦系統狀態監視電路可藉由該顯 示設備直觀顯示該電腦系統設備之硬體資訊，方便電腦系 統之硬體調試。 μ 【實施方式】 請參閱圖1，本發明電腦系統狀態監視電路之較佳實 施方式包括一 I2C匯流排10、一 I2C匯流排控制器2〇、複 數電腦系統設備（本實施方式之電腦系統設備以一記憶體 32 /jnL度感測器％及一風扇36爲例進行說明）及_顯 不設備40,該I2C匯流排控制器2〇、該電腦系統設備及該 200809491 顯示設備40均與該I2C匯流排10連接，該I2C匯流排10 包括一資料線SDA及一時鐘線SCL。 該I2C匯流排控制器20用於控制該I2C匯流排10之 控制權，決定在某一時刻由哪一個電腦系統設備控制該 I2C匯流排10,本實施方式以溫度感測器34爲例說明。該 溫度感測器34在取得該I2C匯流排10之控制權後，該溫 度感測器34爲主器件，該顯示設備40爲從器件。該溫度 感測器34産生串列時鐘（SCL)控制匯流排之傳輸方向， B使該溫度感測器34感測之溫度數值藉由該資料線SDA傳 送到該顯示設備40進行顯示。 請繼續參閱圖2，該顯示設備40包括一微控制器42及 一顯示模組44。該微控制器42爲ATMEI公司生産之89€52 微處理控制器，該微控制器42採用40個腳之雙列直插式 封裝形式。該微控制器42之P0.0-0.7腳爲開漏之雙向輸入 /輸出介面，此時P0.0-0.7腳作爲該微控制器42之資料輸 ⑩出端。該I2C匯流排10之資料線SDA與該微控制器42 之P1.0腳連接，該I2C匯流排10之時鐘線SCL與該微控 制器42之P1.1腳連接，該微控制器42之P1.0腳及ΡΊ.1 腳爲類比I2C匯流排介面。該微控制器42之VCC腳用於 連接外部電源，該微控制器42之VSS腳接電源地。該微 控制器42之M/VPP腳爲外部訪問/編程允許介面，其藉 由一電容C10接地，可允許外部訪問或編程。該微控制器 42之XTAL0腳及XTAL1腳連接由一晶振Y1及兩電容C7 和C8組成之時鐘電路，爲該微控制器42提供工作所需之 200809491 時鐘，該微控制器42之RESET腳爲重定介面。 該顯示模組44爲中國大陸南京國顯電子公司生産之 型號爲GXM12864之圖形點陣液晶顯示模組，該顯示模組 44之DB0-DB7腳與該微控制器42之P0.0-0.7腳對應連 接，該顯示模組44之VDD腳用於連接外部電源。該顯示 模組44之K腳及A腳接背光電源，VEE腳接液晶驅動電 源，VEE腳還藉由一可變電阻R10連接該顯示模組44之 VSS腳，V0腳連接該可變電阻R10之抽頭用於對比度調 β節。該顯示模組44之CS1腳及CS2腳爲片選介面，與該 微控制器42之P2.1腳、P2.0腳對應連接，該顯示模組44 之D/Ι腳及R/W腳分別爲指令資料通道及讀寫選擇介面， 分別與該微控制器42之P2.6腳及P2.5腳對應連接。該顯 示模組44之E腳爲使能訊號介面，其與該微控制器42之 P2.3腳連接，該顯示模組44之RST腳爲重定介面。 該溫度感測器34產生之串列時鐘（SCL)進入該微控 馨制器42之P1.1介面，該溫度感測器34感測之溫度數值藉 由該資料線SDA進入該微控制器42之P1.0介面。該微控 制器42將接收之該溫度感測器34感測之溫度數值轉換成 該顯示模組44能夠接收之顯示訊號，該顯示模組44藉由 該微控制器 42之P0.0-0.7腳將該顯示訊號傳送到 DB0-DB7腳，該顯示模組44即可在液晶屏上顯示該溫度 感測器34感測之溫度數值。同上，該記憶體32或該風扇 36在取得該I2C匯流排10之控制權後，該記憶體32之容 量或該風扇36之轉速等硬體資訊即可藉由該顯示模組44 200809491 顯示 本發明電腦系統狀態監視電路可藉由該 ::該電腦系統設備之硬體資訊，方便電腦系二: 綜 刹由咬上所述’本發明符合發明專利要件，爰依法提出考 rt °惟’以上所述者僅為本發明之較佳實施方式，摩 ^本案技藝之人士 ’在爰依本發明精神所作之等效修 飾或&化，皆應涵蓋於以下之中請專利範圍内。 【圖式簡單說明】 圖1係本發明電腦系統狀態監視電路之較佳實施方武 之模組圖。 圖2係圖1之顯示設備之電路圖。 I2C匯流排 10 I2C匯流排控制器 20 記憶體 32 溫度感測器 34 風扇 36 顯示設備 40 微控制器 42 顯示模組 44200809491 IX. DESCRIPTION OF THE INVENTION: TECHNICAL FIELD The present invention relates to a monitoring circuit based on an I2C bus bar. [Prior Art] I2C (Inter-Integrated Circuit) busbar is a two-wire serial busbar developed by PHILIPS to connect a microcontroller and its peripherals. The I2C bus is a serial bus consisting of a data line SDA and a clock line SCL, which can send and receive data. Both the SDA and SCL lines are bidirectional transmission lines that can be connected to a positive supply terminal by a resistor. Both lines are high when the bus is idle. The I2C bus must be controlled by a master device (usually a microcontroller) that generates a serial clock (SCL) to control the direction of the bus and generates start and stop conditions. The data state on the SDA line can only be changed while SCL is low; during the period when SCL is high, the change in SDA state is used to indicate the start and stop conditions. „ I2C bus bar allows multiple microprocessors and various peripheral devices to be connected. In order to ensure reliable data transmission, the I2C bus bar can only be sent by one master device at any time when the bus bar is idle, so as to properly solve the problem. The master device simultaneously initiates the conflict of data transfer (bus control) and determines which master controls the bus by a bus controller. Each device on the I2C bus can be set to a unique address. Then, according to the function set, the information is sent or received. Currently, in the manufacturing process of the computer system, the I2C bus is usually used to obtain information about each computer device, such as temperature, fan speed, and memory capacity for 200809491. Hardware information, but the debugger must check the hardware communication to call BI〇s (Basic Input Systein, basic t output system) and it is not easy and quick to find hardware information in BI0S, which is not only time-consuming. It is inconvenient to use. Therefore, it is necessary to improve the computer system state monitoring circuit of the conventional computer to eliminate the above deficiency. [Invention] In view of the above, it is necessary to provide a computer system status monitoring circuit for monitoring the state of a less-uniform device, including -I2C bus, for controlling the flow control An I2C bus controller, the computer system device is connected to the I2c bus, the computer system state monitoring circuit further comprising a display device connected to the bus bar, wherein the display device is configured to display the computer system device by using the I2C The hardware information transmitted by the busbar is compared with the prior art, and the computer system state monitoring circuit can visually display the hardware information of the computer system device by the display device, thereby facilitating hardware debugging of the computer system. μ [Embodiment] Referring to FIG. 1 , a preferred embodiment of the computer system state monitoring circuit of the present invention includes an I2C bus bar 10 , an I 2 C bus bar controller 2 , and a plurality of computer system devices (the computer system device of the embodiment has a memory 32). /jnL degree sensor % and a fan 36 as an example for explanation) and _ display device 40, the I2C bus bar controller 2〇, The computer system device and the 200809491 display device 40 are both connected to the I2C bus bar 10. The I2C bus bar 10 includes a data line SDA and a clock line SCL. The I2C bus bar controller 20 is used to control the I2C bus bar 10 The control determines the computer system device to control the I2C bus bar 10 at a certain time. This embodiment is described by taking the temperature sensor 34 as an example. The temperature sensor 34 is controlling the I2C bus bar 10 After the weight, the temperature sensor 34 is the master device, and the display device 40 is a slave device. The temperature sensor 34 generates a serial clock (SCL) control busbar transmission direction, B makes the temperature sensor 34 sense The measured temperature value is transmitted to the display device 40 for display by the data line SDA. Referring to FIG. 2, the display device 40 includes a microcontroller 42 and a display module 44. The microcontroller 42 is a 89 € 52 microprocessor controller manufactured by ATMEI Corporation, which is in the form of a 40-pin dual in-line package. The P0.0-0.7 pin of the microcontroller 42 is an open-drain bidirectional input/output interface, and the P0.0-0.7 pin is used as the data output terminal of the microcontroller 42. The data line SDA of the I2C bus bar 10 is connected to the P1.0 pin of the microcontroller 42. The clock line SCL of the I2C bus bar 10 is connected to the P1.1 pin of the microcontroller 42. The microcontroller 42 The P1.0 pin and the ΡΊ.1 pin are analogous to the I2C bus interface. The VCC pin of the microcontroller 42 is used to connect an external power supply, and the VSS pin of the microcontroller 42 is connected to the power ground. The M/VPP pin of the microcontroller 42 is an external access/program enable interface that is externally accessed or programmed by a capacitor C10 to ground. The XTAL0 pin and the XTAL1 pin of the microcontroller 42 are connected to a clock circuit composed of a crystal oscillator Y1 and two capacitors C7 and C8 to provide the 200809491 clock required for the operation of the microcontroller 42. The RESET pin of the microcontroller 42 is Re-interface. The display module 44 is a graphic dot matrix liquid crystal display module of the GXM12864 model produced by Nanjing Guoxian Electronics Co., Ltd. of China, the DB0-DB7 pin of the display module 44 and the P0.0-0.7 pin of the microcontroller 42. For the corresponding connection, the VDD pin of the display module 44 is used to connect an external power source. The K-pin and the A-pin of the display module 44 are connected to the backlight power supply, and the VEE pin is connected to the LCD driving power supply. The VEE pin is also connected to the VSS pin of the display module 44 by a variable resistor R10, and the V0 pin is connected to the variable resistor R10. The tap is used for contrast adjustment of the beta section. The CS1 pin and the CS2 pin of the display module 44 are chip select interfaces, and are connected to the P2.1 pin and the P2.0 pin of the microcontroller 42. The D/foot and R/W pins of the display module 44 are connected. The command data channel and the read/write selection interface are respectively connected to the P2.6 pin and the P2.5 pin of the microcontroller 42 respectively. The E pin of the display module 44 is an enable signal interface, which is connected to the P2.3 pin of the microcontroller 42. The RST pin of the display module 44 is a re-set interface. The serial clock (SCL) generated by the temperature sensor 34 enters the P1.1 interface of the micro-controller 42. The temperature value sensed by the temperature sensor 34 enters the microcontroller through the data line SDA. 42 of the P1.0 interface. The microcontroller 42 converts the received temperature value sensed by the temperature sensor 34 into a display signal that the display module 44 can receive. The display module 44 is P0.0-0.7 of the microcontroller 42. The foot transmits the display signal to the DB0-DB7 pin, and the display module 44 can display the temperature value sensed by the temperature sensor 34 on the liquid crystal screen. In the same manner, the memory 32 or the fan 36 can obtain the control information of the I2C bus 10, and the hardware information such as the capacity of the memory 32 or the speed of the fan 36 can be displayed by the display module 44 200809491. The computer system state monitoring circuit can be realized by: the hardware information of the computer system device, which is convenient for the computer system 2: the comprehensive brake is bitten by the 'the invention meets the patent requirements of the invention, and the rt ° only above The above is only a preferred embodiment of the present invention, and those skilled in the art of the present invention should be included in the scope of the following patents in terms of equivalent modifications and & BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a block diagram of a preferred embodiment of a computer system state monitoring circuit of the present invention. 2 is a circuit diagram of the display device of FIG. 1. I2C Busbar 10 I2C Busbar Controller 20 Memory 32 Temperature Sensor 34 Fan 36 Display Device 40 Microcontroller 42 Display Module 44