TW200730050A - Wiring board and method for manufacturing the same, and semiconductor device - Google Patents

Wiring board and method for manufacturing the same, and semiconductor device

Info

Publication number
TW200730050A
TW200730050A TW095131094A TW95131094A TW200730050A TW 200730050 A TW200730050 A TW 200730050A TW 095131094 A TW095131094 A TW 095131094A TW 95131094 A TW95131094 A TW 95131094A TW 200730050 A TW200730050 A TW 200730050A
Authority
TW
Taiwan
Prior art keywords
conductive wirings
bumps
semiconductor element
connection terminal
terminal portion
Prior art date
Application number
TW095131094A
Other languages
Chinese (zh)
Inventor
Hiroyuki Imamura
Nozomi Shimoishizaka
Original Assignee
Matsushita Electric Ind Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Ind Co Ltd filed Critical Matsushita Electric Ind Co Ltd
Publication of TW200730050A publication Critical patent/TW200730050A/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49838—Geometry or layout
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/111—Pads for surface mounting, e.g. lay-out
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/24—Reinforcing the conductive pattern
    • H05K3/241—Reinforcing the conductive pattern characterised by the electroplating method; means therefor, e.g. baths or apparatus
    • H05K3/242—Reinforcing the conductive pattern characterised by the electroplating method; means therefor, e.g. baths or apparatus characterised by using temporary conductors on the printed circuit for electrically connecting areas which are to be electroplated
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0271—Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0393—Flexible materials
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09218—Conductive traces
    • H05K2201/09254—Branched layout
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09218—Conductive traces
    • H05K2201/09281—Layout details of a single conductor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09772—Conductors directly under a component but not electrically connected to the component
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09781—Dummy conductors, i.e. not used for normal transport of current; Dummy electrodes of components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10674—Flip chip
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/17—Post-manufacturing processes
    • H05K2203/175—Configurations of connections suitable for easy deletion, e.g. modifiable circuits or temporary conductors for electroplating; Processes for deleting connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
    • H05K3/005—Punching of holes
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Geometry (AREA)
  • Manufacturing & Machinery (AREA)
  • Wire Bonding (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

A wiring board includes: an insulating base; a plurality of conductive wirings; and bumps formed on the conductive wirings, respectively. The conductive wirings can be connected with electrode pads of a semiconductor element via the humps. The conductive wirings include a connection terminal portion at an end portion opposite to the other end portion where the bumps are formed, and at the connection terminal portion, the conductive wirings can be connected with an external component. The conductive wirings include first conductive wirings and second conductive wirings, on which the bumps are formed respectively at a semiconductor element mounting region. The first conductive wirings extend from the bumps to the connection terminal portion. The second conductive wirings extend beyond the semiconductor element mounting region from the bumps but do not reach the connection terminal portion. End portions of the second conductive wirings extending beyond the semiconductor element mounting region are separated electrically from the first conductive wirings by a cutting portion formed at a boundary region with the first conductive wirings. Irrespective of the state of operating electrode pads of a semiconductor element to be mounted, the bumps can be arranged at constant intervals.
TW095131094A 2005-09-13 2006-08-24 Wiring board and method for manufacturing the same, and semiconductor device TW200730050A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005265768A JP4786976B2 (en) 2005-09-13 2005-09-13 WIRING BOARD, MANUFACTURING METHOD THEREOF, AND SEMICONDUCTOR DEVICE

Publications (1)

Publication Number Publication Date
TW200730050A true TW200730050A (en) 2007-08-01

Family

ID=37854257

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095131094A TW200730050A (en) 2005-09-13 2006-08-24 Wiring board and method for manufacturing the same, and semiconductor device

Country Status (4)

Country Link
US (1) US7379307B2 (en)
JP (1) JP4786976B2 (en)
CN (1) CN1933139A (en)
TW (1) TW200730050A (en)

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* Cited by examiner, † Cited by third party
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JP4740708B2 (en) * 2005-09-30 2011-08-03 パナソニック株式会社 Wiring board and semiconductor device
JP2007142302A (en) * 2005-11-22 2007-06-07 Seiko Epson Corp Semiconductor device and its manufacturing method
JP4588748B2 (en) 2007-09-25 2010-12-01 Ｏｋｉセミコンダクタ株式会社 COF package
JP4484934B2 (en) * 2008-02-26 2010-06-16 富士通メディアデバイス株式会社 Electronic component and manufacturing method thereof
JP5125632B2 (en) * 2008-03-10 2013-01-23 セイコーエプソン株式会社 Mounting structure and electro-optical device
JP5913063B2 (en) * 2012-11-27 2016-04-27 日本特殊陶業株式会社 Wiring board
KR102229018B1 (en) * 2014-06-02 2021-03-17 엘지이노텍 주식회사 Touch panel with resistive pattern for electrostatic discharge protection
CN107785340A (en) * 2016-08-24 2018-03-09 上海和辉光电有限公司 A kind of ball grid array package structure
KR102471275B1 (en) * 2019-01-24 2022-11-28 삼성전자주식회사 Chip on film and method of manufacturing the same

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JPH02188939A (en) * 1989-01-17 1990-07-25 Mitsubishi Electric Corp Manufacture of semiconductor device
JPH03191542A (en) * 1989-12-20 1991-08-21 Nec Corp Manufacture of film carrier tape
JP2882085B2 (en) * 1990-05-25 1999-04-12 セイコーエプソン株式会社 Film carrier circuit board and method of manufacturing the same
JP2702839B2 (en) * 1991-11-20 1998-01-26 シャープ株式会社 Wiring board electrode structure
JP3207743B2 (en) * 1996-03-22 2001-09-10 シャープ株式会社 Terminal structure of flexible wiring board and mounting structure of IC chip using the same
JPH1117099A (en) * 1996-11-12 1999-01-22 T I F:Kk Memory module
US5955704A (en) * 1996-11-21 1999-09-21 Dell U.S.A., L.P. Optimal PWA high density routing to minimize EMI substrate coupling in a computer system
US6133637A (en) * 1997-01-24 2000-10-17 Rohm Co., Ltd. Semiconductor device having a plurality of semiconductor chips
US6175152B1 (en) * 1998-06-25 2001-01-16 Citizen Watch Co., Ltd. Semiconductor device
US6225816B1 (en) * 1999-04-08 2001-05-01 Agilent Technologies, Inc. Split resistor probe and method
JP2001185578A (en) * 1999-12-24 2001-07-06 Toshiba Corp Semiconductor device
US6664618B2 (en) * 2001-05-16 2003-12-16 Oki Electric Industry Co., Ltd. Tape carrier package having stacked semiconductor elements, and short and long leads
SG95651A1 (en) * 2001-05-21 2003-04-23 Micron Technology Inc Method for encapsulating intermediate conductive elements connecting a semiconductor die to a substrate and semiconductor devices so packaged
JP3727273B2 (en) * 2002-01-18 2005-12-14 沖電気工業株式会社 Semiconductor device and manufacturing method thereof
JP4031333B2 (en) * 2002-09-26 2008-01-09 株式会社ルネサステクノロジ Semiconductor device
JP3565835B1 (en) * 2003-04-28 2004-09-15 松下電器産業株式会社 Wiring board, method of manufacturing the same, semiconductor device and method of manufacturing the same
JP4133786B2 (en) * 2003-12-16 2008-08-13 日東電工株式会社 Printed circuit board
US6994563B2 (en) * 2003-12-19 2006-02-07 Lenovo (Singapore) Pte. Ltd. Signal channel configuration providing increased capacitance at a card edge connection
JP2006222386A (en) * 2005-02-14 2006-08-24 Toshiba Corp Printed wiring board, printed circuit board, and electronic apparatus

Also Published As

Publication number Publication date
CN1933139A (en) 2007-03-21
US20070057369A1 (en) 2007-03-15
JP2007081058A (en) 2007-03-29
JP4786976B2 (en) 2011-10-05
US7379307B2 (en) 2008-05-27

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