TW200729394A - A method of forming a layer over a surface of a first material embedded in a second material in a structure for a semiconductor device - Google Patents
A method of forming a layer over a surface of a first material embedded in a second material in a structure for a semiconductor deviceInfo
- Publication number
- TW200729394A TW200729394A TW095145051A TW95145051A TW200729394A TW 200729394 A TW200729394 A TW 200729394A TW 095145051 A TW095145051 A TW 095145051A TW 95145051 A TW95145051 A TW 95145051A TW 200729394 A TW200729394 A TW 200729394A
- Authority
- TW
- Taiwan
- Prior art keywords
- semiconductor device
- forming
- vapour deposition
- deposition step
- layer over
- Prior art date
Links
- 238000000034 method Methods 0.000 title abstract 2
- 239000004065 semiconductor Substances 0.000 title abstract 2
- 239000000463 material Substances 0.000 title 2
- 238000000151 deposition Methods 0.000 abstract 5
- 230000008021 deposition Effects 0.000 abstract 5
- 230000004888 barrier function Effects 0.000 abstract 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 abstract 2
- 229910052802 copper Inorganic materials 0.000 abstract 2
- 239000010949 copper Substances 0.000 abstract 2
- 238000000231 atomic layer deposition Methods 0.000 abstract 1
- 239000003989 dielectric material Substances 0.000 abstract 1
- 239000002305 electric material Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
- H01L21/76849—Barrier, adhesion or liner layers formed in openings in a dielectric the layer being positioned on top of the main fill metal
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/28556—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
- H01L21/28562—Selective deposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
- H01L21/76826—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. by contacting the layer with gases, liquids or plasmas
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
- H01L21/76828—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. thermal treatment
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Plasma & Fusion (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Chemical Vapour Deposition (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP05301019 | 2005-12-07 |
Publications (1)
Publication Number | Publication Date |
---|---|
TW200729394A true TW200729394A (en) | 2007-08-01 |
Family
ID=37944289
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW095145051A TW200729394A (en) | 2005-12-07 | 2006-12-04 | A method of forming a layer over a surface of a first material embedded in a second material in a structure for a semiconductor device |
Country Status (7)
Country | Link |
---|---|
US (1) | US20090197405A1 (zh) |
EP (1) | EP1961042A2 (zh) |
JP (1) | JP2009518844A (zh) |
KR (1) | KR20080080612A (zh) |
CN (1) | CN101326630B (zh) |
TW (1) | TW200729394A (zh) |
WO (1) | WO2007066277A2 (zh) |
Families Citing this family (21)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7998864B2 (en) * | 2008-01-29 | 2011-08-16 | International Business Machines Corporation | Noble metal cap for interconnect structures |
US7932176B2 (en) | 2008-03-21 | 2011-04-26 | President And Fellows Of Harvard College | Self-aligned barrier layers for interconnects |
US8242019B2 (en) * | 2009-03-31 | 2012-08-14 | Tokyo Electron Limited | Selective deposition of metal-containing cap layers for semiconductor devices |
JP5507909B2 (ja) * | 2009-07-14 | 2014-05-28 | 東京エレクトロン株式会社 | 成膜方法 |
KR101770537B1 (ko) * | 2009-10-23 | 2017-08-22 | 프레지던트 앤드 펠로우즈 오브 하바드 칼리지 | 상호 접속부를 위한 자기―정렬 배리어 및 캡핑 층 |
US8178439B2 (en) | 2010-03-30 | 2012-05-15 | Tokyo Electron Limited | Surface cleaning and selective deposition of metal-containing cap layers for semiconductor devices |
US8603913B1 (en) * | 2012-12-20 | 2013-12-10 | Lam Research Corporation | Porous dielectrics K value restoration by thermal treatment and or solvent treatment |
TWI686499B (zh) | 2014-02-04 | 2020-03-01 | 荷蘭商Asm Ip控股公司 | 金屬、金屬氧化物與介電質的選擇性沉積 |
CN104835778B (zh) * | 2014-02-08 | 2017-12-05 | 中芯国际集成电路制造(上海)有限公司 | 一种半导体器件的制作方法 |
US10047435B2 (en) | 2014-04-16 | 2018-08-14 | Asm Ip Holding B.V. | Dual selective deposition |
US20160064275A1 (en) * | 2014-08-27 | 2016-03-03 | Applied Materials, Inc. | Selective Deposition With Alcohol Selective Reduction And Protection |
CN105575881B (zh) * | 2014-10-11 | 2018-09-21 | 中芯国际集成电路制造(上海)有限公司 | 一种半导体器件的制作方法 |
US9659864B2 (en) * | 2015-10-20 | 2017-05-23 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method and apparatus for forming self-aligned via with selectively deposited etching stop layer |
US11081342B2 (en) | 2016-05-05 | 2021-08-03 | Asm Ip Holding B.V. | Selective deposition using hydrophobic precursors |
KR20170135760A (ko) * | 2016-05-31 | 2017-12-08 | 도쿄엘렉트론가부시키가이샤 | 표면 처리에 의한 선택적 퇴적 |
US10580644B2 (en) * | 2016-07-11 | 2020-03-03 | Tokyo Electron Limited | Method and apparatus for selective film deposition using a cyclic treatment |
KR102271771B1 (ko) * | 2017-05-25 | 2021-07-01 | 삼성전자주식회사 | 박막 형성 방법 및 이를 이용한 집적회로 소자의 제조 방법 |
CN109037482A (zh) * | 2018-08-03 | 2018-12-18 | 武汉华星光电半导体显示技术有限公司 | 薄膜封装层的制备方法及oled显示装置 |
KR102124612B1 (ko) | 2019-03-14 | 2020-06-18 | 최진욱 | 공기정화 시스템 |
KR20210131441A (ko) * | 2019-04-30 | 2021-11-02 | 매슨 테크놀로지 인크 | 메틸화 처리를 사용한 선택적 증착 |
DE102021101486A1 (de) * | 2020-03-30 | 2021-09-30 | Taiwan Semiconductor Manufacturing Co., Ltd. | Photoresistschicht-oberflächenbehandlung, abdeckschichtund herstellungsverfahren einer photoresiststruktur |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6506675B1 (en) * | 1999-07-09 | 2003-01-14 | Kabushiki Kaisha Toshiba | Copper film selective formation method |
US20040126482A1 (en) * | 2002-12-31 | 2004-07-01 | Chih-I Wu | Method and structure for selective surface passivation |
US20040152296A1 (en) * | 2003-02-04 | 2004-08-05 | Texas Instruments Incorporated | Hexamethyldisilazane treatment of low-k dielectric films |
US6844258B1 (en) * | 2003-05-09 | 2005-01-18 | Novellus Systems, Inc. | Selective refractory metal and nitride capping |
US20060033678A1 (en) * | 2004-01-26 | 2006-02-16 | Applied Materials, Inc. | Integrated electroless deposition system |
EP1820214A2 (en) * | 2004-12-01 | 2007-08-22 | Koninklijke Philips Electronics N.V. | A method of forming an interconnect structure on an integrated circuit die |
US7084060B1 (en) * | 2005-05-04 | 2006-08-01 | International Business Machines Corporation | Forming capping layer over metal wire structure using selective atomic layer deposition |
-
2006
- 2006-12-04 TW TW095145051A patent/TW200729394A/zh unknown
- 2006-12-04 EP EP06832073A patent/EP1961042A2/en not_active Withdrawn
- 2006-12-04 WO PCT/IB2006/054584 patent/WO2007066277A2/en active Application Filing
- 2006-12-04 US US12/096,231 patent/US20090197405A1/en not_active Abandoned
- 2006-12-04 JP JP2008543966A patent/JP2009518844A/ja not_active Withdrawn
- 2006-12-04 KR KR1020087016306A patent/KR20080080612A/ko not_active Application Discontinuation
- 2006-12-04 CN CN2006800459177A patent/CN101326630B/zh not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
US20090197405A1 (en) | 2009-08-06 |
EP1961042A2 (en) | 2008-08-27 |
KR20080080612A (ko) | 2008-09-04 |
CN101326630B (zh) | 2011-07-20 |
WO2007066277A2 (en) | 2007-06-14 |
CN101326630A (zh) | 2008-12-17 |
WO2007066277A3 (en) | 2007-11-15 |
JP2009518844A (ja) | 2009-05-07 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TW200729394A (en) | A method of forming a layer over a surface of a first material embedded in a second material in a structure for a semiconductor device | |
WO2006059261A3 (en) | A method of forming an interconnect structure on an integrated circuit die | |
WO2006083769A3 (en) | N2-based plasma treatment for porous low-k dielectric films | |
WO2007035880A3 (en) | Method and apparatus for forming device features in an integrated electroless deposition system | |
TW200710926A (en) | Method for fabricating semiconductor device and semiconductor device | |
WO2005104225A3 (en) | Method for forming a semiconductor device having a notched control electrode and structure thereof | |
TW200722543A (en) | Improving adhesion and minimizing oxidation on electroless Co alloy films for integration with low k inter-metal dielectric and etch stop | |
TW200636827A (en) | Silicon oxide cap over high dielectric constant films | |
TW200504933A (en) | Method for manufacturing semiconductor device | |
WO2006036366A3 (en) | Method of forming a solution processed device | |
TW200725753A (en) | Method for fabricating silicon nitride spacer structures | |
WO2008002831A3 (en) | Medical device | |
TW200610032A (en) | Method for plasma treating an etched opening or a damascening opening formed in a porous low-k material, and semiconductor device | |
TW200518263A (en) | Method for fabricating copper interconnects | |
TWI257122B (en) | Semiconductor device and method for forming conductive path | |
TWI257125B (en) | A method for preventing metal line bridging in a semiconductor device | |
TW200634916A (en) | Semiconductor device and method for forming dummy vias | |
TW200620533A (en) | Semiconductor device and fabrication method thereof | |
TWI268550B (en) | Decreasing metal-silicide oxidation during wafer queue time description | |
TW200723444A (en) | Semiconductor device and process for producing the same | |
TW200608519A (en) | Semiconductor device and manufacturing method therefor | |
WO2007092868A3 (en) | Method for preparing a metal feature surface prior to electroless metal deposition | |
TW200618289A (en) | Integrated circuit and method for manufacturing | |
TW200735215A (en) | Semiconductor device including a coupled dielectric layer and metal layer, method of fabrication thereof, and passivating coupling material comprising multiple organic components for use in a semiconductor device | |
TW200802701A (en) | Interconnect structure, methods for fabricating the same, and methods for improving adhesion between low-k dielectric layers |