TW200722786A - Method of sample preparation for scanning capacitance microscope and measuring method thereby - Google Patents

Method of sample preparation for scanning capacitance microscope and measuring method thereby

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Publication number
TW200722786A
TW200722786A TW094142750A TW94142750A TW200722786A TW 200722786 A TW200722786 A TW 200722786A TW 094142750 A TW094142750 A TW 094142750A TW 94142750 A TW94142750 A TW 94142750A TW 200722786 A TW200722786 A TW 200722786A
Authority
TW
Taiwan
Prior art keywords
sample preparation
gate structure
scanning capacitance
capacitance microscope
measured
Prior art date
Application number
TW094142750A
Other languages
Chinese (zh)
Other versions
TWI276832B (en
Inventor
Hsien-Wen Liu
Chen-Hung Wu
Jen-Lang Lue
Original Assignee
Promos Technologies Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Promos Technologies Inc filed Critical Promos Technologies Inc
Priority to TW94142750A priority Critical patent/TWI276832B/en
Application granted granted Critical
Publication of TWI276832B publication Critical patent/TWI276832B/en
Publication of TW200722786A publication Critical patent/TW200722786A/en

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  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Investigating Or Analyzing Materials By The Use Of Electric Means (AREA)

Abstract

A method of sample preparation for scanning capacitance microscope is described. A portion to be measured is cut off from a wafer, and material layers are disposed on the portion to be measured a gate structure and a doped region under the gate structure are disposed in the material layers, wherein the gate structure comprises a doped polysilicon layer and a spacer disposed on the sidewalls of the doped polysilicon layer. The doped polysilicon layer of the gate structure is removed, and remaining the spacer. A side of the portion to be measured is polished to form a cross-section until exposing the doped region. A dielectric layer is form on the cross-section.
TW94142750A 2005-12-05 2005-12-05 Method of sample preparation for scanning capacitance microscope and measuring method thereby TWI276832B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW94142750A TWI276832B (en) 2005-12-05 2005-12-05 Method of sample preparation for scanning capacitance microscope and measuring method thereby

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW94142750A TWI276832B (en) 2005-12-05 2005-12-05 Method of sample preparation for scanning capacitance microscope and measuring method thereby

Publications (2)

Publication Number Publication Date
TWI276832B TWI276832B (en) 2007-03-21
TW200722786A true TW200722786A (en) 2007-06-16

Family

ID=38646367

Family Applications (1)

Application Number Title Priority Date Filing Date
TW94142750A TWI276832B (en) 2005-12-05 2005-12-05 Method of sample preparation for scanning capacitance microscope and measuring method thereby

Country Status (1)

Country Link
TW (1) TWI276832B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103941043B (en) * 2013-01-18 2015-12-23 中芯国际集成电路制造(上海)有限公司 The preparation method of SCM sample transversal section

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112146953B (en) * 2020-09-21 2024-03-01 长江存储科技有限责任公司 Test sample and preparation method thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103941043B (en) * 2013-01-18 2015-12-23 中芯国际集成电路制造(上海)有限公司 The preparation method of SCM sample transversal section

Also Published As

Publication number Publication date
TWI276832B (en) 2007-03-21

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MM4A Annulment or lapse of patent due to non-payment of fees