TW200721318A - Transistor with multiple doped source/drain extension and methods for forming the same - Google Patents

Transistor with multiple doped source/drain extension and methods for forming the same

Info

Publication number
TW200721318A
TW200721318A TW095112803A TW95112803A TW200721318A TW 200721318 A TW200721318 A TW 200721318A TW 095112803 A TW095112803 A TW 095112803A TW 95112803 A TW95112803 A TW 95112803A TW 200721318 A TW200721318 A TW 200721318A
Authority
TW
Taiwan
Prior art keywords
extension
gate electrode
transistor
methods
forming
Prior art date
Application number
TW095112803A
Other languages
Chinese (zh)
Inventor
Huan-Tsung Huang
Liang-Kai Han
Original Assignee
Taiwan Semiconductor Mfg Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Taiwan Semiconductor Mfg Co Ltd filed Critical Taiwan Semiconductor Mfg Co Ltd
Publication of TW200721318A publication Critical patent/TW200721318A/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/6656—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using multiple spacer layers, e.g. multiple sidewall spacers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568—Lateral single gate silicon transistors
    • H01L29/66575—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
    • H01L29/6659—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

A MOS transistor structure is disclosed. A gate electrode is disposed on a semiconductor substrate. A first extension of a predetermined impurity type is substantially aligned with the gate electrode in the substrate. A second extension of the predetermined impurity type overlaps with the first extension in the substrate. The first extension has at least one lateral boundary line closer to the gate electrode than that of the second extension. Source and drain regions of the predetermined polarity type overlaps with the first and second extension in the substrate. The second extension has at least one lateral boundary line closer to the gate electrode than that of the source and drain regions.
TW095112803A 2005-11-22 2006-04-11 Transistor with multiple doped source/drain extension and methods for forming the same TW200721318A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/286,003 US20070114604A1 (en) 2005-11-22 2005-11-22 Double-extension formation using offset spacer

Publications (1)

Publication Number Publication Date
TW200721318A true TW200721318A (en) 2007-06-01

Family

ID=38052656

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095112803A TW200721318A (en) 2005-11-22 2006-04-11 Transistor with multiple doped source/drain extension and methods for forming the same

Country Status (2)

Country Link
US (1) US20070114604A1 (en)
TW (1) TW200721318A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI387107B (en) * 2009-01-12 2013-02-21 Vanguard Int Semiconduct Corp Semiconductor device and method for fabricating the same and lateral diffused metal-oxide-semiconductor transistor and method for fabricating the same

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9391202B2 (en) 2013-09-24 2016-07-12 Samsung Electronics Co., Ltd. Semiconductor device
KR102143249B1 (en) 2014-02-07 2020-08-11 매그나칩 반도체 유한회사 Method for manufacturing semiconductor device
CN106960795B (en) * 2016-01-11 2020-03-10 中芯国际集成电路制造(北京)有限公司 Method for forming PMOS transistor

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5759901A (en) * 1995-04-06 1998-06-02 Vlsi Technology, Inc. Fabrication method for sub-half micron CMOS transistor
US5827747A (en) * 1996-03-28 1998-10-27 Mosel Vitelic, Inc. Method for forming LDD CMOS using double spacers and large-tilt-angle ion implantation
US5998274A (en) * 1997-04-10 1999-12-07 Micron Technology, Inc. Method of forming a multiple implant lightly doped drain (MILDD) field effect transistor
US6074906A (en) * 1997-10-27 2000-06-13 Advanced Micro Devices, Inc. Complementary metal-oxide semiconductor device having source/drain regions formed using multiple spacers
US6261913B1 (en) * 2000-08-23 2001-07-17 Micron Technology, Inc. Method for using thin spacers and oxidation in gate oxides

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI387107B (en) * 2009-01-12 2013-02-21 Vanguard Int Semiconduct Corp Semiconductor device and method for fabricating the same and lateral diffused metal-oxide-semiconductor transistor and method for fabricating the same

Also Published As

Publication number Publication date
US20070114604A1 (en) 2007-05-24

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