TW200704197A - Piecewise processing of overlap smoothing and in-loop deblocking - Google Patents

Piecewise processing of overlap smoothing and in-loop deblocking

Info

Publication number
TW200704197A
TW200704197A TW095102015A TW95102015A TW200704197A TW 200704197 A TW200704197 A TW 200704197A TW 095102015 A TW095102015 A TW 095102015A TW 95102015 A TW95102015 A TW 95102015A TW 200704197 A TW200704197 A TW 200704197A
Authority
TW
Taiwan
Prior art keywords
overlap smoothing
loop deblocking
processing
piecewise processing
piecewise
Prior art date
Application number
TW095102015A
Other languages
Chinese (zh)
Other versions
TWI461065B (en
Inventor
Bill Kwan
Erik Schlanger
Casey King
Raquel Rozas
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of TW200704197A publication Critical patent/TW200704197A/en
Application granted granted Critical
Publication of TWI461065B publication Critical patent/TWI461065B/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/85—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using pre-processing or post-processing specially adapted for video compression
    • H04N19/86—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using pre-processing or post-processing specially adapted for video compression involving reduction of coding artifacts, e.g. of blockiness
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
    • H04N19/169—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding
    • H04N19/17—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object
    • H04N19/176—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object the region being a block, e.g. a macroblock
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/42—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/44—Decoders specially adapted therefor, e.g. video decoders which are asymmetric with respect to the encoder
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/60—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding
    • H04N19/61—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding in combination with predictive coding
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/80—Details of filtering operations specially adapted for video compression, e.g. for pixel interpolation
    • H04N19/82—Details of filtering operations specially adapted for video compression, e.g. for pixel interpolation involving filtering within a prediction loop

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Compression Or Coding Systems Of Tv Signals (AREA)

Abstract

A video processing apparatus and methodology are implemented as a combination of a processor and a video decoding hardware block to decode video data by performing piecewise processing of overlap smoothing and in-loop deblocking in a macroblock-based fashion. With this approach, a smaller on-board memory may be used for the in-loop filtering operations of the video decoding hardware block. By pipelining the piecewise processing operations, latency in the filtering operations is hidden and the filtering output is smoothed, thereby avoiding the need for bursts of fetching and storing of blocks.
TW095102015A 2005-01-25 2006-01-19 Piecewise processing of overlap smoothing and in-loop deblocking TWI461065B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/042,366 US8576924B2 (en) 2005-01-25 2005-01-25 Piecewise processing of overlap smoothing and in-loop deblocking

Publications (2)

Publication Number Publication Date
TW200704197A true TW200704197A (en) 2007-01-16
TWI461065B TWI461065B (en) 2014-11-11

Family

ID=36282870

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095102015A TWI461065B (en) 2005-01-25 2006-01-19 Piecewise processing of overlap smoothing and in-loop deblocking

Country Status (8)

Country Link
US (1) US8576924B2 (en)
JP (1) JP5390773B2 (en)
KR (1) KR101227667B1 (en)
CN (2) CN103188495B (en)
DE (1) DE112006000271T5 (en)
GB (1) GB2441188B (en)
TW (1) TWI461065B (en)
WO (1) WO2006081097A1 (en)

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Also Published As

Publication number Publication date
TWI461065B (en) 2014-11-11
GB0713744D0 (en) 2007-08-22
US20060165181A1 (en) 2006-07-27
WO2006081097A1 (en) 2006-08-03
KR101227667B1 (en) 2013-01-29
KR20070104568A (en) 2007-10-26
US8576924B2 (en) 2013-11-05
JP2008529411A (en) 2008-07-31
CN103188495A (en) 2013-07-03
GB2441188B (en) 2010-08-25
CN101107861B (en) 2013-03-27
CN103188495B (en) 2016-12-28
GB2441188A (en) 2008-02-27
CN101107861A (en) 2008-01-16
JP5390773B2 (en) 2014-01-15
DE112006000271T5 (en) 2007-12-13

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