TW200642299A - Digital data slicing circuit and slicing method - Google Patents

Digital data slicing circuit and slicing method

Info

Publication number
TW200642299A
TW200642299A TW094115864A TW94115864A TW200642299A TW 200642299 A TW200642299 A TW 200642299A TW 094115864 A TW094115864 A TW 094115864A TW 94115864 A TW94115864 A TW 94115864A TW 200642299 A TW200642299 A TW 200642299A
Authority
TW
Taiwan
Prior art keywords
slicing
signal
jitter
circuit
pll
Prior art date
Application number
TW094115864A
Other languages
Chinese (zh)
Other versions
TWI275254B (en
Inventor
Sheng-Hung Wu
Original Assignee
Cheertek Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Cheertek Inc filed Critical Cheertek Inc
Priority to TW094115864A priority Critical patent/TWI275254B/en
Priority to US11/162,326 priority patent/US20060262686A1/en
Publication of TW200642299A publication Critical patent/TW200642299A/en
Application granted granted Critical
Publication of TWI275254B publication Critical patent/TWI275254B/en

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B7/00—Recording or reproducing by optical means, e.g. recording using a thermal beam of optical radiation by modifying optical properties or the physical structure, reproducing using an optical beam at lower power by sensing optical properties; Record carriers therefor
    • G11B7/004—Recording, reproducing or erasing methods; Read, write or erase circuits therefor
    • G11B7/005—Reproducing
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/10009—Improvement or modification of read or write signals
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/10009—Improvement or modification of read or write signals
    • G11B20/10046—Improvement or modification of read or write signals filtering or equalising, e.g. setting the tap weights of an FIR filter
    • G11B20/10212—Improvement or modification of read or write signals filtering or equalising, e.g. setting the tap weights of an FIR filter compensation for data shift, e.g. pulse-crowding effects
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/10009—Improvement or modification of read or write signals
    • G11B20/10305—Improvement or modification of read or write signals signal quality assessment
    • G11B20/10398—Improvement or modification of read or write signals signal quality assessment jitter, timing deviations or phase and frequency errors
    • G11B20/10425—Improvement or modification of read or write signals signal quality assessment jitter, timing deviations or phase and frequency errors by counting out-of-lock events of a PLL

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

A digital data slicing circuit and slicing method is provided. The digital data slicing circuit includes a slicer, a PLL, a data jitter circuit and level calculator. The slicer receives a RF signal and a slicing level and outputs a digital signal. The PLL outputs a PLL clock according to the digital signal. The data jitter circuit obtains a jitter signal by comparing the digital signal and the PLL signal, and outputs a jitter error signal by making a jitter calculating with the jitter signal, digital signal and the PLL signal. The level calculator receives the jitter error signal and adjusts and outputs the slicing level.
TW094115864A 2005-05-17 2005-05-17 Digital data slicing circuit and slicing method TWI275254B (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
TW094115864A TWI275254B (en) 2005-05-17 2005-05-17 Digital data slicing circuit and slicing method
US11/162,326 US20060262686A1 (en) 2005-05-17 2005-09-07 Digital data slicing circuit and slicing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW094115864A TWI275254B (en) 2005-05-17 2005-05-17 Digital data slicing circuit and slicing method

Publications (2)

Publication Number Publication Date
TW200642299A true TW200642299A (en) 2006-12-01
TWI275254B TWI275254B (en) 2007-03-01

Family

ID=37448199

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094115864A TWI275254B (en) 2005-05-17 2005-05-17 Digital data slicing circuit and slicing method

Country Status (2)

Country Link
US (1) US20060262686A1 (en)
TW (1) TWI275254B (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4973169B2 (en) * 2006-12-13 2012-07-11 ソニー株式会社 Video equipment and jitter / wander measurement method
US8064510B1 (en) * 2007-03-15 2011-11-22 Netlogic Microsystems, Inc. Analog encoder based slicer
US8040943B1 (en) 2007-03-15 2011-10-18 Netlogic Microsystems, Inc. Least mean square (LMS) engine for multilevel signal
US8054873B2 (en) * 2007-03-15 2011-11-08 Netlogic Microsystems, Inc. Joint phased training of equalizer and echo canceller
US8619897B2 (en) * 2008-12-09 2013-12-31 Netlogic Microsystems, Inc. Method and apparatus of frequency domain echo canceller
TWI390506B (en) * 2009-05-20 2013-03-21 Novatek Microelectronics Corp Calibration device for data recovery device and method thereof

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE69025667T2 (en) * 1989-08-02 1996-08-22 Sharp Kk Device for recording / reproducing a video signal
JPH06187737A (en) * 1992-12-16 1994-07-08 Canon Inc Information recording and reproducing device
TW341415U (en) * 1997-04-08 1998-09-21 United Microelectronics Corp A digital data cutting circuit
DE19715274A1 (en) * 1997-04-12 1998-10-15 Thomson Brandt Gmbh Read and write system for optical disc
JP2002015528A (en) * 2000-06-29 2002-01-18 Fujitsu Ltd Data-reproducing device
CN1252687C (en) * 2001-02-05 2006-04-19 雅马哈株式会社 Optical disc device for regulating recording speed and laser power
EP1286493B1 (en) * 2001-02-23 2008-09-03 Anritsu Corporation Instrument for measuring characteristic of data transmission system with high accuracy and clock reproducing circuit used therefor
US7035187B2 (en) * 2002-12-13 2006-04-25 Via Technologies, Inc. Apparatus and method for generating RFZC signal for optical systems

Also Published As

Publication number Publication date
US20060262686A1 (en) 2006-11-23
TWI275254B (en) 2007-03-01

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees