TW200637317A - Process of and apparatus for encoding a digital input - Google Patents
Process of and apparatus for encoding a digital inputInfo
- Publication number
- TW200637317A TW200637317A TW094135511A TW94135511A TW200637317A TW 200637317 A TW200637317 A TW 200637317A TW 094135511 A TW094135511 A TW 094135511A TW 94135511 A TW94135511 A TW 94135511A TW 200637317 A TW200637317 A TW 200637317A
- Authority
- TW
- Taiwan
- Prior art keywords
- type
- operations
- logical
- inverse
- cryptographic process
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/06—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
- H04L9/0618—Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
AU2004905897A AU2004905897A0 (en) | 2004-10-13 | Process of and apparatus for encoding a digital input |
Publications (1)
Publication Number | Publication Date |
---|---|
TW200637317A true TW200637317A (en) | 2006-10-16 |
Family
ID=36118193
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW094135511A TW200637317A (en) | 2004-10-13 | 2005-10-12 | Process of and apparatus for encoding a digital input |
Country Status (2)
Country | Link |
---|---|
TW (1) | TW200637317A (fr) |
WO (1) | WO2006040682A2 (fr) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9128698B2 (en) * | 2012-09-28 | 2015-09-08 | Intel Corporation | Systems, apparatuses, and methods for performing rotate and XOR in response to a single instruction |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CA2302784A1 (fr) * | 1997-09-17 | 1999-03-25 | Frank C. Luyster | Procede de chiffrement bloc ameliore |
US6269163B1 (en) * | 1998-06-15 | 2001-07-31 | Rsa Security Inc. | Enhanced block ciphers with data-dependent rotations |
US6483918B2 (en) * | 1999-06-09 | 2002-11-19 | Microsoft Corporation | Technique for producing a parameter, such as a checksum, through a primitive that uses elementary register operations |
US20020114451A1 (en) * | 2000-07-06 | 2002-08-22 | Richard Satterfield | Variable width block cipher |
-
2005
- 2005-10-12 WO PCT/IB2005/003371 patent/WO2006040682A2/fr active Application Filing
- 2005-10-12 TW TW094135511A patent/TW200637317A/zh unknown
Also Published As
Publication number | Publication date |
---|---|
WO2006040682A2 (fr) | 2006-04-20 |
WO2006040682A3 (fr) | 2006-07-27 |
WO2006040682A9 (fr) | 2006-06-08 |
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