TW200636494A - Double data rate serial encoder - Google Patents

Double data rate serial encoder

Info

Publication number
TW200636494A
TW200636494A TW094141286A TW94141286A TW200636494A TW 200636494 A TW200636494 A TW 200636494A TW 094141286 A TW094141286 A TW 094141286A TW 94141286 A TW94141286 A TW 94141286A TW 200636494 A TW200636494 A TW 200636494A
Authority
TW
Taiwan
Prior art keywords
mux
inputs
serial encoder
data rate
double data
Prior art date
Application number
TW094141286A
Other languages
Chinese (zh)
Other versions
TWI412936B (en
Inventor
Brian Steele
George A Wiley
Curtis Musfeldt
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US11/285,397 external-priority patent/US7315265B2/en
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of TW200636494A publication Critical patent/TW200636494A/en
Application granted granted Critical
Publication of TWI412936B publication Critical patent/TWI412936B/en

Links

Abstract

A double data rate serial encoder is provided. The serial encoder comprises a mux having a plurality of inputs, a plurality of latches coupled to the inputs of the mux, an enabler to enable the latches to update their data inputs, and a counter to select one of the plurality of inputs of the mux for output. In another aspect, the mux provides a glitch-less output during input transitions. The mux includes an output selection algorithm optimized based on a priori knowledge of an input selection sequence provided by the counter.
TW94141286A 2004-11-24 2005-11-24 Double data rate serial encoder TWI412936B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US63085304P 2004-11-24 2004-11-24
US11/285,397 US7315265B2 (en) 2004-11-24 2005-11-23 Double data rate serial encoder

Publications (2)

Publication Number Publication Date
TW200636494A true TW200636494A (en) 2006-10-16
TWI412936B TWI412936B (en) 2013-10-21

Family

ID=49771674

Family Applications (1)

Application Number Title Priority Date Filing Date
TW94141286A TWI412936B (en) 2004-11-24 2005-11-24 Double data rate serial encoder

Country Status (1)

Country Link
TW (1) TWI412936B (en)

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5418452A (en) * 1993-03-25 1995-05-23 Fujitsu Limited Apparatus for testing integrated circuits using time division multiplexing
JPH11249987A (en) * 1998-03-05 1999-09-17 Nec Corp Message processor, its method and storage medium storing message processing control program
WO2000027079A1 (en) * 1998-10-30 2000-05-11 Broadcom Corporation Internet gigabit ethernet transmitter architecture
US6725412B1 (en) * 2000-08-15 2004-04-20 Dolby Laboratories Licensing Corporation Low latency data encoder
US6760772B2 (en) * 2000-12-15 2004-07-06 Qualcomm, Inc. Generating and implementing a communication protocol and interface for high data rate signal transfer
DE10145722A1 (en) * 2001-09-17 2003-04-24 Infineon Technologies Ag Concept for secure data communication between electronic components

Also Published As

Publication number Publication date
TWI412936B (en) 2013-10-21

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees