TW200633088A - Solder bump manufacturing method of avoiding wafer warpage - Google Patents
Solder bump manufacturing method of avoiding wafer warpageInfo
- Publication number
- TW200633088A TW200633088A TW094106733A TW94106733A TW200633088A TW 200633088 A TW200633088 A TW 200633088A TW 094106733 A TW094106733 A TW 094106733A TW 94106733 A TW94106733 A TW 94106733A TW 200633088 A TW200633088 A TW 200633088A
- Authority
- TW
- Taiwan
- Prior art keywords
- layer
- bonding pads
- wafer
- several
- solder bump
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/11—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
Abstract
A solder bump manufacturing method of avoiding wafer warpage. A wafer having upper and lower surfaces is first provided, and several bonding pads are formed on the upper surface of the wafer. Then, a passivation layer covers the upper surface and several bonding pads but exposes the surfaces of the bonding pads. After that, an under-bump metallic layer is formed on the passivation layer and the exposed surfaces of the bonding pads. A photo resist layer having several openings is disposed on theunder-bump metallic layer. Subsequently, a supporting layer is laminated on the lower surface of the wafer. Several solders are then filled into the openings of the photo resist layer. At last, the photo resist layer is stripped away.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW094106733A TWI259545B (en) | 2005-03-04 | 2005-03-04 | Solder bump manufacturing method of avoiding wafer warpage |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW094106733A TWI259545B (en) | 2005-03-04 | 2005-03-04 | Solder bump manufacturing method of avoiding wafer warpage |
Publications (2)
Publication Number | Publication Date |
---|---|
TWI259545B TWI259545B (en) | 2006-08-01 |
TW200633088A true TW200633088A (en) | 2006-09-16 |
Family
ID=37873446
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW094106733A TWI259545B (en) | 2005-03-04 | 2005-03-04 | Solder bump manufacturing method of avoiding wafer warpage |
Country Status (1)
Country | Link |
---|---|
TW (1) | TWI259545B (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI626460B (en) | 2017-10-25 | 2018-06-11 | 財團法人工業技術研究院 | Method of yield prejudgment and bump re-assignment and computer readable storage medium |
-
2005
- 2005-03-04 TW TW094106733A patent/TWI259545B/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
TWI259545B (en) | 2006-08-01 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
MM4A | Annulment or lapse of patent due to non-payment of fees |