TW200623636A - Sequencer and method for sequencing - Google Patents
Sequencer and method for sequencingInfo
- Publication number
- TW200623636A TW200623636A TW094112863A TW94112863A TW200623636A TW 200623636 A TW200623636 A TW 200623636A TW 094112863 A TW094112863 A TW 094112863A TW 94112863 A TW94112863 A TW 94112863A TW 200623636 A TW200623636 A TW 200623636A
- Authority
- TW
- Taiwan
- Prior art keywords
- actual
- sequencing
- state
- states
- sequencer
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3177—Testing of logic operation, e.g. by logic analysers
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/25—Testing of logic operation, e.g. by logic analysers
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/02—Comparing digital values
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Computer Hardware Design (AREA)
- Computational Mathematics (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- Logic Circuits (AREA)
- Tests Of Electronic Circuits (AREA)
- Management, Administration, Business Operations System, And Electronic Commerce (AREA)
Abstract
A method and apparatus for sequencing determines possible next states for respective possible previous states based upon resources, selects one of the possible next states as an actual next state based upon an actual previous state, and communicates the actual next state as the actual previous state.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/022,252 US7684447B2 (en) | 2004-12-23 | 2004-12-23 | Sequencer and method for sequencing |
Publications (1)
Publication Number | Publication Date |
---|---|
TW200623636A true TW200623636A (en) | 2006-07-01 |
Family
ID=35736049
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW094112863A TW200623636A (en) | 2004-12-23 | 2005-04-22 | Sequencer and method for sequencing |
Country Status (6)
Country | Link |
---|---|
US (1) | US7684447B2 (en) |
JP (1) | JP2006178970A (en) |
KR (1) | KR20060073488A (en) |
CN (1) | CN1794200A (en) |
GB (1) | GB2422029A (en) |
TW (1) | TW200623636A (en) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7684447B2 (en) * | 2004-12-23 | 2010-03-23 | Agilent Technologies, Inc. | Sequencer and method for sequencing |
US20060153248A1 (en) * | 2004-12-23 | 2006-07-13 | Michael Rytting | Counter proxy |
US11824761B1 (en) * | 2018-11-26 | 2023-11-21 | Xilinx, Inc. | Identifying alignment markers using partial correlators |
Family Cites Families (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4641348A (en) * | 1983-11-09 | 1987-02-03 | Hewlett-Packard Company | Timing or logic state analyzer with automatic qualified inferential marking and post processing of captured trace data |
US4985825A (en) * | 1989-02-03 | 1991-01-15 | Digital Equipment Corporation | System for delaying processing of memory access exceptions until the execution stage of an instruction pipeline of a virtual memory system based digital computer |
GB8912570D0 (en) | 1989-06-01 | 1989-07-19 | Optimum Solutions Ltd | Logic analyzer |
US5335253A (en) * | 1992-10-01 | 1994-08-02 | Gould, Inc. | Non-integral frequency division using regulated digital divider circuits |
US6094729A (en) * | 1997-04-08 | 2000-07-25 | Advanced Micro Devices, Inc. | Debug interface including a compact trace record storage |
US6247147B1 (en) * | 1997-10-27 | 2001-06-12 | Altera Corporation | Enhanced embedded logic analyzer |
US6105087A (en) * | 1998-06-10 | 2000-08-15 | Hewlett-Packard Company | Event recognition by a state machine whose state is dependent upon historical information |
US6256753B1 (en) * | 1998-06-30 | 2001-07-03 | Sun Microsystems, Inc. | Bus error handling in a computer system |
US6486809B1 (en) * | 1999-06-02 | 2002-11-26 | Texas Instruments Incorporated | Analog to digital converter with configurable sequence controller |
US6615370B1 (en) * | 1999-10-01 | 2003-09-02 | Hitachi, Ltd. | Circuit for storing trace information |
US6732307B1 (en) * | 1999-10-01 | 2004-05-04 | Hitachi, Ltd. | Apparatus and method for storing trace information |
US6918065B1 (en) * | 1999-10-01 | 2005-07-12 | Hitachi, Ltd. | Method for compressing and decompressing trace information |
US6470485B1 (en) * | 2000-10-18 | 2002-10-22 | Lattice Semiconductor Corporation | Scalable and parallel processing methods and structures for testing configurable interconnect network in FPGA device |
US6760867B2 (en) * | 2001-03-08 | 2004-07-06 | International Business Machines Corporation | Guaranteed method and apparatus for capture of debug data |
US7185234B1 (en) * | 2001-04-30 | 2007-02-27 | Mips Technologies, Inc. | Trace control from hardware and software |
US6697466B2 (en) * | 2002-03-05 | 2004-02-24 | Emware, Inc. | Audio status communication from an embedded device |
US6836743B1 (en) * | 2002-10-15 | 2004-12-28 | Agilent Technologies, Inc. | Compensating for unequal load and source match in vector network analyzer calibration |
US7080283B1 (en) * | 2002-10-15 | 2006-07-18 | Tensilica, Inc. | Simultaneous real-time trace and debug for multiple processing core systems on a chip |
US7127639B2 (en) * | 2002-11-22 | 2006-10-24 | Texas Instruments Incorporated | Distinguishing between two classes of trace information |
US7149933B2 (en) * | 2003-08-07 | 2006-12-12 | Arm Limited | Data processing system trace bus |
US7684447B2 (en) * | 2004-12-23 | 2010-03-23 | Agilent Technologies, Inc. | Sequencer and method for sequencing |
US20060236148A1 (en) * | 2005-01-21 | 2006-10-19 | Glenn Wood | One hot counter proxy |
-
2004
- 2004-12-23 US US11/022,252 patent/US7684447B2/en active Active
-
2005
- 2005-04-22 TW TW094112863A patent/TW200623636A/en unknown
- 2005-08-19 CN CNA2005100931593A patent/CN1794200A/en active Pending
- 2005-12-13 GB GB0525374A patent/GB2422029A/en not_active Withdrawn
- 2005-12-16 JP JP2005362626A patent/JP2006178970A/en not_active Withdrawn
- 2005-12-22 KR KR1020050127961A patent/KR20060073488A/en not_active Application Discontinuation
Also Published As
Publication number | Publication date |
---|---|
JP2006178970A (en) | 2006-07-06 |
US7684447B2 (en) | 2010-03-23 |
GB0525374D0 (en) | 2006-01-18 |
KR20060073488A (en) | 2006-06-28 |
GB2422029A (en) | 2006-07-12 |
CN1794200A (en) | 2006-06-28 |
US20060153195A1 (en) | 2006-07-13 |
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